A method for manufacturing a small-pitch LED display screen and an LED display screen

Abstract

The present invention provides a method for manufacturing a fine-pitch LED display screen and an LED display screen. The method includes: growing epitaxial layers on different substrates to obtain individual epitaxial wafers; forming a transparent conductive layer on the epitaxial wafer, and etching the transparent conductive layer to form mesa steps and cutting paths to expose a first semiconductor layer; forming electrode layers of different polarities on the transparent conductive layer and the first semiconductor layer of the epitaxial wafer, and forming an insulating reflective layer on the epitaxial wafer to expose the electrode layer; forming a common electrode interconnect layer on one electrode layer of at least two LED chips to combine the individual LED chips into an LED chipset; forming a metal bonding layer on each other electrode layer of the LED chipset and the common electrode interconnect layer of one of the LED chips; grinding and thinning the substrate of the LED chipset and cutting along the cutting paths; and testing, sorting, and packaging the individual LED chipset to form an LED display screen. The present invention solves the problem of low efficiency in existing LED chip cutting, sorting, and packaging methods.

Description

Technical Field

[0001] The present invention relates to the field of optoelectronic technology, and in particular to a method for manufacturing a small-pitch LED display screen and the LED display screen. Background Art

[0002] With the continuous development of LED display technology, small-pitch LED display screens have great potential in the future display field. As the requirements for pixel density of display screens increase, that is, the size of LED chips and the unit spacing are getting smaller and smaller, the difficulty in packaging will become greater and greater. After a 4-inch epitaxial wafer is completed through the front-end process of the chip, a 50-400μm long and wide LED chip is formed. After grinding, cutting, testing and sorting, hundreds of thousands of LED chips are produced on an epitaxial wafer. The blue, green and red LED chips are then packaged. Every three LED chips of different colors form a pixel point, and finally assembled into an LED display screen. Its existing reference Figure 5 shown.

[0003] However, as the size of LED chips decreases, the time required to cut and sort an epitaxial wafer will increase, which will have a significant impact on production capacity. At the same time, as the size of LED chips continues to shrink, the difficulty of transferring from the chip end to the packaging end will become increasingly higher. The smaller the LED chip size, the more difficult it is to transfer. Currently, the packaging end can only package one LED chip at a time, which undoubtedly greatly slows down the packaging speed. When the size of the LED chip is small to near the micro level, sorting and packaging operations will become impossible.

[0004] In addition, in most cases, each LED chip needs to be set up with two PAD points for electrical connection to achieve individual driving of each LED chip. This means that the setting of the driving source on the PCB board corresponding to the LED display screen also needs to correspond one-to-one with the number of LED chips, which undoubtedly increases the difficulty of manufacturing. Summary of the Invention

[0005] Based on this, the purpose of the present invention is to provide a method for manufacturing a small-pitch LED display screen and an LED display screen, so as to fundamentally solve the problem of low efficiency in cutting, sorting and packaging of existing LED chips.

[0006] A method for manufacturing a small-pitch LED display screen according to an embodiment of the present invention includes:

[0007] Epitaxial layers are grown on different substrates to obtain epitaxial wafers of different wavelength bands, wherein the epitaxial wafers include red epitaxial wafers, green epitaxial wafers and blue epitaxial wafers;

[0008] forming a transparent conductive layer on the second semiconductor layer on the surface of each epitaxial wafer, and etching the transparent conductive layer to form a mesa step exposing the first semiconductor layer and a cutting street for cutting;

[0009] forming electrode layers of different polarities on the transparent conductive layer and the exposed first semiconductor layer of each epitaxial wafer, and forming an insulating reflective layer on the epitaxial wafer to expose the electrode layer;

[0010] A common electrode interconnection layer is formed on one of the electrode layers of at least two LED chips of the same wavelength band, interconnecting the electrode layers of the same polarity, so that the at least two LED chips of the same wavelength band are combined to form an LED chip group of the corresponding wavelength band;

[0011] forming metal bonding layers respectively on each other electrode layer of the LED chip group and the common electrode connecting layer in one of the LED chips;

[0012] Grinding and thinning the substrate of the LED chipset and cutting along the cutting paths of the LED chips at the periphery of the LED chipset;

[0013] The LED chipsets of each band are tested, sorted, and packaged in sequence to form an LED display screen.

[0014] In addition, the method for manufacturing a small-pitch LED display screen according to the above embodiment of the present invention may also have the following additional technical features:

[0015] Furthermore, the step of etching the transparent conductive layer to form a mesa step exposing the first semiconductor layer and a cutting street for cutting includes:

[0016] Performing photolithography on the transparent conductive layer to form a special pattern mask of mesa, wherein the photolithography includes coating, exposure and development operations;

[0017] removing the transparent conductive layer outside the mask by wet etching to expose the second semiconductor layer;

[0018] ICP etching is performed until the first semiconductor layer is exposed to form a mesa step, and a stripping operation is performed;

[0019] Perform photolithography to form a special pattern mask for ISO on the surface of the epitaxial wafer;

[0020] Cutting streets are formed by ICP etching, and a stripping operation is performed.

[0021] Furthermore, the step of forming electrode layers of different polarities on the transparent conductive layer and the exposed first semiconductor layer of each epitaxial wafer includes:

[0022] A special pattern mask for photolithography to form the electrode layer on the surface of the epitaxial wafer;

[0023] Metal is evaporated on the transparent conductive layer and the exposed first semiconductor layer through a metal evaporation process to form electrode layers with different polarities, and then a stripping operation is performed.

[0024] Furthermore, the insulating reflective layer includes an insulating protective layer and a reflective layer;

[0025] The step of forming an insulating reflective layer on the epitaxial wafer and exposing the electrode layer comprises:

[0026] depositing an insulating protective layer and a reflective layer in sequence on the epitaxial wafer;

[0027] A special pattern mask for photolithography to form an insulating reflective layer on the surface of the epitaxial wafer;

[0028] ICP etching is performed to expose the electrode layer, and then a stripping operation is performed.

[0029] Furthermore, the step of forming a common electrode connecting layer connecting electrode layers of the same polarity on one of the electrode layers of at least two LED chips of the same wavelength band includes:

[0030] Performing photolithography on the surfaces of at least two LED chips in the same wavelength band to form a special pattern mask for a common electrode interconnection layer;

[0031] Metal is evaporated on one of the electrode layers exposed by each LED chip through a metal evaporation process to form a common electrode interconnection layer, so that the electrode layers of the same polarity of at least two LED chips in the same band are interconnected through the common electrode interconnection layer, and a debonding operation is performed.

[0032] Furthermore, the step of forming a metal bonding layer on each other electrode layer of the LED chip group and the common electrode connecting layer in one of the LED chips includes:

[0033] A special pattern mask is used to photolithographically form a metal bonding layer on each LED chip in the LED chip group;

[0034] Metal is evaporated on the other electrode layer exposed by each LED chip and the common electrode connecting layer in one of the LED chips through a metal evaporation process to form a metal bonding layer, and then a debonding operation is performed.

[0035] Furthermore, the transparent conductive layer is an ITO transparent conductive layer, an FTO transparent conductive layer, a ZAO transparent conductive layer or a Ni micro-grid transparent conductive layer;

[0036] The metal composition of the electrode layer, the common electrode interconnection layer and the metal bonding layer includes any one or more combinations of Cr, Al, Ti, Pt, Ni and Au;

[0037] The photoresist thickness corresponding to the photolithography is 2.5-10 μm, the exposure amount is 150-1000 mj, and the development time is 50-250 s.

[0038] An LED display screen for fine pitch according to an embodiment of the present invention includes:

[0039] LED chipsets of different wavelengths arranged in an array, the LED chipsets comprising a red LED chipset, a green LED chipset, and a blue LED chipset;

[0040] The LED chip group is composed of at least two LED chips, and the LED chip includes a substrate, and an epitaxial layer, a transparent conductive layer, an electrode layer, an insulating reflective layer, a common electrode connecting layer, and a metal bonding layer stacked in sequence on the substrate;

[0041] The epitaxial layer includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer stacked in sequence on the substrate, the transparent conductive layer is arranged on the second semiconductor layer, the electrode layers are respectively arranged on the first semiconductor layer and the transparent conductive layer, the insulating reflective layer is provided with an opening exposing the electrode layer, the common electrode connecting layer is provided on one of the openings exposing the electrode layer, and the common electrode connecting layers in each LED chip are interconnected, the metal bonding layer is provided on the other opening exposing the electrode layer, and the metal bonding layer is also provided on the common electrode connecting layer in one of the LED chips in the LED chip group.

[0042] Furthermore, the metal components of the electrode layer, the common electrode interconnection layer and the metal bonding layer include any one or more combinations of Cr, Al, Ti, Pt, Ni and Au.

[0043] Furthermore, the insulating reflective layer includes an insulating protective layer and a reflective layer, the insulating protective layer includes a SiN layer or a SiO2 layer, and the reflective layer includes an Ag reflective layer or a DBR reflective layer.

[0044] Compared with the prior art: by setting a common electrode connecting layer, the electrode layers of the same polarity in at least two LED chips are connected to form an LED chip group, so that it is only necessary to cut into LED chip groups instead of cutting into each LED chip, thereby improving the cutting efficiency. At the same time, the multiple LED chips on the LED chip group can be regarded as a whole for sorting and packaging, so that multiple LED chips can be sorted and packaged at one time, which in turn enlarges the size of the LED chip and reduces the difficulty of sorting and packaging; at the same time, since multiple LED chips can be sorted and packaged at one time, the efficiency of sorting and packaging is effectively improved. At the same time, when setting the metal bonding layer, since one of the electrode layers in each LED chip in each LED chip group is connected through the common electrode connecting layer, it is only necessary to set one metal bonding layer to complete the packaging of one pole of the LED chip group and the metal bonding layer corresponding to the number of LED chips to complete the packaging of the other pole of the LED chip group, so that the number of metal bonding layers used in the packaging end can be reduced. At the same time, the packaging process also reduces the use of driving sources required for the corresponding metal bonding layer. At this time, the number of driving sources set on the PCB board is also reduced accordingly, and the manufacturing difficulty of the PCB board can also be reduced. At the same time, since a certain level of voltage or current of each LED chip in the LED chip group can be kept consistent, the display of the LED display screen can be better controlled, solving the problem of low efficiency in the existing LED chip cutting, sorting and packaging. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 This is a flow chart of a method for manufacturing a small-pitch LED display screen in a first embodiment of the present invention;

[0046] Figure 2 Schematic diagram of the structure of a small-pitch LED display screen in a second embodiment of the present invention;

[0047] Figure 3 Schematic diagram of the structure of an LED chipset for a fine-pitch LED display screen in a second embodiment of the present invention;

[0048] Figure 4 4 is a cross-sectional view of an LED chip used in a fine-pitch LED display screen according to a second embodiment of the present invention;

[0049] Figure 5 It is a structural diagram of an LED display screen in the prior art.

[0050] The following specific embodiments will further illustrate the present invention in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0051] To facilitate understanding of the present invention, the present invention will be described more fully below with reference to the accompanying drawings. The drawings illustrate several embodiments of the present invention. However, the present invention may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the present invention.

[0052] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be an intermediate element. When an element is referred to as being "connected to" another element, it may be directly connected to the other element or there may be an intermediate element. The terms "vertical," "horizontal," "left," "right," and similar expressions used herein are for illustrative purposes only.

[0053] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this invention pertains. The terms used in this specification of the present invention are for the purpose of describing specific embodiments only and are not intended to limit the present invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0054] Example 1

[0055] See also Figure 1 , shown is a method for manufacturing a small-pitch LED display screen in a first embodiment of the present invention, and the method specifically includes steps S01 to S07.

[0056] Step S01 : growing epitaxial layers on different substrates to obtain epitaxial wafers of different wavelength bands, wherein the epitaxial wafers include red epitaxial wafers, green epitaxial wafers and blue epitaxial wafers.

[0057] Among them, in an embodiment of the present invention, its manufacturing method is used to manufacture an LED display screen, wherein the LED display screen is composed of a plurality of pixel points arranged in an array, and the vertical and horizontal numbers of the pixel points are set accordingly according to the pixel resolution required by the LED display screen, wherein each pixel point is composed of LED chips of three different bands of blue, green and red. Therefore, in order to realize the production of the LED display screen, it is necessary to first prepare LED chips of three bands, which is usually done by first performing an epitaxial layer production on a large substrate to obtain an epitaxial wafer, and then performing production of a P electrode and an N electrode on the epitaxial wafer to obtain an LED wafer. At this time, hundreds of thousands of LED chips can be produced on one epitaxial wafer, so the produced LED wafer needs to be ground and cut to obtain the final LED chips.

[0058] Therefore, epitaxial layers are first grown on different substrates to obtain epitaxial wafers of various wavelength bands, namely red epitaxial wafers, green epitaxial wafers and blue epitaxial wafers. The main method is to adjust the elemental composition ratio of the semiconductor in the epitaxial layer so that the light-emitting layer in the epitaxial layer can emit the desired wavelength, such as providing ultraviolet, blue, red, infrared and other light radiation. At this time, the specific materials of the epitaxial layers in the epitaxial wafers of each wavelength band are set according to the actual production application so that the required red epitaxial wafers, green epitaxial wafers and blue epitaxial wafers can be prepared, and no specific limitation is made here.

[0059] The substrate is the base upon which the epitaxial layer is grown, providing support and stability. It can be an insulating substrate or a conductive substrate, and can be planar or patterned. Substrate materials include, but are not limited to, sapphire, aluminum nitride, gallium nitride, silicon, and silicon carbide. Specifically, in the embodiments of the present invention, a sapphire substrate is used.

[0060] Furthermore, the epitaxial layer includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked in sequence on the substrate, wherein the polarity of the first semiconductor layer is opposite to that of the second semiconductor layer. Specifically, in an embodiment of the present invention, the first semiconductor layer is an N-type semiconductor layer, such as an N-type gallium nitride layer (GaN); correspondingly, the second semiconductor layer is a P-type semiconductor layer, such as a P-type gallium nitride layer. It should be noted that the N-type semiconductor layer is a semiconductor layer formed by silicon doping or carbon doping, while the P-type semiconductor layer is a semiconductor layer formed by magnesium doping or zinc doping. It is understandable that in other embodiments of the present invention, the first semiconductor layer can also be a P-type semiconductor layer, and the second semiconductor layer can also be an N-type semiconductor layer. The corresponding epitaxial wafer is manufactured according to actual production conditions and requirements, and is not specifically limited here.

[0061] Step S02 : forming a transparent conductive layer on the second semiconductor layer on the surface of each epitaxial wafer, and etching the transparent conductive layer to form mesa steps exposing the first semiconductor layer and cutting streets for cutting.

[0062] In an embodiment of the present invention, after growing epitaxial wafers of various wavelength bands on a substrate, a transparent conductive layer is deposited on the second semiconductor layer (i.e., the P-type semiconductor layer) on the surface of each epitaxial wafer. The transparent conductive layer is deposited by bombarding a target material with magnetron sputtering. The transparent conductive layer is an ITO (tin-doped indium oxide) transparent conductive layer, an FTO (fluorine-doped tin oxide) transparent conductive layer, a ZAO (aluminum-doped zinc oxide) transparent conductive layer, or a Ni micro-grid transparent conductive layer. Specifically, an ITO transparent conductive layer is used in this embodiment, and the thickness of the deposited transparent conductive layer is 120-1200A (angstroms). The function of the transparent conductive layer is to facilitate the diffusion of current and form an ohmic contact.

[0063] Furthermore, in an embodiment of the present invention, after forming a transparent conductive layer on the second semiconductor layer on the surface of each epitaxial wafer, etching is performed on the transparent conductive layer to form a mesa step exposing the first semiconductor layer and a cutting street for cutting, the steps of which include:

[0064] A special pattern mask for mesa is formed by photolithography on the transparent conductive layer, and the photolithography includes coating, exposure and development operations; the transparent conductive layer outside the mask is removed by wet etching to expose the second semiconductor layer; ICP etching is performed to expose the first semiconductor layer to form a mesa step, and a de-stripping operation is performed; a special pattern mask for ISO is formed by photolithography on the surface of the epitaxial wafer; cutting streets are formed by ICP etching, and a de-stripping operation is performed.

[0065] Specifically, a layer of photoresist is first coated on the surface of the transparent conductive layer, wherein the thickness of the photoresist corresponding to the photolithography is 2.5-10 μm. Then, the photoresist layer formed on the transparent conductive layer is exposed and developed through a mesa photomask, wherein the exposure amount is 150-1000 mj (millijoules) and the development time is 50-250 seconds, thereby forming a photoresist layer with a mesa special pattern. At this time, the photoresist layer with the mesa special pattern is used as a mask, and then a mixed solution obtained by mixing hydrochloric acid and ferric chloride in a certain ratio (hydrochloric acid: ferric chloride = 10:22) is wet-etched to remove the transparent conductive layer outside the mask, thereby exposing the second semiconductor layer. Then, ICP etching is performed to further etch down the surface of the epitaxial wafer by about 1 μm until the first semiconductor layer is exposed to form a mesa step. It should be noted that the thickness of the second semiconductor layer and the light-emitting layer is less than 1 μm. When the ICP etching is about 1 μm, a small part of the first semiconductor layer will also be correspondingly etched away. The method is mainly used to etch until the first semiconductor layer is completely exposed. The chamber temperature in the ICP etching is 0-5°C, and the corresponding etching gases are Cl2 (chlorine), BCl3 (boron trichloride), CF4 (carbon tetrafluoride), etc. The corresponding etching time is 100-2000s. Specifically, in the embodiment of the present invention, ICP etching with Cl2 is used for 900s. The photoresist layer is then removed to expose the etched transparent conductive layer on the second semiconductor layer. It should be pointed out that after the mesa steps are formed by etching, electrodes are made on the first semiconductor layer and the transparent conductive layer respectively to obtain each LED chip. At this time, when performing the photolithography mask, it is necessary to match the distance between the individual LED chips on the PCB board so that the metal bonding layer on each LED chip in the subsequently produced LED chip group can match the various driving sources on the PCB board.

[0066] Furthermore, a photolithography operation referring to the above-mentioned one is performed on the epitaxial wafer after the etching, so that the photolithography forms a special pattern mask of ISO, and then Cl2 ICP etching is performed for 1650s, so that the first semiconductor layer on the mesa step is further etched to form a cutting path, and then a debonding operation is performed, wherein the cutting path is located at the periphery of each LED chip, which is convenient for subsequent cutting operations and cutting alignment, so that the LED wafer made of the epitaxial wafer can be cut into multiple independent and dispersed LED chips, avoiding the risk of cutting breakage that may occur when no cutting path is set.

[0067] In step S03 , electrode layers of different polarities are formed on the transparent conductive layer and the exposed first semiconductor layer of each epitaxial wafer, and an insulating reflective layer is formed on the epitaxial wafer to expose the electrode layer.

[0068] In an embodiment of the present invention, the step of forming electrode layers of different polarities on the transparent conductive layer and the exposed first semiconductor layer of each epitaxial wafer includes:

[0069] A special pattern mask for photolithography to form the electrode layer on the surface of the epitaxial wafer;

[0070] Metal is evaporated on the transparent conductive layer and the exposed first semiconductor layer through a metal evaporation process to form electrode layers with different polarities, and then a stripping operation is performed.

[0071] Specifically, a photolithography operation is performed on the epitaxial wafer after the processing in step S02, so that a special pattern mask of the electrode layer is formed by photolithography. Then, metal is evaporated on the transparent conductive layer and the exposed first semiconductor layer through a metal evaporation process to form electrode layers of different polarities, and then a stripping operation is performed. Specifically, a first polarity electrode layer (i.e., an N-electrode layer) is formed on the first semiconductor layer, and a second polarity electrode layer (i.e., a P-electrode layer) is formed on the transparent conductive layer. The metal evaporation process is to first perform a vacuum operation, and when the vacuum degree reaches 1X10 -2 After torr, the corresponding metal target material is evaporated to make the metal evaporate onto the surface of the epitaxial wafer, wherein the plating rate is 0.1-10A / s. The metal composition of the electrode layer includes any one or more combinations of Cr, Al, Ti, Pt, Ni, and Au. The specific combination is based on the experimental design and the required capacity, and is not specifically limited here.

[0072] Specifically, as an example of the present invention, the metal composition and corresponding thickness of the electrode layer are shown in Table 1 below, that is, the metals in Table 1 are evaporated layer by layer, and the unit of metal thickness is A (angstrom), that is, Cr (chromium) with a thickness of 50A is evaporated first, then Al (aluminum) with a thickness of 1200A is evaporated, and finally Ti (titanium) with a thickness of 50A is evaporated.

[0073] Cr Al Ti Pt Ti Pt Au Pt Pt Ti 50 1200 1000 500 1000 500 9300 1100 1100 50

[0074] Table 1

[0075] Furthermore, in an embodiment of the present invention, the step of forming an insulating reflective layer on the epitaxial wafer and exposing the electrode layer includes:

[0076] An insulating protective layer and a reflective layer are deposited on the epitaxial wafer in sequence; a special pattern mask for the insulating reflective layer is formed on the surface of the epitaxial wafer by photolithography; the electrode layer is exposed by ICP etching, and a de-bonding operation is performed.

[0077] Specifically, the insulating reflective layer includes an insulating protective layer and a reflective layer. After the electrode layer is evaporated, a layer of insulating protective layer with a thickness of 2000-8000 Å is first deposited, and then a layer of reflective layer with a thickness of 6000-60000 Å is deposited to form the insulating reflective layer. The insulating protective layer can be a SiN layer or a SiO2 layer, and the reflective layer can be an Ag reflective layer or a DBR reflective layer (distributed Bragg reflector). The insulating reflective layer is used to reflect light emitted by the light-emitting layer in the epitaxial layer, so that light is emitted from the back of the LED chip. Furthermore, a special pattern mask for the insulating reflective layer is formed by photolithography on the surface of the epitaxial wafer. Then, a portion of the insulating reflective layer on the electrode layer is subjected to ICP etching as described above to expose the electrode layer, and then a debonding operation is performed.

[0078] Step S04 , forming a common electrode interconnection layer on one of the electrode layers of at least two LED chips of the same wavelength band to interconnect the electrode layers of the same polarity, so that the at least two LED chips of the same wavelength band are combined to form an LED chip group of the corresponding wavelength band.

[0079] In this embodiment of the present invention, the above step S04 specifically includes:

[0080] A special pattern mask of a common electrode connection layer is formed by photolithography on the surface of at least two LED chips of the same band; metal is evaporated on one of the electrode layers exposed by each LED chip through a metal evaporation process to form a common electrode connection layer, so that the electrode layers of the same polarity of at least two LED chips of the same band are connected through the common electrode connection layer, and a debonding operation is performed.

[0081] It should be pointed out that the LED chip is obtained after the electrodes are made on the epitaxial wafer and after grinding and cutting. Its overall structure can be referred to Figure 4 As shown, in the embodiment of the present invention, in order to describe the structure obtained after the above operations on the epitaxial wafer, it is referred to as an LED chip here. It can be understood that the LED chip at this time is not a complete LED chip that has been manufactured. It still needs to be manufactured through various subsequent steps. At the same time, the epitaxial wafers of different bands are finally formed into corresponding LED chips through processes such as electrode manufacturing. For example, the epitaxial layer is manufactured on the substrate to obtain a red light epitaxial wafer, and the red light epitaxial wafer is manufactured through processes such as electrode manufacturing to obtain a red light LED chip. At this time, refer to Figure 3 As shown, the above steps specifically use a common cathode as an example. A common electrode interconnect layer is deposited on the N-electrode layer (i.e., the electrode layer above the exposed first semiconductor layer) of three LED chips of the same wavelength band (e.g., red LED chips on a red epitaxial wafer). This interconnection layer allows the three red LED chips to connect to the N-electrode layers of each LED chip, thereby achieving a common cathode. The three red LED chips, connected by the common electrode interconnect layer, can then be combined to form a red LED chipset. The same applies to LED chips of other wavelength bands. It should be noted that the number of LED chips connected by the common electrode interconnect layer in each LED chipset should remain consistent. For example, if a red LED chipset contains three red LED chips, the number of green LED chips in the corresponding green LED chipset should also be three, and the number of blue LED chips in the corresponding blue LED chipset should also be three. It is understood that in other embodiments of the present invention, the number of LED chips in the LED chipset is at least two. In addition to the three described above, the number can also be four, six, or other numbers, which are not specifically limited here. The common electrode interconnect layer can also be deposited on the P-electrode layer of the LED chip to form a common anode, which is configured according to actual usage needs. The metal composition of the common electrode interconnect layer includes any one or more combinations of Cr, Al, Ti, Pt, Ni, and Au. The specific combination is based on the experimental design and required performance and is not specifically limited here.

[0082] Step S05 , forming metal bonding layers respectively on the other electrode layers of the LED chip group and the common electrode connecting layer in one of the LED chips.

[0083] In this embodiment of the present invention, the above step S05 specifically includes:

[0084] A special pattern mask for the metal bonding layer is formed by photolithography on each LED chip of the LED chip group; metal is evaporated on the other electrode layer exposed by each LED chip and the common electrode connecting layer in one of the LED chips through a metal evaporation process to form a metal bonding layer, and a debonding operation is performed.

[0085] Specifically, a photolithography operation is performed on the LED chip group formed after the processing in step S04, so that a special pattern mask of the metal bonding layer is formed by photolithography. Then, metal is evaporated on the other electrode layer (P electrode layer) of each LED chip and the common electrode connecting layer of one of the LED chips through a metal evaporation process to form a metal bonding layer (i.e., PAD point), and then a stripping operation is performed. For example Figure 2 and Figure 3 As shown, a negative metal bonding layer (N-type PAD point) is formed on the common electrode connecting layer of the middle LED chip in the LED chip group having three LED chips, and positive metal bonding layers (P-type PAD points) are respectively formed on the other electrode layer in each LED chip.

[0086] Furthermore, the metal composition of the metal bonding layer includes any one or more combinations of Cr, Al, Ti, Pt, Ni, and Au, and the specific combination is combined according to the experimental design and the required capabilities, and is not specifically limited here. Specifically, as an example of the present invention, the metal composition and corresponding thickness of the metal bonding layer are shown in Table 2 below, that is, the metals in Table 2 are evaporated layer by layer, and the unit of metal thickness is A (angstrom), that is, Cr with a thickness of 16000A is first evaporated, and then Ti with a thickness of 1000A is evaporated, and finally Au (gold) with a thickness of 2000A is evaporated.

[0087] Al Ti Pt Ti Ni Au 16000 1000 2000 500 4000 2000

[0088] Table 2

[0089] It should be pointed out that in the embodiment of the present invention, the above steps S02 to S05 all use a photolithography mask method to perform deposition, evaporation or etching to form the above-mentioned various structures, but it can be understood that in other embodiments of the present invention, it can also be directly deposited or evaporated without using a photolithography mask, and then when the required special pattern is required, the unnecessary parts are removed by laser ablation or other methods, thereby achieving the same effect as the photolithography mask.

[0090] Step S06 , grinding and thinning the substrate of the LED chipset and cutting along the cutting paths of the LED chips at the periphery of the LED chipset.

[0091] In an embodiment of the present invention, after the metal bonding layer is evaporated on each LED chip in the LED chipset, the substrate of each LED chip in the LED chipset is ground and thinned, so that the overall thickness of the ground epitaxial wafer is 150-300 μm. In conventional production, the sapphire substrate is thick, which absorbs light and reduces the brightness of the LED chip. In this case, grinding and thinning the sapphire substrate reduces light absorption and improves brightness. Grinding and thinning the substrate also facilitates subsequent cutting and sorting operations.

[0092] Furthermore, after the LED chipset substrate is ground, a cutting operation is performed to separate the individual LED chips on the resulting LED wafer. The cutting operation specifically involves cutting along the cutting paths on the peripheral LED chips in the LED chipset. Therefore, in the embodiment of the present invention, the LED chips obtained by cutting are not the scattered individual LED chips of the prior art, but rather individual LED chipsets in units of LED chipsets. Since each LED chipset includes at least two LED chips, compared to the prior art, the present embodiment only requires cutting into LED chipsets, effectively reducing the number of cuts and significantly saving cutting time. Furthermore, the greater the number of LED chips contained in the LED chipset, the more significantly the cutting time and number of cuts are reduced, thereby improving cutting efficiency.

[0093] In step S07 , the LED chipsets of each wavelength band are tested, sorted, and packaged in sequence to form an LED display screen.

[0094] In the embodiment of the present invention, after the cutting is completed to obtain each LED chip group, each LED chip group is tested to test its photoelectric characteristics and appearance state, and after the test is completed, each LED chip group of the same specification is sorted and packaged.

[0095] When testing the optoelectronic properties of LED chips fabricated from individual epitaxial wafers, one probe is inserted into the negative metal bonding layer, and the other probe is inserted into one of the positive metal bonding layers. Each probe inserted into any positive metal bonding layer illuminates the corresponding LED chip, thereby testing the optoelectronic properties of the LED chips. Because the LED chips in the LED chipset share a common cathode via a common electrode interconnect layer, the probe inserted into the negative metal bonding layer does not need to be moved during chip testing. Instead, the probe inserted into the positive metal bonding layer can be moved, reducing the number of probe movements required during testing.

[0096] It should be noted that in this embodiment, a single LED chip in the LED chipset can be illuminated by driving each positive metal bonding layer. However, in other embodiments of the present invention, when the entire LED chipset needs to be illuminated each time, two sets of common electrode interconnection layers can be provided in step S04. Specifically, one set of common electrode interconnection layers interconnects the P electrode layers on all LED chips in the LED chipset, while the other set of common electrode interconnection layers interconnects the N electrode layers on all LED chips in the LED chipset. In this case, in step S05, only metal bonding layers need to be formed on the two common electrode interconnection layers of one LED chip in the LED chipset. This means that only two metal bonding layers are required to achieve overall control of each LED chip in the LED chipset, effectively reducing the number of tests and improving test efficiency.

[0097] Furthermore, since each LED chip needs to be individually sorted and packaged, as the size of the LED chip decreases, the difficulty of sorting and packaging the LED chips will increase. In the embodiment of the present invention, the design of the photolithography mask is used when the LED chip end is manufactured to match the distance between the single LED chips on the PCB board, so that the multiple LED chips on the LED chip group can be regarded as a whole for sorting and packaging, thereby achieving the goal of sorting and packaging multiple LED chips at one time, which in effect enlarges the size of the LED chip and reduces the difficulty of sorting and packaging. At the same time, since multiple LED chips can be sorted and packaged at one time, the efficiency of sorting and packaging is effectively improved.

[0098] At the same time, when setting the metal bonding layer, since the N electrode layers of each LED chip in each LED chip group are connected through the common electrode interconnecting layer, only one metal bonding layer is needed to complete the N electrode packaging of the LED chip group, and the metal bonding layers corresponding to the number of LED chips are needed to complete the P electrode packaging of the LED chip group. That is, only n+1 metal bonding layers are needed in one LED chip group, where n is the number of LED chips in the LED chip group, while the prior art requires 2n metal bonding layers. Specifically in this embodiment, as Figure 2 and Figure 3 As shown, each LED chip group only needs to be provided with four metal bonding layers, while in the prior art, Figure 5 As shown, the three LED chips require six metal bonding layers, thus reducing the number of metal bonding layers used in the package. This also reduces the number of driver sources required for the corresponding metal bonding layers during the packaging process, which in turn reduces the number of driver sources required on the PCB. This also reduces the difficulty of PCB manufacturing. Furthermore, since the voltage or current level of each LED chip in the LED chipset remains consistent at a certain level, the display of the LED display can be better controlled.

[0099] In summary, the method for manufacturing a small-pitch LED display screen in the above-mentioned embodiment of the present invention, by setting a common electrode connecting layer, connects the electrode layers of the same polarity in at least two LED chips to form an LED chip group, so that it only needs to be cut into LED chip groups instead of cutting into each LED chip, thereby improving the cutting efficiency. At the same time, the multiple LED chips on the LED chip group can be regarded as a whole for sorting and packaging, so that multiple LED chips can be sorted and packaged at one time, which in disguise enlarges the size of the LED chip and reduces the difficulty of sorting and packaging; at the same time, since multiple LED chips can be sorted and packaged at one time, the efficiency of sorting and packaging is effectively improved. At the same time, when setting the metal bonding layer, since one of the electrode layers in each LED chip in each LED chip group is connected through the common electrode connecting layer, only one metal bonding layer needs to be set to complete the packaging of one pole of the LED chip group and the metal bonding layer corresponding to the number of LED chips needs to complete the packaging of the other pole of the LED chip group, so that the number of metal bonding layers used in the packaging end can be reduced. At the same time, the packaging process also reduces the use of driving sources required for the corresponding metal bonding layer. At this time, the number of driving sources set on the PCB board is also reduced accordingly, and the manufacturing difficulty of the PCB board can also be reduced. At the same time, since a certain level of voltage or current of each LED chip in the LED chip group can be kept consistent, the display of the LED display screen can be better controlled, solving the problem of low efficiency in the existing LED chip cutting, sorting and packaging.

[0100] Example 2

[0101] See also Figure 2-Figure 4 , which shows a LED display screen for fine pitch in a second embodiment of the present invention. For ease of description, only the parts related to the embodiment of the present invention are shown. The LED display screen provided by the embodiment of the present invention includes:

[0102] LED chipsets of different wavelengths are arranged in an array, the LED chipsets including a red LED chipset 1, a green LED chipset 2, and a blue LED chipset 3;

[0103] The LED chipset is composed of at least two LED chips, each of which includes a substrate 10, and an epitaxial layer 11, a transparent conductive layer 12, an electrode layer 13, an insulating reflective layer 14, a common electrode interconnecting layer 15, and a metal bonding layer 16 stacked sequentially on the substrate 10.

[0104] The epitaxial layer 11 includes a first semiconductor layer 111, a light-emitting layer 112 and a second semiconductor layer 113 stacked in sequence on the substrate 10, the transparent conductive layer 12 is arranged on the second semiconductor layer 113, the electrode layer 13 is respectively arranged on the first semiconductor layer 111 and the transparent conductive layer 12, the insulating reflective layer 14 is provided with an opening exposing the electrode layer 13, the common electrode connecting layer 15 is provided on one of the openings exposing the electrode layer 13, and the common electrode connecting layers 15 in each LED chip are interconnected, the metal bonding layer 16 is provided on the other opening exposing the electrode layer 13, and a metal bonding layer 16 is also provided on the common electrode connecting layer 15 in one of the LED chips in the LED chip group.

[0105] Among them, reference Figure 2 As shown, the LED display screen is composed of a number of pixel points arranged in an array. The vertical and horizontal numbers of the pixel points are set according to the pixel resolution required by the LED display screen. Each pixel point is composed of LED chips with three different wavelengths of blue, green and red. Figure 2 As shown, a blue LED chip, a green LED chip, and a red LED chip together form a pixel. The pixel pitch of each pixel is set according to actual needs. In this embodiment, 390 μm is used as an example. Meanwhile, LED chips of different wavelengths all include the above-described structure, and they only need to control the growth material of epitaxial layer 11 according to the required wavelength.

[0106] The substrate 10 serves as the base for the growth of the epitaxial layer 11, providing support and stability. The substrate 10 can be an insulating substrate or a conductive substrate, and can be a planar substrate or a patterned substrate. Materials for the substrate 10 include, but are not limited to, sapphire, aluminum nitride, gallium nitride, silicon, and silicon carbide. Specifically, in the embodiment of the present invention, the substrate 10 is a sapphire substrate.

[0107] Furthermore, an epitaxial layer 11 is formed on the substrate 10. The epitaxial layer 11 can be grown on the substrate 10 using a metal organic chemical vapor deposition (MOCVD) device, or can be bonded to the substrate 10 using a transparent bonding layer. As an example of the present invention, the epitaxial layer 11 includes a first semiconductor layer 111, a light emitting layer 112, and a second semiconductor layer 113 sequentially disposed on the substrate 10, wherein the polarity of the first semiconductor layer 111 is opposite to that of the second semiconductor layer 113. Specifically, in this embodiment, the first semiconductor layer 111 is an N-type semiconductor layer, such as an N-type gallium nitride (GaN) layer; correspondingly, the second semiconductor layer 113 is a P-type semiconductor layer, such as a P-type gallium nitride layer. It should be noted that the N-type semiconductor layer is a semiconductor layer formed by silicon doping or carbon doping, while the P-type semiconductor layer is a semiconductor layer formed by magnesium doping or zinc doping. It is understandable that in other embodiments of the present invention, the first semiconductor layer 111 may also be a P-type semiconductor layer, and the second semiconductor layer 113 may also be an N-type semiconductor layer, and corresponding epitaxial wafers are manufactured according to actual production conditions and requirements.

[0108] Furthermore, the light-emitting layer 112 includes quantum well layers and quantum barrier layers that are grown in a sequential and periodic alternating pattern. This alternating pattern forms at least one composite well in the light-emitting layer 112, which can improve the light-emitting efficiency of the LED chip. The light-emitting layer 112 can be composed of materials such as gallium nitride and gallium arsenide. The elemental composition of the semiconductor can be adjusted to emit light of a desired wavelength, such as ultraviolet, blue, red, or infrared.

[0109] Furthermore, after the epitaxial layer 11 is formed, a transparent conductive layer 12 is deposited by bombarding a target material with magnetron sputtering. At this time, the transparent conductive layer 12 is arranged on the second semiconductor layer 113 (i.e., the P-type semiconductor layer), wherein the transparent conductive layer 12 is an ITO (tin-doped indium oxide) transparent conductive layer, an FTO (fluorine-doped tin oxide) transparent conductive layer, a ZAO (aluminum-doped zinc oxide) transparent conductive layer, or a Ni micro-grid transparent conductive layer. Specifically, in the embodiment of the present invention, the transparent conductive layer 12 is an ITO transparent conductive layer, and the thickness of the transparent conductive layer 12 is 120-1200 Å (angstroms). At this time, since the transparent conductive layer 12 is entirely laid on the second semiconductor layer 113, it facilitates the diffusion of current and forms an ohmic contact with the second semiconductor layer 113. At the same time, the transparent conductive layer 12 is a transparent structure and does not block the light emitted by the light-emitting layer 112.

[0110] Furthermore, after the transparent conductive layer 12 is produced, the second semiconductor layer 113 and the light-emitting layer 112 in the epitaxial layer 11 on one side are etched to expose the first semiconductor layer 111 through the wet etching and ICP etching process described in the above method embodiment, so that a mesa step is formed by etching. Furthermore, in an embodiment of the present invention, each LED chip of the same wavelength band is grown and formed using the same substrate 10, that is, each of the above-mentioned epitaxial layer 11, transparent conductive layer 12, electrode layer 13, insulating reflective layer 14, common electrode connecting layer 15, and metal bonding layer 16 is formed on a whole substrate 10, and then cut through a cutting process to finally form each LED chip. Therefore, in order to facilitate subsequent cutting operations and cutting alignment, a cutting path 17 is provided at the boundary between each LED chip. Specifically, the first semiconductor layer 111 is further etched on the mesa step through an etching process, so that a cutting path 17 is etched. Figure 3 shown.

[0111] Furthermore, electrode layers 13 of different polarities are respectively formed on the transparent conductive layer 12 of each epitaxial wafer and the exposed first semiconductor layer 111, that is, the electrode layer 13 is respectively arranged on the first semiconductor layer 111 and the transparent conductive layer 12. Specifically, a first polarity electrode layer (that is, an N-electrode layer) is formed on the first semiconductor layer 111, and a second polarity electrode layer (that is, a P-electrode layer) is formed on the transparent conductive layer 12.

[0112] Furthermore, after the electrode layer 13 is formed, an insulating reflective layer 14 is deposited using the photolithography and evaporation processes described in the above method embodiment. The insulating reflective layer 14 has an opening that exposes the electrode layer 13. The insulating reflective layer 14 includes an insulating protective layer and a reflective layer. Specifically, the insulating protective layer and the reflective layer are sequentially arranged from bottom to top. The insulating protective layer includes a SiN layer or a SiO2 layer, and the reflective layer includes an Ag reflective layer or a DBR reflective layer. The insulating reflective layer 14 is used to reflect light emitted by the light-emitting layer 112 in the epitaxial layer 11, allowing light to be emitted from the back of the LED chip.

[0113] Furthermore, a common electrode connection layer 15 is provided to connect the various LED chips. At this time, the common electrode connection layer 15 is provided on one of the openings that expose the electrode layer 13. Specifically in this embodiment, the common electrode connection layer 15 is provided on the opening corresponding to the first polarity electrode layer, so that the common electrode connection layer 15 connects the first polarity electrode layers of the various LED chips, thereby realizing a common electrode.

[0114] Furthermore, a negative metal bonding layer (N-type PAD point) is provided on the opening of the second polarity electrode layer, and a positive metal bonding layer (P-type PAD point) is also provided on the common electrode connecting layer 15 of one of the LED chips in the LED chip group.

[0115] Furthermore, the metal components of the electrode layer 13, the common electrode interconnect layer 15 and the metal bonding layer 16 include any one or more combinations of Cr, Al, Ti, Pt, Ni and Au. Specifically, as an example of the present invention, the metal composition and corresponding thickness of the electrode layer 13 refer to Table 1 in the aforementioned method embodiment, that is, the electrode layer 13 includes a Cr (chromium) layer, an Al (aluminum) layer, a Ti (titanium) layer, a Pt (platinum) layer, a Ti layer, a Pt layer, an Au (gold) layer, a Pt layer, a Pt layer, and a Ti layer arranged in sequence from bottom to top. The metal composition and corresponding thickness of the metal bonding layer 16 refer to Table 2 in the aforementioned method embodiment, that is, the metal bonding layer 16 includes an Al layer, a Ti layer, a Pt layer, a Ti layer, a Ni (nickel) layer, and an Au layer arranged in sequence from bottom to top.

[0116] In summary, the LED display screen for small pitch in the above embodiments of the present invention connects the electrode layers of the same polarity in at least two LED chips to form an LED chip group by setting a common electrode connecting layer, so that it only needs to be cut into LED chip groups instead of cutting into each LED chip, thereby improving the cutting efficiency. At the same time, the multiple LED chips on the LED chip group can be regarded as a whole for sorting and packaging, so that multiple LED chips can be sorted and packaged at one time, which in disguise enlarges the size of the LED chip and reduces the difficulty of sorting and packaging. At the same time, since multiple LED chips can be sorted and packaged at one time, the efficiency of sorting and packaging is effectively improved. At the same time, when setting the metal bonding layer, since one of the electrode layers in each LED chip in each LED chip group is connected through the common electrode connecting layer, only one metal bonding layer needs to be set to complete the packaging of one pole of the LED chip group and the metal bonding layer corresponding to the number of LED chips needs to complete the packaging of the other pole of the LED chip group, so that the number of metal bonding layers used in the packaging end can be reduced. At the same time, the packaging process also reduces the use of driving sources required for the corresponding metal bonding layer. At this time, the number of driving sources set on the PCB board is also reduced accordingly, and the manufacturing difficulty of the PCB board can also be reduced. At the same time, since a certain level of voltage or current of each LED chip in the LED chip group can be kept consistent, the display of the LED display screen can be better controlled, solving the problem of low efficiency in the existing LED chip cutting, sorting and packaging.

[0117] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0118] The above-described embodiments merely illustrate several implementations of the present invention, and while their descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

Claims

1. A method for manufacturing a small-pitch LED display screen, characterized in that: The method comprises: Epitaxial layers are grown on different substrates to obtain epitaxial wafers of different wavelength bands, wherein the epitaxial wafers include red epitaxial wafers, green epitaxial wafers and blue epitaxial wafers; forming a transparent conductive layer on the second semiconductor layer on the surface of each epitaxial wafer, and etching the transparent conductive layer to form a mesa step exposing the first semiconductor layer and a cutting street for cutting; Forming electrode layers of different polarities on the transparent conductive layer and the exposed first semiconductor layer of each epitaxial wafer, respectively, and forming an insulating reflective layer on the epitaxial wafer, and etching the insulating reflective layer by ICP to expose the electrode layer; On one electrode layer of at least two LED chips of the same wavelength band, a common electrode connecting layer is formed by a metal evaporation process to connect the electrode layers of the same polarity, so that the at least two LED chips of the same wavelength band are combined to form an LED chip group of the corresponding wavelength band, and a common cathode or common anode structure is formed through the common electrode connecting layer; forming metal bonding layers respectively on each other electrode layer of the LED chip group and the common electrode connecting layer in one of the LED chips; Grinding and thinning the substrate of the LED chipset and cutting along the cutting paths of the LED chips at the periphery of the LED chipset; The LED chip groups of each wavelength band are tested, sorted, and packaged in sequence to form an LED display screen. Each pixel in the LED display screen includes three LED chips of different colors. The three groups of LED chip groups of different wavelength bands constitute three pixels, and each LED chip can be driven independently.

2. The method for manufacturing a small-pitch LED display screen according to claim 1, characterized in that: The step of etching the transparent conductive layer to form a mesa step exposing the first semiconductor layer and a cutting street for cutting comprises: Performing photolithography on the transparent conductive layer to form a special pattern mask of mesa, wherein the photolithography includes coating, exposure and development operations; removing the transparent conductive layer outside the mask by wet etching to expose the second semiconductor layer; ICP etching is performed until the first semiconductor layer is exposed to form a mesa step, and a stripping operation is performed; Perform photolithography to form a special pattern mask for ISO on the surface of the epitaxial wafer; Cutting streets are formed by ICP etching, and a stripping operation is performed.

3. The method for manufacturing a small-pitch LED display screen according to claim 1, characterized in that: The step of forming electrode layers of different polarities on the transparent conductive layer and the exposed first semiconductor layer of each epitaxial wafer comprises: A special pattern mask for photolithography to form the electrode layer on the surface of the epitaxial wafer; Metal is evaporated on the transparent conductive layer and the exposed first semiconductor layer through a metal evaporation process to form electrode layers with different polarities, and then a stripping operation is performed.

4. The method for manufacturing a small-pitch LED display screen according to claim 1, characterized in that: The insulating reflective layer includes an insulating protective layer and a reflective layer; The step of forming an insulating reflective layer on the epitaxial wafer and exposing the electrode layer comprises: depositing an insulating protective layer and a reflective layer in sequence on the epitaxial wafer; A special pattern mask for photolithography to form an insulating reflective layer on the surface of the epitaxial wafer; ICP etching is performed to expose the electrode layer, and then a stripping operation is performed.

5. The method for manufacturing a small-pitch LED display screen according to claim 1, characterized in that: The step of forming a common electrode connecting layer connecting the electrode layers of the same polarity on one of the electrode layers of at least two LED chips of the same wavelength band comprises: Performing photolithography on the surfaces of at least two LED chips in the same wavelength band to form a special pattern mask for a common electrode interconnection layer; Metal is evaporated on one of the electrode layers exposed by each LED chip through a metal evaporation process to form a common electrode interconnection layer, so that the electrode layers of the same polarity of at least two LED chips in the same band are interconnected through the common electrode interconnection layer, and a debonding operation is performed.

6. The method for manufacturing a small-pitch LED display screen according to claim 1, characterized in that: The step of forming metal bonding layers respectively on each other electrode layer of the LED chip group and the common electrode connecting layer in one of the LED chips comprises: A special pattern mask is used to photolithographically form a metal bonding layer on each LED chip in the LED chip group; Metal is evaporated on the other electrode layer exposed by each LED chip and the common electrode connecting layer in one of the LED chips through a metal evaporation process to form a metal bonding layer, and then a debonding operation is performed.

7. The method for manufacturing a small-pitch LED display screen according to any one of claims 2 to 6, characterized in that: The transparent conductive layer is an ITO transparent conductive layer, an FTO transparent conductive layer, a ZAO transparent conductive layer or a Ni micro-grid transparent conductive layer; The metal composition of the electrode layer, the common electrode interconnection layer and the metal bonding layer includes any one or more combinations of Cr, Al, Ti, Pt, Ni and Au; The photoresist thickness corresponding to the photolithography is 2.5-10 um, the exposure amount is 150-1000 mj, and the development time is 50-250 s.

8. An LED display screen for small pitch, characterized in that: include: LED chipsets of different wavelengths arranged in an array, the LED chipsets comprising a red LED chipset, a green LED chipset, and a blue LED chipset; The LED chip group is composed of at least two LED chips, and the LED chip includes a substrate, and an epitaxial layer, a transparent conductive layer, an electrode layer, an insulating reflective layer, a common electrode connecting layer, and a metal bonding layer stacked in sequence on the substrate; The epitaxial layer includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer stacked in sequence on the substrate, the transparent conductive layer is arranged on the second semiconductor layer, the electrode layers are respectively arranged on the first semiconductor layer and the transparent conductive layer, the insulating reflective layer is provided with an opening exposing the electrode layer, the common electrode connecting layer is provided on one of the openings exposing the electrode layer, and the common electrode connecting layers in each LED chip are interconnected, the metal bonding layer is provided on the other opening exposing the electrode layer, and the metal bonding layer is also provided on the common electrode connecting layer in one of the LED chips in the LED chip group.

9. The LED display screen for fine pitch according to claim 8, characterized in that: The metal components of the electrode layer, the common electrode interconnection layer and the metal bonding layer include any one or more combinations of Cr, Al, Ti, Pt, Ni and Au.

10. The LED display screen for fine pitch according to claim 8, characterized in that: The insulating reflective layer includes an insulating protective layer and a reflective layer. The insulating protective layer includes a SiN layer or a SiO2 layer. The reflective layer includes an Ag reflective layer or a DBR reflective layer.

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