An interrupt handling method and apparatus

Abstract

The present application provides an interrupt processing method and device. The method is applied to the control core in the multi-core CPU in the forwarding device, and includes: upon receiving a DMA interrupt request sent by any forwarding chip in the forwarding device, sending a DMA interrupt response to the forwarding chip through the PCIE channel to indicate that the control core has received the DMA interrupt request; querying the interrupt flag stored in the designated storage space in the multi-core CPU to find the value of the set value, and waking up the service core in the multi-core CPU that needs to forward the service message in the DMA forwarding queue corresponding to the queried interrupt flag, and forwarding the service message in the corresponding DMA forwarding queue, so that the service core sends a forwarding completion message to the forwarding chip through the PCIE channel after forwarding the service message in the corresponding DMA forwarding queue. The present application can improve the forwarding efficiency of the service message associated with the DMA interrupt request.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to an interrupt processing method and device. Background Art

[0002] In a communication network, any forwarding device (e.g., a routing device) in the communication network may include multiple forwarding chips and a multi-core central processing unit (CPU). A Peripheral Component Interconnect Express (PCIE) channel is established between each forwarding chip and the multi-core CPU, and the multi-core CPU may include a control core and multiple service cores.

[0003] For any forwarding chip in the forwarding device (such as Figure 1 As shown in the figure, whenever a business message is received through the network port (for example, network port 1) on the forwarding device to which it belongs, the business message will be written into the DMA forwarding queue for storing the business message determined by the forwarding chip in the multi-core CPU through the PCIE channel using direct memory access (DMA). At the same time, a DMA interrupt corresponding to the DMA forwarding queue will be generated, and the value of the interrupt flag bit corresponding to the DMA forwarding queue in the interrupt flag register on the forwarding chip will be set from the initial value (for example, 0) to the set value (for example, 1); then, the forwarding chip reports the DMA interrupt to the control core in the multi-core CPU through the PCIE channel.

[0004] After receiving the DMA interrupt, the control core will query the interrupt flag register on the forwarding chip through the PCIE channel, and wake up the business core in the DMA forwarding queue corresponding to the interrupt flag bit whose value is the set value and needs to forward the business message to process the corresponding business message in the DMA forwarding queue. Subsequently, after forwarding the corresponding business message, the corresponding business core will also set the value of the interrupt flag bit corresponding to all DMA forwarding queues on the interrupt flag register to the initial value through the PCIE channel.

[0005] During the processing of the aforementioned DMA interrupt request, the control core needs to query the interrupt flag register through the PCIE channel to obtain the interrupt flag bit with the set value. This may be affected by factors such as network latency, resulting in the control core being unable to query the interrupt flag bit with the set value in a timely manner, thereby affecting the forwarding efficiency of the relevant service cores in forwarding relevant service messages. Furthermore, if the forwarding chip frequently reports DMA interrupt requests, this will affect the speed at which the control core processes DMA interrupt requests, similarly affecting the forwarding efficiency of the relevant service cores in forwarding relevant service messages, and it is also prone to the problem of some DMA interrupt requests being over-reported or under-reported. Summary of the Invention

[0006] To overcome the problems existing in the related art, the present application provides an interrupt processing method and device.

[0007] According to a first aspect of an embodiment of the present application, there is provided an interrupt handling method, which is applied to any forwarding chip in a forwarding device, and includes:

[0008] After writing the multiple service messages received by the forwarding device and meeting the preset conditions into a DMA forwarding queue for storing the service messages in the multi-core CPU of the forwarding device through the PCIE channel in a DMA manner for the first time, generating a DMA interrupt request corresponding to the DMA forwarding queue;

[0009] Setting the value of the interrupt flag bit corresponding to the local DMA forwarding queue from the initial value to the set value;

[0010] The DMA interrupt request is reported to the control core in the multi-core CPU through the PCIE channel, the interrupt flag bits and their corresponding values corresponding to all local DMA forwarding queues are refreshed to the designated storage space in the multi-core CPU, and the values of all interrupt flag bits are restored to the initial values, so that when the control core receives the DMA interrupt request, it sends a DMA interrupt response to the forwarding chip through the PCIE channel to indicate that the control core has received the DMA interrupt request, queries the interrupt flag bit whose value in the designated storage space is the set value, and wakes up the service core in the multi-core CPU that needs to forward the service message in the DMA forwarding queue corresponding to the queried interrupt flag bit, so as to forward the service message in the corresponding DMA forwarding queue, so that after the service core has forwarded the service message in the corresponding DMA forwarding queue, it sends a forwarding completion message to the forwarding chip through the PCIE channel;

[0011] Upon receiving the DMA interrupt response sent by the control core and the forwarding completion message sent by the service core, determining whether there is a DMA interrupt request that has been generated but not reported locally;

[0012] When the judgment result is yes, the generated and unreported DMA interrupt request whose generation time is closest to the generation time of the DMA interrupt request is used as the DMA interrupt request, and the value of the interrupt flag bit corresponding to the local DMA forwarding queue is set from the initial value to the set value;

[0013] When the judgment result is no, a waiting operation is performed, and when a new DMA interrupt request is generated by itself, the new DMA interrupt request is used as the DMA interrupt request, and the value of the interrupt flag bit corresponding to the local DMA forwarding queue is set from the initial value to the set value.

[0014] According to a second aspect of an embodiment of the present application, there is provided an interrupt handling method, the method being applied to a control core in a multi-core CPU in a forwarding device, the method comprising:

[0015] Upon receiving a DMA interrupt request sent by any forwarding chip in the forwarding device, sending a DMA interrupt response to the forwarding chip through a PCIE channel, indicating that the control core has received the DMA interrupt request, wherein the DMA interrupt request is generated by the forwarding chip after writing, through the PCIE channel, in a DMA manner, a plurality of service messages received by the forwarding chip that meet preset conditions to a DMA forwarding queue in the multi-core CPU for storing the service messages;

[0016] Query the interrupt flag whose value is a set value stored in the designated storage space in the multi-core CPU, and wake up the business core in the multi-core CPU that needs to forward the business message in the DMA forwarding queue corresponding to the queried interrupt flag, so that the business core sends a forwarding completion message to the forwarding chip through the PCIE channel after forwarding the business message in the corresponding DMA forwarding queue; wherein, the designated storage space stores the interrupt flags and their corresponding values corresponding to all the DMA forwarding queues on the forwarding chip refreshed by the forwarding chip, and among the interrupt flags corresponding to all the DMA forwarding queues, the value of the interrupt flag corresponding to the DMA forwarding queue is set to the set value from the initial value by the forwarding chip after reporting the DMA interrupt request, and the values of the remaining interrupt flags are the initial values.

[0017] According to a third aspect of an embodiment of the present application, an interrupt processing apparatus is provided. The apparatus is applied to any forwarding chip in a forwarding device, and the apparatus includes:

[0018] a generating module, configured to generate a DMA interrupt request corresponding to the DMA forwarding queue after first writing the determined multiple service messages received by the module and meeting the preset conditions into a DMA forwarding queue for storing the service messages in the multi-core CPU of the forwarding device through the PCIE channel in a DMA manner;

[0019] A setting module, configured to set the value of the interrupt flag bit corresponding to the local DMA forwarding queue from an initial value to a set value;

[0020] a processing module, configured to report the DMA interrupt request to a control core in the multi-core CPU through the PCIE channel, refresh the interrupt flags and their corresponding values corresponding to all local DMA forwarding queues to a designated storage space in the multi-core CPU, and restore the values of all interrupt flags to the initial values, so that upon receiving the DMA interrupt request, the control core sends a DMA interrupt response to the forwarding chip through the PCIE channel, indicating that the control core has received the DMA interrupt request, queries the interrupt flag stored in the designated storage space, and wakes up a service core in the multi-core CPU that needs to forward a service message in the DMA forwarding queue corresponding to the queried interrupt flag, so as to forward the service message in the corresponding DMA forwarding queue, so that after the service core has forwarded the service message in the corresponding DMA forwarding queue, it sends a forwarding completion message to the forwarding chip through the PCIE channel;

[0021] a judgment module, configured to, upon receiving the DMA interrupt response sent by the control core and the forwarding completion message sent by the service core, judge whether there is a DMA interrupt request that has been generated but not reported locally, and, if the judgment result is yes, use the generated but not reported DMA interrupt request whose generation time is closest to the generation time of the DMA interrupt request as the DMA interrupt request, and trigger the setting module to execute the step of setting the value of the interrupt flag bit corresponding to the local DMA forwarding queue from the initial value to the set value;

[0022] The waiting module is used to perform a waiting operation when the judgment result of the judgment module is no, and when waiting until a new DMA interrupt request is generated by itself, use the new DMA interrupt request as the DMA interrupt request, triggering the setting module to execute the step of setting the value of the interrupt flag bit corresponding to the local DMA forwarding queue from the initial value to the set value.

[0023] According to a fourth aspect of an embodiment of the present application, there is provided an interrupt processing apparatus, which is applied to a control core in a multi-core CPU in a forwarding device, and includes:

[0024] a transceiver module, configured to, upon receiving a DMA interrupt request sent by any forwarding chip in the forwarding device, send a DMA interrupt response to the forwarding chip via a PCIE channel, indicating that the control core has received the DMA interrupt request, wherein the DMA interrupt request is generated by the forwarding chip after writing, via the PCIE channel, in a DMA manner, a plurality of service messages received by the forwarding chip that meet preset conditions to a DMA forwarding queue in the multi-core CPU for storing the service messages;

[0025] A query wake-up module is used to query the interrupt flag bit whose value is a set value stored in the designated storage space in the multi-core CPU, and wake up the business core in the multi-core CPU that needs to forward the business message in the DMA forwarding queue corresponding to the queried interrupt flag bit, so as to forward the business message in the corresponding DMA forwarding queue, so that the business core sends a forwarding completion message to the forwarding chip through the PCIE channel after forwarding the business message in the corresponding DMA forwarding queue; wherein, the designated storage space stores the interrupt flag bits and their corresponding values corresponding to all the DMA forwarding queues on the forwarding chip refreshed by the forwarding chip, and among the interrupt flag bits corresponding to all the DMA forwarding queues, the value of the interrupt flag bit corresponding to the DMA forwarding queue is set to the set value by the forwarding chip from the initial value after reporting the DMA interrupt request, and the values of the remaining interrupt flag bits are the initial values.

[0026] The technical solutions provided by the embodiments of the present application may have the following beneficial effects:

[0027] In an embodiment of the present application, any forwarding chip in the forwarding device will generate a DMA interrupt request corresponding to the DMA forwarding queue each time it writes the business message it has received that meets the preset conditions into the DMA forwarding queue in the multi-core CPU in the forwarding device in a DMA manner through the PCIE channel. In this way, the number of reported DMA interrupt requests can be reduced, thereby improving the speed at which the control core in the multi-core CPU processes DMA interrupt requests, and improving the forwarding efficiency of the relevant business cores in the multi-core CPU in forwarding relevant business messages.

[0028] Furthermore, after the forwarding chip reports a DMA interrupt request to the control core via the PCIE channel, it also refreshes the interrupt flags and their corresponding values corresponding to all local DMA forwarding queues to the designated storage space in the multi-core CPU, and restores the values of all interrupt flags to their initial values. In this way, when the control core receives this DMA interrupt request, it will proactively send a DMA interrupt response to the forwarding chip via the PCIE channel to indicate that the control core has received the DMA interrupt request, and then query the interrupt flag stored in the designated storage space for the set value. This eliminates the need to query the interrupt flag for the set value via the PCIE channel as in the prior art, further improving the speed at which the control core in the multi-core CPU processes DMA interrupt requests, and improving the forwarding efficiency of the related service cores in the multi-core CPU in forwarding related service messages.

[0029] The subsequent control core will also wake up the business core in the multi-core CPU that needs to forward the business message in the DMA forwarding queue corresponding to the queried interrupt flag, so that the business core can send a forwarding completion message to the forwarding chip through the PCIE channel after forwarding the business message in the corresponding DMA forwarding queue. In this way, the forwarding chip will continue to report the next generated interrupt request only after receiving the DMA interrupt response sent by the control core for the DMA interrupt request generated this time and the forwarding completion message of the business message in the DMA forwarding queue corresponding to the DMA interrupt request generated this time sent by the relevant business core, thereby avoiding the problem of over-reporting or under-reporting of DMA interrupt requests.

[0030] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0032] Figure 1 A schematic diagram of the interaction between the forwarding chip and the multi-core CPU in the existing forwarding device for processing DMA interrupt requests;

[0033] Figure 2 One of the flow charts of an interrupt handling method provided in an embodiment of the present application;

[0034] Figure 3 A second flow chart of an interrupt handling method provided in an embodiment of the present application;

[0035] Figure 4A schematic diagram of the interaction between the forwarding chip and the multi-core CPU in processing DMA interrupt requests in the forwarding device provided in an embodiment of the present application;

[0036] Figure 5 This is one of the structural diagrams of an interrupt processing device provided in an embodiment of the present application;

[0037] Figure 6 This is one of the structural diagrams of an interrupt processing device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0038] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.

[0039] The terms used in this application are for the purpose of describing specific embodiments only and are not intended to limit this application. As used in this application and the appended claims, the singular forms "a," "an," "the," and "the" are intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0040] It should be understood that although the terms first, second, third, etc. may be used in this application to describe various information, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from each other. For example, without departing from the scope of this application, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the words "if" or "if" as used herein may be interpreted as "when" or "when".

[0041] Next, the embodiments of the present application are described in detail.

[0042] The embodiment of the present application provides an interrupt processing method, which is applied to any forwarding chip in a forwarding device, such as Figure 2 As shown, the method may include the following steps:

[0043] S21. After writing the multiple service messages received by the device that meet the preset conditions into the DMA forwarding queue for storing multiple service messages in the multi-core CPU of the forwarding device in a DMA manner through the PCIE channel for the first time, a DMA interrupt request corresponding to the DMA forwarding queue is generated.

[0044] S22: Set the value of the interrupt flag bit corresponding to the local DMA forwarding queue from the initial value to the set value.

[0045] S23. Report the DMA interrupt request to the control core in the multi-core CPU through the PCIE channel, refresh the interrupt flags and their corresponding values corresponding to all local DMA forwarding queues to the designated storage space in the multi-core CPU, and restore the values of all interrupt flags to their initial values, so that when the control core receives the DMA interrupt request, it sends a DMA interrupt response to the forwarding chip through the PCIE channel to indicate that the control core has received the DMA interrupt request, queries the interrupt flag stored in the designated storage space with the set value, and wakes up the service core in the multi-core CPU that needs to forward the service message in the DMA forwarding queue corresponding to the queried interrupt flag, so as to forward the service message in the corresponding DMA forwarding queue, so that after the service core forwards the service message in the corresponding DMA forwarding queue, it sends a forwarding completion message to the forwarding chip through the PCIE channel.

[0046] In this step, among the interrupt flag bits and their corresponding values corresponding to all DMA forwarding queues stored in the designated storage space, only the interrupt flag bit corresponding to the DMA forwarding queue corresponding to the DMA interrupt request has a set value, and the values of the interrupt flag bits corresponding to the remaining DMA forwarding queues are all initial values.

[0047] S24. When receiving the DMA interrupt response sent by the control core and the forwarding completion message sent by the business core, determine whether there is a DMA interrupt request that has been generated but not reported locally; when the judgment result is yes, take the generated and unreported DMA interrupt request whose generation time is closest to the generation time of the DMA interrupt request as the DMA interrupt request, and execute step S22; when the judgment result is no, execute step S25.

[0048] S25, executing a waiting operation, and when a new DMA interrupt request is generated by itself, taking the new DMA interrupt request as the DMA interrupt request, executing step S22.

[0049] Specifically, in the above step S11, the forwarding chip can determine the service message it has received that meets the preset conditions in the following manner:

[0050] If it is detected that the timer set on itself has timed out but the total number of service messages received within the timeout period of the timer has not reached the set number, all service messages received within the timeout period will be determined as service messages received by itself that meet the preset conditions;

[0051] If it is monitored that the timer has not timed out but a set number of service messages have been received, the set number of service messages received are determined as service messages received by itself that meet the preset conditions.

[0052] That is, in an embodiment of the present application, a timer is set on the forwarding chip, and the timeout period of the timer can be set according to the actual needs of the network to which the forwarding device belongs. After starting the timer, if the forwarding chip detects that the timer has timed out, and the total number of service messages received within the timer timeout period is not greater than the set number, in this case, all service messages received within the timeout period are determined by the forwarding chip to be service messages that meet the preset conditions, and the timer is restarted. Here, the set number can also be set according to the actual needs of the network to which the forwarding device belongs.

[0053] If it is first monitored that a set number of business messages have been received, but the timer has not timed out, in this case, it is also considered that the set number of business messages received are the business messages determined by the forwarding chip to have been received by itself and meet the preset conditions, and the timer is restarted.

[0054] By executing this determination process, the number of reported DMA interrupt requests can be reduced, thereby improving the speed at which the control core in the multi-core CPU processes DMA interrupt requests, and improving the forwarding efficiency of related business cores in the multi-core CPU in forwarding related business messages.

[0055] In addition, it should be noted that, in the above step S21, the DMA forwarding queue for storing multiple service messages is determined by the forwarding chip through an existing determination method, and the specific determination process is not described in detail.

[0056] For example, service packets with the same source IP address and destination IP address are placed in the same DMA forwarding queue; for another example, service packets from the same network port are placed in the same DMA forwarding queue.

[0057] Specifically, in the above step S22, the forwarding chip may set the value of the interrupt flag corresponding to the DMA forwarding queue on the interrupt flag set in the forwarding device from the initial value to the set value.

[0058] Here, the initial value and set value can be set by the network administrator. Furthermore, the initial value indicates that the service packets in the DMA forwarding queue corresponding to the corresponding interrupt flag do not need to be forwarded; the set value indicates that the service packets in the DMA forwarding queue corresponding to the corresponding interrupt flag need to be forwarded. For example, the initial value can be 0, and the set value can be 1.

[0059] It should be noted that in the above step S23, the reason why the forwarding chip needs to execute the step of restoring the values of all interrupt flag bits to the initial values after refreshing the interrupt flag bits and their corresponding values corresponding to all local DMA forwarding queues to the designated storage space in the multi-core CPU is mainly to ensure that the forwarding chip can accurately set the value of the interrupt flag bit corresponding to the relevant DMA forwarding queue when reporting a DMA interrupt request next time, so that the relevant business core can accurately process the business message in the relevant DMA forwarding queue.

[0060] After the forwarding chip executes the above step S23, for the control core, when receiving the above DMA interrupt request, it will send a DMA interrupt response to the forwarding chip through the PCIE channel to indicate that the control core has received the DMA interrupt request, so that the forwarding chip can know the reporting status of the above DMA interrupt request in time.

[0061] In addition, the control core will also query the interrupt flag bit stored in the specified storage space for the set value, and then wake up the business core in the multi-core CPU that needs to forward the business message in the DMA forwarding queue corresponding to the queried interrupt flag bit, and forward the business message in the corresponding DMA forwarding queue. After the business core forwards the business message in the corresponding DMA forwarding queue, it sends a forwarding completion message (used to indicate that the message forwarding has been completed) to the forwarding chip through the PCIE channel. Here, the wake-up process of the control core waking up the business core in the multi-core CPU that needs to forward the business message in the DMA forwarding queue corresponding to the queried interrupt flag bit is a prior art and will not be described in detail here.

[0062] In this way, the control core no longer needs to interact with the forwarding chip through the PCIE channel to obtain the corresponding interrupt flag, which greatly improves the speed of the control core in the multi-core CPU in processing DMA interrupt requests, and greatly improves the forwarding efficiency of the business messages in the DMA forwarding queue corresponding to the above-mentioned business core forwarding.

[0063] Here, for the above-mentioned business core, once it is awakened by the control core, it will forward all the business messages in the DMA forwarding queue indicated by the control core, and then send the corresponding forwarding completion message to the forwarding chip through the PCIE channel. In this way, there may be a situation where the control core is awakened again to forward the business messages in this DMA forwarding queue, but this DMA forwarding queue is empty. In this case, the above-mentioned business core still sends the corresponding forwarding completion message to the forwarding chip through the PCIE channel.

[0064] Furthermore, the service core sends the forwarding completion message to the forwarding chip via the PCIE channel to ensure that the forwarding chip does not over-report or under-report DMA interrupt requests. In other words, the forwarding chip will only report the next generated DMA interrupt request after receiving both the DMA interrupt response from the control core and the forwarding completion message from the service core.

[0065] It should be further noted that, in the embodiment of the present application, in order to improve the reliability of DMA interrupt request reporting, the forwarding chip may further perform the following operations:

[0066] After the DMA interrupt request is reported to the control core through the PCIE channel, if no DMA interrupt response is received from the control core through the PCIE channel within a set time, the DMA interrupt request is reported to the control core again through the PCIE channel.

[0067] Here, the above-mentioned set duration may also be set according to the actual requirements of the network to which the forwarding device belongs.

[0068] In an embodiment of the present application, for the forwarding chip, after executing the above step S24, if the judgment result is yes, it means that the forwarding chip has generated a new DMA interrupt request (also referred to as a generated but not reported DMA interrupt request) during the time period from reporting the above DMA interrupt request to receiving the above forwarding completion message. The number of new DMA interrupt requests generated during this period may be one or more.

[0069] If the judgment result is no, it means that the forwarding chip did not generate a new DMA interrupt request during the time period from reporting the above-mentioned DMA interrupt request to receiving the above-mentioned forwarding completion message. It is necessary to perform a waiting operation until it generates a new DMA interrupt request. The new DMA interrupt request is used as the DMA interrupt request and step S22 is started.

[0070] The above content is the process of the interrupt handling method described on the side of any forwarding chip in the forwarding device. The following is the process of the interrupt handling method described on the side of the control core in the multi-core CPU in the forwarding device. Figure 3 FIG. 1 is another interrupt handling method provided by an embodiment of the present application. The method is applied to a control core in a multi-core CPU in a forwarding device. The method may include the following steps:

[0071] S31 . When a DMA interrupt request is received from any forwarding chip in the forwarding device, a DMA interrupt response is sent to the forwarding chip through a PCIE channel, indicating that the control core has received the DMA interrupt request.

[0072] In this step, the DMA interrupt request is generated by the forwarding chip each time it writes a service message that meets preset conditions received by itself into a DMA forwarding queue for storing service messages in the multi-core CPU via a PCIE channel in a DMA manner.

[0073] It should be noted that the generation method of the interrupt request in this step is the same as the generation method in the process of describing the interrupt processing method at any forwarding chip side in the forwarding device, and will not be described in detail here.

[0074] S32. Query the interrupt flag whose value is a set value stored in the designated storage space in the multi-core CPU, and wake up the service core in the multi-core CPU that needs to forward the service message in the DMA forwarding queue corresponding to the queried interrupt flag, so as to forward the service message in the corresponding DMA forwarding queue, so that the service core sends a forwarding completion message to the forwarding chip through the PCIE channel after forwarding the service message in the corresponding DMA forwarding queue.

[0075] In this step, the designated storage space stores the interrupt flags and their corresponding values corresponding to all DMA forwarding queues on the forwarding chip refreshed by the forwarding chip, and among the interrupt flags corresponding to all DMA forwarding queues, the value of the interrupt flag corresponding to the DMA forwarding queue is set from the initial value to the set value by the forwarding chip after reporting the DMA interrupt request, and the values of the remaining interrupt flags are the initial values.

[0076] The above interrupt processing method is described in detail below with reference to specific embodiments.

[0077] Assume that a forwarding chip in a forwarding device in a communication network (such as Figure 4 As shown in the figure, after the forwarding device is powered on, a timer is started (assuming that the timer timeout period is 1s). Assuming that the forwarding chip receives 3 business messages through network port 1 when the timer times out, and assuming that the above-mentioned set number is 5, then the forwarding chip will detect that the timer has timed out but the total number of business messages received within the timer timeout period (i.e., 3) is not greater than the set number (i.e., 5). At this time, the forwarding chip will write these 3 business messages into the DMA forwarding queue (e.g., DMA forwarding queue 1) in the multi-core CPU in the forwarding device through the PCIE channel in DMA mode for storing these 3 business messages, and after completing the writing, generate a DMA interrupt request corresponding to the DMA forwarding queue 1 (recorded as DMA interrupt request 1).

[0078] Afterwards, the forwarding chip sets the value of the interrupt flag bit (recorded as interrupt flag bit 1) corresponding to the DMA forwarding queue 1 on the interrupt flag register on itself from the initial value (eg, 0) to the set value (eg, 1).

[0079] Then report DMA interrupt request 1 to the control core in the multi-core CPU through the PCIE channel ( Figure 4 (not shown), the interrupt flag bits and their corresponding values corresponding to all DMA forwarding queues in the interrupt flag register are refreshed to a designated storage space in the multi-core CPU, and the values of all interrupt flag bits are restored to their initial values. Here, among the interrupt flag bits and their corresponding values corresponding to all DMA forwarding queues stored in the designated storage space, only the interrupt flag bit corresponding to DMA forwarding queue 1 has a value of 1, while the interrupt flag bits corresponding to the remaining DMA forwarding queues all have values of 0.

[0080] When the control core receives DMA interrupt request 1, it will send a DMA interrupt response (recorded as DMA interrupt response 1) to the forwarding chip through the PCIE channel to indicate that the control core has received DMA interrupt request 1, query the interrupt flag with a value of 1 stored in the specified storage space, and wake up the business core (for example, business core 1) in the multi-core CPU that needs to forward the business message in the DMA forwarding queue (i.e., DMA forwarding queue 1) corresponding to the queried interrupt flag, and forward the business message in DMA forwarding queue 1. After forwarding the business message in DMA forwarding queue 1, business core 1 sends a forwarding completion message (recorded as forwarding completion message 1) to the forwarding chip through the PCIE channel.

[0081] Assume that a DMA interrupt response 1 sent by the control core and a forwarding completion message 1 sent by the service core 1 are subsequently received. At this time, the forwarding chip determines whether there is a DMA interrupt request that has been generated but not reported locally.

[0082] Assuming that the forwarding chip generates another DMA interrupt request (recorded as DMA interrupt request 2, assuming that the corresponding DMA forwarding queue is DMA forwarding queue 2) between reporting DMA interrupt request 1 and receiving forwarding completion message 1, then the judgment result is yes. At this time, the forwarding chip sets the value of the interrupt flag bit (recorded as interrupt flag bit 2) corresponding to DMA forwarding queue 2 on the interrupt flag register from 0 to 1.

[0083] DMA interrupt request 2 is then reported to the control core in the multi-core CPU via the PCIE channel. The interrupt flag bits and their corresponding values corresponding to all DMA forwarding queues in the interrupt flag register are refreshed to the designated storage space in the multi-core CPU, and the values of all interrupt flag bits are restored to their initial values. Here, among the interrupt flag bits and their corresponding values corresponding to all DMA forwarding queues stored in the designated storage space, only the interrupt flag bit corresponding to DMA forwarding queue 2 has a value of 1, while the interrupt flag bits corresponding to the remaining DMA forwarding queues have values of 0.

[0084] When the control core receives DMA interrupt request 2, it will send a DMA interrupt response (recorded as DMA interrupt response 2) to the forwarding chip through the PCIE channel to indicate that the control core has received DMA interrupt request 2, query the interrupt flag with a value of 1 stored in the specified storage space, and wake up the business core (for example, business core 2) in the multi-core CPU that needs to forward the business message in the DMA forwarding queue (i.e., DMA forwarding queue 2) corresponding to the queried interrupt flag, and forward the business message in DMA forwarding queue 2. After forwarding the business message in DMA forwarding queue 2, business core 2 sends a forwarding completion message (recorded as forwarding completion message 2) to the forwarding chip through the PCIE channel.

[0085] Assume that the DMA interrupt response 2 sent by the control core and the forwarding completion message 2 sent by the service core 2 are received subsequently. At this time, the forwarding chip still determines whether there is a DMA interrupt request that has been generated but not reported locally.

[0086] Assuming that there is no DMA interrupt request that has been generated and not reported locally, the judgment result is no. At this time, the forwarding chip performs a waiting operation, and when it waits until a new DMA interrupt request is generated by itself, it executes a process similar to that after generating DMA interrupt request 1, and continues to loop. I will not elaborate on this.

[0087] It can be seen from the above technical solution that in the embodiment of the present application, any forwarding chip in the forwarding device will only generate a DMA interrupt request corresponding to the DMA forwarding queue after each time it writes the business message it has received that meets the preset conditions into the DMA forwarding queue in the multi-core CPU in the forwarding device in a DMA manner through the PCIE channel. In this way, the number of reported DMA interrupt requests can be reduced, thereby improving the speed at which the control core in the multi-core CPU processes DMA interrupt requests, and improving the forwarding efficiency of the relevant business cores in the multi-core CPU in forwarding relevant business messages.

[0088] Furthermore, after the forwarding chip reports a DMA interrupt request to the control core via the PCIE channel, it also refreshes the interrupt flags and their corresponding values corresponding to all local DMA forwarding queues to the designated storage space in the multi-core CPU, and restores the values of all interrupt flags to their initial values. In this way, when the control core receives this DMA interrupt request, it will proactively send a DMA interrupt response to the forwarding chip via the PCIE channel to indicate that the control core has received the DMA interrupt request, and then query the interrupt flag stored in the designated storage space for the set value. This eliminates the need to query the interrupt flag for the set value via the PCIE channel as in the prior art, further improving the speed at which the control core in the multi-core CPU processes DMA interrupt requests, and improving the forwarding efficiency of the related service cores in the multi-core CPU in forwarding related service messages.

[0089] The subsequent control core will also wake up the business core in the multi-core CPU that needs to forward the business message in the DMA forwarding queue corresponding to the queried interrupt flag, so that the business core can send a forwarding completion message to the forwarding chip through the PCIE channel after forwarding the business message in the corresponding DMA forwarding queue. In this way, the forwarding chip will continue to report the next generated interrupt request only after receiving the DMA interrupt response sent by the control core for the DMA interrupt request generated this time and the forwarding completion message of the business message in the DMA forwarding queue corresponding to the DMA interrupt request generated this time sent by the relevant business core, thereby avoiding the problem of over-reporting or under-reporting of DMA interrupt requests.

[0090] Based on the same inventive concept, the present application also provides an interrupt processing device, which is applied to any forwarding chip in the forwarding device, and its structural diagram is shown as follows: Figure 5 As shown, specifically including:

[0091] A generating module 51 is configured to generate a DMA interrupt request corresponding to a DMA forwarding queue after first writing a plurality of service messages received by the module that meet preset conditions to a DMA forwarding queue in a multi-core CPU in the forwarding device in a DMA manner through a PCIE channel for storing the service messages;

[0092] A setting module 52 is used to set the value of the interrupt flag bit corresponding to the local DMA forwarding queue from the initial value to the set value;

[0093] a processing module 53 configured to report the DMA interrupt request to a control core in the multi-core CPU via the PCIE channel, refresh the interrupt flags and their corresponding values corresponding to all local DMA forwarding queues into a designated storage space in the multi-core CPU, and restore the values of all interrupt flags to the initial values, so that upon receiving the DMA interrupt request, the control core sends a DMA interrupt response to the forwarding chip via the PCIE channel, indicating that the control core has received the DMA interrupt request, queries the interrupt flag stored in the designated storage space for a set value, and wakes up a service core in the multi-core CPU that needs to forward a service message in the DMA forwarding queue corresponding to the queried interrupt flag, so as to forward the service message in the corresponding DMA forwarding queue, so that the service core sends a forwarding completion message to the forwarding chip via the PCIE channel after forwarding the service message in the corresponding DMA forwarding queue;

[0094] a judgment module 54 configured to, upon receiving the DMA interrupt response sent by the control core and the forwarding completion message sent by the service core, determine whether there is a locally generated but unreported DMA interrupt request, and if the judgment result is yes, use the generated but unreported DMA interrupt request whose generation time is closest to the generation time of the DMA interrupt request as the DMA interrupt request, thereby triggering the setting module 52 to execute the step of setting the value of the interrupt flag bit corresponding to the local DMA forwarding queue from the initial value to the set value;

[0095] The waiting module 55 is used to perform a waiting operation when the judgment result of the judgment module 54 is no, and when it waits until a new DMA interrupt request is generated by itself, use the new DMA interrupt request as the DMA interrupt request, triggering the setting module 52 to execute the step of setting the value of the interrupt flag bit corresponding to the local DMA forwarding queue from the initial value to the set value.

[0096] Preferably, the device further comprises:

[0097] Determine the module ( Figure 5 (not shown), for determining the service message that meets the preset conditions received by itself in the following manner:

[0098] If it is detected that the timer set on itself has timed out but the total number of service messages received within the timeout period of the timer is not greater than the set number, all service messages received within the timeout period are determined to be service messages received by itself that meet the preset conditions;

[0099] If it is monitored that the timer has not timed out but the set number of service messages has been received, the set number of service messages received are determined as the service messages received by itself that meet the preset conditions.

[0100] Preferably, the processing module 53 is further configured to:

[0101] After the DMA interrupt request is reported to the control core through the PCIE channel, if the DMA interrupt response sent by the control core through the PCIE channel is not received within a set time period, the DMA interrupt request is reported to the control core again through the PCIE channel.

[0102] The present application also provides an interrupt processing device, which is applied to the control core of the multi-core CPU in the forwarding device. The structural diagram thereof is shown in FIG. Figure 6 As shown, specifically including:

[0103] The transceiver module 61 is configured to, upon receiving a DMA interrupt request sent by any forwarding chip in the forwarding device, send a DMA interrupt response to the forwarding chip via a PCIE channel, indicating that the control core has received the DMA interrupt request, wherein the DMA interrupt request is generated by the forwarding chip after writing, via the PCIE channel, a plurality of service messages received by the forwarding chip that meet preset conditions to a DMA forwarding queue in the multi-core CPU for storing the service messages in a DMA manner;

[0104] The query wake-up module 62 is used to query the interrupt flag whose value is a set value stored in the designated storage space in the multi-core CPU, and wake up the business core in the multi-core CPU that needs to forward the business message in the DMA forwarding queue corresponding to the queried interrupt flag to forward the business message in the corresponding DMA forwarding queue, so that the business core sends a forwarding completion message to the forwarding chip through the PCIE channel after forwarding the business message in the corresponding DMA forwarding queue; wherein, the designated storage space stores the interrupt flags and their corresponding values corresponding to all the DMA forwarding queues on the forwarding chip refreshed by the forwarding chip, and among the interrupt flags corresponding to all the DMA forwarding queues, the value of the interrupt flag corresponding to the DMA forwarding queue is set to the set value by the forwarding chip from the initial value after reporting the DMA interrupt request, and the values of the remaining interrupt flags are the initial values.

[0105] It can be seen from the above technical solution that in the embodiment of the present application, any forwarding chip in the forwarding device will only generate a DMA interrupt request corresponding to the DMA forwarding queue after each time it writes the business message it has received that meets the preset conditions into the DMA forwarding queue in the multi-core CPU in the forwarding device in a DMA manner through the PCIE channel. In this way, the number of reported DMA interrupt requests can be reduced, thereby improving the speed at which the control core in the multi-core CPU processes DMA interrupt requests, and improving the forwarding efficiency of the relevant business cores in the multi-core CPU in forwarding relevant business messages.

[0106] Furthermore, after the forwarding chip reports a DMA interrupt request to the control core via the PCIE channel, it also refreshes the interrupt flags and their corresponding values corresponding to all local DMA forwarding queues to the designated storage space in the multi-core CPU, and restores the values of all interrupt flags to their initial values. In this way, when the control core receives this DMA interrupt request, it will proactively send a DMA interrupt response to the forwarding chip via the PCIE channel to indicate that the control core has received the DMA interrupt request, and then query the interrupt flag stored in the designated storage space for the set value. This eliminates the need to query the interrupt flag for the set value via the PCIE channel as in the prior art, further improving the speed at which the control core in the multi-core CPU processes DMA interrupt requests, and improving the forwarding efficiency of the related service cores in the multi-core CPU in forwarding related service messages.

[0107] The subsequent control core will also wake up the business core in the multi-core CPU that needs to forward the business message in the DMA forwarding queue corresponding to the queried interrupt flag, so that the business core can send a forwarding completion message to the forwarding chip through the PCIE channel after forwarding the business message in the corresponding DMA forwarding queue. In this way, the forwarding chip will continue to report the next generated interrupt request only after receiving the DMA interrupt response sent by the control core for the DMA interrupt request generated this time and the forwarding completion message of the business message in the DMA forwarding queue corresponding to the DMA interrupt request generated this time sent by the relevant business core, thereby avoiding the problem of over-reporting or under-reporting of DMA interrupt requests.

[0108] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. An interrupt processing method, characterized in that: The method is applied to any forwarding chip in a forwarding device, and the method includes: After writing the multiple service messages received by the forwarding device and meeting the preset conditions into a DMA forwarding queue for storing the service messages in the multi-core CPU of the forwarding device through the PCIE channel in a DMA manner for the first time, generating a DMA interrupt request corresponding to the DMA forwarding queue; Setting the value of the interrupt flag bit corresponding to the local DMA forwarding queue from the initial value to the set value; The DMA interrupt request is reported to the control core in the multi-core CPU through the PCIE channel, the interrupt flag bits and their corresponding values corresponding to all local DMA forwarding queues are refreshed to the designated storage space in the multi-core CPU, and the values of all interrupt flag bits are restored to the initial values, so that when the control core receives the DMA interrupt request, it sends a DMA interrupt response to the forwarding chip through the PCIE channel to indicate that the control core has received the DMA interrupt request, queries the interrupt flag bit whose value in the designated storage space is the set value, and wakes up the service core in the multi-core CPU that needs to forward the service message in the DMA forwarding queue corresponding to the queried interrupt flag bit, so as to forward the service message in the corresponding DMA forwarding queue, so that after the service core has forwarded the service message in the corresponding DMA forwarding queue, it sends a forwarding completion message to the forwarding chip through the PCIE channel; Upon receiving the DMA interrupt response sent by the control core and the forwarding completion message sent by the service core, determining whether there is a DMA interrupt request that has been generated but not reported locally; When the judgment result is yes, the generated and unreported DMA interrupt request whose generation time is closest to the generation time of the DMA interrupt request is used as the DMA interrupt request, and the value of the interrupt flag bit corresponding to the local DMA forwarding queue is set from the initial value to the set value; When the judgment result is no, a waiting operation is performed, and when a new DMA interrupt request is generated by itself, the new DMA interrupt request is used as the DMA interrupt request, and the value of the interrupt flag bit corresponding to the local DMA forwarding queue is set from the initial value to the set value.

2. The method according to claim 1, characterized in that Determine the service messages that meet the preset conditions received by the user in the following ways: If it is detected that the timer set on itself has timed out but the total number of service messages received within the timeout period of the timer is not greater than the set number, all service messages received within the timeout period are determined to be service messages received by itself that meet the preset conditions; If it is monitored that the timer has not timed out but the set number of service messages has been received, the set number of service messages received are determined as the service messages received by itself that meet the preset conditions.

3. The method according to claim 1, characterized in that The method further comprises: After the DMA interrupt request is reported to the control core through the PCIE channel, if the DMA interrupt response sent by the control core through the PCIE channel is not received within a set time period, the DMA interrupt request is reported to the control core again through the PCIE channel.

4. An interrupt processing method, characterized in that: The method is applied to a control core in a multi-core CPU in a forwarding device, and the method includes: Upon receiving a DMA interrupt request sent by any forwarding chip in the forwarding device, sending a DMA interrupt response to the forwarding chip through a PCIE channel, indicating that the control core has received the DMA interrupt request, wherein the DMA interrupt request is generated by the forwarding chip after writing, through the PCIE channel, in a DMA manner, a plurality of service messages received by the forwarding chip that meet preset conditions to a DMA forwarding queue in the multi-core CPU for storing the service messages; Query the interrupt flag whose value is a set value stored in the designated storage space in the multi-core CPU, and wake up the business core in the multi-core CPU that needs to forward the business message in the DMA forwarding queue corresponding to the queried interrupt flag, so that the business core sends a forwarding completion message to the forwarding chip through the PCIE channel after forwarding the business message in the corresponding DMA forwarding queue; wherein, the designated storage space stores the interrupt flags and their corresponding values corresponding to all the DMA forwarding queues on the forwarding chip refreshed by the forwarding chip, and among the interrupt flags corresponding to all the DMA forwarding queues, the value of the interrupt flag corresponding to the DMA forwarding queue is set to the set value from the initial value by the forwarding chip after reporting the DMA interrupt request, and the values of the remaining interrupt flags are the initial values.

5. An interrupt processing device, characterized in that: The device is applied to any forwarding chip in a forwarding device, and includes: a generating module, configured to generate a DMA interrupt request corresponding to the DMA forwarding queue after first writing the determined multiple service messages received by the module and meeting the preset conditions into a DMA forwarding queue for storing the service messages in the multi-core CPU of the forwarding device through the PCIE channel in a DMA manner; A setting module, configured to set the value of the interrupt flag bit corresponding to the local DMA forwarding queue from an initial value to a set value; a processing module, configured to report the DMA interrupt request to a control core in the multi-core CPU through the PCIE channel, refresh the interrupt flags and their corresponding values corresponding to all local DMA forwarding queues to a designated storage space in the multi-core CPU, and restore the values of all interrupt flags to the initial values, so that upon receiving the DMA interrupt request, the control core sends a DMA interrupt response to the forwarding chip through the PCIE channel, indicating that the control core has received the DMA interrupt request, queries the interrupt flag stored in the designated storage space, and wakes up a service core in the multi-core CPU that needs to forward a service message in the DMA forwarding queue corresponding to the queried interrupt flag, so as to forward the service message in the corresponding DMA forwarding queue, so that after the service core has forwarded the service message in the corresponding DMA forwarding queue, it sends a forwarding completion message to the forwarding chip through the PCIE channel; a judgment module, configured to, upon receiving the DMA interrupt response sent by the control core and the forwarding completion message sent by the service core, judge whether there is a DMA interrupt request that has been generated but not reported locally, and, if the judgment result is yes, use the generated but not reported DMA interrupt request whose generation time is closest to the generation time of the DMA interrupt request as the DMA interrupt request, and trigger the setting module to execute the step of setting the value of the interrupt flag bit corresponding to the local DMA forwarding queue from the initial value to the set value; The waiting module is used to perform a waiting operation when the judgment result of the judgment module is no, and when waiting until a new DMA interrupt request is generated by itself, use the new DMA interrupt request as the DMA interrupt request, triggering the setting module to execute the step of setting the value of the interrupt flag bit corresponding to the local DMA forwarding queue from the initial value to the set value.

6. The device according to claim 5, characterized in that The device further comprises: The determination module is used to determine the service messages it receives that meet the preset conditions by: If it is detected that the timer set on itself has timed out but the total number of service messages received within the timeout period of the timer is not greater than the set number, all service messages received within the timeout period are determined to be service messages received by itself that meet the preset conditions; If it is monitored that the timer has not timed out but the set number of service messages has been received, the set number of service messages received are determined as the service messages received by itself that meet the preset conditions.

7. The device according to claim 5, characterized in that The processing module is further configured to: After the DMA interrupt request is reported to the control core through the PCIE channel, if the DMA interrupt response sent by the control core through the PCIE channel is not received within a set time period, the DMA interrupt request is reported to the control core again through the PCIE channel.

8. An interrupt processing device, characterized in that: The device is applied to a control core in a multi-core CPU in a forwarding device, and includes: a transceiver module, configured to, upon receiving a DMA interrupt request sent by any forwarding chip in the forwarding device, send a DMA interrupt response to the forwarding chip via a PCIE channel, indicating that the control core has received the DMA interrupt request, wherein the DMA interrupt request is generated by the forwarding chip after writing, via the PCIE channel, in a DMA manner, a plurality of service messages received by the forwarding chip that meet preset conditions to a DMA forwarding queue in the multi-core CPU for storing the service messages; A query wake-up module is used to query the interrupt flag bit whose value is a set value stored in the designated storage space in the multi-core CPU, and wake up the business core in the multi-core CPU that needs to forward the business message in the DMA forwarding queue corresponding to the queried interrupt flag bit, so as to forward the business message in the corresponding DMA forwarding queue, so that the business core sends a forwarding completion message to the forwarding chip through the PCIE channel after forwarding the business message in the corresponding DMA forwarding queue; wherein, the designated storage space stores the interrupt flag bits and their corresponding values corresponding to all the DMA forwarding queues on the forwarding chip refreshed by the forwarding chip, and among the interrupt flag bits corresponding to all the DMA forwarding queues, the value of the interrupt flag bit corresponding to the DMA forwarding queue is set to the set value by the forwarding chip from the initial value after reporting the DMA interrupt request, and the values of the remaining interrupt flag bits are the initial values.

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