A computing device, a computing chip, and a computing method

Abstract

A computing device, a computing chip, and a computing method are disclosed. In this application, the computing device has a magnetic storage unit capable of storing data, comprising a stacked heavy metal layer and a magnet layer. Two current input circuits of the computing device can inject currents in different directions into the heavy metal layer of the magnetic storage unit. The reading circuit of the computing device is connected to the magnet layer and can read the resistance value of the magnetic storage unit. The resistance value of the magnetic storage unit, given a first constant current, exhibits a probability distribution with repeated current injections. The computing device provided by this invention can change the current in the heavy metal layer using two current input circuits, causing the magnetization direction of the magnet layer to reverse with a certain probability, resulting in a change in the resistance value of the magnetic storage unit with a certain probability, thus achieving probabilistic bits, and the implementation method is relatively simple.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to a computing device, computing chip, and computing method. Background Technology

[0002] Classical computers store and use information in the form of 0s and 1s, and operate deterministically. However, many problems remain unsolved effectively, such as large number factorization, combinatorial optimization, reversible logic, and sampling.

[0003] To address this, probabilistic computation was proposed. The principle of probabilistic computation is similar to that of quantum computing. It utilizes probabilistic bits (p-bits) to obtain the final result. The probability of the output value in the p-bit can fluctuate from 0 to 1, meaning that different output values ​​have different probabilities of occurrence.

[0004] Currently, probability bits can be implemented using spin-transfer torque magnetic random-access memory (STT-MRAM).

[0005] When implementing probabilistic bits, the energy barrier of STT-MRAM can be reduced, such as by reducing the thickness of the magnetic tunnel junction (MTJ) barrier layer or the size of the MTJ. This makes the spin direction of the MTJ affected by external thermal perturbations and other factors, resulting in the random fluctuation of the magnetization direction of the MTJ between two states, which is a probability distribution event.

[0006] Using a spin-transfer torque magnetoresistive memory to implement probabilistic bits leads to a decrease in the stability and lifespan of the MTJ. In addition, precise control of the energy barrier of the STT-MRAM is required, which is difficult to achieve. Summary of the Invention

[0007] This application provides a computing device, a computing chip, and a computing method for efficiently and conveniently implementing probability bits.

[0008] In a first aspect, embodiments of this application provide a computing device, which includes a magnetic storage unit, two current input circuits and a read circuit, wherein the two current input circuits are a first current input circuit and a second current input circuit, respectively.

[0009] In this computing device, a magnetic storage cell can store data. Different resistance values ​​of the magnetic storage cell can represent different data. The magnetic storage cell includes stacked heavy metal layers and a magnet layer. The magnet layer has a magnetization direction, which can be reversed under certain conditions, affecting the resistance value of the magnetic storage cell.

[0010] Two current input circuits can inject current in different directions into the heavy metal layer of the magnetic storage cell. Specifically, the first current input circuit can inject a first current in a first direction into the heavy metal layer of the magnetic storage cell; the second current input circuit can inject a second current in a second direction multiple times into the heavy metal layer of the magnetic storage cell, with the first and second directions being opposite to each other.

[0011] The read circuit is connected to the magnet layer and can read the resistance value of the magnetic storage cell. The resistance value of the magnetic storage cell follows a probability distribution with multiple injections of the second current, given the same first current.

[0012] By using the aforementioned computing device and altering the current in the heavy metal layer through two current input circuits, the magnetization direction of the magnet layer is reversed with a certain probability, causing the resistance of the magnetic storage cell to change with a certain probability, thus enabling probabilistic bits. This method only requires changing the current injected into the heavy metal layer through two current input circuits, making it relatively easy to implement and ensuring efficient probabilistic bit implementation.

[0013] In one possible implementation, the first current is greater than the threshold current of the magnet layer, and the second current is less than the threshold current of the magnet layer. The threshold current refers to the minimum current value that causes the magnetization direction of the magnet layer to reverse when the magnetic field strength of the magnetic storage cell is sufficiently large.

[0014] With the aforementioned computing device, the first current is greater than the threshold current and the second current is less than the threshold current. When the first and second currents in opposite directions are injected into the heavy metal layer, the current in the heavy metal layer will be changed, so that the magnetization direction of the magnet layer in the magnetic storage cell may be reversed or not reversed. That is, the magnetization direction of the magnet layer may not necessarily be reversed, thus ensuring the possibility of the computing device realizing probabilistic bits.

[0015] In one possible implementation, a first current and a second current are injected into the heavy metal layer sequentially.

[0016] Using the aforementioned computing device, one of the first and second currents is first injected into the heavy metal layer to initialize the magnet layer, so that the magnetization direction in the magnet layer is in the initial magnetization direction. Then, the second current is injected. The presence of the second current can change the magnitude of the current in the heavy metal layer, thereby causing the magnetization direction in the magnet layer to reverse with a certain probability.

[0017] In one possible implementation, the magnetic storage cell can be located in a constant magnetic field.

[0018] Through the aforementioned computing devices, the presence of a constant magnetic field can assist in reversing the magnetization direction of the magnet layer, making the reversal of the magnetization direction easier.

[0019] In one possible implementation, when the magnetic storage cell can be located in a constant magnetic field, the magnetic field direction, the first direction, the second direction of the constant magnetic field, and the magnetization direction of the magnet layer are related in certain ways. Specifically, these relationships can be as follows:

[0020] The first method, ignoring the thickness of the first plane where the magnet layer is located, when the initial magnetization direction of the magnet layer is located within the first plane, the first direction and the second direction are parallel to the initial magnetization direction, and the direction of the constant magnetic field is perpendicular to the first plane.

[0021] The second scenario is that when the initial magnetization direction of the magnet layer is perpendicular to the first plane, the first direction, the second direction, and the direction of the constant magnetic field are parallel to the first plane.

[0022] It should be noted that when the initial magnetization direction of the magnet layer is neither located in the first plane nor perpendicular to the first plane, the magnetic storage cell may not be located in the magnetic field. In this case, the first direction and the second direction only need to be opposite.

[0023] With the aforementioned computing devices, there are many ways to set the initial magnetization direction, first direction, and second direction of the magnet layer, which are suitable for different scenarios.

[0024] In one possible implementation, the magnet layer comprises a free layer and a barrier layer. The free layer comprises a ferromagnetic material, and the barrier layer may comprise an oxide material. The magnetization direction of the magnet layer is also the magnetization direction of the free layer.

[0025] With the aforementioned computing devices, the structure of the magnet layer is relatively simple, which ensures that the magnetic storage unit is easy to construct and reduces construction costs.

[0026] In one possible implementation, the magnet layer comprises an MTJ. The magnetization direction of the magnet layer is also the magnetization direction of the free layer in the MTJ.

[0027] With the above computing device, when the magnet layer is MTJ, that is, the computing device is based on SOT-MARM, the thickness of the barrier layer does not need to be considered, and the probability bit can be realized simply and conveniently.

[0028] In one possible implementation, when the first current is the same, the same second current can be injected multiple times. In this case, the probability that the resistance of the magnetic storage cell is the first value is M, and the probability that the resistance of the magnetic storage cell is the second value is N, where M and N are positive numbers less than 1.

[0029] When the first current is the same, different second currents can be injected multiple times. In this case, the probability that the resistance of the magnetic storage cell will be the same or different each time the second current is injected. The resistance of the magnetic storage cell changes with the change of the second current.

[0030] Through the aforementioned computing device, the resistance of the magnetic storage cell exhibits a probability distribution with respect to the second current, meaning that the resistance of the magnetic storage cell is not fixed, enabling the computing device to realize probabilistic bits.

[0031] Secondly, embodiments of this application provide a computing chip for performing probability calculations. The computing chip includes multiple computing devices. The input voltage of the input terminal of the second current input circuit of each of the multiple computing devices is determined based on the data to be calculated and the voltage and value of the output terminal of the read circuit of the remaining computing devices. The resistance value of the magnetic storage cell read by the read current in the multiple computing devices is used to indicate the calculation result.

[0032] In one possible implementation, the input terminal of the second current input circuit of each computing device is provided with a voltage integration circuit, which is used to integrate the sum of the output voltages of the read circuits of the remaining computing devices with a target weight, the target weight of each voltage integration current being determined based on the data to be calculated.

[0033] Thirdly, embodiments of this application provide a calculation method that can be applied to the computing devices mentioned above.

[0034] In this method, a first current in a first direction is injected into a heavy metal layer in a magnetic storage cell of a computing device, wherein the magnetic storage cell includes the stacked heavy metal layer and a magnet layer.

[0035] A second current in a second direction is injected multiple times into the heavy metal layer in the magnetic storage cell, wherein the first direction and the second direction are opposite to each other;

[0036] After each injection of the second current, the resistance value of the magnetic storage cell is read through the magnet layer, wherein the resistance value of the magnetic storage cell, under the condition that the first current is the same, follows a probability distribution with the multiple injections of the second current.

[0037] In one possible implementation, the first current is greater than the threshold current of the magnet layer, and the second current is less than the threshold current of the magnet layer.

[0038] In one possible implementation, the second current injected multiple times is the same current, the probability that the resistance of the magnetic storage cell is the first value is M, and the probability that the resistance of the magnetic storage cell is the second value is N, where M and N are positive numbers less than 1. Attached Figure Description

[0039] Figure 1 This application provides a schematic diagram of the structure of a magnetic storage cell;

[0040] Figure 2 A schematic diagram of the structure of a computing device provided in this application;

[0041] Figure 3 A schematic diagram of the structure of a computing device provided in this application;

[0042] Figure 4A A schematic diagram of various input voltages in different states of a computing device provided in this application;

[0043] Figure 4B A schematic diagram of the states of various field-effect transistors in different states in a computing device provided in this application;

[0044] Figure 5 A schematic diagram of the structure of a computing device provided in this application;

[0045] Figure 6A A schematic diagram of various input voltages in different states of a computing device provided in this application;

[0046] Figure 6B A schematic diagram of the states of various field-effect transistors in different states in a computing device provided in this application;

[0047] Figure 7A A schematic diagram of the magnetization direction, magnetic field direction, first direction, and second direction in a computing device provided in this application;

[0048] Figure 7B A schematic diagram of the magnetization direction, magnetic field direction, first direction, and second direction in another computing device provided in this application;

[0049] Figure 7C A schematic diagram of a calculation method provided in this application;

[0050] Figure 7D A schematic diagram showing the relationship between the number of times the resistance of the magnetic storage cell in a computing device is P and the second current, provided in this application.

[0051] Figure 8 This is a schematic diagram of the structure of a computing chip provided in this application. Detailed Implementation

[0052] Before introducing a computing device and computing method provided in the embodiments of this application, the basic concepts involved in this application will be explained first.

[0053] (1) Spin orbit torque (SOT)

[0054] SOT refers to adding a heavy metal layer (such as platinum, tantalum, tungsten, etc.) below the free layer of a magnetic tunnel junction. When the intensity of the current flowing through the heavy metal layer is higher than a certain threshold, it will induce a torque to drive the magnetization direction of the free layer to reverse. There are many reasons for the torque in the heavy metal layer, such as the Lashba effect, the spin Hall effect, or a combination of the two effects.

[0055] (2) Magnetic tunnel junction

[0056] A magnetic tunnel junction generally refers to a sandwich structure consisting of a ferromagnetic layer, a non-magnetic insulating layer, and a ferromagnetic layer. The top ferromagnetic layer is called the reference layer. The non-magnetic insulating layer is called the barrier layer. The bottom ferromagnetic layer is called the free layer.

[0057] (3) Magnetic storage unit

[0058] In the embodiments of this application, such as Figure 1 As shown, the magnetic storage cell includes a stacked heavy metal layer and a magnetic layer. The magnetic layer can be a magnetic tunnel junction, or it can only include a portion of the magnetic tunnel junction, such as only including a free layer (including ferromagnetic materials) and a barrier layer (such as oxide materials, magnesium oxide or aluminum oxide). In this embodiment, the magnetic layer is a magnetic tunnel junction as an example for illustration.

[0059] Figure 1 In this magnetic storage cell, there are stacked heavy metal layers and a magnetic tunnel junction, wherein the heavy metal layers are in contact with the free layer in the magnetic tunnel junction and are located below the free layer.

[0060] In this embodiment, the initial magnetization direction of the free layer in the magnetic storage cell is located within or perpendicular to the plane of the free layer. The magnetic storage cell can be placed in a constant magnetic field, where the magnetic field strength H0 can be less than Hth, and Hth is a pre-determined magnetic field strength that is the minimum magnetic field strength required to cause a 100% reversal of the magnetization direction of the free layer. This constant magnetic field can assist in reversing the magnetization direction of the free layer.

[0061] In this scenario, when the current I flowing through the heavy metal layer of the magnetic storage cell is less than or close to the threshold Ith (the difference between current I and threshold Ith is small, less than a set value), the initial magnetization direction of the free layer will likely reverse with a certain probability. Ith refers to the minimum current value required to achieve a 100% reversal of the magnetization direction of the free layer under the assistance of a constant magnetic field with sufficiently high magnetic field strength.

[0062] When the current I flowing through the heavy metal layer of a magnetic storage cell is greater than the threshold Ith (the difference between current I and threshold Ith is large), the magnetization direction of the free layer will definitely be reversed.

[0063] The reversal of the magnetization direction of the free layer will change the relative orientation of the magnetization directions of the free layer and the reference layer in the magnetic tunnel junction, resulting in a change in the resistance of the entire magnetic tunnel junction.

[0064] In this embodiment, when the initial magnetization direction of the free layer in the magnetic storage cell is neither in the plane of the free layer nor perpendicular to the plane of the free layer, the magnetic storage cell may not be placed in a constant magnetic field. In this case, when the current I flowing in the heavy metal layer of the magnetic storage cell is less than or close to the threshold Ith (the difference between the current I and the threshold Ith is small, less than a set value), the magnetization direction of the free layer will also flip with a certain probability.

[0065] (4) Metal oxide semiconductor field effect transistor (MOSFET), also known simply as a field effect transistor.

[0066] Field-effect transistors (FETs) are divided into P-type FETs and N-type FETs. N-type FETs conduct when the gate voltage is greater than the threshold voltage and are typically suitable for applications where the source is grounded. P-type FETs conduct when the gate voltage is less than the threshold voltage and usually require a fixed source voltage.

[0067] In the embodiments of this application, MP represents a P-type field-effect transistor, such as MP1, MP2, MP3, etc., and MN represents an N-type field-effect transistor, such as MN1, MN2, MN3, etc.

[0068] The following description, in conjunction with the accompanying drawings, illustrates a computing device provided in an embodiment of this application, such as... Figure 2 The image shows a computing device provided in an embodiment of this application. The computing device 100 includes a magnetic storage unit 110, a first current input circuit 120, a second circuit input circuit 130, and a read circuit 140.

[0069] The magnetic storage unit 110 can store data, and different resistance values ​​of the magnetic storage unit 110 represent different stored data.

[0070] When the magnetization direction of the free layer in the magnetic storage cell 110 is initially set, the resistance of the magnetic storage cell 110 is resistance P, which can represent one type of data. When the magnetization direction of the free layer in the magnetic storage cell 110 is reversed, the resistance of the magnetic storage cell 110 changes from resistance P to resistance Q, which can represent another type of data.

[0071] In this embodiment, the computing device may include two current input units: a first current input circuit 120 and a second current input circuit 130. The two current input units can inject current into the heavy metal layer of the magnetic storage unit 110. To distinguish the current injected by the first current input circuit 120 and the second current input circuit 130, in this embodiment, the current injected by the first current input circuit 120 into the heavy metal layer of the magnetic storage unit 110 is a first current in a first direction; the current injected by the second current input circuit 130 into the heavy metal layer of the magnetic storage unit 110 is a second current in a second direction. The first and second directions are opposite to each other.

[0072] The directions of the currents injected into the heavy metal layer of the magnetic storage unit 110 by the first current input circuit 120 and the second current input circuit 130 are opposite. This is because one of the current input circuits 120 and 130 can inject current into the heavy metal layer first. At this time, the current flowing in the heavy metal layer will cause the magnetization direction in the free layer to be in the initial magnetization direction. Afterwards, the current injection into the heavy metal layer stops, and the other current input circuit in the first current input circuit 120 and the second current input circuit 130 injects current into the heavy metal layer, changing the current affecting the heavy metal layer. This will cause the total current in the heavy metal layer to decrease, and may even fall below or approach the threshold. In this case, the magnetization direction of the free layer will reverse with a certain probability.

[0073] In other words, one of the current input circuits 120 and 130 can inject current into the heavy metal layer to initialize the magnetic storage unit 110, causing the magnetization direction in the free layer to be in the initial magnetization direction. The other current input circuit in the first current input circuit 120 and the second current input circuit 130 injects current into the heavy metal layer to change the current in the heavy metal layer, thereby triggering the magnetization direction of the free layer to flip with a certain probability.

[0074] To detect whether the magnetization direction in the free layer has reversed, the computing device 100 includes a read circuit 140. This read circuit 140 is connected to a magnetic tunnel junction and can read the resistance value of the magnetic storage cell 110. This embodiment does not limit the read circuit 140 to reading the resistance value of the magnetic storage cell 110. For example, the read circuit 140 can input a constant voltage to the magnetic storage cell and determine the resistance value of the storage cell 110 by reading the current in the magnetic storage cell 110. Alternatively, the read circuit 140 can input a constant current to the magnetic storage cell and determine the resistance value of the storage cell 110 by reading the voltage across the magnetic storage cell 110.

[0075] Taking the first current as the current used to initialize the magnetic storage cell 110 and the second current as the current that triggers the magnetization direction of the free layer to reverse with a certain probability as an example. Based on the description of the magnetic storage cell 110, it can be seen that when the magnetization direction of the free layer in the magnetic storage cell 110 does not reverse, the resistance of the magnetic storage cell 110 is resistance value P. When the magnetization direction of the free layer in the magnetic storage cell 110 reverses, the resistance of the magnetic storage cell 110 will change from resistance value P to resistance value Q.

[0076] When the first current is injected into the heavy metal layer, the magnetic storage cell 110 is initialized. The magnetization direction of the free layer of the magnetic storage cell 110 is in the initial magnetization direction, and the resistance of the magnetic storage cell 110 is P. Subsequently, a second current is injected into the heavy metal layer in the opposite direction to the first current, causing the current in the heavy metal layer to decrease. This may cause the magnetization direction of the free layer of the magnetic storage cell 110 to reverse. That is, the resistance of the magnetic storage cell 110 may remain at resistance P or change to resistance Q, with a certain probability of remaining at resistance P and a certain probability of changing to resistance Q. Under the condition that the first current is the same, the resistance of the magnetic storage cell 110 follows a probability distribution with the second current. When the second current is different, the probability of the resistance of the magnetic storage cell 110 remaining at resistance P or changing to resistance Q may also be different.

[0077] The embodiments of this application do not limit the specific configuration of the first current input circuit 120, the second current input circuit 130, and the reading circuit 140. Any circuit that can inject opposite current into the magnetic storage unit 110 and read the resistance value of the magnetic storage unit 110 is applicable to the embodiments of this application.

[0078] Two computing devices are shown below with reference to the accompanying diagram:

[0079] The first type, see appendix. Figure 3 The present application provides a computing device 100, which includes a magnetic storage unit 110, a first current input circuit 120, a second current input circuit 130, and a read circuit 140.

[0080] The first current input circuit 120 includes three field-effect transistors, namely MP2, MN5, and MN2.

[0081] When the first current input circuit 120 is working, the gate input voltage Reset of MP2 in the first current input circuit 120 is less than the threshold voltage of MP2, MP2 is turned on. At this time, MP2 is approximately a constant current source, generating a fixed current I1. By adjusting the gate voltage Vin1 of MN5 in the first current input circuit 120 (the source of MN5 is grounded), the current Ids2 flowing through MN5 is changed.

[0082] In this case, the first current Ireset injected by the first current input circuit 120 into the heavy metal layer of the magnetic storage cell 110 is determined by the current I1 and the current Ids2, and the first current Ireset is equal to the difference between I1 and Ids2.

[0083] The gate input voltage ResetB of MN2 in the first current input circuit 120 is less than the threshold voltage of MN2. When the voltage ResetB is less than the threshold voltage of MN2, the source of MN2 is grounded and MN2 is turned on, so that MP2, MN5, MN2 and magnetic storage unit 110 form a loop, and the first current Ireset can flow to MN2 through magnetic storage unit 110.

[0084] The second current input circuit 130 includes three field-effect transistors, namely MP1, MN1, and MN4.

[0085] When the second current input circuit 130 is working, the gate input voltage Set of MP1 in the second current input circuit 130 is used. When the voltage Set is less than the threshold voltage of MP1, MP1 is turned on. At this time, MP1 is approximately a constant current source, generating a fixed current I0. By adjusting the gate voltage Vin2 of MN1 in the second current input circuit 130 (the source of MN1 is grounded), the magnitude of the current Ids1 flowing through MN1 is changed.

[0086] In this case, the second current Iset injected by the second current input circuit 130 into the heavy metal layer of the magnetic storage cell 110 is determined by the current I0 and the current Ids1, and the second current Iset is equal to the difference between I0 and Ids1.

[0087] The gate input voltage SetB of MN4 in the second current input circuit 130 is less than the threshold voltage of MN4. When the voltage SetB is less than the threshold voltage of MN4, the source of MN4 is grounded and MN4 is turned on, so that MP1, MN1, MN4 and magnetic storage unit 110 form a loop, and the second current Iset can flow to MN4 through magnetic storage unit 110.

[0088] The read circuit 140 includes three field-effect transistors, namely MP3, MN6, and MN3. In one possible scenario, MP3 can also be replaced by a fixed resistor.

[0089] When the read circuit 140 is working, the source of MP3 is connected to the voltage VDD, and the gate of MP3 is connected to the power supply Vin3, which makes MP3 in the conducting state. The gate input voltage of MN6 is Read. The voltage Read is greater than the threshold voltage of MN6, making MN6 a constant current source and generating a fixed read current Iread.

[0090] The gate input voltage ReadB of MN3 in the read circuit 140 is such that when ReadB is less than the threshold voltage of MN3, the source of MN3 is grounded and MN3 is turned on. At this time, one end of the magnetic storage cell 110 is grounded. By controlling the values ​​of ResetB and SetB, MN2 and MN4 are kept in the off state, and the first current input circuit 120 and the second current input circuit 130 stop working.

[0091] In this case, the voltage Vout at the output terminal of the read circuit 140 is equal to the sum of the products of the read current Iread and the resistance values ​​of the magnetic storage unit 110, MN6, and MN3. In the on state, the resistance values ​​of MN6 and the sum of the resistance values ​​of MN3 can be ignored. Therefore, within the allowable range, the voltage Vout is equal to the product of the read current Iread and the resistance value of the magnetic storage unit 110.

[0092] The states of a computing device can be divided into initial state, reset state, set state, and read state.

[0093] The initial state refers to the state where the computing device is not working, the reset state refers to the state where the first current input circuit 120 is working, the setting state refers to the state where the second current input circuit 130 is working, and the reading state refers to the state where the reading circuit 140 is working.

[0094] like Figure 4A As shown, Figure 3 The diagram shows the input values ​​of the gate voltages Reset, Vin1, Set, Vin2, Read, and Vin3 of MP2, MN5, MP1, MN2, MN6, and MP3 in different states of the computing devices shown. Here, 1 represents a high level, which is a voltage higher than the threshold voltage. 0 represents a low voltage, which is a voltage lower than the threshold voltage. X represents any level, which can be either high or low. Variable means the value needs to be adjusted according to the scenario.

[0095] For example, in the reset state, the first current input circuit 120 is in the working state, and the first current Ireset injected into the magnetic storage cell 110 by adjusting the value of Vin1 can be changed.

[0096] In the setting state, the second current input circuit 130 is in the working state, and the second current Iset injected into the magnetic storage unit 110 by adjusting the size of Vin2 can be changed.

[0097] In the read state, the read circuit 140 is in operation, and the read current Iread in the read circuit 140 can be changed by adjusting the value of Vin3.

[0098] like Figure 4B As shown, Figure 3 The diagram shows the states of field-effect transistors MN1, MN2, MN3, MN4, MN5, MN6, MP1, MP2, and MP3 in different states of the computing device. OFF represents the off state, ON represents the on state, and saturation represents the saturated state.

[0099] For example, in the reset state, the first current input circuit 120 is in the working state, MN2 is in the conducting state, MN5 is in the saturated state, and the first current injected into the heavy metal layer by the first current input circuit 120 flows from the right to the left to initialize the magnetic storage unit 110.

[0100] In the set state, the second current input circuit 130 is in the working state, MN4 is in the conducting state, MP1 is in the saturated state, and the second current injected into the heavy metal layer by the second current input circuit 130 flows from the left to the right, changing the magnetization direction in the free layer.

[0101] In the read state, the read circuit 140 is in the working state, the MP3 is in the saturation state, and the MN6 is in the conducting state, so that the read current Iread flows through the magnetic storage unit 110 and obtains the output voltage Vout.

[0102] The second type, see appendix. Figure 5 The present application provides a computing device 100, which includes a magnetic storage unit 110, a first current input circuit 120, a second current input circuit 130, and a read circuit 140.

[0103] The first current input circuit 120 includes four field-effect transistors, namely MP3, MP4, MN2, and MN4.

[0104] When the first current input circuit 120 is working, the gate input voltage Reset of MP3 in the first current input circuit 120 is used. When the voltage Reset is less than the threshold voltage of MP3, MP3 is turned on. At this time, MP3 is approximately a constant current source, generating a fixed current I1. By adjusting the gate voltage Vin1 of MN4 in the first current input circuit 120 (the source of MN4 is grounded), the current Ids2 flowing through MN4 is changed.

[0105] MP4 is turned on when its gate input voltage Read is less than its threshold voltage.

[0106] In this case, the first current Ireset injected by the first current input circuit 120 into the heavy metal layer of the magnetic storage cell 110 is determined by the current I1 and the current Ids2, and the first current Ireset is equal to the difference between I1 and Ids2.

[0107] The gate input voltage ResetB of MN2 in the first current input circuit 120 is less than the threshold voltage of MN2. When the voltage ResetB is less than the threshold voltage of MN2, the source of MN2 is grounded and MN2 is turned on, so that MP3, MP4, MN2, MN4 and magnetic storage unit 110 form a loop, and Ireset can flow to MN2 through magnetic storage unit 110.

[0108] The second current input circuit 130 includes four field-effect transistors, namely MP1, MP2, MN1, and MN3.

[0109] When the second current input circuit 130 is working, the gate input voltage Set of MP1 in the second current input circuit 130 is used. When the voltage Set is less than the threshold voltage of MP1, MP1 is turned on. At this time, MP1 is approximately a constant current source, generating a fixed current I0. By adjusting the gate voltage Vin2 of MN1 in the second current input circuit 130 (the source of MN1 is grounded), the magnitude of the current Ids1 flowing through MN1 is changed.

[0110] MP2 is turned on when the gate input voltage Read is less than the threshold voltage of MP2.

[0111] In this case, the second current Iset injected by the second current input circuit 130 into the heavy metal layer of the magnetic storage cell 110 is determined by the current I0 and the current Ids1, and the second current Iset is equal to the difference between I0 and Ids1.

[0112] The gate input voltage SetB of MN3 in the second current input circuit 130 is less than the threshold voltage of MN4. When the voltage SetB is less than the threshold voltage of MN4, the source of MN3 is grounded and MN3 is turned on, so that MP1, MP2, MN1, MN3 and magnetic storage unit 110 form a loop, and the second current Iset can flow to MN3 through magnetic storage unit 110.

[0113] The read circuit 140 includes two field-effect transistors, MP5 and MN5. In one possible scenario, MP5 can also be replaced by a fixed resistor.

[0114] When the read circuit 140 is working, the source of MP3 is connected to the voltage VDD, and the gate of MP3 is connected to the power supply Vin3, which makes MP3 in the conducting state. The gate input voltage of MN6 is Read. When the voltage Read is greater than the threshold voltage of MN6, MN6 becomes a constant current source and generates a fixed read current Iread. The gate input voltage of MN5 is Read. When the voltage ReadB is less than the threshold voltage of MN5, the source of MN5 is connected to the magnetic storage cell 110, and MN5 is turned on.

[0115] Adjust the voltage Read to keep MP2 and MP4 in the off state, and the first current input circuit 120 and the second current input circuit do not work.

[0116] By controlling the values ​​of ResetB and SetB, MN2 and MN4 are made to be in a conducting state. In this case, the two ends of the magnetic storage unit 110 are grounded.

[0117] In this case, the voltage Vout is equal to the sum of the product of the read current Iread, the resistance of the magnetic storage unit 110, and the resistance of MN3. In the conducting state, the sum of the resistance of MN3 can be ignored. Therefore, within the allowable range, the voltage Vout is equal to the product of the read current Iread and the resistance of the magnetic storage unit 110.

[0118] like Figure 6A As shown, Figure 5 The diagram shows the input values ​​of the gate voltages Reset, Vin1, Set, Vin2, Read, and Vin3 of MP3, MN4, MP1, MN1, MN5, and MP5 under different states in the computing devices shown. Here, 1 represents a high level, which is a voltage higher than the threshold voltage. 0 represents a low voltage, which is a voltage lower than the threshold voltage. X represents any level, which can be either high or low; "variable" means the value needs to be changed according to the scenario.

[0119] For example, in the reset state, the first current input circuit 120 is in the working state, and the first current Ireset injected into the magnetic storage cell 110 by adjusting the value of Vin1 can be changed.

[0120] In the setting state, the second current input circuit 130 is in the working state, and the second current Iset injected into the magnetic storage unit 110 by adjusting the size of Vin2 can be changed.

[0121] In read mode, read circuit 140 is in operation, and the read current Iread in read circuit 140 can be changed by adjusting the value of Vin3.

[0122] like Figure 6BAs shown, Figure 5 The diagram shows the states of field-effect transistors MN1, MN2, MN3, MN4, MN5, MN6, MP1, MP2, MP3, MP4, and MP5 in different states of the computing device. OFF represents the off state, ON represents the on state, and saturation represents the saturated state.

[0123] For example, in the reset state, the first current input circuit 120 is in the working state, MN2 is in the conducting state, MN4 is in the saturated state, and the first current injected into the heavy metal layer by the first current input circuit 120 flows from the right to the left to initialize the free layer.

[0124] In the set state, the second current input circuit 130 is in the working state, MP1 and MP2 are in the conducting state, MN1 is in the saturated state, and the second current injected into the heavy metal layer by the second current input circuit 130 flows from the left to the right, changing the magnetization direction in the free layer.

[0125] In the read state, the read circuit 140 is in the working state, MP5 is in the saturation state, and MN5 is in the conducting state, so that the read current Iread flows through the magnetic storage unit 110 and obtains the output voltage Vout.

[0126] In the first type of computing device, when the computing device is in the read state, the magnetic storage cell 110 can be grounded at one end by changing the state of the field-effect transistor, and the circuit structure is relatively simple.

[0127] In the second type of computing device, by changing the state of the field-effect transistors in the first current input circuit 120 and the second current input circuit 130, when the computing device is in the read state, both ends of the magnetic storage unit 110 can be simplified, the circuit structure can be symmetrical, and the data reading can be more accurate.

[0128] When the magnetic storage cell 110 is in a constant magnetic field, the direction of the constant magnetic field, the direction of the first current Ireset (i.e., the first direction), the direction of the second current Iset (i.e., the second direction), and the initial magnetization direction in the magnet layer (i.e., the initial magnetization direction of the free layer) must satisfy one of the following two relationships:

[0129] 1. When the initial magnetization direction of the free layer is in-plane, that is, in the plane where the free layer is located, the first direction and the second direction are parallel to the initial magnetization polarization direction, and the direction of the constant magnetic field is perpendicular to the plane where the magnet layer is located.

[0130] like Figure 7AAs shown, the plane containing the magnet layer (i.e. the free layer) is parallel to the plane containing the X-axis and Y-axis. The initial magnetization direction of the free layer is along the X-axis and is in the plane. The magnetic field strength of the constant magnetic field is fixed. The magnetic field direction can be along the Z-axis. The first direction and the second direction can also be along the X-axis direction, and the first direction and the second direction are opposite.

[0131] 2. When the initial magnetization direction of the free layer is out of plane, that is, perpendicular to the plane where the magnet layer is located, the first direction, the second direction, and the direction of the constant magnetic field are parallel to the plane where the magnet layer is located.

[0132] like Figure 7B As shown, the plane containing the magnet layer (i.e., the free layer) is parallel to the plane containing the X and Y axes. The initial magnetization direction of the free layer is along the Z-axis and is out of plane. The magnetic field strength of the constant magnetic field is fixed, and the magnetic field direction can be along the X-axis. The first direction and the second direction can also be along the X-axis, and the first direction and the second direction are opposite.

[0133] When the initial magnetization direction of the free layer is neither in the plane of the free layer nor perpendicular to the plane of the free layer, the magnetic storage unit 110 can be placed in a magnetic field, and the directions of the first current Ireset (i.e., the first direction) and the second current Iset (i.e., the second direction) are opposite.

[0134] When the first current is the same, after each injection of the first current by the first current input circuit 120, the second current input circuit 130 can inject the same second current into the heavy metal layer. The process of injecting the first and second currents can be performed multiple times. Each time, the read current 140 reads the resistance value of the magnetic storage cell 110; that is, the resistance value of the magnetic storage cell 110 can be determined based on the voltage Vout at the output terminal of the read circuit 140. The resistance value of the magnetic storage cell 110 may remain at resistance value P, or it may change to resistance value Q.

[0135] Let K be the number of times the same second current is injected. The voltage Vout at the output of the reading circuit 140 can determine the resistance value of the magnetic storage unit 110 each time the second current is injected. If the resistance value of the magnetic storage unit 110 remains at resistance value P for S times, then the resistance value of the magnetic storage unit 110 changes to resistance value Q for KS times. The probability M of the magnetic storage unit 110 remaining at resistance value P can be equal to S / K, and the probability N of the magnetic storage unit 110 changing to resistance value Q can be equal to (KS) / K. Both probabilities M and N are positive numbers less than 1. When the magnetic storage unit 110 has only two possible resistance values, the sum of M and N is 1, and probabilities M and N are related to the second current. That is, the resistance value of the magnetic storage unit 110 follows a probability distribution with the second current and is not fixed at the same resistance value.

[0136] See Figure 7CThe first current input circuit 120 can change the value of the first current. Each time the first current input circuit 120 changes the value of the first current, it injects the first current into the heavy metal layer in the magnetic storage cell 110 (step 1). Then, the second current input circuit 130 can inject the same second current into the heavy metal layer (step 2). The read circuit 140 reads the resistance value of the magnetic storage cell 110 (step 3), and can obtain the probability that the resistance value of the magnetic storage cell 110 remains at resistance value P under the given second current value. Steps 1 to 3 can be executed multiple times, and the read circuit 140 can read multiple resistance values ​​of the magnetic storage cell 110.

[0137] With different second currents, the probability of the resistance of the magnetic storage unit 110 remaining at resistance value P can also differ, exhibiting a certain relationship. Let the magnitude of the first current be 10 milliamperes per square centimeter (mA / cm²). 2 The second current ranges from 5 to 7 mA / cm. 2 That is, under the same first current, the relationship between the number of times the resistance value P of the magnetic storage cell 110 may remain at the second current and the second current is as follows: Figure 7D As shown, from Figure 7D It can be seen that the relationship between the number of times the resistance value P of the magnetic storage cell 110 can be maintained and the second current is close to that of the sigmoid function. That is, the computing device 100 can realize probabilistic bits.

[0138] In practical applications, multiple computing devices can be used to perform probability calculations.

[0139] like Figure 8 As shown, a computing chip 10 provided in an embodiment of this application includes multiple computing devices 100, which can be interconnected. For any one of the computing devices 100, the voltage set of the second current input circuit 130 of that computing device 100 is determined based on the data to be calculated and the Vout output of the read circuits 140 of the remaining computing devices 100. The resistance value of each magnetic storage unit 110 in the multiple computing devices 100 can be used as the calculation result.

[0140] For any one of the computing devices 100, the output terminal of the second current input circuit 130 of the computing device 100 may also be provided with a voltage integration circuit 200. The voltage integration circuit 200 can integrate the sum of the Vout values ​​of the outputs of the read circuits 140 of the remaining computing devices 100 with a target weight. The integrated voltage can then be used as the voltage set of the second current input current 130. The target weights of different voltage integration circuits 200 are different, and the target weights of multiple voltage integration circuits 200 can be determined based on the data to be calculated. The embodiments of this application do not limit the specific configuration of the voltage integration circuit 200; any circuit capable of integrating multiple voltages is applicable to the embodiments of this application.

[0141] It should be noted that the embodiments provided in this application are merely illustrative. Those skilled in the art will understand that, for the sake of convenience and brevity, the descriptions of each embodiment have different focuses, and parts not described in detail in a certain embodiment can be referred to in the relevant descriptions of other embodiments. The features disclosed in the embodiments, claims, and drawings of this invention can exist independently or in combination. Features described in hardware form in the embodiments of this invention can be executed by software, and vice versa. No limitations are imposed here.

Claims

1. A computing device, characterized in that, include: A magnetic storage unit for storing data, wherein the magnetic storage unit includes stacked heavy metal layers and a magnet layer; A first current input circuit is used to inject a first current in a first direction into the heavy metal layer in the magnetic storage cell; The second current input circuit is used to inject a second current in a second direction into the heavy metal layer in the magnetic storage cell multiple times, wherein the first direction and the second direction are opposite to each other. A read circuit is connected to the magnet layer and is used to read the resistance value of the magnetic storage unit, wherein the resistance value of the magnetic storage unit follows a probability distribution with the multiple injections of the second current, provided that the first current is the same.

2. The device as described in claim 1, characterized in that, The first current is greater than the threshold current of the magnet layer, and the second current is less than the threshold current of the magnet layer.

3. The device as described in claim 1 or 2, characterized in that, The first current and the second current are injected into the heavy metal layer in sequence.

4. The device according to any one of claims 1 to 3, characterized in that, The magnetic storage unit is located in a constant magnetic field.

5. The device as described in claim 4, characterized in that, When the initial magnetization direction of the magnet layer is located in the first plane, the first direction and the second direction are parallel to the initial magnetization direction, and the direction of the constant magnetic field is perpendicular to the first plane, which is the plane where the magnet layer is located.

6. The device as claimed in claim 4, characterized in that, When the initial magnetization direction of the magnet layer is perpendicular to the first plane, the first direction, the second direction, and the direction of the constant magnetic field are parallel to the first plane, and the first plane is the plane in which the magnet layer is located.

7. The device according to any one of claims 1 to 6, characterized in that, The magnet layer comprises a free layer and a barrier layer, wherein the free layer comprises a ferromagnetic material.

8. The device according to any one of claims 1 to 6, characterized in that, The magnet layer includes a magnetic tunnel junction (MTJ).

9. The device according to any one of claims 1 to 8, characterized in that, The second current injected multiple times is the same current, the probability that the resistance of the magnetic storage unit is the first value is M, the probability that the resistance of the magnetic storage unit is the second value is N, and M and N are positive numbers less than 1.

10. A computing chip, characterized in that, The computing chip is used to perform probability calculations. The computing chip includes a plurality of computing devices as described in any one of claims 1 to 9. The input voltage of the input terminal of the second current input circuit of each of the plurality of computing devices is determined based on the data to be calculated and the voltage and value of the output terminal of the read circuit of the remaining computing devices. The resistance value of the magnetic storage cell read by the read current in the plurality of computing devices is used to indicate the calculation result.

11. The computing chip as described in claim 10, characterized in that, Each computing device has a voltage integration circuit at the input of its second current input circuit. The voltage integration circuit integrates the sum of the output voltages of the read circuits of the remaining computing devices with a target weight. The target weight of each voltage integration current is determined based on the data to be calculated.

12. A calculation method, characterized in that, include: A first current in a first direction is injected into a heavy metal layer in a magnetic storage cell of a computing device, wherein the magnetic storage cell includes the stacked heavy metal layer and a magnet layer. A second current in a second direction is injected multiple times into the heavy metal layer in the magnetic storage cell, wherein the first direction and the second direction are opposite to each other; After each injection of the second current, the resistance value of the magnetic storage cell is read through the magnet layer, wherein the resistance value of the magnetic storage cell follows a probability distribution with the multiple injections of the second current, provided that the first current is the same.

13. The method as described in claim 12, characterized in that, The first current is greater than the threshold current of the magnet layer, and the second current is less than the threshold current of the magnet layer.

14. The method as described in claim 12 or 13, characterized in that, The second current injected multiple times is the same current, the probability that the resistance of the magnetic storage unit is the first value is M, the probability that the resistance of the magnetic storage unit is the second value is N, and M and N are positive numbers less than 1.

Images