Encapsulation method of flip-chip thin film and flip-chip thin film

Abstract

The present application discloses a packaging method for a flip-chip thin film and a flip-chip thin film. The packaging method for the flip-chip thin film includes: providing a tape and at least one chip; wherein, a plurality of inner pins are disposed on a first surface of the tape, and a plurality of metal bumps are disposed on a functional surface of the chip; forming a first insulating material between adjacent inner pins and / or adjacent metal bumps; arranging the metal bumps and the inner pins opposite to each other, and one metal bump corresponding to one inner pin; electrically connecting the metal bump and the inner pin at the corresponding position. By the above method, the present application can solve the problem of tape warping caused by the mismatch of the coefficient of thermal expansion, reduce the use of underfill, and improve the performance of semiconductor packaging devices.

Description

Technical Field

[0001] The present application relates to the field of semiconductor packaging, and particularly to a packaging method for a chip-on-film and a chip-on-film. Background Art

[0002] In the field of semiconductor technology, tape automated bonding (TAB) packaging is a widely used integrated circuit (IC) packaging technology. Specifically, TAB uses a flexible substrate circuit as a carrier for packaging chips, and joins the metal bumps on the chips with the inner leads on the flexible substrate circuit through thermocompression bonding.

[0003] In the TAB process, after the inner leads are electrically connected to the metal bumps, underfill is required to protect the inner leads and the metal bumps, so as to reduce the influence of external moisture and the like on the electrical connection between the inner leads and the metal bumps.

[0004] Currently, a needle-type dispensing device is usually used to form underfill. Since the inner diameter of the needle is small, generally about 0.25 mm, long-term dispensing operations may cause the glue on the inner wall of the glue tube or the needle to solidify, resulting in the risk of insufficient dispensing or needle clogging. Summary of the Invention

[0005] The purpose of the present application is to provide a packaging method for a chip-on-film and a chip-on-film, which overcomes the problems of insufficient dispensing or needle clogging caused by the solidification of the glue on the inner wall of the glue tube / needle of the existing dispensing device during long-term dispensing operations.

[0006] To solve the above technical problems, one technical solution adopted by the present application is: to provide a packaging method for a chip-on-film, including: providing a tape and at least one chip; wherein, a plurality of inner leads are arranged on the first surface of the tape, and a plurality of metal bumps are arranged on the functional surface of the chip; forming a first insulating material between adjacent inner leads and / or adjacent metal bumps; arranging the metal bumps and the inner leads opposite to each other, and one metal bump corresponding to one inner lead; electrically connecting the metal bump and the inner lead at the corresponding position.

[0007] To solve the above technical problems, another technical solution adopted by the present application is: to provide a chip-on-film, including: a tape, on the first surface of which a plurality of inner leads are arranged; at least one chip, the functional surface of which faces the first surface and a plurality of metal bumps are arranged on the functional surface, one metal bump corresponding to one inner lead and being electrically connected; a first insulating material, located between adjacent inner leads and / or adjacent metal bumps, and the first insulating material contacting the first surface and / or the functional surface between the first insulating material and the adjacent inner leads.

[0008] The beneficial effects of the present application are as follows: Different from the prior art, before the inner pins and the metal bumps are electrically connected in the flip-chip thin film encapsulation method proposed by the present application, a first insulating material is pre-formed between adjacent inner pins and / or adjacent metal bumps; this method can effectively reduce the amount of the second insulating material (i.e., underfill) after the inner pins and the metal bumps are electrically connected, thereby reducing the risk of needle clogging caused by the long-term operation of the gluing equipment. In addition, when the first insulating material is located between adjacent metal bumps, this method can reduce the probability of warping and deformation of the tape during the encapsulation process, so as to improve the encapsulation yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0010] Figure 1 It is a schematic flowchart of an embodiment of the flip-chip thin film encapsulation method of the present application;

[0011] Figure 2 It is a schematic structural diagram of a tape;

[0012] Figure 3 It is a schematic structural diagram of a chip substrate;

[0013] Figure 4 For Figure 1 it is a schematic structural diagram of an embodiment corresponding to step S20 in

[0014] Figure 5 For Figure 1 it is a schematic structural diagram of an embodiment corresponding to step S20 in

[0015] Figure 6 For Figure 1 it is a schematic structural diagram of an embodiment corresponding to step S20 in

[0016] Figure 7 For Figure 1 it is a schematic structural diagram of an embodiment corresponding to step S30 in

[0017] Figure 8 It is a schematic structural diagram of an embodiment of the flip-chip thin film encapsulation of the present application; DETAILED DESCRIPTION OF THE EMBODIMENTS

[0018] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts shall fall within the protection scope of the present application.

[0019] Please refer to Figure 1 , Figure 1 which is a schematic flowchart of an embodiment of the preparation method of the flip chip thin film of the present application. The preparation method includes:

[0020] S10: Provide a reel tape and at least one chip; wherein, a plurality of inner pins are arranged on the first surface of the reel tape, and a plurality of metal bumps are arranged on the functional surface of the chip.

[0021] Specifically, please refer to Figure 2 , Figure 2 which is a schematic structural diagram of an embodiment of the reel tape. The reel tape 2 may include a first surface 20 and a second surface 22 arranged opposite to each other, and circuit traces (not shown in the figure) are arranged inside the reel tape 2. A plurality of exposed inner pins 4 are arranged on the first surface 20 of the reel tape 2, and the plurality of inner pins 4 may be electrically connected to the internal circuit traces. The reel tape 2 is a highly reliable and excellent flexible printed circuit board made of polyimide or polyester film as the substrate. It has the characteristics of high wiring density, light weight, thin thickness, and good bendability.

[0022] Optionally, the formation process of the above inner pins 4 is as follows: Form a patterned first photoresist layer on the first surface 20 of the reel tape 2. A plurality of first openings are arranged on the first photoresist layer, and an exposed bonding part is arranged in each first opening, and the bonding part is electrically connected to the internal circuit traces of the reel tape 2; Form the inner pins 4 in each first opening by electroplating or other means; Remove the first photoresist layer.

[0023] Please refer to Figure 3 , Figure 3 which is a schematic structural diagram of an embodiment of the chip. The chip 1 includes a functional surface 10 and a non-functional surface 12 arranged opposite to each other, and a plurality of pads 11 are arranged on the functional surface 10 of the chip 1, and a metal bump 3 is arranged at each pad 11 position. Optionally, in the direction parallel to the functional surface 10 of the chip 1, the size of the metal bump 3 is less than or equal to the size of the pad 11; that is, the orthographic projection of the metal bump 3 on the pad 11 is located inside the corresponding pad 11.

[0024] In addition, the process of providing at least one chip in the above step S10 may be: providing a wafer, the wafer including a plurality of chips 1 arranged in an array; forming a plurality of metal bumps 3 on the functional surface 10 of the chip 1, and one metal bump 3 is electrically connected to one pad 11; cutting the wafer to obtain multiple independent chips 1.

[0025] Optionally, the forming process of forming a plurality of metal bumps 3 on the functional surface 10 of the chip 1 may be: forming a patterned second photoresist layer on the functional surface 10 of the chip 1, and a plurality of second openings are provided on the second photoresist layer, and one pad 11 is exposed from one second opening; forming metal bumps 3 in each second opening by means of electroplating or the like; removing the second photoresist layer.

[0026] Preferably, the material of the metal bump 3 in this embodiment includes gold. Of course, in other embodiments, it may also be other materials, such as the material of the metal bump 3 is copper or the like.

[0027] S20: Form a first insulating material between adjacent inner pins and / or adjacent metal bumps.

[0028] Specifically, please refer to Figure 4 , Figure 4 which is Figure 1 a schematic structural diagram of an embodiment corresponding to step S20 in

[0029] In other embodiments, the implementation process of the above step S20 may also be other. For example, please refer to Figure 5 , Figure 5 which is Figure 1Structural schematic diagram of another implementation manner corresponding to step S20. The specific implementation process of the above step S20 includes: forming only the first insulating material 5 between adjacent metal bumps 3, and the height d3 of the first insulating material 5 is less than the height d4 of the metal bumps 3, without affecting the electrical connection between the inner pins 4 and the metal bumps 3. Optionally, the process of forming the first insulating material 5 may be: forming a fourth photoresist layer on the functional surface 10 of the chip 1, and the metal bumps 3 are located within the fourth photoresist layer; exposing and developing the fourth photoresist layer to form a plurality of second vias on the fourth photoresist layer, and the orthographic projection of the second vias on the chip 1 is located within the gap between adjacent metal bumps 3; filling the first insulating material 5 in the second vias; removing the fourth photoresist layer.

[0030] For another example, the specific implementation process of the above step S20 includes: forming the first insulating material 5 between adjacent metal bumps 3 and adjacent inner pins 4 respectively (i.e., the first insulating material 5 can be formed on the chip 1 and the tape 2 respectively), and the sum of the heights of the first insulating material 5 located between adjacent inner pins 4 and the first insulating material 5 located between adjacent metal bumps 3 is less than or equal to the sum of the heights of the inner pins 4 and the metal bumps 3 (i.e., the sum of the heights of d1 and d3 in the above Figure 4 and Figure 5 is less than or equal to the sum of d2 and d4), further filling the gap between the inner pins 4 and the metal bumps 3 without affecting the electrical connection between the inner pins 4 and the metal bumps 3.

[0031] Optionally, in this embodiment, it may be as shown in Figure 4 or Figure 5 : the height d1 of the first insulating material 5 located between adjacent inner pins 4 is less than the height d2 of the inner pins 4, and the height d3 of the first insulating material 5 located between adjacent metal bumps 3 is less than the height d4 of the metal bumps 3; the height d1 of the first insulating material 5 located between adjacent inner pins 4 is less than the height d2 of the inner pins 4, and the height d3 of the first insulating material 5 located between adjacent metal bumps 3 is greater than the height d4 of the metal bumps 3; the height d1 of the first insulating material 5 located between adjacent inner pins 4 is greater than the height d2 of the inner pins 4, and the height d3 of the first insulating material 5 located between adjacent metal bumps 3 is less than the height d4 of the metal bumps 3.

[0032] In this embodiment, the material of the first insulating material 5 may be at least one of polyethylene terephthalate (PET), polyimide (PI), and anisotropic conductive film (ACF), and the present application does not limit this here. It should be noted that the anisotropic conductive film (ACF) can only conduct electricity in the vertical direction and cannot conduct electricity in the parallel direction, preventing the risk of short - circuiting the chip due to the complete conduction between the metal bumps 3 and the inner leads 4. Therefore, strictly speaking, the above - mentioned first insulating material 5 is a material that is insulating in the parallel direction.

[0033] S30: Oppositely arrange the metal bumps 3 and the inner leads 4, and one metal bump 3 corresponds to one inner lead 4.

[0034] Specifically, please refer to Figure 6 , Figure 6 , which is a schematic structural diagram of the relative arrangement of the metal bumps 3 and the inner leads 4 corresponding to step S30. On the side of the carrier tape 2 facing the chip substrate 1, there are a plurality of inner leads 4, that is, there are a plurality of inner leads 4 on the lower side of the carrier tape 2 in the figure. On the side of the chip substrate 1 facing the carrier tape 2, there are a plurality of metal bumps 3, that is, there are a plurality of metal bumps 3 on the upper side of the chip substrate 1 in the figure. Exemplarily, the plurality of inner leads 4 and the plurality of metal bumps 3 are correspondingly arranged, including one - to - one correspondence in terms of quantity and position, facilitating the subsequent electrical connection between the inner leads 4 and the metal bumps 3.

[0035] S40: Electrically connect the metal bumps 3 and the inner leads 4 at the corresponding positions.

[0036] Specifically, please refer to Figure 7 , Figure 7 , which is a schematic structural diagram of the electrical connection between the metal bumps 3 and the inner leads 4 corresponding to step S40. The specific implementation process of the above - mentioned step S40 can be: form solder 7 on the metal bumps 3 and / or the inner leads 4; bring the chip 1 and the carrier tape 2 closer to each other, and use the reflow soldering process to heat the solder at a high temperature so that the metal bumps 3 and the inner leads 4 are welded in a way of fusion eutectic.

[0037] Optionally, in this embodiment, the first insulating material 5 has a first degree of curing before step S40, and the high temperature during the reflow soldering process in step S40 makes the first insulating material 5 have a second degree of curing; wherein, the second degree of curing is greater than the first degree of curing. This design method can effectively fix the positions of the metal bumps 3 and the inner leads 4, avoiding abnormal electrical connection between the metal bumps 3 and the inner leads 4.

[0038] Generally speaking, the tape substrate is mainly a flexible circuit board made of polyimide or polyester film. When thermally pressing metal bumps and inner pins, the tape and the inner pins have quite different coefficients of thermal expansion, resulting in uncontrollable structural distortion or thermal-induced deformation of the tape surface. This deformation will cause the metal bumps and the inner pins to fail to be joined relatively. To solve this problem, in this embodiment, a first insulating material is disposed between adjacent metal bumps. The coefficient of thermal expansion of the insulating material is similar to that of the tape layer, and the influence of the thermal expansion rate is significantly reduced, and the warping of the tape is also reduced.

[0039] Please refer to Figure 8 , Figure 8 which is a schematic structural diagram of an embodiment of the flip-chip thin film of the present application. The interval between adjacent inner pins 4 is smaller than the interval between adjacent metal bumps 3; when forming the first insulating material 5 between adjacent inner pins 4 and / or adjacent metal bumps 3, the height of the first insulating material 5 located between adjacent inner pins 4 is greater than the height of the inner pins 4, and the height of the first insulating material 5 located between adjacent metal bumps 3 is less than the height of the metal bumps 3, so that the first insulating material 5 fits more closely to the space of the circuit regions of the inner pins 4 and the metal bumps 3.

[0040] In some cases, after the above step S40, there may still be a gap between the functional surface 10 of the chip and the first surface 20 of the tape. At this time, after the above step S40, it may further include: forming a second insulating material 6 between the functional surface 10 of the chip and the first surface 20 of the tape.

[0041] Please continue to refer to Figure 8 , since a receiving space is formed between the adjacent metal bumps 3 and the inner pins 4 at the corresponding positions, the first insulating material 5 is located in the receiving space and has a gap with the inner wall of the receiving space, so that the second insulating material 6 fills the entire gap of the bonding region to form a plastic encapsulation layer. The forming process of the plastic encapsulation layer is an injection molding process. In other embodiments, the forming process of the plastic encapsulation layer includes: a transfer molding process or a screen printing process.

[0042] In addition, the second insulating material 6 can be an epoxy resin (Epoxy Molding Compound, EMC). It is located between the functional surface of the chip 1 and the first surface of the tape 2 and fills the entire gap of the bonding region. After thermal pressing, the epoxy resin cures and shrinks, so that the bonding strength between the inner pins 4 and the metal bumps 3 is good. The epoxy resin has good sealing performance to prevent the intrusion of water vapor and dust, and is easy to mold, which is a better material for forming the plastic encapsulation layer.

[0043] The flip-chip thin film formed by the above preparation method will be further described from a structural perspective below. Please refer to Figure 8, the semiconductor package device includes: a chip 1, a tape 2, and a first insulating material 5. Among them, a plurality of metal bumps 3 are provided on the functional surface 10 of the chip 1, and a plurality of exposed inner leads 4 are provided on the first surface 20 of the tape 2. The functional surface 10 of the chip 1 faces the first surface 20, and one metal bump 3 corresponds to and is electrically connected to one inner lead 4. The first insulating material 5 is located between adjacent inner leads 4 and / or adjacent metal bumps 3, and the first insulating material 5 contacts the first surface 20 and / or the functional surface 10 between the adjacent inner leads 4.

[0044] Optionally, a receiving space is formed between the metal bump 3 and the inner lead 4 at the corresponding position. The first insulating material 5 is located in the receiving space and has a gap with the inner wall of the receiving space; the flip chip film further includes a second insulating material 6, and the second insulating material 6 is located between the functional surface 10 of the chip and the first surface 20 of the tape and fills the gap.

[0045] Preferably, the first insulating material includes at least one of polyimide and anisotropic electroconductive adhesive material; the second insulating material includes epoxy resin. The above is only the implementation mode of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present application, or directly or indirectly applied to other related technical fields, shall be included in the patent protection scope of the present application by the same token.

Claims

1. A packaging method for a flip chip thin film, characterized in that, it includes: providing a tape and at least one chip; wherein, a plurality of inner pins are provided on the first surface of the tape, a plurality of metal bumps are provided on the functional surface of the chip, and the material of the tape includes polyimide or polyester film; forming a first insulating material between adjacent inner pins and adjacent metal bumps, wherein the first insulating material includes at least one of polyimide and anisotropic electrically conductive adhesive material, the orthographic projection of the first insulating material on the tape is located within the gap between adjacent inner pins, and the orthographic projection of the first insulating material on the chip is located within the gap between adjacent metal bumps; oppositely arranging the metal bumps and the inner pins, and one metal bump corresponding to one inner pin; electrically connecting the metal bump and the inner pin at the corresponding position.

2. The packaging method for a flip chip thin film according to claim 1, characterized in that, the step of forming the first insulating material between adjacent inner pins and / or adjacent metal bumps includes: forming the first insulating material between adjacent inner pins, and the height of the first insulating material is less than the height of the inner pins; and / or, forming the first insulating material between adjacent metal bumps, and the height of the first insulating material is less than the height of the metal bumps.

3. The packaging method for a flip chip thin film according to claim 1, characterized in that, the step of forming the first insulating material between adjacent inner pins and / or adjacent metal bumps includes: forming the first insulating material between adjacent inner pins and between adjacent metal bumps; wherein, the sum of the heights of the first insulating material located between adjacent inner pins and the first insulating material located between adjacent metal bumps is less than or equal to the sum of the heights of the inner pins and the metal bumps.

4. The packaging method for a flip chip thin film according to claim 3, characterized in that, the first insulating material has a first degree of curing, and after the step of forming the first insulating material between adjacent inner pins and between adjacent metal bumps, it further includes: making the first insulating material have a second degree of curing; wherein, the second degree of curing is greater than the first degree of curing.

5. The packaging method for a flip chip thin film according to claim 3, characterized in that, the interval between adjacent inner pins is less than the interval between adjacent metal bumps; when forming the first insulating material between adjacent inner pins and / or adjacent metal bumps, the height of the first insulating material located between adjacent inner pins is greater than the height of the inner pins, and the height of the first insulating material located between adjacent metal bumps is less than the height of the metal bumps.

6. The packaging method for a flip chip thin film according to any one of claims 1-5, characterized in that, After the metal bumps are electrically connected to the inner pins at corresponding positions, there is a gap between the functional surface and the first surface. After the step of electrically connecting the metal bumps to the inner pins at corresponding positions, it includes: Form at least a second insulating material between the functional surface and the first surface, and the second insulating material fills the gap.

7. The encapsulation method of the flip chip thin film according to any one of claims 1-5, characterized in that, The step of electrically connecting the metal bumps to the inner pins at corresponding positions includes: performing reflow soldering on the metal bumps and the inner pins at corresponding positions, and the highest temperature of the reflow soldering is greater than the softening temperature of the first insulating material.

8. A flip chip thin film, characterized in that, including: A tape, on the first surface of the tape, a plurality of inner pins are provided; At least one chip, the functional surface of the chip is arranged facing the first surface, and a plurality of metal bumps are arranged on the functional surface, and one metal bump corresponds to and is electrically connected to one inner pin; A first insulating material is located between adjacent inner pins and / or adjacent metal bumps, and the first insulating material contacts the first surface and / or the functional surface between the first insulating material and the adjacent inner pins. The first insulating material includes at least one of polyimide and anisotropic electron conductive adhesive material. The orthographic projection of the first insulating material on the tape is located in the gap between adjacent inner pins, and the orthographic projection of the first insulating material on the chip is located in the gap between adjacent metal bumps.

9. The flip chip thin film according to claim 8, characterized in that, An accommodating space is formed between adjacent metal bumps and the inner pins at corresponding positions. The first insulating material is located in the accommodating space and has a gap with the inner wall of the accommodating space. The flip chip thin film further includes: A second insulating material is located between the functional surface and the first surface and fills the gap.

10. The flip chip thin film according to claim 9, characterized in that, The second insulating material includes epoxy resin.

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