Display panel and display device

Abstract

The present application provides a display panel and a display device, wherein the display panel comprises: a substrate, a first semiconductor layer, which is arranged on one side of the substrate; a first metal layer, which is arranged on a side of the first semiconductor layer away from the substrate, the first metal layer comprises a first gate, and the first gate is arranged overlapping with the first semiconductor layer; a second metal layer, which is arranged on a side of the first metal layer away from the substrate, the second metal layer comprises a second gate, a second semiconductor layer, which is arranged on a side of the second metal layer away from the substrate, the second semiconductor layer comprises a metal oxide, and the second gate is arranged overlapping with the second semiconductor layer; a third metal layer, which is arranged on a side of the second semiconductor layer away from the substrate, the third metal layer comprises a third gate, and the third gate is arranged overlapping with the second semiconductor layer, wherein a first oxygen-absorbing metal layer is arranged on a side of the third gate close to the second semiconductor layer, and the first oxygen-absorbing metal layer is arranged overlapping with the second semiconductor layer. The present application can improve the display effect of the display panel.

Description

Technical Field

[0001] The present application belongs to the technical field of display equipment, and in particular, relates to a display panel and a display device. Background Art

[0002] IGZO (indium gallium zinc oxide) is the abbreviation of indium gallium zinc oxide. IGZO thin film transistors with indium gallium zinc oxide as the semiconductor channel layer material have the advantages of high mobility, good uniformity, transparency, and simple process. Liquid crystal display (LCD) and organic light-emitting diode (OLED) panels driven by IGZO-TFT have many performance advantages such as high precision, low power consumption and high touch performance. Compared with traditional amorphous silicon (a-Si) thin film transistors (TFT), IGZO-TFT devices have better performance in field effect mobility, switching current ratio, threshold voltage and sub-threshold coefficient. Therefore, they are widely used as the active layer of TFT in active matrix liquid crystal displays (AMLCD) and active matrix organic light-emitting diodes (AMOLED). However, in the display panel of the related art, IGZO will affect the carrier concentration due to the unbonded oxygen (NBO for short), thereby affecting the threshold voltage and the switching current ratio, reducing the device stability of the thin film transistor, and ultimately affecting the display effect of the display panel. Summary of the invention

[0003] The embodiments of the present application provide a display panel and a display device to improve the stability of the carrier concentration of the second semiconductor layer, thereby improving the device stability of the thin film transistor and improving the display effect of the display panel.

[0004] In a first aspect, an embodiment of the present application provides a display panel, including:

[0005] substrate;

[0006] A first semiconductor layer, disposed on one side of the substrate;

[0007] A first metal layer is disposed on a side of the first semiconductor layer away from the substrate, the first metal layer comprises a first gate, and the first gate is overlapped with the first semiconductor layer;

[0008] A second metal layer is disposed on a side of the first metal layer away from the substrate, the second metal layer comprising a second gate,

[0009] A second semiconductor layer is arranged on a side of the second metal layer away from the substrate, the second semiconductor layer comprises a metal oxide, and the second gate is arranged overlapping with the second semiconductor layer;

[0010] A third metal layer is disposed on a side of the second semiconductor layer away from the substrate, the third metal layer comprises a third gate, and the third gate is overlapped with the second semiconductor layer.

[0011] Wherein, a first oxygen-absorbing metal layer is disposed on a side of the third gate close to the second semiconductor layer, and the first oxygen-absorbing metal layer is overlapped with the second semiconductor layer.

[0012] Optionally, a second oxygen-absorbing metal layer is disposed on a side of the third gate away from the second semiconductor layer, and the second oxygen-absorbing metal layer is overlapped with the second semiconductor layer.

[0013] Optionally, a third oxygen-absorbing metal layer is disposed on a side of the second gate electrode close to the second semiconductor layer, and the third oxygen-absorbing metal layer is overlapped with the second semiconductor layer.

[0014] Optionally, a fourth oxygen-absorbing metal layer is disposed on a side of the second gate away from the second semiconductor layer, and the fourth oxygen-absorbing metal layer is overlapped with the second semiconductor layer.

[0015] Optionally, the second gate is an alloy layer mixed with oxygen-absorbing metal.

[0016] Optionally, an overlapping area between the first oxygen-absorbing metal layer and the second semiconductor layer is greater than or equal to an overlapping area between the third gate and the second semiconductor layer.

[0017] Optionally, the first oxygen-absorbing metal layer is at least one of titanium, nickel, iron, zinc and germanium.

[0018] Optionally, the material elongation of the first oxygen-absorbing metal layer is set to 3% to 10%.

[0019] Optionally, the thickness of the first oxygen absorbing metal layer is set to to And / or, the thickness of the third gate is set to to

[0020] In a second aspect, an embodiment of the present application further provides a display device, which includes a controller and a display panel as described above; the controller is electrically connected to the display panel.

[0021] The display panel provided in the embodiment of the present application has a first oxygen-absorbing metal layer disposed on a side of the third gate electrode close to the second semiconductor layer. By introducing the oxygen-absorbing metal, the unbonded oxygen (NBO) in the second semiconductor layer itself or near the second semiconductor layer can be absorbed, thereby reducing the influence of NBO on the carrier concentration of the second semiconductor layer, and improving the stability of the threshold voltage and the switching current ratio of the thin film transistor in the array substrate. As a result, the device stability of the array substrate can be improved to improve the display effect of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application, and those skilled in the art can obtain other drawings based on these drawings without creative work.

[0023] In order to more completely understand the present application and its beneficial effects, the following description will be made in conjunction with the accompanying drawings. In the following description, the same reference numerals represent the same parts.

[0024] Figure 1 A cross-sectional schematic diagram of a display panel provided in accordance with an embodiment of the present application.

[0025] Figure 2 A cross-sectional schematic diagram of a display panel provided according to another embodiment of the present application.

[0026] Figure 3 A cross-sectional schematic diagram of a display panel provided in yet another embodiment of the present application.

[0027] Figure 4 A cross-sectional schematic diagram of a display panel provided in yet another embodiment of the present application.

[0028] Figure 5 A curve diagram showing the relationship between the threshold voltage shift change and time of the display panel provided in an embodiment of the present application.

[0029] Figure 6 A schematic diagram of the process of a display panel manufacturing method provided in an embodiment of the present application.

[0030] 10. substrate; 20. first semiconductor layer; 30. first gate; 40. second gate; 50. second semiconductor layer; 60. third gate; 61. first oxygen-absorbing metal layer; 62. second oxygen-absorbing metal layer; 41. third oxygen-absorbing metal layer; 42. fourth oxygen-absorbing metal layer. DETAILED DESCRIPTION

[0031] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0032] The embodiments of the present application provide a display panel and a display device to improve the stability of the carrier concentration of the second semiconductor layer 50, thereby improving the stability of the thin film transistor and improving the display effect of the display panel.

[0033] For example, see Figure 1 , Figure 1 A cross-sectional schematic diagram of a display panel provided in an embodiment of the present application. The display panel includes: a substrate 10; a first semiconductor layer 20, which is arranged on one side of the substrate 10; a first metal layer, which is arranged on a side of the first semiconductor layer 20 away from the substrate 10, the first metal layer includes a first gate 30, and the first gate 30 is arranged overlapping with the first semiconductor layer 20; a second metal layer, which is arranged on a side of the first metal layer away from the substrate 10, the second metal layer includes a second gate 40; a second semiconductor layer 50, which is arranged on a side of the second metal layer away from the substrate 10, the second semiconductor layer 50 includes a metal oxide, and the second gate 40 is arranged overlapping with the second semiconductor layer 50; a third metal layer, which is arranged on a side of the second semiconductor layer 50 away from the substrate 10, the third metal layer includes a third gate 60, and the third gate 60 is arranged overlapping with the second semiconductor layer 50; wherein a first oxygen-absorbing metal layer 61 is arranged on a side of the third gate 60 close to the second semiconductor layer 50, and the first oxygen-absorbing metal layer 61 is arranged overlapping with the second semiconductor layer 50.

[0034] In this embodiment, specifically, the display panel includes an array substrate, a color filter substrate, and a liquid crystal layer disposed between the array substrate and the color filter substrate. The array substrate is a main component of the display panel, which includes a substrate 10 and a display unit disposed on the substrate 10, and the display unit may include a thin film transistor. The thin film transistor includes the above-mentioned substrate 10, a first semiconductor layer 20, a first gate 30, a second gate 40, a second semiconductor layer 50 and a third gate 60. Among them, the first semiconductor layer 20 can be low-temperature polycrystalline silicon, and the second semiconductor layer 50 can be a metal oxide. LTPS (Low Temperature Poly-Silicon) substrate refers to an array substrate in which the thin film transistor in the display unit is a low-temperature polycrystalline silicon thin film transistor, and an oxide substrate refers to an array substrate in which the thin film transistor in the display unit is an oxide thin film transistor.

[0035] The mobility of the low-temperature polysilicon active layer is relatively large, which makes the leakage current of the low-temperature polysilicon thin-film transistor relatively large. The power consumption of the low-temperature polysilicon substrate under low-frequency driving is relatively large, and it is difficult to maintain a static black screen well, and the picture quality is poor; and in order to better expand the gray scale, in the low-temperature polysilicon substrate, the channel of the driving thin-film transistor needs to be made very long, so it is difficult to achieve the high resolution of the low-temperature polysilicon substrate, and the resolution refers to the number of pixels set per inch; in addition, the hysteresis of the low-temperature polysilicon active layer is relatively large, so the low-temperature polysilicon substrate is prone to the problem of image retention. The mobility of the oxide active layer is relatively small, which makes the leakage current of the oxide thin-film transistor relatively small, and the power consumption of the oxide substrate under low-frequency driving is relatively small, which can well maintain a static black screen and improve the picture quality; and the hysteresis of the oxide active layer is relatively small, and the oxide substrate is not prone to the problem of image retention. Furthermore, the uniformity of the oxide thin-film transistor is better than that of the low-temperature polysilicon thin-film transistor.

[0036] From the above description, it can be seen that the oxide thin film transistor process can well make up for some shortcomings of the low-temperature polysilicon thin film transistor process, but the two have their own advantages and disadvantages. Therefore, combining the oxide thin film transistor and the low-temperature polysilicon thin film transistor can obtain the LTPO technology.

[0037] The substrate 10 is used as a supporting structure of the array substrate to support other film structures on the array substrate to keep the array substrate relatively stable. The substrate 10 may be a glass substrate or a hard substrate or a soft substrate made of other materials, which is not limited here.

[0038] The display panel includes the above-mentioned thin film transistor layer, and the thin film transistor is arranged on the substrate 10, which serves as a switch control structure of the array substrate and is used to control other functional layer structures arranged on the array substrate to meet different application requirements.

[0039] The thin film transistor layer includes a first thin film transistor, and the first thin film transistor includes a first semiconductor layer 20, a first gate electrode 30 and a first source-drain electrode layer, and the first source-drain electrode layer is arranged on a side of the first gate electrode 30 away from the first semiconductor layer 20. The first source-drain electrode layer includes a first source electrode and a first drain electrode electrically connected to the first semiconductor layer 20. By electrically connecting the first source electrode and the first drain electrode to the first semiconductor layer 20 and regulating the driving voltage on the first source electrode and the first drain electrode, the first semiconductor layer 20 connected between the first source electrode and the first drain electrode can be turned on and off, thereby realizing the control of other functional layer structures arranged on the array substrate. The first gate electrode 30 serves as a switch structure of the first thin film transistor. By regulating the driving voltage at the input end of the first gate electrode 30, the first thin film transistor can be controlled to be turned on or off, thereby realizing the regulation of other functional structures by the first thin film transistor.

[0040] The thin film transistor layer also includes a second thin film transistor, which includes a second gate electrode 40, a second semiconductor layer 50, a third gate electrode 60 and a second source and drain electrode layer. The second source and drain electrode layer is arranged on a side of the third gate electrode 60 away from the second semiconductor layer 50, and the second source and drain electrode layer includes a second source electrode and a second drain electrode electrically connected to the second semiconductor layer 50.

[0041] It can be understood that the first semiconductor layer 20, the first gate electrode 30 and the first source-drain electrode layer sequentially arranged thereon together constitute a single-gate first thin film transistor; the second semiconductor layer 50, the second gate electrode 40 and the third gate electrode 60 arranged on both sides thereof, and the second source-drain electrode layer together constitute a double-gate second thin film transistor. When the array substrate is applied to an active matrix organic light-emitting diode display panel, the first thin film transistor can act as a switching thin film transistor for controlling the entry of data signals, and the second thin film transistor can act as a driving thin film transistor for controlling the current passing through the organic light-emitting diode. In this way, while realizing the functions of the switching thin film transistor and the driving thin film transistor, since the second thin film transistor has the characteristic of reducing the voltage offset of the entire second thin film transistor when different voltages are applied to the two gates, the voltage offset of the driving thin film transistor can be effectively reduced, so that the brightness of the active matrix organic light-emitting diode display panel can reach the expected value.

[0042] The second semiconductor layer 50 can be made of materials such as IGZO, IZTO or IGZTO, with IGZO (indium gallium zincoxide) being an example. IGZO has a sufficiently high mobility and can drive the pixel electrodes integrated on the display panel at a sufficiently fast speed and sufficiently low power consumption. IGZO is easily affected by light and heat, and is prone to produce unbonded oxygen (NBO) after long-term operation. NBO will form oxygen vacancies on the surface of IGZO, and oxygen vacancies will capture carriers in the IGZO channel, affecting the carrier concentration and causing the threshold voltage of the thin film transistor to drift.

[0043] The third grid 60 is made of metal material, which may be molybdenum, aluminum, copper, titanium, etc. The thickness of the third grid 60 is set to to The first oxygen absorbing metal layer 61 can be specifically at least one of titanium, nickel, iron, zinc and germanium, and can also be other metal materials that can absorb unbonded oxygen. The first oxygen absorbing metal layer 61 can absorb unbonded oxygen (NBO) on IGZO, reduce the formation of oxygen vacancies on the surface of IGZO, thereby reducing the impact on carriers in the channel to ensure the stability of carrier concentration, thereby avoiding the threshold voltage drift of the thin film transistor, and improving the display effect of the thin film transistor.

[0044] Specifically, the thickness of the first oxygen absorbing metal layer 61 is set to to like If the thickness of the first oxygen absorbing metal layer 61 is less than The oxygen absorption effect on the second semiconductor layer 50 is poor, and it is difficult to effectively improve the carrier concentration of the second semiconductor layer 50; if the thickness of the first oxygen absorption metal layer 61 is greater than will affect the overall thickness of the display panel; therefore, the thickness of the first oxygen absorbing metal layer 61 is set to to Not only can the carrier concentration stability of the second semiconductor layer 50 be improved, but also the overall thickness of the display panel can be reasonably controlled.

[0045] In practical applications, such as Figure 1 As shown, the overlapping area of ​​the first oxygen-absorbing metal layer 61 and the second semiconductor layer 50 is greater than or equal to the overlapping area of ​​the third gate 60 and the second semiconductor layer 50. In this way, the direct exposure of external light to the channel region of the second semiconductor layer 50 (i.e., the overlapping region of the third gate 60 and the second semiconductor layer 50) can be reduced, so as to reduce the influence of external light on the second semiconductor layer 50, thereby avoiding energy level transition of carriers on the second semiconductor to ensure the stability of carrier concentration.

[0046] The display panel provided in the embodiment of the present application has a first oxygen-absorbing metal layer 61 disposed on a side of the third gate 60 close to the second semiconductor layer 50. By introducing the oxygen-absorbing metal, the unbonded oxygen (NBO) in the second semiconductor layer 50 itself or near the second semiconductor layer 50 can be absorbed, thereby reducing the influence of NBO on the carrier concentration of the second semiconductor layer 50, and improving the stability of the threshold voltage and the switching current ratio of the thin film transistor in the array substrate. As a result, the device stability of the array substrate can be improved to improve the display effect of the display panel.

[0047] It should be noted that between each two adjacent structural layers such as the substrate 10, the first semiconductor, the first metal layer, the second metal layer, the second semiconductor layer 50, and the third metal layer, an insulating layer is used to achieve insulating buffering. The insulating layer is usually made of materials such as SiNx with a high hydrogen content and is arranged on the entire surface, so that the hydrogen ions in the insulating layer can easily invade the IGZO that is extremely sensitive to hydrogen, thereby causing the IGZO to become conductive and fail. To solve this problem, the embodiment of the present application sets the material elongation of the first oxygen-absorbing metal layer 61 to 3% to 10%, for example, it can be 3%, 4%, 5%, 6%, 7%, 8%, 9%, 10%. The elongation is the percentage of the total deformation ΔL of the gauge section after the material sample is stretched and fractured to the original gauge length L. The higher the elongation, the greater the density of the oxygen-absorbing metal, and thus the better the blocking effect on hydrogen ions. As a result, the transfer of hydrogen ions from the insulating layer to the second semiconductor layer 50 can be reduced to reduce the impact on the carrier concentration of the second semiconductor layer 50. That is to say, by selecting an oxygen-absorbing metal with a high elongation, such as titanium metal, it can absorb the unbonded oxygen in the second semiconductor layer 50 and reduce the transfer of hydrogen ions to the second semiconductor layer 50, thereby improving the stability of the carrier concentration in the second semiconductor layer 50 and improving the overall device stability of the thin film transistor. If the elongation of the first oxygen-absorbing metal layer 61 is greater than 10%, it is more difficult to prepare on the second semiconductor layer 50. Therefore, setting the elongation of the first oxygen-absorbing metal layer 61 to 3% to 10% can also reduce the overall processing difficulty of the thin film transistor.

[0048] For example, please refer to Figure 2 , Figure 2 A cross-sectional schematic diagram of a display panel provided for another embodiment of the present application. A second oxygen-absorbing metal layer 62 is provided on the side of the third gate 60 away from the second semiconductor layer 50, and the second oxygen-absorbing metal layer 62 is arranged overlapping with the second semiconductor layer 50. The second oxygen-absorbing metal layer 62 can specifically be at least one of titanium, nickel, iron, zinc and germanium, and of course can also be other metal materials that can absorb unbonded oxygen. The second oxygen-absorbing metal layer 62 can also absorb unbonded oxygen (NBO) near the second semiconductor layer 50, reduce the formation of oxygen vacancies on the IGZO surface, and thus further reduce the impact on carriers in the channel to ensure the stability of the carrier concentration, thereby avoiding the threshold voltage drift of the thin film transistor to improve the display effect of the thin film transistor.

[0049] In addition, the second oxygen-absorbing metal layer 62 can also shield the second semiconductor layer 50 to reduce the impact of external light on the second semiconductor layer 50, thereby avoiding energy level transition of carriers on the second semiconductor to ensure the stability of carrier concentration. In combination with the above-mentioned elongation embodiment, the material elongation of the second oxygen-absorbing metal layer 62 can also be set to 3% to 10% to reduce the transfer of hydrogen ions from the insulating layer to the second semiconductor layer 50, so as to reduce the impact on the carrier concentration of the second semiconductor layer 50. Specifically, the thickness of the second oxygen-absorbing metal layer 62 is set to to like wait.

[0050] For example, please refer to Figure 3 , Figure 3 A cross-sectional schematic diagram of a display panel provided for another embodiment of the present application. A third oxygen-absorbing metal layer 41 is provided on the side of the second gate electrode 40 close to the second semiconductor layer 50, and the third oxygen-absorbing metal layer 41 is arranged overlapping with the second semiconductor layer 50. The third oxygen-absorbing metal layer 41 can specifically be at least one of titanium, nickel, iron, zinc and germanium, and of course can also be other metal materials that can absorb unbonded oxygen. The third oxygen-absorbing metal layer 41 can also absorb unbonded oxygen (NBO) on the surface of the second semiconductor layer 50, reduce the formation of oxygen vacancies on the IGZO surface, and thus further reduce the impact on carriers in the channel to ensure the stability of the carrier concentration, thereby avoiding the threshold voltage drift of the thin film transistor to improve the display effect of the thin film transistor.

[0051] In combination with the above-mentioned embodiment of elongation, the material elongation of the third oxygen absorbing metal layer 41 can also be set to 3% to 10% to reduce the transfer of hydrogen ions from the insulating layer to the second semiconductor layer 50, thereby reducing the impact on the carrier concentration of the second semiconductor layer 50. Specifically, the thickness of the third oxygen absorbing metal layer 41 is set to to like wait.

[0052] For example, please refer to Figure 4 , Figure 4A cross-sectional schematic diagram of a display panel provided for another embodiment of the present application. A fourth oxygen-absorbing metal layer 42 is provided on the side of the second gate 40 away from the second semiconductor layer 50, and the fourth oxygen-absorbing metal layer 42 is arranged overlapping with the second semiconductor layer 50. The fourth oxygen-absorbing metal layer 42 can specifically be at least one of titanium, nickel, iron, zinc and germanium, and of course can also be other metal materials that can absorb unbonded oxygen. The fourth oxygen-absorbing metal layer 42 can also absorb unbonded oxygen (NBO) near the second semiconductor layer 50, reduce the formation of oxygen vacancies on the IGZO surface, and thus further reduce the impact on carriers in the channel to ensure the stability of the carrier concentration, thereby avoiding the threshold voltage drift of the thin film transistor to improve the display effect of the thin film transistor.

[0053] In combination with the above-mentioned embodiment of elongation, the material elongation of the fourth oxygen absorbing metal layer 42 can also be set to 3% to 10% to reduce the transfer of hydrogen ions from the insulating layer to the second semiconductor layer 50, thereby reducing the impact on the carrier concentration of the second semiconductor layer 50. Specifically, the thickness of the fourth oxygen absorbing metal layer 42 is set to to like wait.

[0054] Exemplarily, the second gate 40 is an alloy layer mixed with an oxygen-absorbing metal, specifically a molybdenum-titanium alloy. In this way, the second gate 40 can also have an oxygen-absorbing function, thereby absorbing unbonded oxygen (NBO) near the second semiconductor layer 50, reducing the formation of oxygen vacancies on the IGZO surface, thereby further reducing the impact on carriers in the channel to ensure the stability of the carrier concentration, thereby avoiding the threshold voltage drift of the thin film transistor and improving the display effect of the thin film transistor.

[0055] Specifically, the proportion of the oxygen-absorbing metal in the second grid 40 is set to 20wt% to wt80%, for example, it can be 20wt%, 30wt%, 40wt%, 50wt%, 60wt%, 70wt%, 80wt%. If the proportion of the oxygen-absorbing metal is less than 20wt%, the absorption effect on NBO is poor, and the carrier concentration stability of IGZO is ineffective. In practical applications, molybdenum metal can stably play the switch control function of the second grid 40, and the proportion of the oxygen-absorbing metal needs to be less than that of molybdenum metal, so that the molybdenum metal has a sufficient content in the second grid 40, thereby ensuring the function of the second grid 40. Therefore, the proportion of the oxygen-absorbing metal in the second grid 40 can be further limited to 20wt% to wt40%.

[0056] To further verify the effect of introducing oxygen-absorbing metal into the gate layer, please refer to Figure 5 , Figure 5The relationship between the change in the threshold voltage shift of the thin film transistor and time is provided in the embodiment of the present application. Specifically, a +30V forward voltage is applied to the second gate 40 of the array substrate, and voltage extraction is performed at the time nodes of t=0s, 10, 50s, 100s, 500s, 1000s, 3600s, 5400s, and 7200s, respectively, to confirm the positive shift of the voltage curve, and the average value of 10 to 20 threshold voltage points is taken for measurement to obtain a curve diagram of the change in the threshold voltage shift with time. Taking titanium metal as an example for oxygen-absorbing metal, if the third gate 60 is molybdenum metal and the first oxygen-absorbing metal layer 61 is titanium metal, then the threshold voltage shift change corresponds to Figure 5 As can be seen from curve A, by providing the first oxygen-absorbing metal layer 61, the offset of the threshold voltage of the array substrate can be effectively reduced.

[0057] If the first oxygen absorbing metal layer 61 and the second oxygen absorbing metal layer 62 are respectively disposed on both sides of the third gate 60, the threshold voltage shift change corresponds to Figure 5 As can be seen from curve B, the use of the first oxygen-absorbing metal layer 61-the third gate 60-the second oxygen-absorbing metal layer 62 can effectively reduce the offset of the threshold voltage of the array substrate.

[0058] If the third oxygen-absorbing metal layer 41 is disposed on the side of the second gate 40 facing the second semiconductor layer 50, the threshold voltage shift change corresponds to Figure 5 Curve C in FIG. As can be seen from curve C, the third oxygen-absorbing metal layer 41 is disposed on the side of the second gate 40 facing the second semiconductor layer 50 , which can effectively reduce the offset of the threshold voltage.

[0059] If the second gate 40 is provided with a third oxygen absorbing metal layer 41 on the side facing the second semiconductor layer 50 and a fourth oxygen absorbing metal layer 42 on the side away from the second semiconductor layer 50, the threshold voltage shift change corresponds to Figure 5 Curve D in FIG. As can be seen from curve D, the third oxygen absorbing metal layer 41 is disposed on the side of the second gate 40 facing the second semiconductor layer 50 , and the fourth oxygen absorbing metal layer 42 is disposed on the side away from the second semiconductor layer 50 , which can effectively reduce the offset of the threshold voltage.

[0060] If the second gate 40 is an alloy layer mixed with oxygen-absorbing metal, and the first oxygen-absorbing metal layer 61 and the second oxygen-absorbing metal layer 62 are respectively disposed on both sides of the third gate 60, the threshold voltage shift change corresponds to Figure 5 Curve E in FIG. It can be seen from curve E that the second gate 40 is an alloy layer mixed with oxygen-absorbing metal, which can effectively reduce the offset of the threshold voltage of the array substrate.

[0061] If the fourth oxygen absorbing metal layer 42 is disposed on the side of the second gate 40 away from the second semiconductor layer 50, and the first oxygen absorbing metal layer 61 is disposed on the side of the third gate 60 close to the second semiconductor layer 50, the threshold voltage shift change corresponds to Figure 5 Curve F in FIG. As can be seen from curve F, the fourth oxygen absorbing metal layer 42 is disposed on the side of the second gate 40 away from the second semiconductor layer 50, and the first oxygen absorbing metal layer 61 is disposed on the side of the third gate 60 close to the second semiconductor layer 50, which can effectively reduce the offset of the threshold voltage.

[0062] If the second gate 40 is an alloy layer mixed with oxygen-absorbing metal, and the third gate 60 is provided with a third oxygen-absorbing metal layer 41 on the side facing the second semiconductor layer 50, the threshold voltage shift change corresponds to Figure 5 Curve G in FIG. As can be seen from curve G, the second gate 40 is an alloy layer mixed with oxygen-absorbing metal, and the third gate 60 is provided with a third oxygen-absorbing metal layer 41 on the side facing the second semiconductor layer 50, which can effectively reduce the offset of the threshold voltage of the array substrate.

[0063] For example, please refer to Figure 6 , Figure 6 The present invention also provides a method for preparing a display panel, which is used to prepare the display panel as described above. The method for preparing a display panel includes the following steps:

[0064] S100, providing a substrate;

[0065] S200, depositing a first semiconductor layer on a substrate;

[0066] S300, depositing a first metal layer on the first semiconductor layer, wherein the first metal layer includes a first gate, and the first gate is overlapped with the first semiconductor layer;

[0067] S400, depositing a second metal layer on the first metal layer, wherein the second metal layer includes a second gate;

[0068] S500, depositing a second semiconductor layer on the second metal layer, the second semiconductor layer comprising a metal oxide, and the second gate is overlapped with the second semiconductor layer;

[0069] S600, depositing a third metal layer on the second semiconductor layer, the third metal layer comprising a third gate, the third gate overlapping the second semiconductor layer; a first oxygen-absorbing metal layer is disposed on a side of the third gate close to the second semiconductor layer, the first oxygen-absorbing metal layer overlapping the second semiconductor layer.

[0070] The embodiment of the present application also provides a display device, which includes a controller and the display panel as described above; the controller is electrically connected to the display panel. The display device can be any product or component with a display function, such as electronic paper, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, etc.

[0071] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0072] In the description of the present application, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more features. The above is a detailed introduction to the thin-film transistor preparation method provided in the embodiment of the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea; at the same time, for those skilled in the art, according to the ideas of the present application, there will be changes in the specific implementation methods and scope of application. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A display panel, characterized in that: include: Substrate, A first semiconductor layer, disposed on one side of the substrate; A first metal layer is disposed on a side of the first semiconductor layer away from the substrate, the first metal layer comprises a first gate, and the first gate is overlapped with the first semiconductor layer; A second metal layer is disposed on a side of the first metal layer away from the substrate, the second metal layer comprising a second gate, A second semiconductor layer is arranged on a side of the second metal layer away from the substrate, the second semiconductor layer comprises a metal oxide, and the second gate is arranged overlapping with the second semiconductor layer; A third metal layer is disposed on a side of the second semiconductor layer away from the substrate, the third metal layer comprises a third gate, and the third gate is overlapped with the second semiconductor layer. Wherein, a first oxygen absorbing metal layer is disposed on a side of the third gate close to the second semiconductor layer, and the first oxygen absorbing metal layer is overlapped with the second semiconductor layer; The first oxygen absorbing metal layer is in direct contact with the third gate; An overlapping area between the first oxygen-absorbing metal layer and the second semiconductor layer is greater than or equal to an overlapping area between the third gate and the second semiconductor layer.

2. The display panel according to claim 1, characterized in that: A second oxygen absorbing metal layer is disposed on a side of the third gate away from the second semiconductor layer, and the second oxygen absorbing metal layer is overlapped with the second semiconductor layer.

3. The display panel according to claim 1, characterized in that: A third oxygen absorbing metal layer is disposed on a side of the second gate electrode close to the second semiconductor layer, and the third oxygen absorbing metal layer is overlapped with the second semiconductor layer.

4. The display panel according to claim 1, characterized in that: A fourth oxygen absorbing metal layer is disposed on a side of the second gate away from the second semiconductor layer, and the fourth oxygen absorbing metal layer is overlapped with the second semiconductor layer.

5. The display panel according to claim 1, characterized in that: The second grid electrode is an alloy layer mixed with oxygen absorbing metal.

6. The display panel according to any one of claims 1 to 5, characterized in that: The first oxygen absorbing metal layer is at least one of titanium, nickel, iron, zinc and germanium.

7. The display panel according to any one of claims 1 to 5, characterized in that: The material elongation of the first oxygen absorbing metal layer is set to 3% to 10%.

8. The display panel according to any one of claims 1 to 5, characterized in that: The thickness of the first oxygen absorbing metal layer is set to to And / or, the thickness of the third gate is set to to 9. A display device, characterized in that: The display device comprises a controller and a display panel according to any one of claims 1 to 8; the controller is electrically connected to the display panel.

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