Display panel, preparation method thereof and display device

Abstract

The invention discloses a display panel, a preparation method thereof and a display device. The display panel comprises an array substrate and a plurality of light-emitting elements located on one side of the array substrate. The light-emitting element comprises a light-emitting functional layer, a first electrode and a second electrode; the display panel further comprises a pixel definition layer. The pixel definition layer comprises pixel openings and pixel interval openings. The pixel opening is configured to expose the first electrode; pixel spacing openings are located between adjacent pixel openings, and the pixel spacing openings are configured to expose the partition grooves; at least one film layer in the light-emitting functional layer is disconnected at the position of the partition groove; the pixel spacing opening comprises a first edge and a second edge; the first edge and the second edge are arranged in the direction perpendicular to the extending direction of the pixel interval opening; the first edge and / or the second edge are / is provided with a sawtooth structure. By adopting the technical scheme, the phenomenon of secret lighting among the sub-pixels can be improved, and the reliability and the yield of the display panel are improved.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof, and a display device. Background Art

[0002] Display panels are widely used in electronic devices such as smart phones, tablet personal computers (PCs), and car navigation systems, and have become indispensable equipment for people's lives and work. With the development of display technology, people have higher and higher requirements for the display quality of display panels.

[0003] In the related technologies of Organic Light-Emitting Diode (OLED) display panels, the organic light-emitting layer usually adopts an evaporation process. Due to precision issues, the light-emitting functional layers of two colors are often overlapped together to form a parallel branch, resulting in the generation of leakage current, which makes the low grayscale visual effect have the problem of brightness. Summary of the invention

[0004] The present invention provides a display panel and a manufacturing method thereof, and a display device, which can improve the phenomenon of light stealing between sub-pixels and improve the reliability and yield of the display panel.

[0005] According to one aspect of the present invention, a display panel is provided, comprising: an array substrate, and a plurality of light-emitting elements located on one side of the array substrate; the light-emitting elements comprise a light-emitting functional layer and a first electrode and a second electrode located on both sides of the light-emitting functional layer, wherein the first electrode is located between the light-emitting functional layer and the array substrate;

[0006] The display panel further comprises a pixel definition layer located on a side of the array substrate close to the light emitting element; the pixel definition layer comprises a pixel opening and a pixel spacing opening; the pixel opening is configured to expose the first electrode; the pixel spacing opening is located between adjacent pixel openings, and the pixel spacing opening is configured to expose the partition groove; at least one film layer in the light emitting functional layer is disconnected at a position where the partition groove is located;

[0007] The pixel spacing opening comprises a first edge and a second edge; the first edge and the second edge are arranged in a direction perpendicular to the extending direction of the pixel spacing opening; and the first edge and / or the second edge are provided with a sawtooth structure.

[0008] According to another aspect of the present invention, there is provided a method for preparing a display panel, comprising:

[0009] Providing an array substrate;

[0010] forming a first electrode and a sacrificial structure on one side of the array substrate;

[0011] A whole pixel definition layer is formed on a side of the first electrode and the sacrificial structure away from the array substrate, and the whole pixel definition layer is patterned to form a pixel opening and a pixel spacing opening; wherein the pixel opening is configured to expose the first electrode; the pixel spacing opening is located between adjacent pixel openings, and the pixel spacing opening is configured to expose the sacrificial structure; the pixel spacing opening includes a first edge and a second edge, the first edge and the second edge are arranged in a direction perpendicular to the extension direction of the pixel spacing opening, and the first edge and / or the second edge is provided with a sawtooth structure;

[0012] Through the pixel spacing opening, the sacrificial structure is removed to form a partition groove;

[0013] A light-emitting functional layer is formed on a side of the pixel definition layer away from the array substrate; wherein at least one film layer in the light-emitting functional layer is disconnected at a position where the partition groove is located;

[0014] A second electrode is formed on the side of the light emitting functional layer away from the array substrate.

[0015] According to yet another aspect of the present invention, a display device is provided, comprising the above-mentioned display panel.

[0016] The technical solution of the present invention can reduce the leakage current between adjacent light-emitting elements by setting a partition groove between adjacent light-emitting elements and disconnecting at least part of the film layer in the light-emitting functional layer at the position where the partition groove is located, thereby improving the light stealing phenomenon between different sub-pixels and improving the display effect; at the same time, a serrated structure is set at the edge of the pixel partition opening configured to expose the partition groove, which can reduce the isolation of the second electrode and subsequent film layers while isolating at least part of the film layer of the light-emitting functional layer, which is beneficial to the flattening and integrity of the subsequent film layers, and is beneficial to improving the reliability and yield of the display panel.

[0017] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0019] Figure 1 is a schematic diagram of a top view structure of a display panel provided by an embodiment of the present invention;

[0020] Figure 2This is a method provided by an embodiment of the present invention. Figure 1 Schematic diagram of the cross-sectional structure of the F-F' section;

[0021] Figure 3 This embodiment of the present invention provides a Figure 1 A schematic diagram of the top view of the structure of the enlarged local area LA in the middle;

[0022] Figure 4 Another embodiment of the present invention provides Figure 1 A schematic diagram of the top view of the structure of the enlarged local area LA in the middle;

[0023] Figure 5 Another embodiment of the present invention provides Figure 1 A schematic diagram of the top view of the structure of the enlarged local area LA in the middle;

[0024] Figure 6 Another embodiment of the present invention provides a Figure 1 Schematic diagram of the cross-sectional structure of the F-F' section;

[0025] Figure 7 Another embodiment of the present invention provides Figure 1 A schematic diagram of the top view of the structure of the enlarged local area LA in the middle;

[0026] Figure 8 Another embodiment of the present invention provides Figure 1 A schematic diagram of the top view of the structure of the enlarged local area LA in the middle;

[0027] Fig. 9 Another embodiment of the present invention provides a Figure 1 Schematic diagram of the cross-sectional structure of the F-F' section;

[0028] Fig.10 is a schematic diagram of a top view structure of another display panel provided by an embodiment of the present invention;

[0029] Fig.11 is a schematic diagram of a top view structure of another display panel provided by an embodiment of the present invention;

[0030] Fig.12 is a schematic diagram of a top view structure of another display panel provided by an embodiment of the present invention;

[0031] Fig.13 is a schematic diagram of a top view structure of another display panel provided by an embodiment of the present invention;

[0032] Fig.14 is a schematic diagram of a top view structure of another display panel provided by an embodiment of the present invention;

[0033] Fig.15is a schematic flow chart of a method for manufacturing a display panel provided by an embodiment of the present invention;

[0034] Fig.16 is a structural schematic diagram of a manufacturing process of a display panel provided by an embodiment of the present invention;

[0035] Fig.17 is a schematic flow chart of another method for manufacturing a display panel provided by an embodiment of the present invention;

[0036] Fig.18 is a structural schematic diagram of another display panel manufacturing process provided by an embodiment of the present invention;

[0037] Fig.19 It is a structural schematic diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0038] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0039] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0040] As described in the background technology, there is a situation where the light-emitting functional layers of OLEDs of different colors are connected, which is prone to leakage current. When displaying at low grayscale, there is a problem of stealing light between sub-pixels with different start-up voltages, which is prone to poor display. In order to reduce the leakage current between OLEDs with different start-up voltages so that the display panel can display accurately when displaying at low grayscale, it is necessary to set grooves between OLEDs to separate the light-emitting functional layers between different OLEDs. However, in the actual process, in order to completely break the light-emitting functional layers between adjacent sub-pixels, the width of the groove is usually set larger, resulting in the continuity of the subsequent film layer structure when the subsequent film layer structure is formed after the preparation of the OLED is completed, which will be detrimental to the reliability of the display panel and affect the production yield of the display panel; if the width of the groove is set smaller, the light-emitting functional layer between adjacent sub-pixels may not be completely broken, which is not conducive to the display effect of the display panel and will also affect the yield of the display panel.

[0041] To solve the above technical problems, an embodiment of the present invention provides a display panel, comprising: an array substrate, and a plurality of light-emitting elements located on one side of the array substrate; the light-emitting elements include a light-emitting functional layer and a first electrode and a second electrode located on both sides of the light-emitting functional layer, wherein the first electrode is located between the light-emitting functional layer and the array substrate; the display panel also includes a pixel definition layer located on a side of the array substrate close to the light-emitting elements; the pixel definition layer includes a pixel opening and a pixel spacing opening; the pixel opening is configured to expose the first electrode; the pixel spacing opening is located between adjacent pixel openings, and the pixel spacing opening is configured to expose a partition groove; at least one film layer in the light-emitting functional layer is disconnected at the position where the partition groove is located; the pixel spacing opening includes a first edge and a second edge; the first edge and the second edge are arranged in a direction perpendicular to the extension direction of the pixel spacing opening; the first edge and / or the second edge are provided with a sawtooth structure.

[0042] By adopting the above technical solution, by setting a partition groove between adjacent light-emitting elements and disconnecting at least part of the film layer in the light-emitting functional layer at the position where the partition groove is located, the leakage current between adjacent light-emitting elements can be reduced, thereby improving the phenomenon of stealing light between different sub-pixels and improving the display effect; at the same time, a serrated structure is set at the edge of the pixel isolation opening configured to expose the partition groove, which can reduce the isolation of the second electrode and subsequent film layers while isolating at least part of the film layer of the light-emitting functional layer, which is beneficial to the flattening and integrity of the subsequent film layers, and is beneficial to improving the reliability and yield of the display panel.

[0043] The above is the core idea of ​​the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention.

[0044] Figure 1 is a schematic diagram of a top view structure of a display panel provided by an embodiment of the present invention, Figure 2 This is a method provided by an embodiment of the present invention. Figure 1 Schematic diagram of the cross-sectional structure of the F-F' section, refer to Figure 1 and Figure 2 The display panel 001 includes: an array substrate 10, and a plurality of light-emitting elements 20 located on one side of the array substrate 10; the light-emitting element 20 includes a light-emitting functional layer 21 and a first electrode 22 and a second electrode 23 located on both sides of the light-emitting functional layer 21, wherein the first electrode 22 is located between the light-emitting functional layer 21 and the array substrate 10. The display panel 001 also includes a pixel definition layer 30 located on a side of the array substrate 10 close to the light-emitting element 20; the pixel definition layer 30 includes a pixel opening 31 and a pixel spacing opening 32; the pixel opening 31 is configured to expose the first electrode 22; the pixel spacing opening 32 is located between adjacent pixel openings 31, and the pixel spacing opening 32 is configured to expose the partition groove 40; at least one film layer in the light-emitting functional layer 21 is disconnected at the location where the partition groove 40 is located.

[0045] Exemplary, reference Figure 1-Figure 2 The array substrate 10 may include a base substrate 11, a buffer layer 12, a circuit layer 13 and a planarization layer 14 which are stacked in sequence, and the light emitting element 20 and the pixel definition layer 30 are located on a side of the planarization layer 14 away from the array substrate 10.

[0046] The first electrode 22 can be the anode of the light-emitting element 20, for example, the anode can be composed of indium tin oxide (ITO), silver (Ag) or a stacked structure of ITO and Ag, but is not limited to this; the second electrode 23 can be the cathode of the light-emitting element 20, and the cathode can be formed of a transparent conductive material, for example, it can include magnesium (Mg), Ag, ITO and other materials, but is not limited to this.

[0047] The light-emitting functional layer 21 may include a first light-emitting layer 201, a conductive layer 209, and a second light-emitting layer 202 which are stacked in sequence. The first light-emitting layer 201 is located on the side of the conductive layer 209 close to the array substrate 10. The first light-emitting layer 201 and the second light-emitting layer 202 may emit light of the same color, so that the light-emitting element 20 may emit single-color light, for example, the light-emitting element 20 may emit red light, green light, or blue light; or, the first light-emitting layer 201 and the second light-emitting layer 202 may also emit light of different colors, so that the light-emitting element 20 may emit light of mixed colors. For example, the light-emitting functional layer 21 may also include a third light-emitting layer (not shown in the figure). The first light-emitting layer 201, the second light-emitting layer 202, and the third light-emitting layer may emit red light, green light, and blue light, respectively, so that the light-emitting element 20 may emit white light. The light-emitting element 20 including multiple light-emitting layers is conducive to improving the light-emitting efficiency and reducing power consumption.

[0048] Among them, the first electrode 22 may be formed before the pixel definition layer 30, and the light-emitting functional layer 21 and the second electrode 23 may be formed after the pixel definition layer 30, and the light-emitting element 20 is formed in the pixel opening 31 of the pixel definition layer 30. The first electrodes 22 of different light-emitting elements 20 are not connected, and the first electrodes 22 of any two light-emitting elements 20 are insulated from each other; the second electrodes 23 of different light-emitting elements 20 may be an integral structure, and the second electrodes 23 of any two light-emitting elements 20 may be electrically connected. Due to the problem of preparation accuracy, the light-emitting functional layers 21 of different light-emitting elements 20 may be connected or overlapped. In one embodiment, the conductive layer 209 in the light-emitting functional layer 21 may be a common layer of multiple light-emitting elements 20, that is, the conductive layer 209 of multiple light-emitting elements 20 may be formed by the same material and in the same process; in another embodiment, the first light-emitting layer 201 and / or the second light-emitting layer 202 in the light-emitting functional layer 21 may also be a common layer of multiple light-emitting elements 20.

[0049] In an alternative embodiment, reference Figure 1 and Figure 2 , the partition groove 40 can be located on the surface of the planarization layer 14 away from the base substrate 11, and the partition groove 40 is located between adjacent light-emitting elements 20. One or more film layers in the first light-emitting layer 201, the conductive layer 209, and the second light-emitting layer 202 can be disconnected at the location where the partition groove 40 is located, which can effectively reduce the leakage current between adjacent light-emitting elements 20. In this way, when the light-emitting element 20 with a high start-up voltage is turned on at a low gray scale, the leakage current from the light-emitting element 20 with a high start-up voltage to the light-emitting element 20 with a low start-up voltage can be reduced, thereby avoiding the light-emitting element 20 with a low start-up voltage from being turned on by mistake, thereby affecting the display effect. In other optional embodiments, the partition groove 40 can also be located in other film layers, for example, the partition groove 40 can also be located on the surface of the pixel definition layer close to the base substrate 11.

[0050] In yet another optional embodiment, reference Figure 1 and Figure 2 , all light-emitting elements 20 are surrounded by partition grooves 40, which can make all light-emitting elements 20 emit light accurately, improve the grayscale control accuracy of the display panel 001 on the light-emitting elements 20, prevent each light-emitting element 20 from leaking current to other light-emitting elements 20 or receiving leakage current from other light-emitting elements 20, and effectively improve the leakage current between the light-emitting elements 20, which is beneficial to improving the display effect. In other optional embodiments, the partition groove 40 can also be set around only part of the light-emitting elements 20, for example, the partition groove 40 can be set around the light-emitting element 20 with a high start-up voltage, or around the light-emitting element 20 with a low start-up voltage.

[0051] In yet another optional embodiment, continue to refer to Figure 1 and Figure 2 , the partition groove 40 is arranged around the light-emitting element 20, and the partition groove 40 can completely surround the light-emitting element 20 without a gap. The partition groove 40 completely surrounds the light-emitting element 20 without a gap, and the light-emitting function layer 21 of the light-emitting element 20 can be completely isolated, which is conducive to improving the problem of light stealing between adjacent sub-pixels. In addition, the common light-emitting function layer 21 can fill the partition groove 40, thereby reducing the step difference from the pixel definition layer 30 to the partition groove 40, so that the second electrode 23 can be not completely isolated in the partition groove 40, and because the conductivity of the second electrode 23 is generally large, the second electrodes 23 of all light-emitting elements 20 can be electrically connected, and the second electrode 23 can be used as a common electrode to realize the conduction and light emission of the light-emitting element 20. In an optional embodiment, along the vertical direction of the plane where the array substrate is located, the depth of the partition groove 40 is equal to the thickness of the light-emitting function layer 21, so that the second electrode 23 can be not completely isolated in the partition groove 40.

[0052] It should be noted that the above description only exemplarily shows a film layer structure of an array substrate and a light-emitting element. In other feasible embodiments, for example, the array substrate may only include a base substrate and a circuit layer, or the array substrate may also include a bottom shielding metal layer, a barrier layer, a transition layer and other film layer structures; the light-emitting functional layer may only include one light-emitting layer, or the light-emitting functional layer may also include three or four light-emitting layers, or the light-emitting functional layer may also include a hole injection layer, a hole transport layer, an electron injection layer and an electron transport layer and other film layer structures. The embodiments of the present invention do not specifically limit the film layer structure of the array substrate and the light-emitting functional layer.

[0053] Figure 3 This embodiment of the present invention provides a Figure 1 Schematic diagram of the top view of the enlarged local area LA in the middle, Figure 4 Another embodiment of the present invention provides Figure 1Schematic diagram of the top view of the local area LA enlarged in the middle, refer to Figure 2-Figure 4 The pixel spacing opening 32 includes a first edge S1 and a second edge S2; the first edge S1 and the second edge S2 are arranged in a direction perpendicular to the extending direction of the pixel spacing opening 32; the first edge S1 and / or the second edge S2 is provided with a sawtooth structure SR.

[0054] The sawtooth shape of the sawtooth structure SR includes, but is not limited to, a triangle, a rectangle, a semicircle, a trapezoid, and the like. The sawtooth structure SR of the first edge S1 may be a first sawtooth structure SR1, which includes a plurality of first sawtooths 301 arranged in sequence along the extension direction of the pixel spacing opening 32; the sawtooth structure SR of the second edge S2 may be a second sawtooth structure SR2, which includes a plurality of second sawtooths 302 arranged in sequence along the extension direction of the pixel spacing opening 32. In one embodiment, the edge of the pixel spacing opening 32 may be provided with the first sawtooth 301 and the second sawtooth 302 at the same time; in another embodiment, the edge of the pixel spacing opening 32 may be provided with only the first sawtooth 301 or the second sawtooth 302. When the first sawtooth 301 and the second sawtooth 302 are provided at the same time at the edge of the pixel spacing opening 32, the shapes of the first sawtooth 301 and the second sawtooth 302 may be the same or different, which is not limited in the embodiment of the present invention; the first sawtooth 301 and the second sawtooth 302 may be symmetrical or asymmetrical, which is not limited in the embodiment of the present invention.

[0055] For example, taking the edge of the pixel spacing opening 32 provided with the first sawtooth structure SR1 and the second sawtooth structure SR2 as an example, Figure 3 and Figure 4 The first sawtooth structure SR1 and the second sawtooth structure SR2 can shorten the width of the pixel spacing opening 32 along the arrangement direction of the first edge S1 and the second edge S2, and can reduce the isolation of the second electrode 23 of the adjacent light-emitting element 20 while isolating at least part of the film structure of the light-emitting functional layer 21; at the same time, a film structure can be set on the surface of the first sawtooth 301 of the first sawtooth structure SR1 and the second sawtooth 302 of the second sawtooth structure SR2 away from the array substrate 10, which is beneficial to the planarization of the subsequent film structure when the film structure is continued to be formed after the light-emitting element 20 is prepared. In this way, at least part of the common layer of the light-emitting functional layer 21 can be isolated at the position where the pixel spacing opening 32 and the isolation groove 40 are located, while reducing the isolation of the film structure formed in the subsequent process, thereby avoiding the incomplete film structure formed in the subsequent process and affecting the reliability of the display panel 001.

[0056] For example, after preparing and forming the light-emitting element 20, when preparing a touch layer (not shown in the figure) on the side of the light-emitting element 20 away from the array substrate 10, some processes require coating photoresist and patterning the film structure of the touch layer. The first serrated structure SR1 and / or the second serrated structure SR2 are set at the edge of the pixel spacing opening 32. This can increase the integrity of the photoresist film layer and avoid incompleteness of the photoresist film layer, which affects patterning, causes partial missing of the touch layer, or misconnection, and causes defects in the display panel 001.

[0057] For the sake of convenience, unless otherwise specified, the embodiments of the present invention are described in detail in Figure 4 The edge of the pixel spacing opening 32 shown in the figure has both the first sawtooth structure SR1 and the second sawtooth structure SR2 , and the sawtooth shapes of the first sawtooth structure SR1 and the second sawtooth structure SR2 are both triangles.

[0058] In an alternative embodiment, Figure 5 Another embodiment of the present invention provides Figure 1 Schematic diagram of the top view of the local area LA enlarged in the middle, refer to Figure 5 The first edge S1 is provided with a first sawtooth structure SR1, and the second edge S2 is provided with a second sawtooth structure SR2; in the arrangement direction of the first edge S1 and the second edge S2, the first sawtooth structure SR1 and the second sawtooth structure SR2 at least partially do not overlap.

[0059] For example, taking the case where the sawtooth shape of the second sawtooth structure SR2 and the sawtooth shape of the second sawtooth structure SR2 are both triangles, the first sawtooth structure SR1 includes a plurality of first sawtooths 301 sequentially arranged along the extension direction of the pixel spacing opening 32, and the second sawtooth structure SR includes a plurality of second sawtooths 302 sequentially arranged along the extension direction of the pixel spacing opening 32, and in the arrangement direction of the first edge S1 and the second edge S2, the first sawtooth 301 and the second sawtooth 302 at least partially do not overlap. In the arrangement direction of the first edge S1 and the second edge S2, the first position A of the first sawtooth 301 closest to the second sawtooth 302 and the second position B of the second sawtooth 302 closest to the first sawtooth 301 do not overlap, and the arrangement direction of the first position A and the second position B intersects with the arrangement direction of the first edge S1 and the second edge S2.

[0060] In this way, on the one hand, the distance between the first position A of the first sawtooth 301 closest to the second sawtooth 302 and the second position B of the second sawtooth 302 closest to the first sawtooth 301 can be increased to ensure that the pixel spacing opening 32 and the partition groove 40 have a high ability to isolate the light-emitting functional layer 21; on the other hand, it is beneficial to shorten the maximum distance between the first edge S1 and the second edge S2 along the arrangement direction of the first edge S1 and the second edge S2, and avoid the width of a partial area of ​​the pixel spacing opening 32 in the arrangement direction of the first edge S1 and the second edge S2 being too large, resulting in the second electrode 23 and the subsequent film layer structure being isolated at the position of the partition groove 40, affecting the integrity of the subsequent film layer and the yield of the display panel 001.

[0061] Optional, Figure 6 Another embodiment of the present invention provides a Figure 1 Schematic diagram of the cross-sectional structure of the F-F' section. Figure 7 Another embodiment of the present invention provides Figure 1 Schematic diagram of the top view of the local area LA enlarged in the middle, refer to Figure 6 and Figure 7 , the partition groove 40 includes a third edge S3 and a fourth edge S4; the arrangement direction of the third edge S3 and the fourth edge S4 is the same as the arrangement direction of the first edge S1 and the second edge S2. The projection of the first edge S1 on the plane where the array substrate 10 is located is the first edge projection, the projection of the second edge S2 on the plane where the array substrate 10 is located is the second edge projection, the projection of the third edge S3 on the plane where the array substrate 10 is located is the third edge projection, the projection of the fourth edge S4 on the plane where the array substrate 10 is located is the fourth edge projection, and the projection of the pixel spacing opening 32 on the plane where the array substrate 10 is located is the pixel spacing opening projection; the third edge projection is located on the side of the first edge projection away from the pixel spacing opening projection; the fourth edge projection is located on the side of the second edge projection away from the pixel spacing opening projection.

[0062] Exemplary, reference Figure 6 and Figure 7, the third edge S3 of the partition groove 40 and the first edge S1 of the pixel spacing opening 32 are both located on the same side of the pixel spacing opening 32, and the third edge S3 is located below the first edge S1 (closer to the direction of the base substrate 11); the fourth edge S4 of the partition groove 40 and the second edge S2 of the pixel spacing opening 32 are both located on the same side of the pixel spacing opening 32, and the fourth edge S4 is located below the second edge S2 (closer to the direction of the base substrate 11). The third edge S3 of the partition groove 40 is retracted relative to the first edge S1 of the pixel spacing opening 32, so that a protruding eave is formed at the position of the first edge S1; the fourth edge S4 of the partition groove 40 is retracted relative to the second edge S2 of the pixel spacing opening 32, so that a protruding eave is formed at the position of the second edge S2, which is conducive to isolating the common layer in the light-emitting functional layer 21.

[0063] In an optional embodiment, Figure 8 Another embodiment of the present invention provides Figure 1 Schematic diagram of the top view of the local area LA enlarged in the middle, refer to Figure 8 , the first edge S1 is provided with a first sawtooth structure SR1, the third edge S3 is provided with a third sawtooth structure SR3, and in the arrangement direction of the first edge S1 and the second edge S2, the first sawtooth structure SR1 and the third sawtooth structure SR3 overlap; and / or, the second edge S2 is provided with a second sawtooth structure SR2, the fourth edge S4 is provided with a fourth sawtooth structure SR4, and in the arrangement direction of the first edge S1 and the second edge S2, the second sawtooth structure SR2 and the fourth sawtooth structure SR4 overlap.

[0064] For example, the pixel spacing opening 32 has both the first sawtooth structure SR1 and the second sawtooth structure SR2, and the sawtooth shape of the first sawtooth structure SR1 and the sawtooth shape of the second sawtooth structure SR2 are both triangles. Figure 8 The third edge S3 of the partition groove 40 is provided with a third sawtooth structure SR3, and the third sawtooth structure SR3 includes a plurality of third sawtooths 401 arranged in sequence along the extension direction of the partition groove 40; the shape of the third sawtooth 401 may be the same as the shape of the first sawtooth 301; in the arrangement direction of the first edge S1 and the second edge S2, the first sawtooth 301 and the third sawtooth 401 overlap. The fourth edge S4 of the partition groove 40 is provided with a fourth sawtooth structure SR4, and the fourth sawtooth structure SR4 includes a plurality of fourth sawtooths 402 arranged in sequence along the extension direction of the partition groove 40; the shape of the fourth sawtooth 402 may be the same as the shape of the second sawtooth 302; in the arrangement direction of the first edge S1 and the second edge S2, the second sawtooth 302 and the fourth sawtooth 402 overlap.

[0065] In this way, it can be ensured that in the arrangement direction of the first edge S1 and the second edge S2, at any position of the first edge S1, the third edge S3 of the partition groove 40 can be retracted a certain distance; and / or, at any position of the second edge S2, the fourth edge S4 of the partition groove 40 can be retracted a certain distance, so that a protruding eaves can be formed at any position of the first edge S1 and / or the second edge S2, which is beneficial to the partition of the light-emitting functional layer 21 and can effectively improve the phenomenon of stealing light between different sub-pixels.

[0066] Optional, Fig. 9 Another embodiment of the present invention provides a Figure 1 Schematic diagram of the cross-sectional structure of the F-F' section, refer to Fig. 9 The first electrode 22 is located between the pixel definition layer 30 and the array substrate 10, and the partition groove 40 is also located between the pixel definition layer 30 and the array substrate 10; along the vertical direction of the plane where the array substrate 10 is located, the depth D40 of the partition groove 40 is the same as the thickness H22 of the first electrode 22.

[0067] Exemplarily, the partition groove 40 is located on the surface of the pixel definition layer close to the base substrate 11. The first electrode 22 and the sacrificial structure of the partition groove 40 (not shown in the figure) can be formed before the pixel definition layer 30 is formed, wherein the first electrode 22 and the sacrificial structure of the partition groove 40 can be formed in the same process, for example, the sacrificial structure of the partition groove 40 and the first electrode 22 can include the same material, for example, both include ITO, Ag and other materials, and the first electrode 22 and the sacrificial structure of the partition groove 40 can be formed simultaneously by physical vapor deposition, and then, the sacrificial structure of the partition groove 40 can be removed in a subsequent process to form the partition groove 40. In this way, there is no need to design an additional process for forming the sacrificial structure of the partition groove 40, which can simplify the preparation process and process, and is conducive to reducing production costs and process difficulty.

[0068] Optional, Fig.10 is a schematic diagram of a top view structure of another display panel provided by an embodiment of the present invention, referring to Fig.10 The plurality of light emitting elements 20 include a first color light emitting element 241, a second color light emitting element 242, and a third color light emitting element 243, wherein the turn-on voltage of the first color light emitting element 241 is greater than the turn-on voltage of the second color light emitting element 242, and the turn-on voltage of the first color light emitting element 241 is also greater than the turn-on voltage of the third color light emitting element 243. Partition grooves 40 and pixel spacing openings 32 configured to expose the partition grooves 40 are provided between adjacent first color light emitting elements 241 and second color light emitting elements 242, and between adjacent first color light emitting elements 242 and third color light emitting elements 243.

[0069] For example, the first color light emitting element 241 may be configured to emit red light, the second color light emitting element 242 may be configured to emit green light, and the third color light emitting element 243 may be configured to emit blue light, but it is not limited thereto.

[0070] Specifically, a partition groove 40 and a pixel spacing opening 32 configured to expose the partition groove 40 are provided at least between adjacent first color light-emitting elements 241 and second color light-emitting elements 242, and between adjacent first color light-emitting elements 242 and third color light-emitting elements 243, so that the light-emitting function layer 21 of the first color light-emitting element 242 can be isolated from the light-emitting function layer 21 of the second color light-emitting element 242, and the light-emitting function layer 21 of the first color light-emitting element 242 can be isolated from the light-emitting function layer 21 of the third color light-emitting element 243. In this way, when the first color light-emitting element 241 displays light at a low grayscale and the adjacent second color light-emitting elements 242 and third color light-emitting elements 243 do not emit light, or also display at a low grayscale, the leakage current from the first color light-emitting element 241 to the adjacent second color light-emitting elements 242 and third color light-emitting elements 243 can be reduced, thereby avoiding the second color light-emitting elements 242 and third color light-emitting elements 243 from erroneously emitting light or abnormally brightening, which affects the display effect.

[0071] In an alternative embodiment, Fig.11 is a schematic diagram of a top view structure of another display panel provided by an embodiment of the present invention, referring to Fig.10 and Fig.11 No partition groove 40 is provided between adjacent light-emitting elements 20 of the same color, and / or between adjacent second-color light-emitting elements 242 and third-color light-emitting elements 243.

[0072] For example, the partition groove 40 and the pixel spacing opening 32 configured to expose the partition groove 40 may be provided only between the adjacent first color light emitting elements 241 and second color light emitting elements 242, and between the adjacent first color light emitting elements 242 and third color light emitting elements 243; the partition groove 40 and the pixel spacing opening 32 configured to expose the partition groove 40 may not be provided between the light emitting elements 20 of the same color, and between the second color light emitting elements 242 and third color light emitting elements 243. In this way, the spacing between adjacent sub-pixels is shortened, and the resolution of the display panel 001 is improved.

[0073] Optional, continue to refer to Fig.10 and Fig.11 The partition groove 40 surrounding the same light emitting element 20 has a notch 460 .

[0074] Exemplarily, the same light-emitting element 20 may be surrounded by a plurality of partition grooves 40, and the plurality of partition grooves 40 are not connected to each other, forming a plurality of gaps 460; or, the same light-emitting element 20 may be surrounded by only one partition groove 40, and the partition groove 40 is not closed and has a gap 460. In this way, the second electrode 23 will not be isolated at the gap 460, which can improve the continuity of the second electrode 23 and avoid the second electrode 23 being completely isolated, resulting in the phenomenon that the signal of the second electrode 23 as a common electrode cannot be transmitted between multiple light-emitting elements 20. Among them, the conductivity of the light-emitting functional layer 21 is less than the conductivity of the second electrode 23, and the gap 460 of the partition groove 40 has little effect on reducing the leakage current of the light-emitting functional layer 21. The partition groove 40 with the gap 460 can still effectively improve the problem of stealing light between sub-pixels.

[0075] In an alternative embodiment, Fig.12 is a schematic diagram of a top view structure of another display panel provided by an embodiment of the present invention, referring to Fig.12 The partition groove 40 includes a first partition groove 441 and a second partition groove 442; the first partition groove 441 and the second partition groove 442 are adjacent to each other, and an extension direction of the first partition groove 441 is parallel to an extension direction of the second partition groove 442; a gap 460 is formed between the first partition groove 441 and the second partition groove 442.

[0076] Specifically, the gap 460 of the partition groove 40 surrounding the same light-emitting element 20 can be led out by the first partition groove 441 and the second partition groove 442 surrounding the light-emitting element 20. If the surrounded light-emitting element 20 needs to leak to the adjacent light-emitting element 20, the leakage current of the surrounded light-emitting element 20 needs to flow out through the gap 460 between the first partition groove 441 and the second partition groove 442. In one embodiment, the first partition groove 441 and the second partition groove 442 overlap in the vertical direction of the extension direction of the first partition groove 441. In another embodiment, the first partition groove 441 and the second partition groove 442 surrounding the same light-emitting element 20 can be located on the same side of the light-emitting element 20.

[0077] By providing the first partition groove 441 and the second partition groove 442 which are parallel to each other and not in the same straight line or curve, the extension length of the notch 460 can be increased, thereby increasing the transmission path of the leakage current of the light-emitting element 20, which is beneficial to reduce the leakage current and improve the problem of stealing light between adjacent sub-pixels. Among them, the conductivity of the second electrode 23 is relatively large, and the increase in the extension length of the notch 460 has little effect on improving the continuity of the second electrode 23 and enhancing the transmission of the signal of the second electrode 23 between multiple light-emitting elements 20, so that the second electrode 23 of the light-emitting element 20 can still be used as a common electrode to achieve the conduction and light emission of the light-emitting element 20.

[0078] Based on the above embodiments, Fig.13 is a schematic diagram of a top view structure of another display panel provided by an embodiment of the present invention, referring to Fig.13 The partition groove 40 surrounding the same first color light emitting element 241 has a notch 460 , and at least one of the first partition groove 441 and the second partition groove 442 located on both sides of the notch 460 is located between the second color light emitting element 242 and the third color light emitting element 243 .

[0079] On the one hand, the transmission path of the leakage current of the first color light emitting element 241 can be effectively increased, and the leakage current from the first color light emitting element 241 to the second color light emitting element 242 and the third color light emitting element 243 can be reduced, so as to avoid the second color light emitting element 242 and the third color light emitting element 243 from erroneously emitting light or abnormally brightening, thereby affecting the display effect. On the other hand, extending the first partition groove 441 and / or the second partition groove 442 to between the second color light emitting element 242 and the third color light emitting element 243 can effectively isolate the common layer of the light emitting function layer 21 between the second color light emitting element 242 and the third color light emitting element 243, thereby reducing the leakage current between the second color light emitting element 242 and the third color light emitting element 243.

[0080] It should be noted that, in order to facilitate the description of various situations, Fig.12 and Fig.13 Various implementations of the first partition groove 441 and the second partition groove 442 are shown. In practical applications, one or more implementations of the first partition groove 441 and the second partition groove 442 can be set in the display panel 001 according to needs, and the embodiments of the present invention are not limited to this.

[0081] It should also be noted that the figure exemplarily shows that the projection shape of the light-emitting element 20 on the plane where the array substrate 10 is located is a rectangle. In other optional implementations, the projection shape of the light-emitting element 20 on the plane where the array substrate 10 is located may also be a triangle, a pentagon, a hexagon, etc., and the embodiment of the present invention is not limited to this; the figure exemplarily shows that the vertex angle of the projection shape of the light-emitting element 20 on the plane where the array substrate 10 is located is a right angle. In other optional implementations, the vertex angle of the projection shape of the light-emitting element 20 on the plane where the array substrate 10 is located may also be an acute angle, an obtuse angle, a rounded angle, etc., and the embodiment of the present invention is not limited to the projection shape of the light-emitting element 20 on the plane where the array substrate 10 is located.

[0082] It should also be noted that the figure exemplarily shows an arrangement of the light emitting elements 20 of the display panel 001, wherein the first color light emitting elements 241 and the second color light emitting elements 242 form a first pixel column 51, and the third color light emitting elements 243 form a second pixel column 52, and the first pixel column 51 and the second pixel column 52 are alternately arranged along the row direction, but the arrangement of the light emitting elements 20 in the embodiment of the present invention is not limited thereto. In other optional embodiments, for example, Fig.14 As shown, RGBG arrangement can be performed in the display panel 001. Along the row direction, the first color light emitting element 241, the second color light emitting element 242, the third color light emitting element 243 and the second color light emitting element 242 are arranged in sequence to form a basic unit 55. The odd columns 53 can be composed of the first color light emitting elements 241 and the third color light emitting elements 243 arranged alternately along the column direction, and the even columns 54 can be composed of the second color light emitting elements 242 arranged along the column direction. The embodiment of the present invention does not limit the arrangement of the light emitting elements 20.

[0083] In one optional embodiment, no matter how the light-emitting elements 20 are arranged, the pixel driving circuits (not shown in the figure) electrically connected to the light-emitting elements 20 can be arranged in an array; or, in other optional embodiments, the pixel driving circuits (not shown in the figure) electrically connected to the light-emitting elements 20 can also be arranged in a non-array along with the arrangement of the light-emitting elements 20, and the embodiment of the present invention does not limit the arrangement of the pixel driving circuits electrically connected to the light-emitting elements 20.

[0084] Based on the same inventive concept, an embodiment of the present invention further provides a method for preparing a display panel. Fig.15 is a schematic flow chart of a method for preparing a display panel provided by an embodiment of the present invention, Fig.16 is a schematic diagram of a manufacturing process of a display panel provided by an embodiment of the present invention, with reference to Fig.15 and Fig.16 , the preparation method comprises:

[0085] S110, providing an array substrate.

[0086] Exemplarily, the array substrate 10 may include a base substrate, a buffer layer, a circuit layer, and a planarization layer (not shown in the figure) stacked in sequence. However, the array substrate 10 provided in the embodiment of the present invention is not limited thereto.

[0087] S120, forming a first electrode and a sacrificial structure on one side of the array substrate.

[0088] Exemplary, reference Fig.16Before forming the first electrode 22 and the sacrificial structure 04, a partition groove 40 can be formed on the surface of the array substrate 10; then, a plurality of first electrodes 22 insulated from each other are formed in the area where the partition groove 40 is not formed, and a sacrificial structure 04 is formed in the partition groove 40, and the sacrificial structure 04 is located between adjacent first electrodes 22.

[0089] In other optional embodiments, before forming the first electrode and the sacrificial structure, it is not necessary to form a partition groove on the surface of the array substrate. The first electrode and the sacrificial structure can be directly formed on the flat surface of the array substrate, and the partition groove can be formed by removing the sacrificial structure in a subsequent process.

[0090] The materials of the first electrode 22 and the sacrificial structure 04 may be the same or different, and the two may be formed in the same process or in different processes, which is not limited in the embodiment of the present invention.

[0091] S130, forming a whole pixel definition layer on the side of the first electrode and the sacrificial structure away from the array substrate, and patterning the whole pixel definition layer to form pixel openings and pixel spacing openings; wherein the pixel opening is configured to expose the first electrode; the pixel spacing opening is located between adjacent pixel openings, and the pixel spacing opening is configured to expose the sacrificial structure; the pixel spacing opening includes a first edge and a second edge, the first edge and the second edge are arranged in a direction perpendicular to the extension direction of the pixel spacing opening, and the first edge and / or the second edge is provided with a serrated structure.

[0092] Exemplary, reference Fig.16 , a whole layer of pixel definition layer 30 may be formed on the side of the first electrode 22 and the sacrificial structure 04 away from the array substrate 10, and then the pixel definition layer 30 above the first electrode 22 and the sacrificial structure 04 may be removed by exposure and development to form a pixel opening 31 and a pixel spacing opening 32. In one embodiment, when the pixel definition layer 30 is exposed and developed, the edge of the light-transmitting area may be provided with a sawtooth structure (not shown in the figure), so that at least part of the edge (S1 and / or S2) of the pixel spacing opening 32 may be provided with a sawtooth structure SR, such as Figure 3 and Figure 4 shown.

[0093] S140, removing the sacrificial structure through the pixel spacing opening to form a partition groove.

[0094] For example, continue to refer to Fig.16, the pixel spacing opening 32 can be formed first, and then the sacrificial structure 04 can be removed by wet etching. The wet etching solution can be, for example, a solution of phosphoric acid, nitric acid, and acetic acid mixed in a certain proportion, but is not limited thereto; then, the pixel opening 31 is formed, which can avoid removing the first electrode 22 in the process of removing the sacrificial structure 04, thereby affecting reliability.

[0095] In other feasible embodiments, before removing the sacrificial structure, a whole layer of photoresist (not shown in the figure) may be formed on the side of the pixel definition layer facing away from the array substrate, and then the photoresist may be patterned to remove the photoresist in the pixel spacing opening to expose the pixel spacing opening and the sacrificial structure located below the pixel spacing opening. The sacrificial structure may be removed through the pixel spacing opening by wet etching to form a partition groove, and finally the photoresist on the side of the pixel definition layer facing away from the array substrate may be removed.

[0096] S150, forming a light-emitting functional layer on a side of the pixel definition layer facing away from the array substrate; wherein at least one film layer in the light-emitting functional layer is disconnected at a position where the partition groove is located.

[0097] Exemplarily, the light-emitting functional layer 21 may include a first light-emitting layer 201, a conductive layer 209, and a second light-emitting layer 202 that are stacked in sequence, but is not limited thereto. One or more of the first light-emitting layer 201, the conductive layer 209, and the second light-emitting layer 202 may be disconnected at the location where the partition groove 40 is located, which can effectively reduce leakage between adjacent light-emitting elements 20.

[0098] S160, forming a second electrode on a side of the light-emitting functional layer away from the array substrate.

[0099] The second electrode 23 may be formed of a transparent conductive material, such as Mg, Ag, ITO, etc., but not limited thereto. The first electrode 22 located at the pixel opening 31 , the light emitting functional layer 21 , and the second electrode 23 may constitute a light emitting element 20 .

[0100] Exemplarily, the common light-emitting functional layer 21 can fill the partition groove 40, thereby reducing the step difference from the pixel definition layer 30 to the bottom of the partition groove 40. In this way, the second electrode 23 may not be completely isolated in the partition groove 40. Since the conductivity of the second electrode 23 is generally large, the second electrodes 23 in all pixel openings 31 can be electrically connected. The second electrode 23 can be used as a common electrode to achieve conduction and luminescence of the light-emitting element 20.

[0101] It is understandable that after forming the second electrode 23 , other film layer structures, such as a packaging layer, a touch layer, etc., may be prepared, which will not be described one by one in the embodiment of the present invention.

[0102] Optional, Fig.17is a schematic flow chart of another method for preparing a display panel provided by an embodiment of the present invention, Fig.18 is a structural schematic diagram of another display panel manufacturing process provided by an embodiment of the present invention, referring to Fig.17 and Fig.18 , the preparation method comprises:

[0103] S210, providing an array substrate.

[0104] S220 , forming a whole conductive layer on one side of the array substrate.

[0105] Exemplarily, a physical vapor deposition process may be used to form the conductive layer, and the conductive layer includes but is not limited to materials such as ITO and Ag.

[0106] S230, patterning the conductive layer to form a first electrode and a sacrificial structure.

[0107] S240, forming a whole pixel definition layer on the side of the first electrode and the sacrificial structure away from the array substrate, and patterning the whole pixel definition layer to form pixel openings and pixel spacing openings; wherein the pixel opening is configured to expose the first electrode; the pixel spacing opening is located between adjacent pixel openings, and the pixel spacing opening is configured to expose the sacrificial structure; the pixel spacing opening includes a first edge and a second edge, the first edge and the second edge are arranged in a direction perpendicular to the extension direction of the pixel spacing opening, and the first edge and / or the second edge is provided with a serrated structure.

[0108] S250, forming a photoresist on a side of the pixel definition layer away from the array substrate.

[0109] S260, patterning the photoresist to expose pixel spacing openings and sacrificial structures.

[0110] S270 , removing the sacrificial structure through the pixel spacing opening to form a partition groove.

[0111] S280, forming a light-emitting functional layer on a side of the pixel definition layer facing away from the array substrate; wherein at least one film layer in the light-emitting functional layer is disconnected at a position where the partition groove is located.

[0112] S290, forming a second electrode on a side of the light-emitting functional layer away from the array substrate.

[0113] Exemplary, reference Fig.17 and Fig.18The first electrode 22 and the sacrificial structure can be made of the same material and formed in the same process, which is simple in steps, reduces production costs, and reduces process difficulty. Before removing the sacrificial structure 04, a whole layer of photoresist layer 33 can be formed on the side of the pixel definition layer 30 away from the array substrate 10, and then the photoresist layer 33 is patterned to remove the photoresist layer 33 in the pixel spacing opening 32 to expose the pixel spacing opening 32 and the sacrificial structure 04 located below the pixel spacing opening 32. The sacrificial structure 04 can be removed by wet etching.

[0114] In an optional embodiment, along the vertical direction of the extending direction of the pixel spacing opening 32, the width W04 of the sacrificial structure 04 is greater than the minimum width W32 of the pixel spacing opening 32, that is, along the vertical direction of the extending direction of the pixel spacing opening 32, the width W40 of the partition groove 40 is greater than the minimum width W32 of the pixel spacing opening 32. In this way, at least part of the edge (S1 and / or S2) of the pixel spacing opening 32 can form a protruding eaves, which is conducive to partitioning the common layer in the light-emitting functional layer 21.

[0115] It is understandable that after forming the second electrode 23 , other film layer structures, such as a packaging layer, a touch layer, etc., may be prepared, which will not be described one by one in the embodiment of the present invention.

[0116] The method for preparing a display panel provided in an embodiment of the present invention is used to prepare the display panel provided in any embodiment of the present invention, and has corresponding technical features and beneficial effects of the display panel. For contents not fully described in the embodiment of the method for preparing a display panel, refer to the above description of the display panel and will not be repeated here. Similarly, the display panel of an embodiment of the present invention also has functional modules and beneficial effects capable of executing the method for preparing a display panel provided in an embodiment of the present invention. For contents not fully described in the embodiment of the display panel, refer to the above description of the method for preparing a display panel and will not be repeated here.

[0117] Based on the same inventive concept, an embodiment of the present invention further provides a display device, Fig.19 is a schematic diagram of the structure of a display device provided by an embodiment of the present invention, such as Fig.19 The display device 002 includes a display panel 001 provided by any embodiment of the present invention. The display device 002 provided by the embodiment of the present invention can be Fig.19 The mobile phone shown can also be any electronic product with a display function, including but not limited to the following categories: televisions, laptops, desktop displays, tablet computers, digital cameras, smart bracelets, smart glasses, car displays, medical equipment, industrial control equipment, touch interactive terminals, etc. The embodiments of the present invention do not specifically limit this.

[0118] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A display panel, characterized in that: include: An array substrate, and a plurality of light-emitting elements located on one side of the array substrate; the light-emitting elements include a light-emitting functional layer and a first electrode and a second electrode located on both sides of the light-emitting functional layer, wherein the first electrode is located between the light-emitting functional layer and the array substrate; The display panel further comprises a pixel definition layer located on a side of the array substrate close to the light-emitting element; the pixel definition layer comprises a pixel opening and a pixel spacing opening; the pixel opening is configured to expose the first electrode; the pixel spacing opening is located between adjacent pixel openings, and the pixel spacing opening is configured to expose a partition groove; at least one film layer in the light-emitting functional layer is disconnected at a position where the partition groove is located; The pixel spacing opening includes a first edge and a second edge; the first edge and the second edge are arranged in a direction perpendicular to the extending direction of the pixel spacing opening; and the first edge and / or the second edge are provided with a sawtooth structure.

2. The display panel according to claim 1, characterized in that: The sawtooth structure has a sawtooth shape including a triangle or a rectangle.

3. The display panel according to claim 1, characterized in that: The partition groove includes a third edge and a fourth edge; the arrangement direction of the third edge and the fourth edge is the same as the arrangement direction of the first edge and the second edge; The projection of the first edge on the plane where the array substrate is located is the first edge projection, the projection of the second edge on the plane where the array substrate is located is the second edge projection, the projection of the third edge on the plane where the array substrate is located is the third edge projection, the projection of the fourth edge on the plane where the array substrate is located is the fourth edge projection, and the projection of the pixel spacing opening on the plane where the array substrate is located is the pixel spacing opening projection; The third edge projection is located on a side of the first edge projection away from the pixel spacing opening projection; and the fourth edge projection is located on a side of the second edge projection away from the pixel spacing opening projection.

4. The display panel according to claim 3, characterized in that: The first edge is provided with a first sawtooth structure, the third edge is provided with a third sawtooth structure, and in the arrangement direction of the first edge and the second edge, the first sawtooth structure and the third sawtooth structure overlap; And / or, the second edge is provided with a second sawtooth structure, the fourth edge is provided with a fourth sawtooth structure, and in the arrangement direction of the first edge and the second edge, the second sawtooth structure and the fourth sawtooth structure overlap.

5. The display panel according to claim 1, characterized in that: The first edge is provided with a first sawtooth structure, and the second edge is provided with a second sawtooth structure; In an arrangement direction of the first edge and the second edge, the first sawtooth structure and the second sawtooth structure at least partially do not overlap.

6. The display panel according to claim 1, characterized in that: The first electrode is located between the pixel definition layer and the array substrate, and the partition groove is also located between the pixel definition layer and the array substrate; Along a direction perpendicular to the plane where the array substrate is located, the depth of the partition groove is the same as the thickness of the first electrode.

7. The display panel according to claim 1, characterized in that: The plurality of light-emitting elements include a first color light-emitting element, a second color light-emitting element, and a third color light-emitting element; the turn-on voltage of the first color light-emitting element is greater than the turn-on voltage of the second color light-emitting element, and the turn-on voltage of the first color light-emitting element is also greater than the turn-on voltage of the third color light-emitting element; The partition groove and the pixel spacing opening configured to expose the partition groove are provided between adjacent first color light emitting elements and second color light emitting elements, and between adjacent first color light emitting elements and third color light emitting elements.

8. The display panel according to claim 7, characterized in that: The partition groove is not provided between adjacent light emitting elements of the same color, and / or between adjacent light emitting elements of the second color and the third color.

9. The display panel according to claim 8, characterized in that: The partition groove surrounding the same light emitting element has a notch.

10. The display panel according to claim 9, characterized in that: The partition groove includes a first partition groove and a second partition groove; the first partition groove is adjacent to the second partition groove, and an extension direction of the first partition groove is parallel to an extension direction of the second partition groove; The gap is between the first partition groove and the second partition groove.

11. The display panel according to claim 10, characterized in that: The partition groove surrounding the same first color light emitting element has the gap, and at least one of the first partition groove and the second partition groove located on both sides of the gap is located between the second color light emitting element and the third color light emitting element.

12. A method for preparing a display panel, characterized in that: include: providing an array substrate; forming a first electrode and a sacrificial structure on one side of the array substrate; A whole layer of pixel definition layer is formed on a side of the first electrode and the sacrificial structure away from the array substrate, and the whole layer of the pixel definition layer is patterned to form a pixel opening and a pixel spacing opening; wherein the pixel opening is configured to expose the first electrode; the pixel spacing opening is located between adjacent pixel openings, and the pixel spacing opening is configured to expose the sacrificial structure; the pixel spacing opening includes a first edge and a second edge, the first edge and the second edge are arranged in a direction perpendicular to the extension direction of the pixel spacing opening, and the first edge and / or the second edge are provided with a sawtooth structure; The sacrificial structure is removed through the pixel spacing opening to form a partition groove; A light-emitting functional layer is formed on a side of the pixel definition layer away from the array substrate; wherein at least one film layer in the light-emitting functional layer is disconnected at a position where the partition groove is located; A second electrode is formed on a side of the light emitting functional layer away from the array substrate.

13. The method for preparing a display panel according to claim 12, characterized in that: A first electrode and a sacrificial structure are formed on one side of the array substrate, comprising: forming a whole conductive layer on one side of the array substrate; patterning the conductive layer to form the first electrode and the sacrificial structure; After forming a whole layer of pixel definition layer on the side of the first electrode and the sacrificial structure away from the array substrate, and patterning the whole layer of the pixel definition layer to form pixel openings and pixel spacing openings, and before removing the sacrificial structure through the pixel spacing openings to form partition grooves, the method further includes: forming a photoresist on a side of the pixel definition layer away from the array substrate; The photoresist is patterned to expose the pixel spacing opening and the sacrificial structure.

14. A display device, characterized in that: A display panel comprising any one of claims 1 to 11.

Images