Semiconductor light emitting structure, method of making and using same

Abstract

This invention discloses a semiconductor light-emitting structure, its fabrication method, and its applications. The semiconductor light-emitting structure includes an n-type layer, a light-emitting layer, and a p-type layer. The light-emitting layer includes a pre-modulation layer and a post-light-emitting layer. The pre-modulation layer has various opening guidance structures, which extend to form corresponding inverted conical pit structures with different depths and / or opening diameters. This invention introduces inverted conical pit structures of different depths and opening diameters into the light-emitting layer. This structure significantly improves the distribution range and uniformity of hole injection depth in the light-emitting layer, thereby improving the uniformity of hole distribution in the post-quantum well light-emitting layer and increasing luminous efficiency. Furthermore, it greatly enhances the shielding ability of carriers leaking to dislocations in the light-emitting layer, suppressing non-radiative recombination and improving the leakage current performance of the epitaxial wafer. Moreover, the in-situ processing of the inverted conical pit structure is simple, facilitating cost reduction in mass production.

Description

Technical Field

[0001] This invention relates to the field of semiconductor optoelectronic device technology, and in particular to a semiconductor light-emitting structure, its preparation method and application. Background Technology

[0002] Micro-LED has many advantages such as self-illumination, high efficiency, low power consumption, high integration, and high stability. It is also small in size, highly flexible, and easy to disassemble and combine. It can be applied to any display application from small to large size. Modern society has entered the information age and is developing towards intelligence. Display is a key link in realizing information exchange and intelligence. Among the many display technologies currently available, Micro-LED display technology is considered to be a disruptive next-generation display technology.

[0003] Existing research shows that as the size of Micro-LED devices decreases, the quantum efficiency decreases significantly, and the peak efficiency shifts towards higher current densities. For example, current GaN-based LEDs typically grow epitaxial layers on sapphire substrates, including n-type doped layers, InGaN / GaN multi-quantum-well light-emitting layers, p-type AlGaN electron-blocking layers, and p-type layers. On the one hand, because electrons have a faster mobility than holes and the concentration of free electrons is higher than that of holes, the distribution of electrons and holes in MQWs (Multiple Quantum Wells) is easily uneven. Holes are concentrated in the MQWs closer to the p-type layer and gradually decay towards the n-type layer, which is not conducive to the recombination of electrons and holes. On the other hand, due to the high concentration and fast migration of electrons, electrons are prone to overflow into the p-type layer and recombine with ionized holes in the p-type layer, reducing the ionization efficiency of holes and generating non-radiative recombination. In addition, as the chip size decreases, especially at high current densities, the chip's resistance to electrostatic discharge (ESD) becomes weaker and weaker. Therefore, improving the hole concentration and migration in the quantum well light-emitting layer and improving ESD performance are crucial to the efficiency of Micro-LED devices. Summary of the Invention

[0004] In view of the shortcomings of the prior art, the purpose of this invention is to provide a semiconductor light-emitting structure, its preparation method and application.

[0005] To achieve the aforementioned objectives, the technical solution adopted by this invention includes:

[0006] In a first aspect, the present invention provides a semiconductor light-emitting structure, comprising an n-type nitride layer, a nitride quantum well light-emitting layer, and a p-type nitride layer, wherein the nitride quantum well light-emitting layer comprises a front quantum well modulation layer and a rear quantum well light-emitting layer, and the front quantum well modulation layer is disposed between the n-type nitride layer and the rear quantum well light-emitting layer;

[0007] Furthermore, the front quantum well modulation layer is provided with a variety of opening guide structures with different depths and / or opening diameters, and the opening guide structures extend to the rear quantum well light-emitting layer, so that a variety of first inverted cone pit structures with different depths and / or opening diameters are formed in the rear quantum well light-emitting layer.

[0008] Furthermore, the pre-quantum well modulation layer includes a pre-quantum well layer and a pre-quantum barrier layer that are periodically grown in cycles, with a cycle period of 2-6 times.

[0009] Furthermore, the opening guide structure includes an opening unit and / or a guide unit, wherein the opening unit is a second inverted cone pit structure, and the apex of the second inverted cone pit structure is located on the guide unit;

[0010] The depth and / or opening diameter of the opening units formed in different cycle periods are different.

[0011] Furthermore, the rear quantum well light-emitting layer includes a rear quantum well layer and a rear quantum barrier layer that are periodically grown in cycles of 1-8 times.

[0012] Furthermore, the depth and / or opening diameter of the first inverted cone pit structure formed in different cycle periods of the rear quantum well light-emitting layer are different.

[0013] Furthermore, along the growth direction of the rear quantum well light-emitting layer, the opening diameter of the first inverted cone pit structure formed in different cycle periods of the rear quantum well light-emitting layer decreases sequentially.

[0014] Furthermore, the opening diameter of the opening guide structure is 1-100 nm, and the opening diameter of the first inverted conical pit structure is 100-300 nm.

[0015] Furthermore, the semiconductor light-emitting structure also includes a nitride stress-relieving layer, which is disposed between the n-type nitride layer and the nitride quantum well light-emitting layer.

[0016] In a second aspect, the present invention also provides a method for fabricating a semiconductor light-emitting structure, comprising the steps of sequentially growing an n-type nitride layer, a nitride quantum well light-emitting layer, and a p-type nitride layer on a substrate; the step of growing the nitride quantum well light-emitting layer includes the steps of sequentially growing a front quantum well modulation layer and a rear quantum well light-emitting layer;

[0017] During the growth of the pre-grown quantum well modulation layer, various opening guide structures with different depths and / or opening diameters are formed;

[0018] During the growth of the rear quantum well light-emitting layer, the opening guide structures of various depths and / or opening diameters extend into the rear quantum well light-emitting layer to form a first inverted cone pit structure of various depths and / or opening diameters.

[0019] Furthermore, the step of growing the pre-quantum well modulation layer includes periodically growing the pre-quantum well layer and the pre-quantum barrier layer;

[0020] Before, between, and after the growth of the pre-growth quantum well layer, at a temperature of 650-700°C, the V / III molar ratio is adjusted to 100-500, an In source is introduced for 5-120 seconds, and then a Si source is introduced for 5-120 seconds to form a guiding unit. The guiding unit extends to form an opening unit, and at least the guiding unit and the opening unit together constitute the opening guiding structure.

[0021] The inlet time of the In source and / or Si source is different in different cycle periods.

[0022] Thirdly, the present invention also provides an LED device, particularly a Micro LED chip, which includes the above-described semiconductor light-emitting structure.

[0023] Furthermore, it specifically includes the aforementioned semiconductor light-emitting structure, a first electrode, and a second electrode, wherein the first electrode is electrically connected to its n-type nitride layer, and the second electrode is electrically connected to its p-type nitride layer.

[0024] Based on the above technical solution, compared with the prior art, the beneficial effects of the present invention include at least the following:

[0025] The semiconductor light-emitting structure and its fabrication method provided by this invention introduce a first inverted conical pit structure with different depths and opening diameters into the light-emitting layer. This structure greatly improves the distribution range and uniformity of hole injection depth in the light-emitting layer, thereby improving the uniformity of hole distribution in the subsequent quantum well light-emitting layer and increasing the luminous efficiency. On the other hand, it greatly enhances the ability of the inverted conical pit structure in the light-emitting layer to shield carrier leakage to dislocations, suppresses non-radiative recombination, and improves the leakage current performance of the epitaxial wafer. Furthermore, the in-situ processing to form the inverted conical pit structure is simple and facilitates the reduction of production costs in mass production.

[0026] The above description is merely an overview of the technical solution of the present invention. In order to enable those skilled in the art to better understand the technical means of this application and to implement it in accordance with the contents of the specification, the preferred embodiments of the present invention are described below in conjunction with detailed drawings. Attached Figure Description

[0027] Fig. 1This is a schematic diagram of the formation principle and structure of the inverted cone pit structure provided in a typical embodiment of the present invention;

[0028] Fig. 2 This is a schematic diagram of a gallium nitride LED epitaxial structure provided in a typical embodiment of the present invention;

[0029] Fig. 3 This is a partial structural schematic diagram of a gallium nitride LED epitaxial structure provided in a typical embodiment of the present invention.

[0030] Explanation of reference numerals in the attached figures: 10, substrate; 11, n-type nitride layer; 12, nitride stress relief layer; 13, front quantum well modulation layer; 14, rear quantum well light-emitting layer; 15, p-type nitride layer;

[0031] 41. First inverted cone pit structure; 31. Opening unit; 32. Guiding unit; Detailed Implementation

[0032] In view of the shortcomings of the prior art, the inventors of this invention, through long-term research and extensive practice, have proposed the technical solution of this invention. The following will further explain and illustrate this technical solution, its implementation process, and its principles.

[0033] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and therefore the scope of protection of the invention is not limited to the specific embodiments disclosed below.

[0034] Moreover, relational terms such as “first” and “second” are used merely to distinguish one component or method step from another that has the same name, and do not necessarily require or imply any such actual relationship or order between these components or method steps.

[0035] First, a general example of the technical solutions used in the embodiments of the present invention will be provided.

[0036] See Figs. 1-3 This invention provides a semiconductor light-emitting structure, including an n-type nitride layer 11, a nitride quantum well light-emitting layer, and a p-type nitride layer 15. The nitride quantum well light-emitting layer includes a front quantum well modulation layer 13 and a rear quantum well light-emitting layer 14, with the front quantum well modulation layer 13 disposed between the n-type nitride layer and the rear quantum well light-emitting layer 14.

[0037] Furthermore, the front quantum well modulation layer is provided with a variety of opening guide structures with different depths and / or opening diameters, and the opening guide structures extend to the rear quantum well light-emitting layer, so that a variety of first inverted cone pit structures 41 with different depths and / or opening diameters are formed in the rear quantum well light-emitting layer.

[0038] The above-mentioned method for fabricating a semiconductor light-emitting structure includes the steps of sequentially growing an n-type nitride layer 11, a nitride quantum well light-emitting layer, and a p-type nitride layer 15 on a substrate; the step of growing the nitride quantum well light-emitting layer includes the steps of sequentially growing a front quantum well modulation layer 13 and a rear quantum well light-emitting layer 14; during the growth of the front quantum well modulation layer 13, a variety of opening guiding structures with different depths and / or opening diameters are formed; during the growth of the rear quantum well light-emitting layer 14, the opening guiding structures with different depths and / or opening diameters extend into the rear quantum well light-emitting layer to form a variety of first inverted conical pit structures 41 with different depths and / or opening diameters.

[0039] The first inverted conical pit structure 41 with various depths and / or opening diameters formed in the rear quantum well light-emitting layer 14 greatly improves the distribution range and uniformity of hole injection depth in the rear quantum well light-emitting layer 14, thereby improving the uniformity of hole distribution in the rear quantum well light-emitting layer 14 and improving the luminous efficiency. On the other hand, it greatly improves the ability of the first inverted conical pit structure 41 in the rear quantum well light-emitting layer 14 to shield the carrier leakage to dislocations, suppress non-radiative recombination, and improve the leakage current performance of the semiconductor light-emitting structure. Furthermore, the in-situ process for forming the inverted conical pit structure is simple and facilitates the reduction of production costs in mass production.

[0040] The present invention also provides an LED chip that uses the above-described semiconductor light-emitting structure, which may be a Micro-LED or other types of LED chips.

[0041] Furthermore, some Micro-LED epitaxial structures provided by the embodiments of the present invention are realized by MOCVD epitaxial growth process. The precursor source, gas source and carrier gas required for growth can be various common precursor sources, gas sources and carrier gases required for MOCVD epitaxial growth, including Ga source, Al source, In source, Mg, Si source and N source and N2, H2, Ar, etc. As a preferred exemplary embodiment, the Ga source in the following embodiments is trimethylgallium (TMG) and triethylgallium (TEG), the Al source is trimethylaluminum (TMAl), the In source is trimethylindium (TMIn), the Mg source is magnesia pyrocene (Cp2Mg), the Si source is silane (SiH4), the N source is ammonia (NH3), and the carrier gas is N2 and H2. Of course, it is understood that in other feasible embodiments, the selection of the above materials is not limited to this.

[0042] See Figs. 1-3 This invention provides a method for fabricating a Micro-LED epitaxial wafer, which includes at least the following steps S1-S5:

[0043] S1. Provide a substrate 10, which may be one of sapphire, silicon carbide, silicon, zinc oxide or gallium nitride.

[0044] S2. On the substrate 10, an n-type GaN layer with a thickness of 1-4 μm is grown as an n-type nitride layer 11 at a temperature of 1050-1200℃ and a pressure of 100-600 torr. The Si doping concentration can be 1×10⁻⁶. 18 cm -3 -1×10 20 cm -3 .

[0045] S3. On the n-type GaN layer, a GaN stress relief layer 12 with a thickness of 10-360 nm is grown at a temperature of 850-1050℃ and a pressure of 400-600 torr. This stress relief layer 12 can also be a periodically grown GaN, InGaN, AlGaN, or other structural layers, and can be n-type doped, p-type doped, or undoped; no limitation is made here. Unlike the conventional growth of the stress relief layer 12, which typically uses a pressure of 100-300 torr to introduce high-density defects to adjust stress, the stress relief layer 12 in step S3 of this embodiment is grown under high pressure, reducing the defect density in the stress relief layer 12 by more than an order of magnitude (-10). 8 cm 2 This provides a high-quality template for the subsequent growth of the light-emitting layer, reduces the leakage current performance of the epitaxial wafer, and further improves the luminescence efficiency.

[0046] S4. On the GaN stress-relieving layer 12, a nitride quantum well light-emitting layer is grown under a pressure range of 200-400 torr, including at least the following steps S41-S42:

[0047] S41, grow an InGaN / GaN front quantum well modulation layer 13, and include at least the following sub-steps S411-S414.

[0048] S411. Grow an InGaN pre-quantum well layer with a thickness of 1-5 nm in the temperature range of 750-850℃. In this step, the V / III molar ratio of the group V and group III nitride sources is 2000-4000.

[0049] S412. Within a temperature range of 650-700℃, set the V / III molar ratio to 100-500, introduce an In source for 5-120s, and then introduce a Si source for 5-120s. By controlling the V / III molar ratio and the process control of the introduction time of the In and Si sources, the guiding unit 32 is formed.

[0050] S413. Grow a GaN pre-quantum barrier layer with a thickness of 10-50 nm in the temperature range of 750-950℃. In this step, the V / III molar ratio of the group V and group III nitride sources is 2000-4000.

[0051] S414. Continue repeating steps S411, S412, and S413 2-6 times to form the first pre-quantum well modulation layer 13.

[0052] In the above steps, step S412 can be performed before S411, after S411, or interspersed in the middle of step S411. Its main function is to form the guiding unit 32 in the InGaN / GaN pre-quantum well modulation layer 13. In this embodiment, step S412 uses an extremely low V / III molar ratio. Under the condition of low growth temperature, on the one hand, V-group N source N vacancy defects can be formed. At the same time, under the continuous influx of In source, In atoms are very easy to combine with N vacancy. On the other hand, after the Si source is introduced, Si atoms appear at the N vacancy to replace the N vacancy, which can form a Si atom aggregate distribution centered on Si atoms, forming the guiding unit 32. This suppresses the growth of material near the N vacancy, thereby forming the above-mentioned opening guiding structure.

[0053] The opening unit 31, also known as the second inverted conical pit structure, has an opening diameter and depth that depend on the inlet time of the In source and the Si source in step S412. To form inverted conical pit structures with different opening diameters and depths, the inlet time for different growth cycles can be made different. Preferably, the inlet time of the In source and the Si source gradually shortens along the growth direction of the pre-quantum well modulation layer. For example, a longer inlet time of the In source can form more N vacancies. Based on this, the inlet time of the Si source can be extended to form more Si substitution for N vacancies, forming an aggregated distribution centered on Si atoms. This is the basis for setting the opening guiding structure. When epitaxial growth continues on this basis, the aggregated distribution region of Si atoms inhibits the growth of the material, ultimately forming a variety of different opening guiding structures. In this embodiment of the invention, the depth and opening diameter of the opening guiding structure are also the depth and opening diameter of the opening unit 31.

[0054] See also Fig. 1It is generally believed that in GaN-based epitaxial growth, inverted cone pits may originate from penetrating dislocations. Stress and low temperature are considered to be the reasons for the formation of inverted cone pit structures. Under stress and low temperature, the atomic mobility is low, resulting in uneven material surface, which ultimately leads to the formation of inverted cone pit structures. When the inverted cone pit structure is formed in the quantum well back quantum well light-emitting layer 14, quantum wells also grow on the sidewall of the inverted cone pit structure. The sidewall quantum well has a large band gap, forming a potential barrier around the dislocation, which hinders the leakage of charge carriers to the dislocation, thereby shielding the dislocation and suppressing nonradiative recombination. In addition, because the sidewall of the inverted cone pit is a semi-polar surface, holes can be injected more easily into the quantum well back quantum well light-emitting layer 14 through the sidewall quantum well of the inverted cone pit. As a result, the pit structure can effectively promote hole injection and improve the uniformity of charge carrier distribution in the quantum well back quantum well light-emitting layer 14.

[0055] In this embodiment of the invention, because the guiding units 32 in the pre-quantum well modulation layer 13 are different in each cycle, the V / III process can be used to control the change in the introduction time of the In source and the Si source. Different opening diameters and depths of the opening guiding structures are formed in each pre-quantum well layer. After subsequent extension growth, inverted conical pit structures with different opening diameters and depths are formed in the post-quantum well light-emitting layer 14. The varying depths and openings of the inverted conical pits allow holes to be uniformly dispersed into each sublayer of the post-quantum well light-emitting layer 14 with the assistance of these inverted conical pit structures. This greatly improves the hole injection uniformity and thus the luminous efficiency. Ultimately, inverted conical pit structures with different opening diameters and depths can be formed in each cycle of the post-quantum well light-emitting layer 14, where the density of the inverted conical structures can be 10-1. 8 cm -2 -10 10 cm -2 .

[0056] S42. Growing a rear quantum well light-emitting layer 14 on the front quantum well modulation layer 13, comprising at least the following sub-steps S421-S423:

[0057] S421. A nitride pre-quantum well layer with a thickness of 2-8 nm is grown in the temperature range of 750-850℃. In this step, the V / III molar ratio of the group V and group III nitride sources is 2000-4000.

[0058] S422. Grow a nitride post-quantum barrier layer with a thickness of 6-10 nm in the temperature range of 750-950℃. In this step, the V / III molar ratio of the group V and group III nitride sources is 2000-4000.

[0059] S423. Repeat steps S421 and S422 1-8 times to complete the growth of the post-quantum well light-emitting layer 14.

[0060] S5. On the nitride quantum well back quantum well light-emitting layer 14, a p-type nitride layer with a thickness of 20-200 nm is grown at a temperature of 950-1050℃ and a pressure of 100-600 torr.

[0061] Furthermore, it should be noted that the key improvement of this invention lies in the formation of different opening guidance structures, which in turn form different inverted cone pit structures. In step S412, under the condition of low growth temperature, on the one hand, V-type N-source N-vacancy defects can be formed. At the same time, under the continuous introduction of the In source, In atoms are very easy to combine with N vacancy. On the other hand, after the Si source is introduced, Si atoms appear at the N vacancy to replace the N vacancy, which can form a Si atom aggregate distribution centered on Si atoms, forming the guiding unit 32. This inhibits the growth of material near the N vacancy, thereby forming the opening unit 31. Alternatively, Si can be used as an impurity doping. When it replaces the N vacancy, it will cause a stress difference at the substitution point. The stress difference will lead to the formation of dislocation nucleation points centered on Si. In the subsequent growth process, the extension of dislocation lines will be formed, constituting the guiding unit 32 that extends into the rear quantum well light-emitting layer 14. The guiding unit 32 and the opening unit 31 can together constitute the opening guidance structure. By controlling the V / III process and coordinating the introduction time of the In and Si sources, in-situ defect control technology is used to change the opening diameter and depth distribution of the opening guidance structure formed by the InGaN pre-quantum well in each cycle. Unlike the inverted conical pit structure introduction method in the prior art, which requires low-temperature growth and the introduction of a high In composition (>30%) in the quantum well light-emitting layer 14 before the growth of the quantum well post-quantum well, this method provided by the present invention improves the problem of poor epitaxial growth quality caused by low-temperature growth and high In composition growth in the traditional method, improves the leakage current performance of the LED epitaxial wafer, and saves the problem of long growth cycle and low epitaxial growth capacity caused by epitaxial growth temperature rise and fall. It also improves the utilization rate of epitaxial equipment, increases production capacity, and reduces production costs, making it suitable for large-scale mass production.

[0062] See also Figs. 2-3The present invention also provides a Micro-LED epitaxial structure prepared by the above preparation method, which includes at least a substrate 10, an n-type nitride layer (as n-type nitride layer 11), a nitride stress relief layer 12, a nitride quantum well light-emitting layer and a p-type nitride layer (as p-type nitride layer 15). The nitride quantum well light-emitting layer includes a front quantum well pre-quantum well modulation layer 13 and a rear quantum well post-quantum well light-emitting layer 14. At least one front quantum well pre-quantum well modulation layer 13 is provided with an opening guiding structure, including an opening unit 31 and / or a guiding unit 32.

[0063] Specifically, the pre-quantum well modulation layer 13 may include a pre-quantum well layer and a pre-quantum barrier layer that are periodically grown in a cyclic manner, with a cycle period of 2-6. The post-quantum well light-emitting layer 14 includes a post-quantum well layer and a post-quantum barrier layer that are periodically grown in a cyclic manner, with a cycle period of 1-8.

[0064] More specifically, at least one pre-quantum well modulation layer 13 may be provided with an opening guiding structure, including an opening unit 31 and / or a guiding unit 32. The guiding unit 32 may be, for example, a dislocation line generated after different In and Si heat treatment times. Si, as an impurity doping, replaces N vacancies and causes stress differences at the substitution point. The stress differences lead to the formation of dislocation nucleation points centered on Si, which in the subsequent growth process form dislocation line extensions. The opening unit 31 is an inverted cone pit defect with an opening diameter of 1-100 nm, i.e., the second inverted cone pit structure, i.e., the opening unit 31. The apex of the second inverted cone pit structure is located at the guiding unit 32. Furthermore, the longer the In source is introduced, the more N vacancies are formed. The longer the Si source is introduced, the more Si substitutes for N vacancies are formed. The more Si atoms are aggregated and distributed around Si as the substitution center, and the larger the area is. In the subsequent growth process, it will take a shorter time to form the opening unit 31. Therefore, the distance of the guide unit 32, i.e. the dislocation line extension, will be shorter, and the opening of the formed opening unit 31 will be larger.

[0065] More specifically, the opening guiding structure in the pre-quantum well modulation layer 13 extends to the post-quantum well light-emitting layer 14 and forms an inverted conical pit structure with an opening diameter of 100-300 nm in different periods of the post-quantum well light-emitting layer 14.

[0066] More specifically, the size of the openings forming the inverted cone pit structure in the rear quantum well layer of different periods in the growth direction is preferably decreasing sequentially along the growth direction. This decrease is because when forming the front quantum well modulation layer, the introduction time of the In source and Si source in different periods along the growth direction is gradually shortened, resulting in different guiding units 32. The guiding units 32 then generate opening units 31 with different depths and opening sizes. The opening units 31 extend to different depths and opening sizes formed in the rear quantum well layer, or different guiding units 32 dislocation lines extend and grow to directly generate openings in the rear quantum well light-emitting layer, thereby forming another first inverted cone pit structure 41.

[0067] The above content is a general example of the technical solutions adopted in the embodiments of the present invention. The technical solutions of the present invention will be further described in detail below through several specific embodiments. However, the selected specific embodiments are preferred cases among many embodiments, and are only used to illustrate the present invention and enable those skilled in the art to refer to and fully understand the present invention, and cannot be used to limit the scope of protection of the present invention.

[0068] In addition, unless otherwise specified, the materials, gases, reagents and equipment used in the following specific embodiments are all commercially available in the art.

[0069] Example 1

[0070] This embodiment specifically illustrates the fabrication process of a gallium nitride LED epitaxial structure, with detailed steps as follows:

[0071] S1. Provide a sapphire substrate 10;

[0072] S2. On the substrate 10, an n-type GaN layer with a thickness of 3 μm is grown at a temperature of 1080°C and a pressure of 200 torr, serving as the n-type nitride layer 11, with a Si doping concentration of 5 × 10⁻⁶. 18 cm -3 ;

[0073] S3. On the n-type GaN layer, a GaN stress relief layer 12 with a thickness of 150 nm is grown at a temperature of 1020℃ and a pressure of 500 torr.

[0074] S4. On the GaN stress-relieving layer 12, a nitride quantum well light-emitting layer is grown within a pressure range of 300 torr, including at least the following steps;

[0075] S41. Growing the InGaN / GaN front quantum well modulation layer 13, which includes at least the following steps:

[0076] S411. An InGaN front quantum well layer with a thickness of 2.5 nm was grown at a temperature of 780℃, with a V / III molar ratio of 3000 for the V group and III nitride sources.

[0077] S412. At a temperature of 680℃, set the V / III molar ratio to 105, introduce an In source for 80s, and then introduce a Si source for 100s.

[0078] S413. A GaN pre-quantum barrier layer with a thickness of 15 nm was grown at a temperature of 810℃, with a V / III molar ratio of 2500 for the V group and III nitride sources.

[0079] S414. Repeat steps S411, S412, and S413 three times to form the first pre-quantum well modulation layer, and obtain different inverted cone pit structure opening diameter and depth distribution in the pre-quantum well modulation layer.

[0080] In the first repetition, during step S412, the In source is introduced for 80 seconds, followed by the Si source for 50 seconds; in the second repetition, during step S412, the In source is introduced for 40 seconds, followed by the Si source for 40 seconds; in the third repetition, during step S412, the In source is introduced for 35 seconds, followed by the Si source for 20 seconds.

[0081] S42. Growing a rear quantum well light-emitting layer 14 on the front quantum well modulation layer, comprising at least the following steps:

[0082] S421. An InGaN back quantum well layer with a thickness of 3 nm is grown at a temperature of 780℃, with a V / III molar ratio of 4000 for the V group and III nitride sources.

[0083] S422. A GaN post-quantum barrier layer with a thickness of 8 nm was grown at a temperature of 820℃, with a V / III molar ratio of 2500 for the V group and III nitride sources.

[0084] S423. Repeat steps S421 and S422 twice to complete the growth of the secondary quantum well light-emitting layer;

[0085] S5. On the nitride quantum well light-emitting layer, a p-type nitride layer with a thickness of 150 nm is grown at a temperature of 1015 °C and a pressure of 400 torr, as the p-type nitride layer 15.

[0086] The gallium nitride LED epitaxial structure provided in this embodiment, when fabricated into an (80μm*80μm) light-emitting device, has a maximum luminous efficiency of 45.7%.

[0087] Example 2

[0088] The preparation process of the gallium nitride LED epitaxial structure in this embodiment is largely the same as that in Example 1, except that: (1) Steps S411, S412, and S413 are repeated only once (i.e., repeated twice), wherein in step S412, the In source is introduced for 40s for the first time, and then the Si source is introduced for 25s; the In source is introduced for 5s for the second time, and then the Si source is introduced for 5s; (2) Steps S421 and S422 are grown once (i.e., repeated once).

[0089] In Example 2, the pre-quantum well light-emitting layer was grown twice, and the processing time of the In source and Si source was adjusted to match the post-quantum well which was grown only once. This method is suitable for light-emitting devices operating under low current. After fabricating a (60μm*60μm) light-emitting device, a high luminous efficiency of 40.2% can be achieved.

[0090] Example 3

[0091] The fabrication process of the gallium nitride LED epitaxial structure in this embodiment is largely the same as that in Example 1, except that: (1) Steps S411, S412, and S413 are repeated 6 times. In step S412, the In source is introduced for 120s for the first time, followed by the Si source for 120s; the In source is introduced for 100s for the second time, followed by the Si source for 105s; the In source is introduced for 85s for the third time, followed by the Si source for 90s; the In source is introduced for 65s for the fourth time, followed by the Si source for 60s; the In source is introduced for 45s for the fifth time, followed by the Si source for 30s; and the In source is introduced for 15s for the sixth time, followed by the Si source for 5s. (2) Steps S421 and S422 are grown 8 times (i.e., repeated 8 times).

[0092] In Example 2, the pre-quantum well light-emitting layer was grown 6 times, and the processing time of the In source and Si source was adjusted to match the post-quantum well, which was grown only 8 times. After fabricating a (100μm*100μm) light-emitting device, a high luminous efficiency of 46.8% can be achieved.

[0093] It should be noted that as the number of cycles in the post-quantum well increases, the number of cycles in the pre-quantum well generally needs to be increased accordingly. However, excessively long inlet times for the In and Si sources can cause roughness at the quantum well emissive layer interface, resulting in a decrease in the growth quality of the quantum well emissive layer. The processing time for the In and Si sources needs to be adjusted based on the specific thickness of the pre-quantum well emissive layer and the differences in thickness between the pre-quantum well emissive layer and the quantum well emissive layer. Since the processes of different companies and research units in the industry are different, specific process optimizations need to be made based on actual conditions.

[0094] Comparative Example 1

[0095] This comparative example is largely the same as Example 1, with the only difference being:

[0096] The difference from Example 1 is that the front quantum well uses conventional processes, that is, it does not use In or Si processing. After the epitaxial structure of the front quantum well is fabricated into an 80μm*80μm light-emitting device using the same chip process, its maximum luminous efficiency is 25.7%.

[0097] Based on the above embodiments and comparative examples, it is clear that the present invention, through the above process, forms inverted conical pits of different depths and opening diameters. After the growth of the p-type nitride layer, the inverted conical pit structure in the back quantum well light-emitting layer 14 is finally filled, forming a flat epitaxial surface. When holes in the p-type nitride of the epitaxial wafer are injected into the back quantum well light-emitting layer 14, the holes can be injected through the inverted conical pit structure within the cycle of the back quantum well light-emitting layer 14. Because inverted conical structures are formed in different cycles of the back quantum well light-emitting layer 14, the hole injection depth is increased, the uniformity of holes in the back quantum well light-emitting layer 14 is improved, and the brightness and luminous efficiency of the Micro-LED epitaxial wafer are improved.

[0098] It should be understood that the above embodiments are merely illustrative of the technical concept and features of the present invention, and are intended to enable those skilled in the art to understand the content of the present invention and implement it accordingly. They should not be construed as limiting the scope of protection of the present invention. All equivalent changes or modifications made in accordance with the spirit and essence of the present invention should be covered within the scope of protection of the present invention.

Claims

1. A semiconductor light emitting structure comprising an n-type nitride layer, a nitride quantum well light emitting layer, and a p-type nitride layer, characterized in that, The nitride quantum well light-emitting layer comprises a pre-quantum well modulation layer and a post-quantum well light-emitting layer, the pre-quantum well modulation layer is arranged between the n-type nitride layer and the post-quantum well light-emitting layer; And the pre-quantum well modulation layer is provided with a plurality of opening guide structures with different depths and / or opening diameters, the opening guide structures extend to the post-quantum well light-emitting layer to form a plurality of first inverted cone pit structures with different depths and / or opening diameters in the post-quantum well light-emitting layer; The opening guide structure comprises an opening unit and / or a guide unit, the opening unit is a second inverted cone pit structure, the starting point of the opening guide structure is in the pre-quantum well modulation layer, and the pre-quantum well modulation layer comprises periodically and cyclically grown pre-quantum well layers and pre-quantum barrier layers.

2. The semiconductor light emitting structure of claim 1, wherein, The cycle period of the pre-quantum well modulation layer is 2-6 times.

3. The semiconductor light emitting structure of claim 2, wherein, The vertex of the second inverted cone pit structure is located on the guide unit; The depths and / or opening diameters of the opening units formed in different cycle periods are different.

4. The semiconductor light emitting structure of claim 1, wherein, The post-quantum well light-emitting layer comprises periodically and cyclically grown post-quantum well layers and post-quantum barrier layers, and the cycle period is 1-8 times.

5. The semiconductor light emitting structure of claim 4, wherein, The depths and / or opening diameters of the first inverted cone pit structures formed in different cycle periods of the post-quantum well light-emitting layer are different.

6. The semiconductor light emitting structure of claim 5, wherein, Along the growth direction of the post-quantum well light-emitting layer, the opening diameters of the first inverted cone pit structures formed in different cycle periods of the post-quantum well light-emitting layer decrease in turn.

7. The semiconductor light emitting structure of claim 1, wherein, The opening diameter of the opening guide structure is 1-100 nm, and the opening diameter of the first inverted cone pit structure is 100-300 nm; And / or, the semiconductor light-emitting structure further comprises a nitride stress release layer arranged between the n-type nitride layer and the nitride quantum well light-emitting layer.

8. A method of manufacturing the semiconductor light emitting structure according to any one of claims 1 to 7, comprising the step of sequentially growing an n-type nitride layer, a nitride quantum well light emitting layer, and a p-type nitride layer on a substrate; characterized in that, The step of growing the nitride quantum well light-emitting layer comprises the steps of growing the pre-quantum well modulation layer and the post-quantum well light-emitting layer in turn; When the pre-quantum well modulation layer is grown, a plurality of opening guide structures with different depths and / or opening diameters are formed; When the post-quantum well light-emitting layer is grown, the plurality of opening guide structures with different depths and / or opening diameters extend into the post-quantum well light-emitting layer to form a plurality of first inverted cone pit structures with different depths and / or opening diameters.

9. The production method according to claim 8, characterized by, The step of growing the pre-quantum well modulation layer comprises periodically and cyclically growing pre-quantum well layers and pre-quantum barrier layers; When the pre-quantum well layer is grown and / or after the pre-quantum well layer is grown, the V / III molar ratio is adjusted to 100-500 at a temperature of 650-700 ℃, the In source is introduced for 5-120 s, then the Si source is introduced for 5-120 s, a guide unit is formed, the guide unit extends to form an opening unit, and at least the guide unit and the opening unit jointly constitute the opening guide structure; In different cycle periods, the introduction time of the In source and / or the Si source is different. 10.A Micro LED chip, characterized in that The semiconductor light-emitting structure of any one of claims 1-7.

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