Detection method for variable frequency drive and detection device thereof, variable frequency drive
By detecting the DC bus voltage sampling circuit of the frequency converter driver and calculating the voltage value by gradually increasing the duty cycle of the PWM signal, the abnormality of the sampling circuit can be determined, thus solving the problem of inaccurate DC bus voltage sampling and improving sampling accuracy and motor speed regulation reliability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- GREE ELECTRIC APPLIANCE INC OF ZHUHAI
- Filing Date
- 2022-07-14
- Publication Date
- 2026-04-17
AI Technical Summary
The accuracy of current DC bus voltage sampling is uncertain, which may cause damage to components in the frequency converter or abnormal motor speed regulation.
By acquiring the DC bus voltage value and the inverter output current value, the duty cycle of the PWM signal is gradually increased, the reference voltage value and the actual voltage value are calculated, and these voltage values are used to determine whether the DC bus voltage sampling circuit is abnormal.
This improves the accuracy of DC bus voltage sampling values, prevents device damage, and ensures normal motor speed regulation.
Smart Images

Figure CN115085613B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of air conditioning technology, and in particular to a detection method and device for a frequency converter driver, a frequency converter driver, an air conditioning device, and a computer-readable storage medium. Background Technology
[0002] Variable frequency drives (VFDs) enable stepless speed regulation of motors, offering advantages such as energy saving and quiet operation. Currently, VFDs invert DC bus voltage into AC voltage with variable amplitude and frequency. The accuracy of the DC bus voltage sampling value is crucial in VFDs. When the resistance value of the voltage divider resistor in the DC bus voltage sampling circuit deviates from the design value, it may lead to inaccurate bus voltage sampling. This can cause two problems: firstly, since the PFC (Power Factor Correction) boost function uses the DC bus voltage as feedback, the bus voltage may rise beyond the voltage tolerance of power devices, potentially damaging them; secondly, abnormal amplitude of the inverted AC voltage can lead to abnormal motor speed regulation and other issues. Therefore, the accuracy of the DC bus voltage sampling value is extremely important. Summary of the Invention
[0003] One technical problem addressed by this disclosure is the uncertainty in the accuracy of current DC bus voltage sampling.
[0004] According to one aspect of this disclosure, a detection method for a variable frequency drive is provided, the variable frequency drive including a DC bus and an inverter, the detection method comprising: acquiring the voltage value of the DC bus and the current value of a first phase current output by the inverter; gradually increasing the duty cycle of a first pulse width modulation (PWM) signal input to the inverter at predetermined intervals and predetermined steps to gradually increase the current value of the first phase current; when the current value of the first phase current increases to be greater than or equal to a first current threshold, calculating a first reference voltage value based on the current duty cycle of the first PWM signal and the voltage value of the DC bus, and calculating a first actual voltage value based on the current value of the first phase current; and determining whether the DC bus voltage sampling circuit of the variable frequency drive is abnormal using the first reference voltage value and the first actual voltage value.
[0005] In some embodiments, when the current value of the first phase current increases to be greater than or equal to the first current threshold and less than the second current threshold for the first time, the first reference voltage value is calculated based on the current duty cycle value of the first PWM signal and the voltage value of the DC bus, and the first actual voltage value is calculated based on the current value of the first phase current, wherein the second current threshold is greater than the first current threshold.
[0006] In some embodiments, the detection method further includes: when the current value of the first phase current increases to be greater than or equal to the second current threshold, calculating a second reference voltage value based on the current duty cycle value of the first PWM signal and the voltage value of the DC bus, and calculating a second actual voltage value based on the current value of the first phase current; wherein, determining whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal using the first reference voltage value and the first actual voltage value includes: determining whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal using the first reference voltage value, the first actual voltage value, the second reference voltage value, and the second actual voltage value.
[0007] In some embodiments, determining whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal using the first reference voltage value, the first actual voltage value, the second reference voltage value, and the second actual voltage value includes: calculating a first error value based on the first reference voltage value, the first actual voltage value, the second reference voltage value, and the second actual voltage value; determining that the DC bus voltage sampling circuit of the frequency converter driver is abnormal if the first error value is greater than a first error threshold; and determining that the DC bus voltage sampling circuit of the frequency converter driver is normal if the first error value is less than or equal to the first error threshold.
[0008] In some embodiments, the detection method further includes: while gradually increasing the duty cycle value of the first PWM signal, keeping the duty cycle values of the second PWM signal input to the inverter and the third PWM signal input to the inverter constant.
[0009] In some embodiments, the detection method further includes: during the process of acquiring the current value of the first phase current output by the inverter, acquiring the current value of the second phase current and the current value of the third phase current output by the inverter, wherein any two of the first phase current, the second phase current and the third phase current are 120° out of phase.
[0010] In some embodiments, the first reference voltage value is the reference voltage value between the first output terminal and the second output terminal of the inverter when the current value of the first phase current is first greater than or equal to the first current threshold and less than the second current threshold, wherein the first output terminal is used to output the first phase current and the second output terminal is used to output the second phase current;
[0011] The first reference voltage value V 12_typref The calculation formula is as follows
[0012]
[0013] Where T′1 is the duty cycle of the first PWM signal when the current value of the first phase current is first greater than or equal to the first current threshold and less than the second current threshold, T2 is the duty cycle of the second PWM signal, and V pn T represents the voltage value of the DC bus. p Let be the period value of the first PWM signal, wherein the period values of the first PWM signal, the second PWM signal, and the third PWM signal are all equal.
[0014] In some embodiments, the first actual voltage value is the actual voltage value between the first output terminal and the second output terminal of the inverter when the current value of the first phase current is first greater than or equal to the first current threshold and less than the second current threshold.
[0015] The first actual voltage value V 12_typreal The calculation formula is as follows
[0016]
[0017] Where I′1 is the current value of the first phase current when the current value of the first phase current is first greater than or equal to the first current threshold and less than the second current threshold, and R s The resistance value is the resistance value of the motor load winding that is electrically connected to the inverter.
[0018] In some embodiments, the second reference voltage value is the reference voltage value between the first output terminal and the second output terminal of the inverter when the current value of the first phase current is greater than or equal to the second current threshold, wherein the first output terminal is used to output the first phase current and the second output terminal is used to output the second phase current.
[0019] The second reference voltage value V 12 _ maxref The calculation formula is as follows
[0020]
[0021] Where T″1 is the duty cycle of the first PWM signal when the current value of the first phase current is greater than or equal to the second current threshold, T2 is the duty cycle of the second PWM signal, and V pn T represents the voltage value of the DC bus. p Let be the period value of the first PWM signal, wherein the period values of the first PWM signal, the second PWM signal, and the third PWM signal are all equal.
[0022] In some embodiments, the second actual voltage value is the actual voltage value between the first output terminal and the second output terminal of the inverter when the current value of the first phase current is greater than or equal to the second current threshold.
[0023] The second actual voltage value V 12_maxreal The calculation formula is as follows
[0024]
[0025] Where I″1 is the current value of the first phase current when the current value of the first phase current is greater than or equal to the second current threshold, and R s The resistance value is the resistance value of the motor load winding that is electrically connected to the inverter.
[0026] In some embodiments, the first error value V′ 12_err The calculation formula is as follows
[0027] V′ 12_err =|V 12_maxreal -V 12_typreal -V 12_maxref +V 12_typref |,
[0028] Among them, V 12_maxreal V is the second actual voltage value. 12_typreal V is the first actual voltage value. 12_maxref V is the second reference voltage value. 12_typref This is the first reference voltage value.
[0029] In some embodiments, the first error threshold V 12_errTH for
[0030] V 12_errTH =α*|V 12_maxref -V 12_typref |,
[0031] Where α is a predetermined coefficient, V 12_maxref V is the second reference voltage value. 12_typref This is the first reference voltage value.
[0032] In some embodiments, determining whether the DC bus voltage sampling circuit of the frequency converter is abnormal using the first reference voltage value and the first actual voltage value includes: calculating a second error value based on the first reference voltage value and the first actual voltage value; determining that the DC bus voltage sampling circuit of the frequency converter is abnormal when the second error value is greater than a second error threshold; and determining that the DC bus voltage sampling circuit of the frequency converter is normal when the second error value is less than or equal to the second error threshold.
[0033] In some embodiments, the second error value V″ 12_err The calculation formula is as follows
[0034] V″ 12_err =|V 12_typreal -V 12_typref |,
[0035] Among them, V 12_typreal V is the first actual voltage value. 12_typref This is the first reference voltage value.
[0036] In some embodiments, the detection method further includes: charging a capacitor disposed on the DC bus before acquiring the voltage value of the DC bus and the current value of the first phase current, and initializing the duty cycle value of the first PWM signal, the duty cycle value of the second PWM signal input to the inverter, and the duty cycle value of the third PWM signal input to the inverter.
[0037] In some embodiments, the detection method further includes: determining that the DC bus voltage sampling circuit of the frequency converter is abnormal when the duty cycle of the first PWM signal of the inverter increases to be greater than or equal to the period value of the first PWM signal.
[0038] According to another aspect of this disclosure, a detection device for a variable frequency drive is provided, the variable frequency drive including a DC bus and an inverter, the detection device comprising: an acquisition unit for acquiring the voltage value of the DC bus and the current value of a first phase current output by the inverter; a signal increment unit for gradually increasing the duty cycle value of a first PWM signal input to the inverter according to a predetermined interval time and a predetermined step size to gradually increase the current value of the first phase current; a calculation unit for calculating a first reference voltage value based on the current duty cycle value of the first PWM signal and the voltage value of the DC bus, and calculating a first actual voltage value based on the current value of the first phase current when the current value of the first phase current increases to be greater than or equal to a first current threshold; and a judgment unit for judging whether the DC bus voltage sampling circuit of the variable frequency drive is abnormal using the first reference voltage value and the first actual voltage value.
[0039] According to another aspect of this disclosure, a detection device for a frequency converter drive is provided, comprising: a memory; and a processor coupled to the memory, the processor being configured to perform the method as described above based on instructions stored in the memory.
[0040] According to another aspect of this disclosure, a frequency converter is provided, comprising: the detection device as described above.
[0041] In some embodiments, the frequency converter driver further includes: a rectifier, a DC bus voltage boosting circuit, and an inverter; the rectifier is electrically connected to the DC bus voltage boosting circuit, the DC bus voltage boosting circuit is electrically connected to the inverter, and the detection device is electrically connected to the DC bus voltage boosting circuit and the inverter respectively.
[0042] In some embodiments, the DC bus voltage boosting circuit includes: a DC bus, including a first wire electrically connected to a first terminal of the rectifier and a second wire electrically connected to a second terminal of the rectifier; an inductor disposed on the first wire; a switching device disposed between the first wire and the second wire, wherein the control terminal of the switching device is electrically connected to the detection device; a diode disposed on the first wire and connected in series with the inductor; and a capacitor disposed between the first wire and the second wire.
[0043] In some embodiments, the frequency converter driver further includes a DC bus voltage sampling circuit disposed between the first conductor and the second conductor, and electrically connected to the detection device.
[0044] In some embodiments, the DC bus voltage sampling circuit includes: a first resistor, a first end of which is electrically connected to the second wire, and a second end of which is electrically connected to the detection device; and a second resistor, a first end of which is electrically connected to the second end of the first resistor, and a second end of which is electrically connected to the first wire.
[0045] In some embodiments, the detection device is a drive main chip; the inverter is a smart power module.
[0046] According to another aspect of this disclosure, an air conditioning device is provided, comprising: a variable frequency drive as described above.
[0047] According to another aspect of this disclosure, a computer-readable storage medium is provided that stores computer program instructions thereon, which, when executed by a processor, implement the method described above.
[0048] The above detection method can detect whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal, thereby improving the accuracy of the DC bus voltage sampling value.
[0049] Other features and advantages of this disclosure will become clear from the following detailed description of exemplary embodiments with reference to the accompanying drawings. Attached Figure Description
[0050] The accompanying drawings, which form part of this specification, illustrate embodiments of this disclosure and, together with the specification, serve to explain the principles of this disclosure.
[0051] This disclosure will become clearer with reference to the accompanying drawings and the following detailed description, wherein:
[0052] Figure 1 This is a schematic diagram illustrating the circuit connection of a frequency converter driver according to some embodiments of the present disclosure;
[0053] Figure 2 This is a flowchart illustrating a detection method for a frequency converter drive according to some embodiments of the present disclosure;
[0054] Figure 3 This is a flowchart illustrating a detection method for a frequency converter drive according to some other embodiments of the present disclosure;
[0055] Figure 4A This is a schematic diagram illustrating the voltage vector PWM control signal generated by the inverter driver according to some embodiments of the present disclosure and the corresponding motor state;
[0056] Figure 4BThis is a schematic diagram illustrating the voltage vector PWM control signal generated by the inverter driver according to other embodiments of the present disclosure and the corresponding motor state;
[0057] Figure 4C This is a schematic diagram illustrating the voltage vector PWM control signal generated by the inverter driver according to other embodiments of the present disclosure and the corresponding motor state;
[0058] Figure 5 This is a flowchart illustrating a detection method for a frequency converter drive according to some other embodiments of the present disclosure;
[0059] Figure 6 This is a structural block diagram illustrating a detection device for a frequency converter driver according to some embodiments of the present disclosure;
[0060] Figure 7 This is a structural block diagram illustrating a detection device for a frequency converter driver according to other embodiments of the present disclosure;
[0061] Figure 8 This is a structural block diagram illustrating a detection device for a frequency converter driver according to other embodiments of the present disclosure;
[0062] Figure 9 This is a schematic diagram illustrating the circuit connection of a frequency converter driver according to some embodiments of the present disclosure. Detailed Implementation
[0063] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values of the components and steps set forth in these embodiments do not limit the scope of the present disclosure.
[0064] At the same time, it should be understood that, for ease of description, the dimensions of the various parts shown in the accompanying drawings are not drawn according to actual scale.
[0065] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit this disclosure or its application or use.
[0066] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.
[0067] In all examples shown and discussed herein, any specific values should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.
[0068] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.
[0069] Figure 1 This is a schematic diagram illustrating the circuit connection of a frequency converter driver according to some embodiments of the present disclosure.
[0070] like Figure 1 As shown, the frequency converter drive circuit includes a main drive chip 110, a rectifier 120, a DC bus voltage boost circuit 130, and an inverter 140. For example, the inverter 140 is an IPM (Intelligent Power Module). The rectifier 120 is electrically connected to the DC bus voltage boost circuit 130, the DC bus voltage boost circuit 130 is electrically connected to the inverter 140, and the main drive chip 110 is electrically connected to both the DC bus voltage boost circuit 130 and the inverter 140.
[0071] like Figure 1 As shown, rectifier 120 has a live wire input port L and a neutral wire input port N. Rectifier 120 also includes a first terminal 121 and a second terminal 122, where the first terminal 121 is a first output port and the second terminal 122 is a second output port. Rectifier 120 can employ a known circuit structure. For example, the rectifier can consist of four diodes, such as... Figure 1 As shown.
[0072] like Figure 1 As shown, the DC bus voltage boosting circuit 130 includes a DC bus. The DC bus includes a first conductor 1131 electrically connected to a first terminal 121 of the rectifier 120 and a second conductor 1132 electrically connected to a second terminal 122 of the rectifier 120. For example, the second conductor 1132 is electrically connected to a ground terminal.
[0073] The DC bus voltage boost circuit 130 also includes an inductor L1, a switching device 131, a diode D, and a capacitor C. The inductor L1 is disposed on the first conductor 1131. For example, the inductor L1 is a PFC inductor. The switching device 131 is disposed between the first conductor 1131 and the second conductor 1132, and the control terminal of the switching device 131 is electrically connected to the drive main chip 110. For example, the switching device 131 is an IGBT (Insulated Gate Bipolar Transistor). For example, the drive main chip 110 inputs a PFC control signal to the control terminal of the switching device 131. The diode D is disposed on the first conductor 1131 and connected in series with the inductor L1. This diode is a unidirectional diode. The anode of the diode D is electrically connected to the inductor L1, and the cathode of the diode D is electrically connected to the inverter 140. The capacitor C is disposed between the first conductor 1131 and the second conductor 1132. This capacitor C is the DC bus capacitor. Figure 1 The diagram also shows the positive terminal P' and the negative terminal N' of the DC bus voltage.
[0074] Inverter 140 has three output terminals that can output three-phase current. The phase difference between any two phases of the three-phase current is 120°. These three output terminals are a first output terminal, a second output terminal, and a third output terminal. The first output terminal outputs the first-phase current, the second output terminal outputs the second-phase current, and the third output terminal outputs the third-phase current. The three-phase current is output to motor 101. For example, motor 101 is a PMSM (Permanent Magnet Synchronous Motor). Motor 101 may have a U-phase terminal, a V-phase terminal, and a W-phase terminal. In some embodiments, the first output terminal of the inverter can be the U-phase terminal, the second output terminal can be the V-phase terminal, and the third output terminal can be the W-phase terminal.
[0075] In some embodiments, the frequency converter driver 100 further includes a first current sensor 151, a second current sensor 152, and a third current sensor 153. The first current sensor 151 is electrically connected to the first output terminal of the inverter 140. The first current sensor 151 is configured to detect the current value of the first phase current and transmit it to the drive main chip 110. The second current sensor 152 is electrically connected to the second output terminal of the inverter 140. The second current sensor 152 is configured to detect the current value of the second phase current and transmit it to the drive main chip 110. The third current sensor 153 is electrically connected to the third output terminal of the inverter 140. The third current sensor 153 is configured to detect the current value of the third phase current and transmit it to the drive main chip 110. For example, the first phase current is the sampled value I of the motor U-phase winding current. u The second phase current is the sampled value I of the motor's V-phase winding current.v The third phase current is the sampled value I of the motor's W-phase winding current. w .
[0076] The main drive chip 110 inputs PWM (Pulse Width Modulation) control signals, such as the first PWM signal, the second PWM signal, and the third PWM signal, to the inverter 140.
[0077] like Figure 1 As shown, the frequency converter driver 100 may further include a DC bus voltage sampling circuit 160. The DC bus voltage sampling circuit 160 is disposed between the first wire 1131 and the second wire 1132, and is electrically connected to the main driver chip 110.
[0078] In some embodiments, such as Figure 1 As shown, the DC bus voltage sampling circuit 110 includes a first resistor R1 and a second resistor R2. The first end of the first resistor R1 is electrically connected to the second wire 1132, and the second end of the first resistor R1 is electrically connected to the driver chip 110. The first end of the second resistor R2 is electrically connected to the second end of the first resistor R1, and the second end of the second resistor R2 is electrically connected to the first wire 1131. That is, the first resistor R1 and the second resistor R2 are connected in series between the first wire 1131 and the second wire 1132. The first resistor R1 serves as the sampling resistor of the DC bus voltage sampling circuit 160, and the second resistor R2 serves as the voltage divider resistor of the DC bus voltage sampling circuit 160.
[0079] The inventors of this disclosure have discovered that the accuracy of current DC bus voltage sampling is uncertain.
[0080] In view of this, embodiments of the present disclosure provide a detection method for a frequency converter driver to detect whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal, thereby improving the accuracy of the DC bus voltage sampling value.
[0081] It should be noted that the physical quantities involved in the different calculation formulas described below in this disclosure may include voltage, current, or resistance values. For example, the unit of voltage is volt (V), the unit of current is ampere (A), and the unit of resistance is ohm (Ω). Of course, those skilled in the art will understand that the units of voltage, current, and resistance are merely exemplary and can be set or converted according to actual needs.
[0082] Figure 2 This is a flowchart illustrating a detection method for a variable frequency drive according to some embodiments of the present disclosure. The variable frequency drive includes a DC bus and an inverter. Figure 2As shown, the detection method includes steps S202 to S208. For example, this method can be executed by the driver main chip.
[0083] In step S202, the voltage value of the DC bus and the current value of the first phase current output by the inverter are obtained.
[0084] like Figure 1 As shown, in the frequency converter driver, the DC bus voltage sampling circuit consists of a first resistor R1 and a second resistor R2 connected in series. The main driver chip can sample the voltage value V of the first resistor R1 in real time. R1 Based on the principle of voltage division in series resistors, the voltage value V of the DC bus can be calculated. pn for
[0085]
[0086] In this context, the resistance values of the first resistor R1 and the second resistor R2 are both known quantities. The voltage value V of the DC bus... pn This refers to the voltage between the positive terminal P' and the negative terminal N' of the DC bus voltage. In this embodiment, the DC bus voltage can be obtained using two series resistors. This method is convenient for obtaining the DC bus voltage and can prevent damage to the driver chip from potentially excessive DC bus voltage.
[0087] In embodiments of this disclosure, the first phase current can be a U-phase current, a V-phase current, or a W-phase current.
[0088] In some embodiments, during the acquisition of the first-phase current value output by the inverter, the current values of the second-phase current and the third-phase current output by the inverter are also acquired, wherein the phase difference between any two of the first-phase, second-phase, and third-phase currents is 120°. For example, the first-phase current is the U-phase current, the second-phase current is the V-phase current, and the third-phase current is the W-phase current. Another example: the first-phase current is the V-phase current, the second-phase current is the W-phase current, and the third-phase current is the U-phase current. Yet another example: the first-phase current is the W-phase current, the second-phase current is the U-phase current, and the third-phase current is the V-phase current. This achieves the acquisition of three-phase currents, facilitating subsequent steps or data calculations.
[0089] In step S204, the duty cycle of the first PWM signal input to the inverter is gradually increased according to a predetermined interval and a predetermined step size to gradually increase the current value of the first phase current.
[0090] In some embodiments, while gradually increasing the duty cycle of the first PWM signal, the duty cycle of the second PWM signal input to the inverter and the duty cycle of the third PWM signal input to the inverter are kept constant.
[0091] Figures 4A to 4C This is a schematic diagram illustrating the voltage vector PWM control signal generated by the inverter driver according to some embodiments of the present disclosure and the corresponding motor state.
[0092] For example, the inverter is an IPM module, T u To control the duty cycle of the first PWM signal of the upper arm of the IPM module, T v To control the duty cycle of the second PWM signal of the upper arm of the IPM module, T w To control the duty cycle of the third PWM signal on the upper arm of the IPM module. Here, the period values of the first PWM control signal, the second PWM control signal, and the third PWM control signal are all equal, and are all the period value T of the PWM control signal. p .
[0093] like Figures 4A to 4C As shown, among the electrical parameters of the motor, the resistance value R of the motor load winding is... S The basic structure remains unchanged. When the voltage vector is injected at an electrical angle of 0°, 120°, or 240°, the three-phase winding resistance follows the following... Figures 4A to 4C The connection is as shown, that is, the resistance values R of the two windings are... S After being connected in parallel, the resistance value R of the other winding is... S When connected in series, the total resistance is Figures 4A to 4C The predetermined step size ΔT, i.e. the step size by which the duty cycle of the PWM signal increases, is also shown. Figure 4A The voltage value V between the U and V terminals of the motor is also shown. uv , Figure 4B The voltage value V between the V and W terminals of the motor is also shown. vw , Figure 4C The voltage value V between terminals W and U of the motor is also shown. wu .
[0094] For example, such as Figure 4A As shown, the first phase current is designated as the U-phase current, the second phase current as the V-phase current, and the third phase current as the W-phase current. A voltage vector is injected at the electrical angle of 0°, and the U-phase current gradually increases according to a predetermined interval and a predetermined step size.
[0095] For example, such as Figure 4B As shown, the first phase current is designated as phase V, the second phase current as phase W, and the third phase current as phase U. A voltage vector is injected at an electrical angle of 120°, and the phase V current gradually increases according to a predetermined interval and a predetermined step size.
[0096] For example, such as Figure 4CAs shown, the first phase current is designated as the W-phase current, the second phase current as the U-phase current, and the third phase current as the V-phase current. A voltage vector is injected at an electrical angle of 240°, and the W-phase current gradually increases according to a predetermined interval and a predetermined step size.
[0097] It should be noted that the aforementioned predetermined interval time and predetermined step size can be set according to actual circumstances or needs. The scope of this disclosure is not limited to the specific values of the aforementioned predetermined interval time and predetermined step size.
[0098] In the above embodiments, voltage vectors can be injected at electrical angles of 0°, 120°, or 240°, and correspondingly, the currents of different phases are gradually increased according to predetermined intervals and predetermined step sizes. This facilitates the determination of whether the DC bus voltage sampling circuit is abnormal when different phase currents are subsequently obtained, thereby making the anomaly detection of the sampling circuit more precise.
[0099] Back Figure 2 In step S206, when the current value of the first phase current increases to be greater than or equal to the first current threshold, the first reference voltage value is calculated based on the current duty cycle value of the first PWM signal and the voltage value of the DC bus, and the first actual voltage value is calculated based on the current value of the first phase current.
[0100] In step S208, the DC bus voltage sampling circuit of the frequency converter driver is used to determine whether it is abnormal by using the first reference voltage value and the first actual voltage value.
[0101] This provides a detection method for a frequency converter driver according to some embodiments of the present disclosure. The frequency converter driver includes a DC bus and an inverter. The detection method includes: acquiring the voltage value of the DC bus and the current value of the first phase current output by the inverter; gradually increasing the duty cycle of a first pulse width modulation (PWM) signal input to the inverter at predetermined intervals and predetermined steps to gradually increase the current value of the first phase current; when the current value of the first phase current increases to be greater than or equal to a first current threshold, calculating a first reference voltage value based on the current duty cycle of the first PWM signal and the voltage value of the DC bus, and calculating a first actual voltage value based on the current current value of the first phase current; and determining whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal using the first reference voltage value and the first actual voltage value. This method can detect whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal, thereby improving the accuracy of the DC bus voltage sampling value. Since this method can detect abnormal phenomena in the DC bus voltage sampling circuit, it can improve the control reliability of the frequency converter driver.
[0102] In some embodiments, when the current value of the first phase current increases to be greater than or equal to the first current threshold and less than the second current threshold for the first time, a first reference voltage value is calculated based on the current duty cycle value of the first PWM signal and the voltage value of the DC bus, and a first actual voltage value is calculated based on the current value of the first phase current, wherein the second current threshold is greater than the first current threshold.
[0103] In some embodiments, the detection method further includes: when the current value of the first phase current increases to be greater than or equal to the second current threshold, calculating a second reference voltage value based on the current duty cycle value of the first PWM signal and the voltage value of the DC bus, and calculating a second actual voltage value based on the current value of the first phase current.
[0104] In some embodiments, determining whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal by using a first reference voltage value and a first actual voltage value includes: determining whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal by using a first reference voltage value, a first actual voltage value, a second reference voltage value, and a second actual voltage value.
[0105] In the above embodiments, by calculating the first reference voltage value, the first actual voltage value, the second reference voltage value, and the second actual voltage value, these voltage values are used to determine whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal. The following is in conjunction with... Figure 3 The specific process of such an embodiment will be described in detail.
[0106] Figure 3 This is a flowchart illustrating a detection method for a frequency converter drive according to other embodiments of the present disclosure. For example... Figure 3 As shown, the detection method includes steps S302 to S310.
[0107] In step S302, the voltage value of the DC bus and the current value of the first phase current output by the inverter are obtained.
[0108] In step S304, the duty cycle of the first PWM signal input to the inverter is gradually increased according to a predetermined interval time and a predetermined step size to gradually increase the current value of the first phase current.
[0109] In some embodiments, while gradually increasing the duty cycle of the first PWM signal, the duty cycle of the second PWM signal and the duty cycle of the third PWM signal input to the inverter are kept constant.
[0110] In step S306, when the current value of the first phase current increases to a point where it is greater than or equal to a first current threshold and less than a second current threshold, a first reference voltage value is calculated based on the current duty cycle of the first PWM signal and the DC bus voltage value, and a first actual voltage value is calculated based on the current value of the first phase current, wherein the second current threshold is greater than the first current threshold. Here, the first reference voltage value and the first actual voltage value are the reference voltage value and the actual voltage value of the first detection stage.
[0111] Here, the first current threshold and the second current threshold can be set according to actual needs, and the scope of this disclosure is not limited to the specific values of the first current threshold and the second current threshold.
[0112] Since the current value of the first phase gradually increases, we choose to consider the case where the current value of the first phase increases to the point where it is first greater than or equal to the first current threshold and less than the second current threshold, rather than other cases where it is greater than or equal to the first current threshold and less than the second current threshold. This ensures that the first reference voltage value and the first actual voltage value are the first reference voltage value and the first actual voltage value after the first phase current reaches the rated current, which is beneficial for subsequent calculations and implementation.
[0113] In some embodiments, the first reference voltage value is the reference voltage value between the first output terminal and the second output terminal of the inverter when the current value of the first phase current is greater than or equal to the first current threshold and less than the second current threshold for the first time, wherein the first output terminal is used to output the first phase current and the second output terminal is used to output the second phase current.
[0114] First reference voltage value V 12_typref The calculation formula is as follows
[0115]
[0116] Where T′1 is the duty cycle of the first PWM signal when the current value of the first phase current is first greater than or equal to the first current threshold and less than the second current threshold, T2 is the duty cycle of the second PWM signal, and V pn T is the voltage value of the DC bus. p Let be the period value of the first PWM signal, wherein the period values of the first PWM signal, the second PWM signal, and the third PWM signal are all equal. The above relationship (2) can be derived based on the known voltage volt-second balance principle. Using the above calculation relationship, the first reference voltage value can be easily calculated, which facilitates the subsequent calculation of the first error value.
[0117] For example, if the first phase current is U-phase current and the second phase current is V-phase current, then the calculation formula (2) is:
[0118]
[0119] Among them, T′ u T is the duty cycle value of the current first PWM signal when the current value of phase U is first greater than or equal to the first current threshold and less than the second current threshold. v This represents the duty cycle value of the second PWM signal.
[0120] In some embodiments, the first actual voltage value is the actual voltage value between the first output terminal and the second output terminal of the inverter when the current value of the first phase current is first greater than or equal to the first current threshold and less than the second current threshold.
[0121] First actual voltage value V 12_typreal The calculation formula is as follows
[0122]
[0123] Where I′1 is the current value of the first phase current when the current value of the first phase current is first greater than or equal to the first current threshold and less than the second current threshold, and R s This represents the resistance value of the motor load winding electrically connected to the inverter. The above calculation formula allows for the convenient calculation of the first actual voltage value, facilitating the subsequent calculation of the first error value.
[0124] For example, if the first phase current is the U-phase current, the first output terminal of the inverter corresponds to the U-terminal of the motor, and the second output terminal of the inverter corresponds to the V-terminal of the motor, then the calculation formula (4) is:
[0125]
[0126] Among them, I′ u The value of the current in phase U is the value of the current in phase U when the current value of phase U is first greater than or equal to the first current threshold and less than the second current threshold.
[0127] In step S308, when the current value of the first phase current increases to be greater than or equal to the second current threshold, a second reference voltage value is calculated based on the current duty cycle of the first PWM signal and the DC bus voltage value, and a second actual voltage value is calculated based on the current value of the first phase current. Here, the second reference voltage value and the second actual voltage value are the reference voltage value and the actual voltage value of the second detection stage. For example, the case where the current value of the first phase current increases to be greater than or equal to the second current threshold for the first time can be taken.
[0128] In some embodiments, the second reference voltage value is the reference voltage value between the first output terminal and the second output terminal of the inverter when the current value of the first phase current (e.g., initially) is greater than or equal to the second current threshold, wherein the first output terminal is used to output the first phase current and the second output terminal is used to output the second phase current.
[0129] Second reference voltage value V 12_maxref The calculation formula is as follows
[0130]
[0131] Where T″1 is the duty cycle of the first PWM signal when the current value of the first phase current (e.g., initially) is greater than or equal to the second current threshold, T2 is the duty cycle of the second PWM signal, and V pn T is the voltage value of the DC bus. p Let be the period value of the first PWM signal, where the period values of the first PWM signal, the second PWM signal, and the third PWM signal are all equal. Using the above calculation formula, the second reference voltage value can be easily calculated, facilitating the subsequent calculation of the first error value.
[0132] For example, if the first phase current is U-phase current and the second phase current is V-phase current, then the calculation formula (6) is:
[0133]
[0134] Among them, T″ u T is the duty cycle of the current first PWM signal when the current value of phase U (e.g., initially) is greater than or equal to the second current threshold. v This represents the duty cycle value of the second PWM signal.
[0135] In some embodiments, the second actual voltage value is the actual voltage value between the first output terminal and the second output terminal of the inverter when the current value of the first phase current (e.g., initially) is greater than or equal to the second current threshold.
[0136] Second actual voltage value V 12_maxreal The calculation formula is as follows
[0137]
[0138] Where I″1 is the current value of the first phase current when the current value of the first phase current (e.g., initially) is greater than or equal to the second current threshold, and R s This represents the resistance value of the motor load winding electrically connected to the inverter. The above calculation formula allows for the convenient calculation of the second actual voltage value, facilitating the subsequent calculation of the first error value.
[0139] For example, if the first phase current is the U-phase current, the first output terminal of the inverter corresponds to the U-terminal of the motor, and the second output terminal of the inverter corresponds to the V-terminal of the motor, then the calculation formula (8) is:
[0140]
[0141] Among them, I″ u The current value of the current phase U when the current value of the current phase U (e.g., for the first time) is greater than or equal to the second current threshold.
[0142] In step S310, the DC bus voltage sampling circuit of the frequency converter driver is used to determine whether it is abnormal by using the first reference voltage value, the first actual voltage value, the second reference voltage value, and the second actual voltage value.
[0143] In some embodiments, step S310 includes: calculating a first error value based on a first reference voltage value, a first actual voltage value, a second reference voltage value, and a second actual voltage value; determining that the DC bus voltage sampling circuit of the frequency converter driver is abnormal if the first error value is greater than a first error threshold; and determining that the DC bus voltage sampling circuit of the frequency converter driver is normal if the first error value is less than or equal to the first error threshold. This achieves the determination of whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal.
[0144] In some embodiments, the first error value V′ 12_err The calculation formula is as follows
[0145] V′ 12_err =|V 12_maxreal -V 12_typreal -V 12_maxref +V 12_typref |, (10)
[0146] Among them, V 12_maxreal The second actual voltage value, V 12_typreal The first actual voltage value, V 12_maxref The second reference voltage value, V 12_typref This is the first reference voltage value.
[0147] Here, the first error value is actually |(V 12_maxreal -V 12_maxref )-(V 12_typreal -V 12_typrefHere, the difference between the actual voltage value and the reference voltage value can be called the initial error value. The first error value is the absolute value of the difference between the initial error values of the two stages. By calculating the difference between the initial error values of the two stages, some factors affecting the initial error value can be eliminated as much as possible, so that the first error value can more accurately reflect the accuracy of the sampling value of the DC bus voltage sampling circuit, which is conducive to accurately judging whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal.
[0148] For example, when the first phase current is U-phase current and the second phase current is V-phase current, the above calculation formula (10) is:
[0149] V′ uv_err =|V uv_maxreal -V uv_typreal -V uv_maxref +V uv_typref |, (11)
[0150] Among them, V uv_maxreal The second actual voltage value, V uv_typreal The first actual voltage value, V uv_maxref The second reference voltage value, V uv_typref This is the first reference voltage value.
[0151] The aforementioned first error threshold can be set according to actual needs or circumstances. For example, the first error threshold V 12_errTH for
[0152] V 12_errTH =α*|V 12_maxref -V 12_typref |, (12)
[0153] Where α is a predetermined coefficient, V 12_maxref V is the second reference voltage value. 12_typref Let α be the first reference voltage value. Here, α can be set according to actual needs or circumstances. For example, 0 < α < 1. For example, α is... Of course, the scope of this disclosure is not limited to the specific value of α.
[0154] For example, when the first phase current is U-phase current and the second phase current is V-phase current, the above calculation formula (12) is:
[0155] V uv_errTH =α*|V uv_maxref -V uv_typref |。(13)
[0156] In other embodiments, the first error threshold can be a detection error threshold for the input electrical power of the air conditioning unit, etc. Such data can be directly obtained from the parameters of the air conditioning unit without calculation, which is convenient for implementation.
[0157] This provides a detection method for a frequency converter driver according to other embodiments of the present disclosure. In this method, a first reference voltage value and a first actual voltage value are obtained in a first detection stage, and a second reference voltage value and a second actual voltage value are obtained in a second detection stage. The first reference voltage value, the first actual voltage value, the second reference voltage value, and the second actual voltage value are used to determine whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal. In this method, by calculating the difference between the initial error values of the two stages, certain factors affecting the initial error value can be eliminated as much as possible, thereby making the first error value more accurately reflect the accuracy of the sampling value of the DC bus voltage sampling circuit, which is beneficial for accurately determining whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal. This can detect whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal, and solve the problem of inaccurate DC bus voltage values caused by sampling circuit abnormalities as much as possible, thereby improving the accuracy of the DC bus voltage sampling value. Since this method can detect abnormal phenomena in the DC bus voltage sampling circuit, it can improve the control reliability of the frequency converter driver.
[0158] In other embodiments, determining whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal using the first reference voltage value and the first actual voltage value includes: calculating a second error value based on the first reference voltage value and the first actual voltage value; determining that the DC bus voltage sampling circuit of the frequency converter driver is abnormal if the second error value is greater than a second error threshold; and determining that the DC bus voltage sampling circuit of the frequency converter driver is normal if the second error value is less than or equal to the second error threshold.
[0159] In other words, in this other embodiment, a method is used to calculate a second error value based on a first reference voltage value and a first actual voltage value, and then compare the second error value with a second error threshold to determine whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal. This method requires less data to be calculated, and is therefore relatively simple to implement.
[0160] In other embodiments, the second error value V″ 12_err The calculation formula is as follows
[0161] V″ 12_err =|V 12_typreal -V 12_typref |, (14)
[0162] Among them, V 12_typreal The first actual voltage value, V12_typref This is the first reference voltage value.
[0163] For example, when the first phase current is U-phase current and the second phase current is V-phase current, the above calculation formula (14) is:
[0164] V″ uv_err =|V uv_typreal -V uv_typref |。(15)
[0165] It should be noted that the second error threshold can be set according to actual needs or actual circumstances, and the scope of this disclosure is not limited to the specific value of the second error threshold.
[0166] In other embodiments, the detection method further includes: charging a capacitor mounted on the DC bus and initializing the duty cycle values of the first PWM signal, the second PWM signal input to the inverter, and the third PWM signal input to the inverter before acquiring the voltage value of the DC bus and the current value of the first phase current. This facilitates the implementation of subsequent steps.
[0167] In some embodiments, the detection method further includes determining that the DC bus voltage sampling circuit of the inverter driver is abnormal when the duty cycle of the first PWM signal of the inverter increases to be greater than or equal to the period value of the first PWM signal. That is, under normal circumstances, the duty cycle of the first PWM signal is less than the period value of the first PWM signal. If the duty cycle of the first PWM signal increases to be greater than or equal to the period value of the first PWM signal, it indicates that the DC bus voltage sampling circuit of the inverter driver has malfunctioned. This also achieves the detection of whether the DC bus voltage sampling circuit of the inverter driver is abnormal.
[0168] Figure 5 This is a flowchart illustrating a detection method for a frequency converter drive according to other embodiments of the present disclosure. Figure 5 The method described herein is based on the example of the first phase current being U-phase current, the second phase current being V-phase current, and the third phase current being W-phase current. The method includes steps S501 to S520. Figure 5 The method shown is implemented by injecting a voltage vector at an electrical angle of 0°.
[0169] In step S501, power-on initialization is performed.
[0170] In step S502, it is determined whether a power-on command has been received. If so, the process proceeds to step S503; otherwise, the process returns to S502 to continue determining whether a power-on command has been received.
[0171] In step S503, it is determined whether a fault exists. If so, the process returns to step S502; otherwise, the process proceeds to step S504.
[0172] In step S504, it is determined whether the self-test of the DC bus voltage sampling circuit has been completed. If yes, the process proceeds to step S505; otherwise, the process proceeds to step S506.
[0173] In step S505, the self-test ends and the system enters the normal logic operation state.
[0174] In step S506, the capacitor on the DC bus is charged, and the duty cycle T of the PWM control signal is adjusted. u T v and T w Perform initialization. For example, initialize T. u T v and T w Take values from 0 to T respectively p Values between / 2. For example, T u T v and T w T respectively p / 2. At this point, at the initial time, I u I v I w The value is 0.
[0175] In step S507, it is determined whether charging of the capacitor is complete. If yes, the process proceeds to step S508; otherwise, the process returns to step S506 to continue charging the capacitor.
[0176] In step S508, according to duty cycle T u T v T w Inject a 0° voltage vector and monitor the winding phase current I in real time. u I v I w and DC bus voltage V pn .
[0177] In step S509, determine the first phase current I. u Is it greater than or equal to the second current threshold I? maxTH If yes, the process proceeds to step S516; otherwise, the process proceeds to step S510.
[0178] Second current threshold I maxTH For the second stage of self-testing, the winding current threshold is used for judgment. For example, the second current threshold I. maxTH The range is 1.1*I typ ≤I maxTH ≤2*I typFor example, the second current threshold I maxTH It can be set to 1.5*I typ I typ For the first stage of self-testing, the motor's U-phase winding current value, i.e., I... typ The self-test determines the current value of the motor's U-phase winding when the first stage is completed.
[0179] In step S510, the first phase current I is determined. u Is it greater than or equal to the first current threshold I? typTH If yes, the process proceeds to step S511; otherwise, the process proceeds to step S513.
[0180] First current threshold I typTH For the first stage of self-testing, the winding current judgment threshold is set to the rated operating current value of the motor load. typTH It can be determined based on the rated operating current of the motor connected to the frequency converter driver, which is determined by the power of the outdoor unit motor.
[0181] In step S511, it is determined whether the first stage of self-test has been completed. If yes, the process proceeds to step S513; otherwise, the process proceeds to step S512. For example, when I... u Reaching I typTH At that time, the first stage of self-inspection is completed.
[0182] In step S512, let T typ =T u I typ =I u Calculate the first reference voltage value V uv_typref and the first actual voltage value V uv_typreal .
[0183] I typ The first stage of self-testing is determined by the motor's U-phase winding current value. typ The duty cycle value of the PWM signal of the motor's U phase is used for the first stage of self-testing.
[0184] First reference voltage value V uv_typref For the first stage of self-testing, the reference voltage value between the U and V terminals of the motor (i.e., the first reference voltage value between the first and second output terminals of the inverter) is calculated using the following formula:
[0185]
[0186] Here, T typ That is, T′ as mentioned above. u That is, T′1.
[0187] First actual voltage value V uv_typreaFor the first stage of self-testing, the actual voltage value between the U and V terminals of the motor (i.e., the first actual voltage value between the first and second output terminals of the inverter) is calculated using the following formula:
[0188]
[0189] Here, I typ That is, the I′ mentioned above. u That is, I′1.
[0190] In step S513, per T s The interval time, according to T u =T u +ΔT method, gradually increase T u Value. T s For T u The time interval by which the duty cycle value increases by a step size is the predetermined interval. ΔT is the predetermined step size. For example, T s The range is from 1 ms to 5 ms. For example, ΔT ranges from 5 to 20.
[0191] In step S514, it is determined whether Tu is greater than or equal to the period value T of the PWM signal. p If yes, the process proceeds to step S515; otherwise, the process returns to step S508.
[0192] In step S515, it is determined that the DC bus voltage sampling circuit has failed its self-test and a fault has occurred.
[0193] In step S516, let T max =T u I max =I u Calculate the second reference voltage value V uv_maxref Second actual voltage value V uv_maxreal .
[0194] I max The second stage of self-test judgment is determined by the motor's U-phase winding current value, i.e., the motor's U-phase winding current value when the second stage of self-test judgment is completed. max The duty cycle value of the PWM signal of the motor's U phase is used for the second stage of self-testing.
[0195] V uv_maxref For the second stage of self-testing, the reference voltage value between the U and V terminals of the motor (i.e., the second reference voltage value between the first and second output terminals of the inverter) is calculated using the following formula:
[0196]
[0197] Here, T max That is, the T″ mentioned above.u That is, T″1.
[0198] V uv_maxreal To determine the second stage of self-testing, the actual voltage value between the U and V terminals of the motor (i.e., the second actual voltage value between the first and second output terminals of the inverter) is calculated using the following formula:
[0199]
[0200] Here, I max That is, the I″ mentioned above. u That is, I″1.
[0201] In step S517, the first error value V is calculated. uv_err .
[0202] Vuv_err is the error value between the reference voltage and the actual voltage between the U and V terminals of the motor, as determined by the self-test. Its calculation formula is as follows:
[0203] V uv_err =|V uv_maxreal -V uv_typreal -V uv_maxref +V uv_typref |。(20)
[0204] In step S518, the first error value V is determined. uv_err Is it greater than the first error threshold V? uv_errTH If yes, the process proceeds to step S520; otherwise, the process proceeds to step S519.
[0205] V uv_errTH To self-test and determine the error threshold between the reference voltage and the actual voltage between the U and V terminals of the motor, for example, the calculation formula is as follows:
[0206]
[0207] In step S519, the DC bus voltage sampling circuit completes its self-test.
[0208] In step S520, a fault is determined in the DC bus voltage sampling circuit.
[0209] Thus, a detection method for a frequency converter drive according to some other embodiments of this disclosure is provided. In this method, after the frequency converter drive completes power-on initialization, upon receiving a power-on command from the host computer, the DC bus capacitor C is charged, and the T... u T v T w Value initialization: After charging is complete, the DC bus voltage sampling circuit begins self-testing, sampling and detecting the DC bus voltage value V in real time by injecting a voltage vector at an electrical angle of 0°.pn and the three-phase winding current value I of the motor u I v I w ; when I u Less than I maxTH It is also less than I typTH When, Tu is at interval T s The step size increases by ΔT, i.e., T u Press T u =T u As +ΔT increases, T v T w By adjusting the PWM control signal in the same way, I u I v I w The value increases, and there is I u =I v +I w ; when I u Greater than or equal to I typTH At that time, save I u to I typ And save T u To T typ In the middle, calculate V uv_typreal and V uv_typref And set the self-test first stage completion flag, when I u Greater than or equal to I maxTH At that time, save I u to I max And save T u To T max In the middle, calculate V uv_maxreal V uv_maxref and terminate T u Increase, calculate V uv_err If V uv_err Greater than V uv_errTH If the DC bus voltage sampling circuit is faulty, it is determined that the DC bus voltage sampling current is normal; otherwise, the self-test function is completed. The control process is similar if the electrical angle is 120° or 240°.
[0210] The above method can detect whether the DC bus voltage sampling circuit of the frequency converter is abnormal, and resolve the problem of inaccurate DC bus voltage values caused by sampling circuit malfunctions as much as possible, thereby improving the accuracy of the DC bus voltage sampling values. Since this method can detect abnormalities in the DC bus voltage sampling circuit, it can improve the control reliability of the frequency converter. The above detection method is applicable to the self-test function of the voltage sampling circuit of frequency converters at all power ranges, improving the operational reliability of the frequency converter.
[0211] In some embodiments, by connecting loads of different power ranges to the frequency converter driver, the PWM signals on the load terminals U, V, and W are tested using an oscilloscope. When a 0° voltage vector is injected, the pulse width between the UV terminals and the pulse width between the UW terminals automatically and gradually increases to a certain width, while the pulse width between the V and W terminals remains 0. The pulse width between the UV terminals and the pulse width between the UW terminals are different depending on the different power range loads connected.
[0212] In some embodiments, by connecting a motor load to the frequency converter driver, the current values of the three-phase windings of the motor are detected using an oscilloscope and a DC current clip: the three-phase winding current values are DC currents, where two phase current values are equal, and one phase current is twice the current value of either of the other two phases. For example, only changing T... u Value, T v and T w The value remains unchanged, that is, T u -T v and T u -T w Since the values are equal, the V-phase and W-phase currents are equal, and the U-phase current is equal to the sum of the V-phase and W-phase currents. If the sampled current is abnormal, a fault code will be displayed.
[0213] Figure 6 This is a structural block diagram illustrating a detection device for a variable frequency drive according to some embodiments of the present disclosure. The variable frequency drive includes a DC bus and an inverter. Figure 6 As shown, the detection device includes: an acquisition unit 602, a signal increment unit 604, a calculation unit 606, and a judgment unit 608.
[0214] The acquisition unit 602 is used to acquire the voltage value of the DC bus and the current value of the first phase current output by the inverter.
[0215] The signal increment unit 604 is used to gradually increase the duty cycle value of the first PWM signal input to the inverter according to a predetermined interval time and a predetermined step size, so as to gradually increase the current value of the first phase current.
[0216] The calculation unit 606 is used to calculate a first reference voltage value based on the current duty cycle of the current first PWM signal and the voltage value of the DC bus when the current value of the first phase current increases to be greater than or equal to the first current threshold, and to calculate a first actual voltage value based on the current value of the current first phase current.
[0217] The judgment unit 608 is used to determine whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal by using the first reference voltage value and the first actual voltage value.
[0218] Thus, a detection device for a frequency converter drive according to some embodiments of the present disclosure is provided. This detection device can detect whether the DC bus voltage sampling circuit of the frequency converter drive is abnormal, and resolve, as much as possible, the problem of inaccurate DC bus voltage values caused by sampling circuit abnormalities, thereby improving the accuracy of the DC bus voltage sampling values. Since this detection device can detect abnormalities in the DC bus voltage sampling circuit, the control reliability of the frequency converter drive can be improved.
[0219] In some embodiments, the calculation unit 606 is used to calculate a first reference voltage value based on the current duty cycle value of the current first PWM signal and the voltage value of the DC bus when the current value of the first phase current increases to be greater than or equal to a first current threshold and less than a second current threshold for the first time, and to calculate a first actual voltage value based on the current value of the current first phase current, wherein the second current threshold is greater than the first current threshold.
[0220] In some embodiments, the calculation unit 606 is used to calculate a second reference voltage value based on the current duty cycle of the current first PWM signal and the voltage value of the DC bus when the current value of the first phase current increases to be greater than or equal to the second current threshold, and to calculate a second actual voltage value based on the current value of the current first phase current.
[0221] In some embodiments, the determination unit 608 is used to determine whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal by using the first reference voltage value, the first actual voltage value, the second reference voltage value and the second actual voltage value.
[0222] In some embodiments, the determination unit 608 is configured to calculate a first error value based on a first reference voltage value, a first actual voltage value, a second reference voltage value, and a second actual voltage value; determine that the DC bus voltage sampling circuit of the frequency converter is abnormal if the first error value is greater than a first error threshold; and determine that the DC bus voltage sampling circuit of the frequency converter is normal if the first error value is less than or equal to the first error threshold.
[0223] In some embodiments, the signal increment unit 604 is further configured to keep the duty cycle values of the second PWM signal and the third PWM signal input to the inverter constant while gradually increasing the duty cycle value of the first PWM signal.
[0224] In some embodiments, the acquisition unit 602 is used to acquire the current values of the second phase current and the third phase current of the inverter output during the process of acquiring the current value of the first phase current output by the inverter, wherein any two of the first phase current, the second phase current and the third phase current are 120° out of phase.
[0225] In other embodiments, the determination unit 608 is configured to calculate a second error value based on a first reference voltage value and a first actual voltage value; if the second error value is greater than a second error threshold, determine that the DC bus voltage sampling circuit of the frequency converter is abnormal; and if the second error value is less than or equal to the second error threshold, determine that the DC bus voltage sampling circuit of the frequency converter is normal.
[0226] In some embodiments, the detection device may further include a charging unit for charging a capacitor disposed on the DC bus before acquiring the voltage value of the DC bus and the current value of the first phase current.
[0227] In some embodiments, the detection device may further include an initialization unit for initializing the duty cycle of the first PWM signal, the duty cycle of the second PWM signal input to the inverter, and the duty cycle of the third PWM signal input to the inverter before acquiring the voltage value of the DC bus and the current value of the first phase current.
[0228] In some embodiments, the determination unit 608 is further configured to determine that the DC bus voltage sampling circuit of the frequency converter driver is abnormal when the duty cycle value of the first PWM signal of the inverter increases to be greater than or equal to the period value of the first PWM signal.
[0229] Figure 7 This is a structural block diagram illustrating a detection device for a frequency converter drive according to some other embodiments of the present disclosure. The detection device includes a memory 710 and a processor 720. Wherein:
[0230] The memory 710 can be a disk, flash memory, or any other non-volatile storage medium. The memory is used for storage. Figure 2 , Figure 3 and Figure 5 At least one of the instructions in the corresponding embodiment.
[0231] The processor 720 is coupled to the memory 710 and can be implemented as one or more integrated circuits, such as a microprocessor or microcontroller. The processor 720 executes instructions stored in the memory and can detect abnormalities in the DC bus voltage sampling circuit of the frequency converter driver, thereby improving the accuracy of the DC bus voltage sampling values.
[0232] In one embodiment, it can also be as follows: Figure 8 As shown, the detection device 800 includes a memory 810 and a processor 820. The processor 820 is coupled to the memory 810 via a BUS bus 830. The detection device 800 can also be connected to an external storage device 850 via a storage interface 840 to access external data, and can also be connected to a network or another computer system (not shown) via a network interface 860, which will not be described in detail here.
[0233] In this embodiment, by storing data instructions in a memory and then processing the instructions by a processor, it is possible to detect whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal, thereby improving the accuracy of the DC bus voltage sampling value.
[0234] In some embodiments of this disclosure, a frequency converter driver is also provided, including: a detection device as described above, for example... Figure 6 , Figure 7 or Figure 8 The detection device shown.
[0235] Figure 9 This is a schematic diagram illustrating the circuit connection of a frequency converter driver according to some embodiments of the present disclosure.
[0236] like Figure 9 As shown, the frequency converter 900 includes a detection device 910, for example... Figure 6 , Figure 7 or Figure 8 The detection device shown is, for example, a driver chip.
[0237] In some embodiments, such as Figure 9 As shown, the variable frequency drive also includes a rectifier 120, a DC bus voltage boost circuit 130, and an inverter 140. For example, the inverter 140 is a smart power module. The rectifier 120 is electrically connected to the DC bus voltage boost circuit 130, the DC bus voltage boost circuit 130 is electrically connected to the inverter 140, and the detection device 910 is electrically connected to both the DC bus voltage boost circuit 130 and the inverter 140.
[0238] In some embodiments, such as Figure 9 As shown, the DC bus voltage boosting circuit 130 includes a DC bus. This DC bus includes a first conductor 1131 electrically connected to a first terminal 121 of the rectifier 120 and a second conductor 1132 electrically connected to a second terminal 122 of the rectifier 120. The DC bus voltage boosting circuit 130 also includes an inductor L1, a switching device 131, a diode D, and a capacitor C. The inductor L1 is disposed on the first conductor 1131. The switching device 131 is disposed between the first conductor 1131 and the second conductor 1132, and the control terminal of the switching device 131 is electrically connected to the detection device 910. The diode D is disposed on the first conductor 1131 and connected in series with the inductor L1. The capacitor D is disposed between the first conductor 1131 and the second conductor 1132.
[0239] In some embodiments, such as Figure 9The variable frequency drive 900 shown also includes a DC bus voltage sampling circuit 160. The DC bus voltage sampling circuit 160 is disposed between the first conductor 1131 and the second conductor 1132, and is electrically connected to the detection device 910.
[0240] The DC bus voltage sampling circuit 160 includes a first resistor R1 and a second resistor R2. The first end of the first resistor R1 is electrically connected to the second wire 1132, and the second end of the first resistor R1 is electrically connected to the detection device 910. The first end of the second resistor R2 is electrically connected to the second end of the first resistor R1, and the second end of the second resistor R2 is electrically connected to the first wire 1131.
[0241] Figure 9 The structure of the variable frequency drive shown is similar to Figure 1 The variable frequency drive shown has a similar structure; therefore, similar structures can be found by referring to the previous section on... Figure 1 The description of the structure of the variable frequency drive shown is omitted here.
[0242] In some embodiments of this disclosure, an air conditioning device is also provided, including: a frequency converter driver as described above.
[0243] In another embodiment, this disclosure also provides a computer-readable storage medium (e.g., a non-transitory computer-readable storage medium) having stored thereon computer program instructions that, when executed by a processor, are implemented. Figure 2 , Figure 3 and Figure 5 The disclosure includes at least one step of the method in a corresponding embodiment. Those skilled in the art will understand that embodiments of this disclosure can be provided as methods, apparatus, or computer program products. Therefore, this disclosure can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this disclosure can take the form of a computer program product embodied on one or more computer-usable non-transitory storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0244] This disclosure is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this disclosure. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create a machine for implementing the flowchart illustrations. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0245] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.
[0246] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0247] This concludes the detailed description of the present disclosure. To avoid obscuring the concept of the disclosure, some details known in the art have not been described. Those skilled in the art will fully understand how to implement the technical solutions disclosed herein based on the above description.
[0248] While specific embodiments of this disclosure have been described in detail by way of example, those skilled in the art should understand that the examples are for illustrative purposes only and not intended to limit the scope of this disclosure. Those skilled in the art should understand that modifications can be made to the above embodiments without departing from the scope and spirit of this disclosure. The scope of this disclosure is defined by the appended claims.
Claims
1. A detection method for a variable frequency drive, the variable frequency drive including a DC bus and an inverter, the detection method comprising: Obtain the voltage value of the DC bus and the current value of the first phase current output by the inverter; The duty cycle of the first PWM signal input to the inverter is gradually increased according to a predetermined interval and a predetermined step size to gradually increase the current value of the first phase current. When the current value of the first phase current increases to be greater than or equal to the first current threshold, the first reference voltage value is calculated based on the current duty cycle value of the first PWM signal and the voltage value of the DC bus, and the first actual voltage value is calculated based on the current value of the first phase current. and The DC bus voltage sampling circuit of the frequency converter driver is used to determine whether it is abnormal by using the first reference voltage value and the first actual voltage value.
2. The detection method according to claim 1, wherein, When the current value of the first phase current increases to the point that it is greater than or equal to the first current threshold and less than the second current threshold, the first reference voltage value is calculated based on the current duty cycle of the first PWM signal and the voltage value of the DC bus, and the first actual voltage value is calculated based on the current value of the first phase current, wherein the second current threshold is greater than the first current threshold.
3. The detection method according to claim 2 further includes: When the current value of the first phase current increases to be greater than or equal to the second current threshold, the second reference voltage value is calculated based on the current duty cycle value of the first PWM signal and the voltage value of the DC bus, and the second actual voltage value is calculated based on the current value of the first phase current. The step of determining whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal by using the first reference voltage value and the first actual voltage value includes: The DC bus voltage sampling circuit of the frequency converter driver is used to determine whether it is abnormal by using the first reference voltage value, the first actual voltage value, the second reference voltage value, and the second actual voltage value.
4. The detection method according to claim 3, wherein, Determining whether the DC bus voltage sampling circuit of the frequency converter driver is malfunctioning using the first reference voltage value, the first actual voltage value, the second reference voltage value, and the second actual voltage value includes: The first error value is calculated based on the first reference voltage value, the first actual voltage value, the second reference voltage value, and the second actual voltage value; If the first error value is greater than the first error threshold, it is determined that the DC bus voltage sampling circuit of the frequency converter driver is malfunctioning; and If the first error value is less than or equal to the first error threshold, it is determined that the DC bus voltage sampling circuit of the frequency converter is normal.
5. The detection method according to claim 3 further includes: While gradually increasing the duty cycle of the first PWM signal, the duty cycle of the second PWM signal input to the inverter and the duty cycle of the third PWM signal input to the inverter remain unchanged.
6. The detection method according to claim 5 further includes: In the process of obtaining the current value of the first phase current output by the inverter, the current values of the second phase current and the third phase current output by the inverter are also obtained, wherein the phase difference between any two of the first phase current, the second phase current and the third phase current is 120°.
7. The detection method according to claim 6, wherein: The first reference voltage value is the reference voltage value between the first output terminal and the second output terminal of the inverter when the current value of the first phase current is first greater than or equal to the first current threshold and less than the second current threshold, wherein the first output terminal is used to output the first phase current and the second output terminal is used to output the second phase current. First reference voltage value The calculation formula is as follows , in, The duty cycle of the current first PWM signal is given when the current value of the first phase current is first greater than or equal to the first current threshold and less than the second current threshold. This refers to the duty cycle value of the second PWM signal. The voltage value of the DC bus. Let be the period value of the first PWM signal, wherein the period values of the first PWM signal, the second PWM signal, and the third PWM signal are all equal.
8. The detection method according to claim 7, wherein: The first actual voltage value is the actual voltage value between the first output terminal and the second output terminal of the inverter when the current value of the first phase current is first greater than or equal to the first current threshold and less than the second current threshold. First actual voltage value The calculation formula is as follows , wherein, is the current value of the first phase current at the first time, is the resistance value of the motor load winding electrically connected with the inverter.
9. The detection method according to claim 6, wherein: The second reference voltage value is the reference voltage value between the first output terminal and the second output terminal of the inverter when the current value of the first phase current is greater than or equal to the second current threshold, wherein the first output terminal is used to output the first phase current and the second output terminal is used to output the second phase current; the second reference voltage value the calculation relationship is , in, The duty cycle of the first PWM signal is the value of the current when the current value of the first phase current is greater than or equal to the second current threshold. This refers to the duty cycle value of the second PWM signal. The voltage value of the DC bus. Let be the period value of the first PWM signal, wherein the period values of the first PWM signal, the second PWM signal, and the third PWM signal are all equal.
10. The detection method according to claim 9, wherein: The second actual voltage value is the actual voltage value between the first output terminal and the second output terminal of the inverter when the current value of the first phase current is greater than or equal to the second current threshold. the second actual voltage value the calculation relationship is , wherein, is the current value of the first phase current at the moment, is the resistance value of the motor load winding electrically connected with the inverter.
11. The detection method according to claim 4, wherein, the first error value the calculation relationship is , wherein, is the second actual voltage value, is the first actual voltage value, is the second reference voltage value, is the first reference voltage value.
12. The detection method according to claim 4, wherein, the first error threshold is , in, For predetermined coefficients, The second reference voltage value, This is the first reference voltage value.
13. The detection method of claim 1, wherein, Determining whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal using the first reference voltage value and the first actual voltage value includes: Calculate the second error value based on the first reference voltage value and the first actual voltage value; If the second error value is greater than the second error threshold, it is determined that the DC bus voltage sampling circuit of the frequency converter driver is malfunctioning; and If the second error value is less than or equal to the second error threshold, it is determined that the DC bus voltage sampling circuit of the frequency converter is normal.
14. The detection method according to claim 13, wherein, the second error value the calculation relationship is , wherein, is the first actual voltage value, is the first reference voltage value.
15. The detection method according to claim 1, further comprising: Before acquiring the voltage value of the DC bus and the current value of the first phase current, the capacitor installed on the DC bus is charged, and the duty cycle values of the first PWM signal, the second PWM signal input to the inverter, and the third PWM signal input to the inverter are initialized.
16. The detection method according to claim 1, further comprising: If the duty cycle of the first PWM signal of the inverter increases to a value greater than or equal to the period of the first PWM signal, it is determined that the DC bus voltage sampling circuit of the frequency converter driver is abnormal.
17. A detection device for a variable frequency drive, the variable frequency drive including a DC bus and an inverter, the detection device comprising: The acquisition unit is used to acquire the voltage value of the DC bus and the current value of the first phase current output by the inverter; The signal increment unit is used to gradually increase the duty cycle value of the first PWM signal input to the inverter according to a predetermined interval time and a predetermined step size so as to gradually increase the current value of the first phase current. The calculation unit is used to calculate a first reference voltage value based on the current duty cycle of the current first PWM signal and the voltage value of the DC bus when the current value of the first phase current increases to be greater than or equal to a first current threshold, and to calculate a first actual voltage value based on the current value of the current first phase current. and The judgment unit is used to determine whether the DC bus voltage sampling circuit of the frequency converter driver is abnormal by using the first reference voltage value and the first actual voltage value.
18. A detection device for a variable frequency drive, comprising: Memory; as well as A processor coupled to the memory, the processor being configured to execute the method as described in any one of claims 1 to 16 based on instructions stored in the memory.
19. A variable frequency drive, comprising: The detection device as described in claim 17 or 18.
20. The variable frequency drive according to claim 19, further comprising: Rectifier, DC bus voltage boost circuit and inverter; The rectifier is electrically connected to the DC bus voltage boosting circuit, the DC bus voltage boosting circuit is electrically connected to the inverter, and the detection device is electrically connected to both the DC bus voltage boosting circuit and the inverter.
21. The variable frequency drive of claim 20, wherein, The DC bus voltage boosting circuit includes: A DC bus includes a first conductor electrically connected to a first terminal of the rectifier and a second conductor electrically connected to a second terminal of the rectifier. An inductor is disposed on the first conductor; A switching device is disposed between the first wire and the second wire, and the control terminal of the switching device is electrically connected to the detection device; A diode, disposed on the first conductor, is connected in series with the inductor; and A capacitor is disposed between the first wire and the second wire.
22. The variable frequency drive according to claim 21, further comprising: A DC bus voltage sampling circuit is disposed between the first conductor and the second conductor and is electrically connected to the detection device.
23. The variable frequency drive of claim 22, wherein, The DC bus voltage sampling circuit includes: A first resistor, wherein a first end of the first resistor is electrically connected to the second wire, and a second end of the first resistor is electrically connected to the detection device; and The second resistor has its first end electrically connected to the second end of the first resistor, and its second end electrically connected to the first wire.
24. The variable frequency drive according to claim 20, wherein, The detection device is a driver main chip; The inverter is a smart power module.
25. An air conditioning apparatus comprising: The variable frequency drive as described in any one of claims 19 to 24.
26. A computer-readable storage medium having stored thereon computer program instructions that, when executed by a processor, implement the method as claimed in any one of claims 1 to 16.
Citation Information
Patent Citations
Control system for a brushless DC motor of a motor vehicle
CN202818204U
Inverter equipment
JP2002204592A