Method for operating a power electronic converter device with a floating unit

Abstract

A power electronic converter device (36) for an electric power conversion system includes a converter circuit (10) comprising an input side (12) having an input terminal (14), an output side (16) having at least one AC output terminal (18), a first converter (20) having a semiconductor device (26) connected to the input terminal (14), and at least one second converter (22) connected between the AC output of the first converter (20) and the AC output terminal, the second converter (22) including at least one floating unit (28) having a DC intermediate circuit (32) and the semiconductor device (30). A method for operating the power electronic converter device (36) includes: switching the semiconductor device (30) of the floating unit (28) at a switching time determined using an optimized pulse pattern or a carrier-based pulse width modulation; determining a fundamental voltage component of the floating unit, the fundamental voltage component depending on the actual voltage V of the DC intermediate circuit of the floating unit. C AF Reference value V of the voltage in the DC intermediate circuit C AF* The difference between them; and by modifying the switching time to generate the fundamental voltage component in the actual voltage of the floating unit, so that the voltage V of the DC intermediate circuit (32) is... C AF Located within a given reference voltage range to balance the DC intermediate circuit of the floating unit.

Description

Technical Field

[0001] This invention relates to methods, computer programs, and computer-readable media for operating power electronic converter devices. Furthermore, this invention relates to a power electronic converter device. Background Technology

[0002] Document EP 1 253 706 B1 illustrates an electrical power conversion system with a power electronic converter device, comprising: (i) a converter circuit including an input side with input terminals, a three-phase output side with output terminals, a first converter, and three second converters, each second converter connected in series with the first converter relative to a corresponding phase, each of the second converters including a floating unit having a capacitor element and a semiconductor device in a DC intermediate circuit, and (ii) a control device for driving the semiconductor device of at least one of the converters via a pulsed signal. Specifically, the converter circuit consists of a first converter as the main converter and three auxiliary floating units, one for each phase. In such a converter circuit, the number of floating units per phase is not fixed, and more floating units can be accommodated. Thus, the complete DC-to-AC conversion circuit takes the form of a main power converter provided by the first converter, auxiliary switching units for the second converters, and a passive filter circuit. The main converter is shown as a 3-level neutral-point clamp converter using an IGCT, but other topologies and semiconductor types are also possible. With the help of semiconductor devices, the DC voltage can be added to or subtracted from the DC voltage of the first converter.

[0003] Each of the documents RU 2 269 196 C1 and US 7 825 540 B2 describes a very similar electric power conversion system with a power electronic converter device.

[0004] US 6,009,002 A describes a power electronic circuit with an NPC converter and a floating cell connected to the AC output of the NPC converter. The third harmonic is mixed with the reference oscillation of the power electronic circuit. Energy feedback from the floating cell can be avoided, and the efficiency of the entire system can be improved. Therefore, switching losses can be kept at extremely low levels. A voltage source provides energy to the cell via a diode rectifier. No special control is required to maintain a constant cell voltage. Due to the diode rectifier, the only limitation is to keep the energy flow positive.

[0005] Dierk In the January 31, 2019 issue of Springer, pages 604-724, "Selbstgeführte Wechselrichter mit" (Selbstgeführte Wechselrichter mit), etc. The phrase “Leistungselektronische Schaltungen ADD.Funktion,Auslegung und Anwendung” in “Spannung” describes the control of the converter, mentioning several control schemes such as optimized pulse mode and pulse width modulation.

[0006] EP 3 142 236 A1 relates to converter control with optimized pulse patterns, wherein the optimized pulse patterns are adapted to minimize the difference between the converter flux reference and the converter flux estimate. Summary of the Invention

[0007] One object of the present invention is to provide a component for enabling stable operation of a power electronic converter device.

[0008] This objective is achieved through the subject matter of the independent claims. Advantageous embodiments are given in the dependent claims, in the further description, and in the drawings, wherein the described embodiments may, alone or in any combination of the corresponding embodiments, provide the features of the invention, unless expressly excluded.

[0009] One aspect of the present invention relates to a method for operating a power electronic converter device for an electric power conversion system.

[0010] A power electronic converter device includes a converter circuit having an input side with an input terminal (which may be a DC terminal) and an output side with at least one AC output terminal (such as three AC output terminals). The converter circuit includes a first and / or main converter having semiconductor devices, the first converter being connected to the input terminal and providing at least one AC output (such as three AC outputs). The converter circuit also includes at least one second converter connected between the AC output of the first converter and a corresponding AC output terminal. The converter circuit may include a second converter for each output phase. The aforementioned second converter or each second converter includes at least one floating unit or a series connection of floating units, wherein the aforementioned floating unit or each floating unit includes a DC intermediate circuit and a semiconductor device. The DC intermediate circuit may also be referred to as a DC link and / or may include at least one capacitor.

[0011] The power electronic converter device may also include a controller configured to perform the method.

[0012] According to one embodiment of the invention, the method includes: switching the semiconductor device of the floating unit at a switching time, the switching time being determined using an optimized pulse pattern or carrier-based pulse width modulation. The semiconductor device of the first converter can also be switched in this manner. It should be noted that all descriptions relating to a second converter having a floating unit can also refer to a second converter with a series connection of floating units.

[0013] According to one embodiment of the invention, the method further includes: determining a (desired) fundamental voltage component of the floating cell, the fundamental voltage component depending on the actual voltage V of the DC intermediate circuit of the floating cell. C AF Reference value V of the voltage in the DC intermediate circuit C AF* The difference lies in the desired voltage component used to balance the floating cell, its DC intermediate circuit, and especially the capacitors there. The (desired) fundamental voltage component can be a signal generated in the controller, for example by a PI controller or a hysteresis controller, as described below. From this (desired) fundamental voltage component, a modified switching timing is determined, which, when applied to the semiconductor device of the floating cell, produces the (real) fundamental voltage component in the actual voltage generated by the floating cell.

[0014] According to one embodiment of the present invention, the method further includes: generating a fundamental voltage component in the actual voltage of the DC intermediate circuit of the floating unit by modifying the switching time, such that the voltage V of the DC intermediate circuit... C AF Within a given reference voltage range, specifically for balancing the DC intermediate circuitry of the floating unit. The (desired) fundamental voltage component is input to a separate controller section that modifies the switching timing determined using an optimized pulse pattern and / or carrier-based pulse width modulation.

[0015] According to one embodiment of the present invention, the fundamental voltage component is generated in the actual voltage of the floating unit, such that the corresponding voltage V of the DC intermediate circuit... C AF Maintain at reference value V C AF* Specifically, when the DC intermediate circuit of the floating unit, especially the capacitors, is balanced and / or at their reference values, the fundamental voltage component is zero.

[0016] According to one embodiment of the present invention, the fundamental voltage component is generated by a PI controller, the input of which is the actual voltage V corresponding to the DC intermediate circuit. C AF Its reference value V C AF* The difference between them. It is also possible to use a hysteresis controller in this way.

[0017] According to one embodiment of the present invention, the variable gain of the PI controller is adjusted based on the fundamental component of the phase current flowing through the floating unit. The proportional variable gain of the PI controller can be correlated with the fundamental load current. Multiply by the reciprocal of the amplitude.

[0018] According to one embodiment of the present invention, specifically, when it is desired to charge the cell, the phase angle of the fundamental voltage component relative to the fundamental component of the phase current flowing through the floating cell is in the range of -85° to +85°. When it is desired to discharge, this angle is from 95 degrees to 265 degrees.

[0019] According to one embodiment of the present invention, specifically, when it is desired to charge the cell, the fundamental voltage component is in phase with the aforementioned fundamental component of the phase current. When it is desired to discharge, this angle is 180 degrees.

[0020] According to one embodiment of the invention, the method further includes: switching the semiconductor device of the first converter at a switching time determined using an optimized pulse pattern or a carrier-based pulse width modulation; generating and / or modifying a fundamental voltage component in the voltage output by the first converter by modifying the switching time applied to the first converter, wherein the fundamental voltage component in the actual voltage output by the first converter is determined based on a (desired) fundamental voltage component determined for a floating cell.

[0021] According to one embodiment of the present invention, the fundamental voltage component of the voltage at the first converter is generated and / or modified such that the fundamental voltage component at the output terminal is kept constant.

[0022] According to one embodiment of the invention, the fundamental voltage component generated by the floating unit is balanced and / or canceled by the fundamental voltage component generated by the first converter. In other words, their sum can be zero. In this way, one or more floating units can be balanced without changing the output of the entire system.

[0023] According to one embodiment of the present invention, the switching timing of the floating cell is modified by adjusting the switching angle of an optimized pulse pattern. The adjustment of the switching angle of the semiconductor device in the floating cell can be based on the sign of the corresponding switching transition. The adjustment of the switching angle of the semiconductor device in the floating cell can be based on an appropriate gain related to the nominal switching angle of the optimized pulse pattern.

[0024] According to one embodiment of the present invention, when the floating unit switches using carrier-based pulse width modulation, the switching time is modified by adding the sinusoidal signal of the base frequency to the carrier-based pulse width modulation reference.

[0025] According to one embodiment of the present invention, when both the first converter and at least one floating unit switch using an optimized pulse mode, the optimized pulse mode of the first converter and at least one floating unit is selected such that the weighted total harmonic distortion of the sum of the voltage of the DC intermediate circuit and the output voltage of the first converter is minimized.

[0026] Another embodiment of the invention relates to a method for operating a converter device for an electric power conversion system, the power electronic converter device comprising: (i) a converter circuit including an input side having input terminals, an output side having output terminals, a first converter having semiconductor devices, and at least one second converter connected in series with the first converter, the second converter including a floating unit or a series connection of multiple floating units having DC intermediate circuitry and semiconductor devices, each floating unit having DC intermediate circuitry and semiconductor devices; and (ii) a control device for driving the semiconductor devices of at least one converter in the converter via pulsed signals. According to several embodiments of the invention, the control device drives the semiconductor devices of at least one floating unit by using optimized pulse pattern (OPP) and / or carrier-based pulse width modulation (CB-PWM) signals such that the corresponding voltages of one or more DC intermediate circuits are within a given reference voltage range. With the aid of the semiconductor devices, the DC voltage can be added to or subtracted from the DC voltage of the first converter by the floating unit to generate a sufficiently harmonic-free desired output voltage and current. A fundamental prerequisite for stable operation is that the voltages of individual floating units or their intermediate circuits are relatively similar. In the following text, the voltage of the intermediate circuit is also referred to as the voltage of the floating unit.

[0027] According to one embodiment of the invention, a control device drives semiconductor devices such that the voltages of(a plurality of) DC intermediate circuits(a plurality of) are maintained at their reference values. This is preferably done using a balancing routine.

[0028] The pulse modes of the two converters can be selected such that the preferred weighted total harmonic distortion (THD) of the sum of the voltage of the DC intermediate circuit and the output voltage of the first converter is minimized.

[0029] According to one embodiment of the invention, specifically, when the cell needs to be charged, the phase angle of each fundamental voltage component of the floating cell used for balancing relative to the fundamental component of the phase current is in the range of -85° to +85°, and preferably in phase with the aforementioned fundamental component of the phase current. For discharging, an angle from 95° to 265° can be used, preferably 180°.

[0030] According to one embodiment of the invention, the fundamental component for balancing is generated by a PI controller unit and / or a hysteresis controller unit, the input of which is the difference between the (filtered) actual voltage of the corresponding DC intermediate circuit and its reference.

[0031] The fundamental component of the voltage at the first converter can be modified so that the total fundamental component of the voltage at the output terminal remains constant.

[0032] According to one embodiment of the present invention, the converter device includes:

[0033] (i) A converter circuit comprising an input side having input terminals, an output side having output terminals, a first converter having semiconductor devices, and at least one second converter connected in series with the first converter, the second converter comprising a floating unit or a series connection of multiple floating units having DC intermediate circuitry and semiconductor devices, each floating unit having DC intermediate circuitry and semiconductor devices, and

[0034] (ii) A control device for driving the semiconductor device of at least one of the converters via a pulsed signal.

[0035] The control device can be arranged to drive the semiconductor device of at least one floating unit by using OPP and / or CB-PWM signals, such that the corresponding voltage V of one or more DC intermediate circuits... C AF Within a given reference voltage range. Through (multiple) floating cells, the DC voltage can be added to or subtracted from the voltage of the first converter with the aid of semiconductor devices to generate a sufficiently distortion-free desired output signal. A fundamental prerequisite for stable operation is that the voltages of individual cells or their intermediate circuits are relatively similar. In the following text, the voltage of the intermediate circuit is also referred to as the voltage of the floating cell.

[0036] The embodiments mentioned in connection with the methods for operating power electronic converter devices should also be adapted to the corresponding power electronic converter devices with the necessary modifications, and vice versa.

[0037] According to one embodiment of the invention, a control device is arranged to drive semiconductor devices such that the voltages of (a plurality of) floating units(s) are maintained at their reference values. This is preferably done using a balancing routine.

[0038] The pulse modes of the two converters can be selected to minimize the weighted total harmonic distortion (THD) of the sum of the voltage of the DC intermediate circuit and the output voltage of the first converter.

[0039] According to an embodiment of the converter device according to the invention, for each floating unit, the fundamental floating voltage component is either in phase or out of phase by 180 degrees with the corresponding phase current.

[0040] The controller of the power electronic converter device, especially the aforementioned converter device, includes a controller unit, particularly a PI controller unit, wherein the fundamental component for balancing is generated by the controller unit, and the input of the controller unit is the difference between the actual voltage and the reference voltage of the corresponding floating unit.

[0041] According to an embodiment of the converter device according to the invention, the fundamental component of the voltage at the first converter is modified such that the fundamental component of the voltage at the output terminal is kept constant.

[0042] Another aspect of the present invention relates to a computer program product comprising a computer-executable program code portion having program code instructions configured to perform the methods described above and below when loaded into a computer-based control device.

[0043] Another aspect of the present invention relates to a computer-readable medium storing such a computer program product.

[0044] Another aspect of the invention relates to a power electronic converter device for an electric power conversion system, the power electronic converter device comprising: a converter circuit including an input side having an input terminal, an output side having at least one output terminal, a first converter having a semiconductor device connected to the input terminal, and at least one second converter connected between an AC output of the first converter and an AC output terminal, the second converter including at least one floating unit having a DC intermediate circuit and a semiconductor device; and a control device for driving the semiconductor device of the at least one floating unit and optionally driving the semiconductor device of the first converter, wherein the control device is configured to perform the methods described above and below. Further features of the invention are apparent from the claims, drawings, and description of the drawings. All features and combinations of features mentioned above in the specification, as well as features and combinations of features mentioned below in the description of the drawings and / or shown only in the drawings, are available not only in the combinations specified therein, but also in other combinations or individually.

[0045] The invention will now be explained in more detail based on preferred embodiments and with reference to the accompanying drawings. Attached Figure Description

[0046] These and other aspects of the invention will become apparent from the embodiments described below and will be elucidated with reference to the embodiments described below. Individual features disclosed in the embodiments may constitute an aspect of the invention, either alone or in combination. Features of different embodiments may be transferred from one embodiment to another.

[0047] In the attached diagram:

[0048] Figure 1 A schematic diagram of a converter circuit having a first converter and a second converter is shown in a power electronic converter device according to a first embodiment of the present invention;

[0049] Figure 2 A schematic diagram of a power electronic converter device according to a second embodiment of the present invention, together with a three-phase load connected to the power electronic converter device, is shown.

[0050] Figure 3 A schematic diagram is shown showing the generation of an AF balance signal for one phase using a PI controller;

[0051] Figure 4 A phasor diagram of the fundamental voltage component of the phase voltage of the first converter in a three-phase converter is shown.

[0052] Figure 5 This illustrates how the switching angle of the main converter is modified to change the amplitude of the fundamental voltage component;

[0053] Figure 6 A schematic diagram showing the arrangement of the controller and modulator via OPP modulation of the two converters is presented;

[0054] Figure 7 A schematic diagram shows the arrangement of the controller and modulator, in which the first converter is modulated by OPP and the second converter is modulated by CB-PWM.

[0055] Figure 8 A schematic diagram shows the arrangement of the controller and modulator, in which the first converter is modulated by CB-PWM and the second converter is modulated by OPP. Detailed Implementation

[0056] Figure 1A schematic diagram of converter circuit 10 is shown. Converter circuit 10 shows a single phase of a three-phase converter device, which includes an input side 12 with input terminal 14, an output side 16 with output terminal 18, a first converter 20, and a second converter 22 connected in series with the first converter 20. The first converter 20 is a midpoint clamp (NPC) converter or an active midpoint clamp (ANPC) converter. It can be another three-level converter, a two-level converter, or a converter with more than three levels. The first (main) converter 20 includes a capacitor element 24 (depicted as a capacitor) and a semiconductor device 26. The second converter 22 includes a series connection of a plurality of floating units 28. These floating units 28 serve as active filters (AF) and are therefore also referred to as "AF units" or "H-bridge AF units". Each floating unit 28 includes two pairs of semiconductor devices 30 and a DC intermediate circuit 32, wherein a capacitor element 34 (depicted as a capacitor) is interconnected between the two pairs of semiconductor devices 30. The capacitor element 34 has a voltage V that results in a corresponding voltage V at the DC intermediate circuit 32. C AF Capacitor C AF .

[0057] The basic AF control objective is to compensate for harmonics in the three-phase (3L)(A) NPC output waveform, while simultaneously reducing the capacitor voltage V of each AF unit. C AF The average value is maintained at its reference value (AF balance). The balance control concept should also be able to use the floating unit 28 as an add-on to existing converters. The additional control requirement is its applicability to the modular concept to ensure that it can be easily adjusted to higher DC link voltages and higher capacitor voltages as well as a greater number of floating units 28.

[0058] Figure 2 A power electronic converter device 36 according to a first embodiment and a load 38 connected to the output side 20 of the converter device 36 are shown. The converter device 36 includes a converter circuit 10 and a control device 40, which drives the semiconductor devices 26, 30 of at least one of the converters 20, 22 via pulsed signals. The control device 40 drives the semiconductor devices 26, 30 by using OPP or CB-PWM, such that the corresponding voltage V of the DC intermediate circuit 32... C AF It is balanced, which means it is within the range of a given reference voltage.

[0059] In this example, the first converter 20 and the floating unit 28 are modulated by OPP for the three-phase load 38. The step size of the 3L(A)NPC switching transition is higher than that of the AF switching transition. The pulse patterns of the two converters 20 and 22 must be calculated in such a way that the weighted total harmonic distortion (weighted THD) of the sum of the voltages 42 and 44 of the units(multiple) of the first converter 20 and the second converter 22 is minimized. Other objective functions may also be considered. Furthermore, the fundamental voltage component must be generated only by the first converter 20 (3L(A)NPC converter), and the fundamental voltage component of the floating unit(multiple) is zero because it cannot provide active power. The voltage 46 generated at the load 38 is plotted as a three-phase voltage curve.

[0060] The floating unit 28 of the OPP modulation requires a balancing mechanism that ensures the average voltage of the capacitor element 34 (used as an intermediate floating capacitor) remains constant and close to its reference. This invention proposes two balancing methods.

[0061] When charging is desired, the method is based on the injection of a fundamental AF voltage component, preferably in phase with the load current. For discharging, the preferred angle is 180°. The AF fundamental component required for balancing is preferably generated by a PI controller unit 48, whose input is the difference between the (filtered) actual voltage VCAF of the AF capacitor and the average reference value VCAF*, such as... Figure 3 As shown. The proportional gain of the PI controller unit 48 can be multiplied by the fundamental load current. The gain is the reciprocal of the amplitude to keep the gain of the balancing loop constant and independent of the load current. For low currents, the gain can be limited to a specific value to avoid very large changes in the nominal switching angle. The output of the PI controller unit 48 gives the desired AF fundamental component corresponding to the floating unit 28. The amplitude. Each phase should have such a controller, and the control of the AF capacitor voltage in each phase is independent of the other phases.

[0062] In addition to modifying the fundamental voltage component of AF, the fundamental voltage component of 3L(A)NPC must also be modified accordingly to keep the fundamental voltage components at the load terminals the same. The calculation of the desired fundamental 3L(A)NPC phase voltage component is performed with the help of the phasors of the fundamental voltage components of 3L(A)NPC and AF, such as... Figure 4 As shown. With the help of the phasor diagram, the desired 3L(A)NPC phasor is obtained. Based on the phasor of the given AF fundamental component The fundamental component of the nominal OPP To calculate:

[0063]

[0064] From the equation above, the amplitude of the desired 3L(A)NPC fundamental component can be calculated. And phase θ. From the former, the necessary changes in the amplitude of the fundamental 3L(A)NPC voltage can be calculated.

[0065]

[0066] The following section describes how to modify the nominal switching angle to generate the necessary 3L(A)NPC and AF fundamental components in each phase.

[0067] By 2π, α NPC i The switching angle of the original 3L(A)NPC pulse mode is appropriately modified, where index i refers to the i-th switching transition Δu. NPC i This can generate the desired 3L(A)NPC fundamental component. Different methods can be used for this modification. In this particular implementation, it is done in two steps: obtaining the desired amplitude and obtaining the desired phase.

[0068] 1) In the first step, the amplitude of the fundamental component is modified by adding an angle ΔαNPCi to each 3L(A)NPC switching angle:

[0069] Δα NPCi =k·s(Δu NPCi )·g NPC ·Δm NPC (3)

[0070] in

[0071] Δm NPC =ΔV NPC / V dc ,

[0072] The total DC link voltage of the first converter (especially the 3L(A)NPC converter) 20 is 2Vdc, which is in Figure 2 This can also be seen in [the context]. The sign of k depends on the half-cycle of the fundamental component of the nominal pulse mode in which the switching angle is located. This is in [the context]. Figure 5 Example in. g of equation (5) NPC ·Δm NPC Partially independent of the actual nominal switching angle, this means the absolute value of the change is the same for all switching angles; only the sign depends on the switching angle. The gain gNPC defines how large this change should be to achieve the desired change in the modulation index. When we have only one switching angle within a quarter-wave period and OPP has half-wave and quarter-wave symmetry, the necessary gain can be analytically calculated.

[0073] For a larger number of switching angles, the gain g NPC It is calculated as a function of the modulation index and stored in the OPP. It is calculated by changing the nominal 3L(A)NPC switching angle by Δα. NPCi =k·sgin(Δu NPCi )·Δα NPC Furthermore, the change Δm in the modulation index that causes 3L(A)NPC is calculated. NPC :

[0074] g NPC =Δα NPC / Δm NPC (6)

[0075] 2) Subsequently, the previously calculated angle θ is added to each 3L(A)NPC nominal switching angle to obtain the desired phase of the 3L(A)NPC fundamental voltage. The modified 3L(A)NPC switching angle will therefore be:

[0076] α NPCi =α NPCi nom +Δα NPCi -θ. (7)

[0077] For a three-phase load with a phase difference of ±2π / 3 between phases b and c, the modified 3L(A)NPC switching angle in each phase can be expressed as:

[0078]

[0079] The desired AF modulation index can be achieved by a small modification to the original AF switching angle of the corresponding phase (where the AF modulation index is zero). Before these modifications are made, the previously defined angle θ is added to the nominal switching angle of the AF to avoid mismatch between the pulse modes of the first converter 20 and the second converter 22 (3L(A)NPC and AF):

[0080] α′ AFi =α AFi nom -θ, (9)

[0081] Where αAFi nom is the i-th nominal AF switching angle.

[0082] Different methods can be used to inject the fundamental component; for example, the switching angle can preferably be modified based on the following formula:

[0083]

[0084] Where Δu AFi It is the switching angle α of the i-th time. AFi The corresponding switching and transformation, This is the desired phase of the AF fundamental component. Preferably, it is set to... This is equal to the phase difference between the fundamental components of the load voltage and the load current, and this phase difference is... Figure 4 The Chinese character is represented as In this way, the injected AF voltage component is in phase with the load current, and we can charge or discharge the AF capacitor more effectively.

[0085] For the desired AF modulation index m AF The quantity Δα must be selected accordingly. AFmax This is achieved by using m AF This is done by multiplying by a gain that is OPP-specific and approximately constant for relatively small changes in the nominal switching angle.

[0086] g AF =Δα AFmax / m AF (11)

[0087] It can be used as The function is pre-computed for each pulse mode and then stored along with each OPP of the AF. Typically, Contrast ratio Δα AFmax / m AF The effect is negligible; only one ratio (corresponding to the specific modulation index of the main converter) needs to be stored for each AF pulse mode. If The impact cannot be ignored, therefore the storage ratio Δα must be calculated. AFmax / m AF As The function.

[0088] The calculated angle difference Δα AFi With α′ AFi nom Add them together to calculate the modified AF switching angle to be used for AF modulation.

[0089] α AFi =α′ AFi +Δα AF，i (12)

[0090] By switching at the modified switching angle, the necessary AF fundamental component with the desired amplitude can be generated. and phase

[0091] For a three-phase load with a phase difference of ±2π / 3 between phases b and c, the AF switching angle modification in each phase can be expressed as:

[0092]

[0093] Figure 6A simplified diagram of the balance control unit 50 and the OPP modulator unit 52 is shown. Control unit 50 should only compensate for the average capacitor voltage and not the voltage ripple. This can be done by filtering the measured capacitor voltage fed to the PI control unit 48 using a moving average filter within a suitably selected time window (e.g., half the fundamental period) or by appropriately selecting the bandwidth of the PI control unit 48. Module 54 represents the calculation of the necessary fundamental component of the first converter 20. When calculating the switching angle change of the second converter 22 floating unit 28 (represented by module 56) and the switching angle change of the first converter 20 (represented by module 58), some constraints must be considered, which are not described in detail in this document. For example, the modified switching angle cannot be higher than the next nominal switching angle. Constraints on the relationship between the switching angles of different phases may also be considered if necessary. The calculated first converter switching angle change is provided to the modulator module 60 of the first converter 20, and the calculated second converter switching angle change is provided to the modulator module 62 of the second converter 22. Figure 6 In the example, modulator modules 60 and 62 are both OPP modulator modules.

[0094] In the above method, a different fundamental component is considered for each phase because the voltage of the floating unit's capacitor may differ slightly in each phase. In a variant of the balancing method, the voltage of the floating unit's capacitor in different phases is made the same with the help of a common-mode (CM) component considered in the modulation of the floating unit. The CM component is preferably generated by appropriately modifying the nominal switching angle of the floating units in all three phases or by using the three-phase redundant switching vector of the floating unit. In the former case, the additional term Δα is... i，CM Added to the AF switching angle, its calculation is as follows:

[0095] Δα AF，i =Fmax CM·sign(Δu AFi )·。 (14)

[0096] As mentioned earlier, for the fundamental component, for the desired CM component m AF，CM The quantity Δα must be selected accordingly. AFmax CM This is achieved by using m AF，CM This is done by multiplying by a gain that is OPP-specific and approximately constant for relatively small changes in the nominal switching angle.

[0097] g AF，CM =Δα AFmax CM / m AF，CM (15)

[0098] The term calculated by (14) is added to the term considered in (10), and therefore the total modification of the switching angle of the floating unit is given by the following formula.

[0099]

[0100] If redundant vectors are used, alternative combinations of switching states with the same differential voltage but different CM voltages are considered. For example, alternative combination [u AFi，a u AFi，b u AFi，c ] = [1, 1, 0], you can choose [u AFi，a u AFi，b u AFi，c [0, 0, -1]. The difference between two phases remains constant, but the sum of the three phases differs. Whether to select a redundancy vector is based on using the capacitor transfer function and the measured phase currents to predict the evolution of the capacitor voltage after one sampling interval in the three phases.

[0101] However, the use of a redundancy vector will increase the switching frequency of the semiconductor in the floating cell. The switching frequency can be optimized by selecting an appropriately long horizon (more than one sampling interval) and including a penalty for the number of necessary switching actions that occur when selecting the redundancy vector, which will make the voltages of the three capacitors close to each other on the considered horizon. The (equal) voltages of the three-phase capacitors are then brought to the desired reference value by the switching angle modification described in (3)-(13). Since the voltage of each phase is considered equal, the main converter and the floating cell (by...) Figure 4 The necessary fundamental components (shown in the phasor diagram) are identical for all three phases. Compared to phase a, only phase shifts of -2π / 3 and +2π / 3 will appear in phases b and c, respectively.

[0102] A special case that must be handled carefully is when one or more switching angles of the main converter are the same as one or more switching angles of the floating unit. Therefore, only the AF switching angle (which is not the same as any switching angle of the main converter) remains to generate the fundamental component of the floating unit. Furthermore, in this case, modification of the main converter's switching angle also generates the fundamental component in the floating unit. This must be compensated for by the remaining switching angle of the floating unit as described above. The AF fundamental voltage component generated by the modification of the main converter's switching angle is given by the following formula.

[0103]

[0104] Where r AF This is the ratio between the voltage of the floating unit and half of the DC link voltage of the main converter. The compensation term for the remaining switching angle of the floating unit is therefore calculated as:

[0105] Δα AF，i，DM，comp =2·r AF ·Δm NPC ·g AF ·sign(ΔuAF，i )·sin(α AF，i -θ)· (18)

[0106] The same principle applies when the switching angle of the main converter is modified to balance the neutral point, for example, when the main converter is a 3L(A)NPC. The CM components that will appear in the floating unit due to some simultaneous switching with the main converter must be compensated for by the remaining switching angle of the floating unit.

[0107] If CB-PWM is used for (multiple) H-bridge units 28, the previously discussed modifications apply only to the switching angle of the first converter 20 (modules 54, 58, 60). The necessary modifications to the AF switching timing are made by simply adding a suitable sinusoidal signal of the base frequency (generated by function generator 64) to the CB-PWM reference of the AF (provided to the corresponding modulator module 62). The amplitude of this signal is equal to... Divide by the AF voltage, and its phase is preferably equal to the load current. The phase, such as Figure 7 As shown. In this case, the nominal switching time of AF is calculated by comparing a reference signal with the carrier signal, which is equal to the difference between the 3L(A)NPC reference signal and the 3L(A)NPC output switching state. The aforementioned "nominal" reference signal is essentially equal to the sum of the harmonics of the 3L(A)NPC output voltage.

[0108] If CB-PWM is used for the first converter 20, the previously discussed modifications only apply to the switching angle of AF. The necessary modifications to the switching timing of the 3L(A)NPC are made by appropriately modifying its CB-PWM reference, such as... Figure 8 As shown. The amplitude of the sinusoidal reference is equal to mNPC nom + ΔmNPC, and its phase is equal to θ. The CM component can also be added to this sinusoidal reference if needed. When the AF unit and / or the main converter is modulated by OPP, the proposed balancing scheme helps to balance the AF unit capacitor voltage. In many cases, improved output voltage quality can be achieved through OPP modulation compared to CB-PWM or other modulation methods.

[0109] The control algorithm can be implemented on any computing hardware, including DSP, FPGA, microcontroller, CPU, GPU, multi-core platform and combination thereof.

[0110] In the description of this invention, the first converter 20 is a 3L(A)NPC converter, but the same method can be applied to other types of three-level converters, including neutral-point guided 3L converters. This invention can also be applied to two-level master converters or master converters with three or more levels.

[0111] The following text will reiterate the key aspects of this method's implementation:

[0112] 1. The second converter 22 includes one or more auxiliary units 28;

[0113] 2. The modulation of the first converter 20 and the second converter 22 is based on OPP, or only the modulation of the first converter 20 is based on OPP and CB-PWM is used for the second converter 22, or only the modulation of the second converter 22 is based on OPP and CB-PWM is used for the first converter 20;

[0114] 3. OPP is pre-calculated and stored in a lookup table;

[0115] 4. The entries in the lookup table contain the switching angle and the corresponding switching state of the first or second converter as a function of the modulation index and pulse number;

[0116] 5. The output voltage of the second converter 22 is used to optimize the waveform of the sum of the generated voltages of the first converter 20 and the second converter 22 for different objective functions.

[0117] 6. The above calculation of OPP can be performed for different objective functions and performance trade-offs. For example, different OPPs can provide different behaviors in phase current harmonic distortion, common-mode voltage at the output, and floating capacitor voltage ripple;

[0118] 7. A component is provided for detecting or estimating the voltage of the capacitive H-bridge element (floating capacitor) 34 of the second converter 22;

[0119] 8. The average voltage of the floating capacitor 34 is maintained as its reference value by modifying the nominal switching angle of the first converter and the second converter 22 stored in the lookup table, or if CB-PWM is used for the second converter 22, modifying the nominal switching angle of the first converter and the reference signal of the second converter, or if CB-PWM is used for the first converter, modifying the reference signal of the first converter 20 and the nominal switching angle of the second converter.

[0120] 9. The change in switching angle is based on an amount of manipulation that preferably corresponds to the amplitude of the fundamental voltage component of the first converter 20 and the second converter 22;

[0121] 10. The manipulated quantity is preferably generated by a PI control unit 48', a hysteresis controller 70, or a combination of both. The input to controllers 48' and 70 is the deviation of the capacitor voltage from its reference value;

[0122] 11. The magnitude of the load current value can also be input to the PI control unit 48', so that the switching angle can also be adjusted based on it;

[0123] 12. Changes in the switching angle are limited by the next and previous switching angles of a phase, and may be limited by the next and previous switching angles of other phases; and

[0124] 13. The capacitor voltage ripple of the second converter 22 is taken into account by: an appropriate hysteresis limit of the hysteresis controller 70, or by filtering the measured voltage with a moving average filter for the PI control unit within a suitably selected time window (e.g., half of the fundamental period), or by appropriately adjusting the bandwidth of the PI control unit 48'.

[0125] List of reference numerals

[0126] 10: Converter circuit

[0127] 12: Input side

[0128] 14: Input Terminal

[0129] 16: Output side

[0130] 18: Output terminals

[0131] 20: First Converter

[0132] 22: Second Converter

[0133] 24: Capacitor Components

[0134] 26: Semiconductor devices

[0135] 28: Floating Unit

[0136] 30: Semiconductor devices

[0137] 32: DC intermediate circuit

[0138] 34: Capacitor Components

[0139] 36: Converter equipment

[0140] 38: Load

[0141] 40: Control equipment

[0142] 42: Voltage (First Converter)

[0143] 44: Voltage (Second Converter)

[0144] 46: Voltage (at the load)

[0145] 48: PI Controller Unit - Method 1

[0146] 48': PI controller unit - Method 2

[0147] 50: Balance control unit

[0148] 52: Modulator unit

[0149] 54: Computing Unit

[0150] 56: Computing Unit

[0151] 58: Computing Unit

[0152] 60: First modulator

[0153] 62: Second modulator

[0154] 64: Function Generator

[0155] 66: First switching unit

[0156] 68: Second switching unit

[0157] 70: Hysteresis Controller Unit

Claims

1. A method for operating a power electronic converter device (36) for an electric power conversion system, the power electronic converter device (36) including a converter circuit (10) comprising: An input side (12) having an input terminal (14), an output side (16) having at least one AC output terminal (18), a first converter (20) having a semiconductor device (26) connected to the input terminal (14), and at least one second converter (22) connected between the AC output of the first converter (20) and the AC output terminal, the second converter (22) including at least one floating unit (28) having a DC intermediate circuit (32) and a semiconductor device (30); The method includes: The semiconductor device (30) of the floating unit (28) is switched at a switching time, which is determined by an optimized pulse pattern or a carrier-based pulse width modulation. Determine the first fundamental voltage component of the floating unit, wherein the first fundamental voltage component depends on the actual voltage V of the DC intermediate circuit of the floating unit. CAF The reference value V of the voltage of the DC intermediate circuit CAF* The difference between them; By modifying the switching time, the first fundamental voltage component is generated in the actual voltage of the floating unit, so that the voltage V of the DC intermediate circuit (32) is... CAF Within the given reference voltage range; The semiconductor device (30) of the first converter (20) is switched at a switching time, the switching time being determined by an optimized pulse pattern or a carrier-based pulse width modulation; A second fundamental voltage component is generated in the voltage output by the first converter by modifying the switching time applied to the first converter, wherein the second fundamental voltage component in the actual voltage output by the first converter is determined based on the first fundamental voltage component determined for the floating unit. The second fundamental voltage component of the voltage at the first converter (20) is modified such that the fundamental component of the voltage at the output terminal (18) is kept constant; and The first fundamental voltage component generated by the floating unit is canceled out by the second fundamental voltage component generated by the first converter.

2. The method according to claim 1, The first fundamental voltage component is generated in the actual voltage of the floating unit, such that the voltage V of the corresponding DC intermediate circuit (32) is... CAF Maintained at reference value V CAF* .

3. The method according to claim 1 or 2, When the DC intermediate circuit of the floating unit (28) is at its reference value, the first fundamental voltage component is zero.

4. The method according to claim 1 or 2, The first fundamental voltage component is generated by a PI controller (48), and the input of the PI controller (48) is the actual voltage V of the corresponding DC intermediate circuit (32). CAF Its reference value V CAF* The difference between them.

5. The method according to claim 4, The variable gain of the PI controller is adjusted according to the third fundamental component of the phase current flowing through the floating unit.

6. The method according to any one of claims 1, 2, and 5, When the floating unit (28) is charged, the phase angle of the first fundamental voltage component relative to the third fundamental component of the phase current flowing through the floating unit (28) is in the range of -85° to +85°. When the floating unit (28) is discharged, the phase angle of the first fundamental voltage component relative to the third fundamental component of the phase current flowing through the floating unit (28) is in the range of 95° to 265°.

7. The method according to claim 6, When the floating unit is charged, the first fundamental voltage component is in phase with the third fundamental component of the phase current. When the floating unit is discharged, the first fundamental voltage component and the third fundamental component of the phase current have a phase difference of 180°.

8. The method according to any one of claims 1, 2, 5 and 7, The switching time of the floating unit is modified by adjusting the switching angle of the optimized pulse mode; The adjustment of the switching angle of the semiconductor device in the floating unit (28) is based on the sign of the corresponding switching transition; and / or The adjustment of the switching angle of the semiconductor device in the floating unit (28) is based on an appropriate gain related to the nominal switching angle of the optimized pulse pattern.

9. The method according to any one of claims 1, 2, 5 and 7, When the floating unit is switched using carrier-based pulse width modulation, the switching time is modified by adding the base frequency sinusoidal signal to the carrier-based pulse width modulation reference.

10. The method according to any one of claims 1, 2, 5 and 7, When both the first converter (20) and the at least one floating unit (28) are switched using an optimized pulse mode, the optimized pulse mode of the first converter (20) and the at least one floating unit (28) is selected such that the voltage V of the DC intermediate circuit (32) is... CAF The weighted total harmonic distortion of the sum of the voltages output by the first converter (20) is minimized.

11. A computer program product comprising a computer-executable program code portion having program code instructions configured to perform the method according to any one of claims 1-10.

12. A computer-readable medium having program code instructions configured to perform the method according to any one of claims 1-10.

13. A power electronic converter device (36) for an electric power conversion system, the power electronic converter device (36) comprising: - A converter circuit (10) includes: an input side (12) having an input terminal (14), an output side (16) having at least one output terminal (18), a first converter (20) having a semiconductor device (26) connected to the input terminal (14), and at least one second converter (22) connected between the AC output of the first converter (20) and the AC output terminal, the second converter (22) including at least one floating unit (28) having a DC intermediate circuit (32) and a semiconductor device (30), and - A control device (40) for driving the semiconductor device of the at least one floating unit (28), wherein the control device (40) is configured to perform the method according to any one of claims 1 to 10.

Images