Optical interferometry tomography device

By using a movable mirror and multiple gate design in the optical interference tomography device, the electrical signal is controlled to achieve high-precision interference pattern signal envelope acquisition, which solves the accuracy problem of interference pattern signal envelope acquisition in the optical interference tomography device, and realizes high-quality object image generation.

CN115088249BActive Publication Date: 2025-04-25HAMAMATSU PHOTONICS KK
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Patent Information

Application Number
CN202180014608.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-08-05
Filing Date
2021-01-21
Publication Date
2025-04-25
Estimated Expiration
2041-01-21

AI Technical Summary

Technical Problem

In optical interference tomography devices, obtaining the envelope of the interference pattern signal of interference light with high precision is an important challenge, especially in ensuring high-precision object image generation.

Method used

By using a movable mirror in an optical interference tomography device for reciprocating operations and designing multiple transmission gates and discharge gates in pixels of the optical sensor, the electrical signals are controlled to sequentially realize charge transmission and discharge in at least 3 time ranges, ensuring high accuracy acquisition of the envelope of the interference pattern signal.

Benefits of technology

This method can obtain the envelope line of the interference pattern signal of the interference light with high precision when the reciprocating speed of the movable mirror is not constant or the charge acquisition is not at a constant time interval, thereby generating a high-quality object image.

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Abstract

The optical interference tomography apparatus of the present invention comprises: a light source, a reflector device including a movable reflector that performs a reciprocating motion, a support portion that supports an object, a beam splitter that generates interference light, a light sensor that detects the interference light, and a control portion. Each of the plurality of pixels included in the light sensor comprises: a light receiving portion, a plurality of transfer gates, and a discharge gate. The control portion applies an electrical signal to the light sensor in such a manner that, for each cycle of an interference pattern signal of the interference light, the plurality of transfer gates are sequentially in a charge transfer state in at least three time ranges separated from each other, and the discharge gate is in a charge discharge state in a time range other than the at least three time ranges.
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Description

Technical Field

[0001] The present disclosure relates to an optical interferometry tomography apparatus. Background Art

[0002] As an optical interference tomography device, there is a known device that utilizes a method called TD-OCT (Time Domain-Optical Coherence Tomography) (for example, refer to non-patent document 1). In TD-OCT, light emitted from a light source is divided into a first light and a second light, and the first light is incident on a movable reflector and the second light is incident on an object. At this time, interference light is generated by coupling the first light reflected by the movable reflector and the second light reflected by the object (specifically, the second light reflected or scattered inside or on the surface of the object) while the movable reflector is moved parallel to the optical axis, and the interference light is detected to obtain an interference pattern signal of the interference light. By converting the obtained interference pattern signal into its envelope, and considering the envelope of the converted interference pattern signal as the structure of the object in the depth direction, it is possible to obtain an image (tomographic image) of the object.

[0003] Prior art literature

[0004] Non-patent literature

[0005] Non-patent document 1: Stephan Beer and Peter Seitz, "REAL-TIME TOMOGRAPHICIMAGING WITHOUT X-RAYS: A SMART PIXEL ARRAY WITH MASSIVELY PARALLEL SIGNALPROCESSING FOR REAL-TIME OPTICAL COHERENCE TOMOGRAPHY PERFORMING CLOSE TO THEPHYSICAL LIMITS", Published in: Research in Microelectronics and Electronics,2005PhD,Date of Conference:28-28July 2005,Date Added to IEEE Xplore:12December 2005,Print ISBN:0-7803-9345-7,DOI:10.1109 / RME.2005.1542955,Publisher:IEEE,Conference Location:Lausanne,Switzerland,Page:135-138 Summary of the invention

[0006] Problems to be solved by the invention

[0007] In the above-described optical interference tomography apparatus, it is important to accurately obtain the envelope of the interference pattern signal of the interference light in order to accurately generate an image of the object.

[0008] An object of the present disclosure is to provide an optical interference tomography apparatus capable of acquiring an envelope of an interference pattern signal of interference light with high accuracy.

[0009] Means used to solve problems

[0010] An optical interference tomography apparatus according to one aspect of the present disclosure comprises: a light source; a reflector device including a movable reflector that performs a reciprocating motion; a support portion that supports an object; a beam splitter that splits light emitted from the light source into a first light and a second light, and generates interference light by coupling the first light reflected by the movable reflector and the second light reflected by the object; a light sensor that detects the interference light generated by the beam splitter; and a control portion that is at least electrically connected to the light sensor, the light sensor including a plurality of pixels, each of the plurality of pixels including: a light receiving portion that generates a charge in response to incident light, a plurality of transfer gates for transferring the charge generated by the light receiving portion, and a gate for discharging the charge generated by the light receiving portion, the control portion applying an electrical signal to the light sensor in such a manner that, for each cycle of an interference pattern signal of the interference light, the plurality of transfer gates are sequentially in a charge transfer state in at least three time ranges separated from each other, and the discharge gate is in a charge discharge state in a time range other than the at least three time ranges.

[0011] In the optical interference tomography apparatus, by reciprocating the movable reflector, the time variation of the interference pattern signal is set to change periodically, and the conversion to the envelope of the interference pattern signal is facilitated. In addition, for each of the plurality of pixels included in the optical sensor, for each cycle of the interference pattern signal of the interference light, in at least three time ranges separated from each other, the plurality of transfer gates are successively in the charge transfer state, and in the time range outside the at least three time ranges, the discharge gate is in the charge discharge state. Thus, the charge generated only by the light receiving part in each of the at least three time ranges can be obtained as the signal charge. Therefore, according to the optical interference tomography apparatus, for example, even when the speed of the reciprocating motion of the movable reflector is not constant or the acquisition of the charge is not performed at a constant time interval, the envelope of the interference pattern signal of the interference light can be obtained with high precision.

[0012] In an optical interference tomography apparatus of one aspect of the present disclosure, the movable reflector may reciprocate by resonating in the reflector device. Thus, the interference pattern signal of the interference light can be obtained at high speed. In addition, since the movable reflector resonates, the speed of the reciprocating movement of the movable reflector becomes non-constant. Even in this case, as described above, the envelope of the interference pattern signal of the interference light can be obtained with high precision.

[0013] In the optical interference tomography apparatus of one aspect of the present disclosure, the movable mirror may reciprocate at a frequency of 1 kHz or more. Thus, the interference pattern signal of the interference light can be obtained at high speed. In addition, since the movable mirror reciprocates at a frequency of 1 kHz or more, the reciprocating speed of the movable mirror is difficult to be constant. Even in this case, as described above, the envelope of the interference pattern signal of the interference light can be obtained with high precision.

[0014] In the optical interference tomography apparatus according to one aspect of the present disclosure, a plurality of pixels may be arranged two-dimensionally, thereby enabling an image of a predetermined region of the object to be generated at one time.

[0015] In the optical interference tomography apparatus according to one aspect of the present disclosure, the mirror device may be a MEMS mirror device, thereby enabling the movable mirror to reciprocate at high speed.

[0016] In the optical interference tomography apparatus of one aspect of the present disclosure, each of the plurality of pixels may further include a grating electrode for attracting the charges generated by the light receiving unit to the plurality of transfer gates and discharge gates. Thus, since the charges generated by the light receiving unit can be transferred and discharged at high speed, an image of the object can be generated in a short time.

[0017] In an optical interference tomography apparatus according to one aspect of the present disclosure, each of at least three time ranges may be a time range centered at a time when the phase of the interference pattern signal is shifted by π / 2. Thus, the operation for converting the interference pattern signal of the interference light into its envelope can be simplified. By simplifying the operation, a part or all of the operation can be implemented by hardware, and overall high-speed processing can be facilitated.

[0018] Effects of the Invention

[0019] According to the present invention, it is possible to provide an optical interference tomography apparatus capable of acquiring the envelope of an interference pattern signal of interference light with high accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 This is a structural diagram of an optical interference tomography apparatus according to an embodiment.

[0021] Figure 2 yes Figure 1 A top view of the reflector device is shown.

[0022] Figure 3 is along Figure 2 A cross-sectional view of the mirror device along line III-III is shown.

[0023] Figure 4 yes Figure 1 A top view of a pixel of a light sensor is shown.

[0024] Figure 5 yes Figure 4 A cross-sectional view of a pixel is shown.

[0025] Figure 6 This is a potential distribution diagram for explaining the signal charge accumulation operation.

[0026] Figure 7 This is a potential distribution diagram for explaining the discharge operation of unnecessary charges.

[0027] Figure 8 It is shown in Figure 1 FIG. 4 is a graph of an interference pattern signal of interference light obtained by each pixel of the optical sensor shown.

[0028] Fig. 9 is imposed on Figure 1 The timing diagram of the electrical signals of each pixel of the photosensor shown.

[0029] Fig.10 : is a graph showing the relationship between the temporal change of the position of the movable reflecting mirror and the temporal change of the intensity of the interference light.

[0030] Fig.11 : is a graph showing the relationship between the temporal change of the position of the movable reflecting mirror and the temporal change of the intensity of the interference light.

[0031] Fig.12 : is a graph showing the relationship between the temporal change of the position of the movable reflecting mirror and the temporal change of the intensity of the interference light.

[0032] Fig.13 : is a graph showing the relationship between the temporal change of the position of the movable reflecting mirror and the temporal change of the intensity of the interference light.

[0033] Fig.14 FIG. 1 is a plan view of a pixel of a photosensor according to a modified example.

[0034] Fig.15 It is a diagram for explaining a light receiving portion of a photosensor according to a modified example.

[0035] Fig.16 It is a diagram for explaining a light receiving portion of a photosensor according to a modified example. DETAILED DESCRIPTION

[0036] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In addition, the same reference numerals are given to the same or corresponding parts in each figure, and repeated descriptions are omitted.

[0037] [Structure of optical interference tomography apparatus]

[0038] Figure 1 This is a structural diagram of an optical interference tomography apparatus according to an embodiment. Figure 1 The optical interference tomography apparatus 100 shown is an apparatus using TD-OCT and includes a light source 10 , a mirror device 20 , a support unit 30 , a beam splitter 40 , a light sensor 50 , and a control unit 60 .

[0039] The light source 10 emits light L0 which is low coherence light. The light source 10 is, for example, an SLD (Super Luminescent Diode) that emits light having a central wavelength of 650 nm and a coherence length of 20 μm.

[0040] The mirror device 20 includes a movable mirror 21. The movable mirror 21 reciprocates in a direction perpendicular to a mirror surface 21a of the movable mirror 21.

[0041] The support unit 30 supports the object S. The support unit 30 is, for example, a belt conveyor that conveys the object S. The object S is, for example, a transparent plastic film for packaging.

[0042] The beam splitter 40 generates interference light L10 by splitting the light L0 emitted from the light source 10 into a first light L1 and a second light L2, and coupling the first light L1 reflected by the movable reflector 21 and the second light L2 reflected by the object S (specifically, the second light L2 reflected or scattered inside or on the surface of the object S).

[0043] The optical sensor 50 detects the interference light L10 generated by the beam splitter 40. The optical sensor 50 includes a plurality of pixels 51 and a CMOS readout circuit (not shown). The plurality of pixels 51 are arranged two-dimensionally. The plurality of pixels 51 and the CMOS readout circuit (not shown) are formed monolithically on a semiconductor substrate (e.g., a silicon substrate).

[0044] The control unit 60 is electrically connected to each of the light source 10, the reflector device 20, the support unit 30, and the optical sensor 50. The control unit 60 has a function as a signal generating unit that generates an electrical signal for operating each unit and applies the electrical signal to each unit, and a function as a signal processing unit that processes the electrical signal output from the optical sensor 50. The control unit 60 includes, for example, an integrated circuit such as an FPGA (field-programmable gate array), a non-volatile memory such as an EEPROM (Electrically Erasable Programmable Read-Only Memory), a PC (Personal Computer), and the like.

[0045] In the present embodiment, the light L0 emitted from the light source 10 is collimated by the collimating lens 70 and is incident on the beam splitter 40. The first light L1 of the light L0 incident on the beam splitter 40 is reflected by the beam splitter 40 and is incident on the movable reflector 21, and is reflected by the movable reflector 21 and is incident on the beam splitter 40. The second light L2 of the light L0 incident on the beam splitter 40 is transmitted through the beam splitter 40 and is incident on the object S, and is reflected by the object S and is incident on the beam splitter 40.

[0046] The first light L1 incident on the beam splitter 40 is transmitted through the beam splitter 40. The second light L2 incident on the beam splitter 40 is reflected by the beam splitter 40. The interference light L10 of the first light L1 and the second light L2 generated in this way is incident on each pixel 51 of the optical sensor 50 via the relay lens 80. The relay lens 80 is composed of a lens arranged between the beam splitter 40 and the optical sensor 50, and forms a real image of the object S on the plurality of pixels 51.

[0047] In addition, the relay lens 80 may also be composed of a lens arranged between the beam splitter 40 and the support portion 30. Alternatively, the relay lens 80 may also be composed of a lens arranged between the beam splitter 40 and the optical sensor 50 and a lens arranged between the beam splitter 40 and the support portion 30. In addition, a focusing lens may be arranged between the beam splitter 40 and the reflector device 20. This is effective when the diameter of the reflector surface 21a of the movable reflector 21 is small. In addition, Figure 1 The support portion 30 is arranged at the position of the reflector device 20 shown in FIG. Figure 1 The support portion 30 is shown in a position to configure the mirror device 20 .

[0048] [Structure of the reflector device]

[0049] Figure 2 yes Figure 1 A top view of the reflector device 20 is shown. Figure 3 is along Figure 2 FIG. 2 is a cross-sectional view of the reflector device 20 along line III-III. Figure 2 and Figure 3As shown, the reflector device 20 includes, in addition to the movable reflector 21, a base 22, a frame 23, and a plurality of elastic support portions 24. The movable reflector 21, the base 22, the frame 23, and the plurality of elastic support portions 24 are composed of an SOI (Silicon On Insulator) substrate 200. That is, the reflector device 20 is a MEMS (MicroElectro Mechanical Systems) reflector device. The SOI substrate 200 has: a support layer 201, a device layer 202, and an intermediate layer 203. The support layer 201 and the device layer 202 are semiconductor layers (e.g., silicon layers), respectively. The intermediate layer 203 is an insulating layer (e.g., a silicon oxide layer) disposed between the support layer 201 and the device layer 202.

[0050] The base 22 is formed of the support layer 201 and has, for example, a disk shape. The base 22 has an opening 22a. When viewed from the thickness direction of the base 22, the opening 22a has, for example, a circular shape centered at the center of the base 22. The thickness of the base 22 is, for example, about 320 μm.

[0051] The frame 23 is formed of the device layer 202 and has, for example, an annular shape. The frame 23 is disposed on the surface 22b of the base 22 on the intermediate layer 203 side via the intermediate layer 203. The thickness of the frame 23 is, for example, about 30 μm. The thickness of the intermediate layer 203 is, for example, about 1.5 μm.

[0052] The movable reflector 21 is formed by the device layer 202 and is, for example, in the shape of a disk. The movable reflector 21 is arranged inside the frame 23 and is opposite to the opening 22a in the thickness direction of the base 22. A metal film 25 constituting the reflector surface 21a is arranged on the surface 21b of the movable reflector 21 opposite to the opening 22a. The thickness of the movable reflector 21 is, for example, about 30 μm. The diameter of the movable reflector 21 is, for example, about 500 μm.

[0053] A plurality of elastic support portions 24 are formed by the device layer 202. When viewed from the thickness direction of the base 22, each elastic support portion 24 is, for example, in an arc shape centered on the center of the base 22. Each elastic support portion 24 is disposed between the frame portion 23 and the movable reflector 21. One end of each elastic support portion 24 is connected to the frame portion 23, and the other end of each elastic support portion 24 is connected to the movable reflector 21. In the thickness direction of the base 22, each elastic support portion 24 is opposite to a peripheral portion 22c of an opening 22a of the base 22. A gap is formed between each elastic support portion 24 and the peripheral portion 22c.

[0054] A pair of electrode pads 26 are disposed on the surface 22b of the base 22. Each electrode pad 26 is located in an opening 23a formed in the frame 23 and the intermediate layer 203 in a manner that the surface 22b of the base 22 is exposed. A pair of electrode pads 27 are disposed on the surface 23b of the frame 23 that is opposite to the intermediate layer 203. When viewed from the thickness direction of the base 22, the pair of electrode pads 26 and the pair of electrode pads 27 are arranged at intervals of 90 degrees with the center of the base 22 as the center in a manner that the electrode pads 26 and the electrode pads 27 are alternately arranged. A control unit 60 (see FIG. 6 ) is connected to each of the electrode pads 26 and 27. Figure 1 ) Electrically connected wire 28.

[0055] In the reflector device 20 configured as described above, when the control unit 60 (see Figure 1 ) When an electric signal is applied to the electrode pads 26 and 27 via the wire 28, an electrostatic force is periodically generated between each elastic support portion 24 and the peripheral portion 22c. As a result, each elastic support portion 24 is periodically elastically deformed, and the movable reflector 21 reciprocates in a direction perpendicular to the reflector surface 21a. The movable reflector 21 reciprocates at a frequency of 1 kHz or more (for example, 100 kHz) by resonating in the reflector device 20.

[0056] [Structure of optical sensor]

[0057] Figure 4 yes Figure 1 A top view of a pixel 51 of a light sensor 50 is shown. Figure 5 (a) is along Figure 4 A cross-sectional view of a pixel 51 along the Va-Va line shown in FIG. Figure 5 (b) is along Figure 4 4. A cross-sectional view of a pixel 51 along the Vb-Vb line shown in FIG. Figure 4 and Figure 5 As shown in FIG. 1 , the optical sensor 50 includes a semiconductor substrate 1 having a first main surface 1a and a second main surface 1b facing each other. The semiconductor substrate 1 includes a p-type first semiconductor region 3 located on the first main surface 1a side, and a p-type first semiconductor region 3 located on the second main surface 1b side having a lower impurity concentration than the first semiconductor region 3. - The semiconductor substrate 1 can be formed by, for example, forming a p-type semiconductor substrate having a lower impurity concentration than the semiconductor substrate on a p-type semiconductor substrate. - An insulating layer 7 is formed on the second main surface 1 b (second semiconductor region 5 ) of the semiconductor substrate 1 .

[0058] The photogate electrode PG is disposed on the insulating layer 7. The photogate electrode PG is, for example, rectangular in plan view. The region (in the region between the semiconductor substrate 1 and the second semiconductor region 5) corresponding to the photogate electrode PG is Figure 5 The region below the photogate electrode PG in FIG. 5 functions as a light receiving portion 2 that generates electric charge according to incident light. That is, the optical sensor 50 includes a plurality of light receiving portions 2 arranged two-dimensionally.

[0059] In the second semiconductor region 5, third semiconductor regions 9a and 9b of n-type with high impurity concentration are formed relatively in each of the regions separated and positioned from the gate electrode PG. The third semiconductor region 9a is a first charge accumulation section for accumulating charges generated by the light receiving section 2, and the third semiconductor region 9b is a second charge accumulation section for accumulating charges generated by the light receiving section 2. The third semiconductor regions 9a and 9b are arranged relatively with the gate electrode PG sandwiched therebetween. The third semiconductor regions 9a and 9b are, for example, square in a plan view.

[0060] In the second semiconductor region 5, third semiconductor regions 9c and 9d of n-type with high impurity concentration are formed relatively in each of the regions separated and positioned from the gate electrode PG. The third semiconductor region 9c is a third charge accumulation section for accumulating charges generated by the light receiving section 2, and the third semiconductor region 9d is a fourth charge accumulation section for accumulating charges generated by the light receiving section 2. The third semiconductor regions 9c and 9d are arranged relatively with the gate electrode PG sandwiched therebetween. The third semiconductor regions 9c and 9d are, for example, square in a plan view.

[0061] The third semiconductor regions 9a and 9c are disposed opposite to each other with a fourth semiconductor region 11a described later interposed therebetween. The third semiconductor regions 9b and 9d are disposed opposite to each other with a fourth semiconductor region 11b described later interposed therebetween.

[0062] In the second semiconductor region 5, fourth semiconductor regions 11a and 11b of n-type with high impurity concentration are formed in each of the regions separated and positioned from each gate electrode PG. The fourth semiconductor regions 11a and 11b are charge discharge portions for discharging charges generated by the light receiving portion 2 to the outside. In the present embodiment, three pairs of fourth semiconductor regions 11a and 11b are arranged relative to the gate electrode PG. The fourth semiconductor regions 11a and 11b are arranged relative to each other with the gate electrode PG sandwiched therebetween. The fourth semiconductor regions 11a and 11b are, for example, square in a plan view.

[0063] In this embodiment, “high impurity concentration” means, for example, that the impurity concentration is 1×10 17 cm -3 On the other hand, “low impurity concentration” means, for example, 10×10 15 cm-3 The thickness and impurity concentration of each semiconductor region are as follows. The thickness of the first semiconductor region 3: 10 to 1000 μm / impurity concentration: 1×10 12 ~10 19 cm -3 . The thickness of the second semiconductor region 5: 1 to 50 μm / impurity concentration: 1×10 12 ~10 15 cm -3 The thickness of the third semiconductor regions 9a, 9b and the fourth semiconductor regions 11a, 11b is 0.1 to 1 μm and the impurity concentration is 1×10 18 ~10 20 cm -3 .

[0064] A reference potential such as a ground potential is applied to the semiconductor substrate 1 (the first semiconductor region 3 and the second semiconductor region 5 ) via a back gate or a through electrode.

[0065] On the insulating layer 7, a transmission electrode TX1, a transmission electrode TX2, a transmission electrode TX3, and a transmission electrode TX4 are arranged corresponding to the grating electrode PG. The transmission electrode TX1 is located between the grating electrode PG and the third semiconductor region 9a, and is arranged separately from the grating electrode PG. The transmission electrode TX2 is located between the grating electrode PG and the third semiconductor region 9b, and is arranged separately from the grating electrode PG. The transmission electrode TX3 is located between the grating electrode PG and the third semiconductor region 9c, and is arranged separately from the grating electrode PG. The transmission electrode TX4 is located between the grating electrode PG and the third semiconductor region 9d, and is arranged at a distance from the grating electrode PG. The transmission electrodes TX1 to TX4 are, for example, rectangular in a plan view.

[0066] The region ( Figure 5 The region (a region below the transfer electrode TX1) of the semiconductor substrate 1 (the second semiconductor region 5) corresponding to the transfer electrode TX2 functions as a transfer gate 4a for transferring the charge generated by the light receiving section 2 to the third semiconductor region 9a as the first charge storage section. Figure 5 The semiconductor region 4b (a region located below the transfer electrode TX2) functions as a transfer gate 4b for transferring the charges generated by the light receiving section 2 to the third semiconductor region 9b serving as the second charge storage section.

[0067] The region ( Figure 5The area (a region below the transfer electrode TX3) of the semiconductor substrate 1 (the second semiconductor region 5) corresponding to the transfer electrode TX4 functions as a transfer gate 4c for transferring the charge generated by the light receiving unit 2 to the third semiconductor region 9c as the third charge storage unit. Figure 5 The region located below the transfer electrode TX4 in the semiconductor device 1 functions as a transfer gate 4d for transferring the charges generated by the light receiving section 2 to the third semiconductor region 9d serving as a fourth charge storage section.

[0068] On the insulating layer 7, a plurality of (six in this case) transfer electrodes TX5 are arranged corresponding to the gate electrode PG. A portion of one side of the gate electrode PG among the plurality of transfer electrodes TX5 is located between the gate electrode PG and the fourth semiconductor region 11a, sandwiching the transfer electrode TX1 and the transfer electrode TX3 and being arranged separately from the gate electrode PG. The remaining portion of the other side of the gate electrode PG among the plurality of transfer electrodes TX5 is located between the gate electrode PG and the fourth semiconductor region 11b, sandwiching the transfer electrode TX2 and the transfer electrode TX4 and being arranged separately from the gate electrode PG. The transfer electrode TX5 is, for example, rectangular in a plan view.

[0069] The area ( Figure 5 The region below the transfer electrode TX5 on one side of the semiconductor substrate 1 (the second semiconductor region 5) functions as a discharge gate 6a for transferring the charge generated by the light receiving unit 2 to the fourth semiconductor region 11a as the charge discharge unit. The region ( Figure 5 The region below the transfer electrode TX5 on the other side of the light receiving section 2 functions as a discharge gate 6b for transferring the charges generated by the light receiving section 2 to the fourth semiconductor region 11b as a charge discharge section. Thus, the discharge gates 6a and 6b are discharge gates for discharging the charges generated by the light receiving section 2.

[0070] In addition, the length dimension of the transmission electrodes TX1~TX5 in the relative direction to the grating electrode PG, that is, the gate width of the transmission electrodes TX1~TX5, is determined according to the transmittable distance of the signal charges and the unnecessary charges in a manner that covers the area of ​​the grating electrode PG where the transmission electrodes TX1~TX5 can perform high-speed transmission of signal charges and unnecessary charges.

[0071] The insulating layer 7 is provided with a contact hole for exposing the surface of the first semiconductor region 3. In the contact hole, a conductor 13 for connecting the third semiconductor regions 9a to 9d and the fourth semiconductor regions 11a and 11b to the outside is arranged. The semiconductor substrate is made of Si as an example, and the insulating layer 7 is made of SiO2 as an example. The gate electrode PG and the transfer electrodes TX1 to TX5 are made of polysilicon as an example. In addition, they can also use other materials.

[0072] As described above, the third semiconductor regions 9a to 9d are regions for accumulating charges generated by the light receiving section 2 in response to incident light. The phases of the charge transfer signals applied to the transfer electrodes TX1 to TX4 are different from each other. The light incident on one pixel 51 is converted into charges in the light receiving section 2, and the charges generated by the light receiving section 2 are attracted to the transfer gates 4a to 4d and the discharge gates 6a and 6b through the gate electrode PG to which a voltage is applied. The attracted charges, as signal charges, travel in the direction of the transfer electrodes TX1 to TX4 according to the potential gradient formed by the voltage applied to the gate electrode PG and the transfer electrodes TX1 to TX4.

[0073] When a positive potential is applied to the transmission electrodes TX1~TX4, the potential under the transmission electrodes TX1~TX4 becomes lower relative to the electrons than the potential of the portion of the semiconductor substrate 1 (the second semiconductor region 5) under the grating electrode PG, and negative charges (electrons) are introduced along the direction of the transmission electrodes TX1~TX4 and accumulated in the potential well formed by the third semiconductor regions 9a~9d.

[0074] The n-type semiconductor contains positively ionized donors, has a positive potential, and attracts electrons. When a potential lower than the positive potential (ground potential) is applied to the transmission electrodes TX1 to TX4, a potential barrier is generated by the transmission electrodes TX1 to TX4, and the charges generated in the semiconductor substrate 1 are not introduced into the third semiconductor regions 9a to 9d.

[0075] The fourth semiconductor regions 11a and 11b are regions for collecting unnecessary charges generated by the light receiving unit 2 according to the incident light and discharging them to the outside. The light incident on one pixel 51 is converted into charges in the light receiving unit 2, and the charges generated by the light receiving unit 2 are attracted to the transfer gates 4a to 4d and the discharge gates 6a and 6b through the gate electrode PG to which the voltage is applied. The attracted charges, as unnecessary charges, travel in the direction of the transfer electrode TX5 according to the potential gradient formed by the voltage applied to the gate electrode PG and the transfer electrode TX5.

[0076] When a positive potential is applied to the transmission electrode TX5, the potential under the transmission electrode TX5 becomes lower than the potential of the semiconductor substrate 1 (second semiconductor region 5) under the grating electrode PG relative to the electrons, and negative charges (electrons) are introduced in the direction of the transmission electrode TX5 and accumulated in the potential well formed by the fourth semiconductor regions 11a and 11b. When a potential lower than the positive potential (ground potential) is applied to the transmission electrode TX5, a potential barrier is generated by the transmission electrode TX5, and the charges generated in the semiconductor substrate 1 are not introduced into the fourth semiconductor regions 11a and 11b.

[0077] Figure 6 This is a diagram showing “potential distribution in the vicinity of the second main surface 1 b of the semiconductor substrate 1 ” for explaining the signal charge accumulation operation. Figure 7 2 is a diagram showing a "potential distribution near the second main surface 1b of the semiconductor substrate 1" for explaining the discharge operation of unnecessary charges. Figure 6 and Figure 7 In , downward is the positive direction of the potential. Figure 6 In (a) and (b), Figure 4 The potential distribution along the transverse direction of the cross section of Figure 5 The potential distribution along the transverse direction of the cross section. Figure 7 In (a), it is shown Figure 4 The potential distribution along the transverse direction of the cross section of Figure 5 The electric potential distribution along the transverse direction of the cross section.

[0078] exist Figure 6 and Figure 7 , the potential φ of the region directly below the transfer electrode TX1 (transfer gate 4a) is shown. TX1 , the potential φ of the area directly below the transfer electrode TX2 (transfer gate 4b) TX2 , the potential φ of the area directly below the transfer electrode TX5 (discharge gates 6a, 6b) TX5 , the potential φ of the light receiving unit 2 directly below the grating electrode PG PG , the potential φ of the third semiconductor region 9a FD1 , the potential φ of the third semiconductor region 9b FD2 , the potential φ of the fourth semiconductor region 11a OFD1 , the potential φ of the fourth semiconductor region 11b OFD2 .

[0079] The potential φ of the light receiving unit 2 directly below the grating electrode PG PG , when the potential of the area directly below the adjacent transfer electrodes TX1, TX2 and the transfer electrode TX5 is not biased (φ TX1 ,φTX2 ,φ TX5 ) is the reference potential, it is set higher than the reference potential. PG becomes greater than the potential φ TX1 ,φ TX2 ,φ TX5 The potential distribution in this area becomes a downward concave shape in the figure.

[0080] Reference Figure 6 , which explains the accumulation action of signal charge. When the phase of the charge transfer signal applied to the transfer electrode TX1 is 0 degrees, a positive potential is applied to the transfer electrode TX1, and a reverse potential, that is, a potential with a phase of 180 degrees (ground potential) is applied to the transfer electrode TX2. In this case, Figure 6 As shown in (a), the negative charge e generated by the light receiving unit 2 passes through the potential φ of the area directly below the transfer electrode TX1. TX1 It drops down and flows into the potential well of the third semiconductor region 9a.

[0081] On the other hand, the potential φ of the area directly below the transfer electrode TX2 is TX2 The charge does not flow into the potential well of the third semiconductor region 9b. Since n-type impurities are added to the third semiconductor regions 9a and 9b, the potential is depressed in the positive direction.

[0082] When the phase of the charge transfer signal applied to the transfer electrode TX2 is 0 degrees, a positive potential is applied to the transfer electrode TX2, and a potential with an opposite phase, that is, a potential with a phase of 180 degrees (ground potential) is applied to the transfer electrode TX1. Figure 6 As shown in (b), the negative charge e generated by the light receiving unit 2 passes through the potential φ of the area directly below the transfer electrode TX2. TX2 On the other hand, the potential φ of the region directly below the transfer electrode TX1 is TX1 The charge does not fall, and the charge does not flow into the potential well of the third semiconductor region 9a. As a result, the signal charge is collected and accumulated in the potential well of the third semiconductor region 9b. Thus, a potential inclination is formed here with respect to the light receiving unit 2.

[0083] During the period when the charge transfer signals with a phase difference of 180 degrees are applied to the transfer electrodes TX1 and TX2, the ground potential is applied to the transfer electrode TX5. Figure 6 As shown in (c), the potential φ of the area directly below the transmission electrode TX5 TX3 The potential does not drop, and the charges do not flow into the potential wells of the fourth semiconductor regions 11 a and 11 b.

[0084] Thus, the signal charge is collected and accumulated in the potential wells of the third semiconductor regions 9a and 9b. The signal charge accumulated in the potential wells of the third semiconductor regions 9a and 9b is read out to the outside. In addition, in the above example, the group of the transmission electrode TX1 and the transmission electrode TX2 is described, and the same is true for the group of the transmission electrode TX3 and the transmission electrode TX4.

[0085] The state in which the transfer electrodes TX1 to TX4 are applied with a predetermined potential as described above and the regions directly below them, i.e., the transfer gates 4a to 4d, are capable of transferring charges to each of the third semiconductor regions 9a to 9d, is sometimes referred to as a charge transfer state. In addition, the state in which the transfer gates 4a to 4d are in the charge transfer state is sometimes referred to as the state in which the transfer gates 4a to 4d are in the ON state.

[0086] Next, refer to Figure 7 , which explains the discharge action of unnecessary charges. A ground potential is applied to the transmission electrode TX1 and the transmission electrode TX2 (further, the transmission electrode TX3 and the transmission electrode TX4). Figure 7 As shown in (a), the potential φ of the area directly below the transfer electrode TX1 and the transfer electrode TX2 is TX1 ,φ TX2 The potential does not drop, and the charges do not flow into the potential wells of the third semiconductor regions 9a and 9b.

[0087] On the other hand, a positive potential is applied to the transmission electrode TX5. Figure 7 As shown in (b), the negative charge e generated by the light receiving unit 2 passes through the potential φ of the area directly below the transfer electrode TX5. TX5 The electric charge falls and flows into the potential wells of the fourth semiconductor regions 11a and 11b. As a result, the unnecessary electric charge is collected in the potential wells of the fourth semiconductor regions 11a and 11b. The unnecessary electric charge collected in the potential wells of the fourth semiconductor regions 11a and 11b is discharged to the outside.

[0088] Sometimes, the state in which a predetermined potential is applied to the transfer electrode TX5 as described above and the region directly below them, namely, the discharge gates 6a and 6b, is in a state capable of transferring charges to the fourth semiconductor regions 11a and 11b is referred to as a charge discharge state. In addition, sometimes, the state in which the discharge gates 6a and 6b are in a charge transfer state is referred to as the state in which the discharge gates 6a and 6b are in an ON state.

[0089] In addition, the optical sensor 50 includes a reset transistor (not shown) provided in the pixel 51. A reset process is performed by applying a reset voltage to the reset transistor. The reset voltage is a positive voltage based on the potential of the gate electrode PG. As a result, the charge accumulated in the third semiconductor region 9a to 9d, etc., which is the charge accumulation portion, is discharged to the outside and the charge is not accumulated.

[0090] [Control unit actions]

[0091] Figure 8 It is shown in Figure 1 In the structure shown, when the movable reflector 21 is moved in either direction of the two arrows over a distance longer than the coherence length of the light L0, a graph of the interference pattern signal of the interference light L10 obtained at each pixel 51 of the optical sensor 50 is shown. The envelope of the interference pattern signal represents the structure of the object S in the depth direction. The width of the envelope is determined by the coherence length of the light L0 and defines the resolution of the optical interference tomography apparatus 100 in the depth direction. When the movable reflector 21 is driven as a short-distance reciprocating motion and the speed of the movable reflector 21 during the motion is set to be constant, the resolution of the object S in the depth direction is determined by the coherence length of the light L0. Figure 8 The interference pattern signal shown cuts off a portion of the time range, and the interference pattern signal obtained thereby is set as a signal in a time-reciprocating form. In the optical interference tomography device 100, the period of the interference pattern signal of the interference light L10 corresponds to half of the central wavelength (or peak wavelength) of the light L0 emitted from the light source 10. Therefore, the control unit 60 applies an electrical signal to each pixel 51 of the optical sensor 50 in such a manner that for each period of the interference pattern signal of the interference light L10, in four mutually separated time ranges, the four transfer gates 4a, 4b, 4c, and 4d are successively in a charge transfer state, and in a time range outside the four time ranges, a plurality of discharge gates 6a and 6b are simultaneously in a charge discharge state.

[0092] Hereinafter, assuming that the period of the interference pattern signal of the interference light L10 is T, the electrical signal applied to each pixel 51 of the optical sensor 50 will be described in more detail. Fig. 9 2 is a timing chart of the electrical signal applied to each pixel 51 of the optical sensor 50 .

[0093] The electric signal VTX1 is an electric signal applied to the transfer electrode TX1, and is an electric signal that sets the transfer gate 4a to the charge transfer state (ON state) in the time range T1 (<t / 4) that repeats with a period T. The electric signal VTX2 is an electric signal applied to the transfer electrode TX2, and is an electric signal that sets the transfer gate 4b to the charge transfer state (ON state) in the time range T2 (<t / 4) that repeats with a period T. The electric signal VTX2 is phase-delayed by an amount T / 4 relative to the electric signal VTX1.

[0094] The electric signal VTX3 is an electric signal applied to the transfer electrode TX3, and is an electric signal that sets the transfer gate 4c to the charge transfer state (ON state) in the time range T3 (<t / 4) that repeats with a period T. The electric signal VTX3 is phase-delayed by an amount T / 4 relative to the electric signal VTX2. The electric signal VTX4 is an electric signal applied to the transfer electrode TX4, and is an electric signal that sets the transfer gate 4d to the charge transfer state (ON state) in the time range T4 (<t / 4) that repeats with a period T. The electric signal VTX4 is phase-delayed by an amount T / 4 relative to the electric signal VTX3.

[0095] The electrical signal VTX5 is an electrical signal applied to the plurality of discharge gates 6a and 6b at the same time, and is an electrical signal that sets the plurality of discharge gates 6a and 6b to a charge discharge state (ON state) in a time range other than the time ranges T1, T2, T3, and T4 (in other words, in a time range T5 repeated with a period T / 4). In addition, the time ranges T1, T2, T3, and T4 are the same length as each other. In addition, the time ranges T1, T2, T3, and T4 are shorter than the time range T5.

[0096] The control unit 60 applies the above electrical signals VTX1, VTX2, VTX3, VTX4, and VTX5 to each pixel 51 of the optical sensor 50, thereby obtaining the four intensities V0, V1, V2, and V3 of the interference light L10 at each period T of the interference pattern signal of the interference light L10. Based on the obtained four intensities V0, V1, V2, and V3 of the interference light L10, the control unit 60 obtains the following at each period T of the interference pattern signal of the interference light L10:

[0097] AMP component = [{V3-V1) 2 +(V2-V0) 2} 1 / 2 ] / 2

[0098] OFF component = (V0+V1+V2+V3) / 4.

[0099] Thus, the control unit 60 can reproduce the envelope of the interference pattern signal of the interference light L10 with high accuracy for each pixel 51 of the optical sensor 50 , and can generate an image (tomographic image) of the object S with high accuracy.

[0100] [Function and Effect]

[0101] In the optical interference tomography apparatus 100, the time variation of the interference pattern signal is set to a periodic variation by reciprocating the movable reflector 21, and the conversion to the envelope of the interference pattern signal is facilitated. In addition, for each pixel 51 included in the optical sensor 50, for each cycle of the interference pattern signal of the interference light L10, in four mutually separated time ranges, a plurality of transfer gates 4a, 4b, 4c, and 4d are successively in a charge transfer state, and in a time range other than the four time ranges, the discharge gates 6a and 6b are simultaneously in a charge discharge state. Thus, in each of the four time ranges, the charge generated only by the light receiving unit 2 can be obtained as a signal charge. Therefore, according to the optical interference tomography apparatus 100, the envelope of the interference pattern signal of the interference light L10 can be obtained with high precision. The acquisition of the signal charge as described above is particularly effective when the speed of the reciprocating motion of the movable reflector 21 is not constant and the interference pattern signal of the interference light L10 is asymmetrical.

[0102] In the optical interference tomography apparatus 100, the movable mirror 21 reciprocates by resonating in the mirror device 20. Thus, the interference pattern signal of the interference light L10 can be obtained at a high speed. In addition, since the movable mirror 21 resonates, the speed of the reciprocating movement of the movable mirror 21 becomes non-constant. Even in this case, as described above, the envelope of the interference pattern signal of the interference light L10 can be obtained with high accuracy.

[0103] In the optical interference tomography device 100, the movable mirror 21 reciprocates at a frequency of 1kHz or more. Thus, the interference pattern signal of the interference light L10 can be obtained at high speed. In addition, since the movable mirror 21 reciprocates at a frequency of 1kHz or more, the speed of the reciprocating movement of the movable mirror 21 becomes difficult to be constant. Even in this case, as described above, the envelope of the interference pattern signal of the interference light L10 can be obtained with high precision. In addition, in the case where the movable mirror 21 reciprocates at a frequency less than 1kHz, the interference pattern signal of the interference light L10 can be converted into its envelope by using a conventional two-dimensional sensor (high-speed camera, etc.) to digitize the two-dimensional image and perform image processing. However, in the case where the movable mirror 21 reciprocates at a frequency of 1kHz or more, it is difficult to convert the interference pattern signal of the interference light L10 into its envelope using a conventional two-dimensional sensor (high-speed camera, etc.).

[0104] In the optical interference tomography apparatus 100, a plurality of pixels 51 are arranged two-dimensionally. Thus, an image of a predetermined area of ​​the object S can be generated at one time. In addition, in the case where the interference light L10 is detected by a single PD, the interference pattern signal of the interference light L10 can be converted into its envelope by performing digital signal processing after AD conversion of the waveform data at high speed. However, in the case where the interference light L10 is detected by a plurality of PDs arranged two-dimensionally, it is difficult to process the waveform data at high speed and convert the interference pattern signal of the interference light L10 into its envelope.

[0105] In the optical interference tomography apparatus 100, the mirror device 20 is a MEMS mirror device, so that the movable mirror 21 can be reciprocated at high speed.

[0106] In the optical interference tomography apparatus 100, each pixel 51 includes a grating electrode PG. As a result, the transfer and discharge of the charge generated by the light receiving unit 2 can be performed at a high speed, so that the image of the object S can be generated in a short time. That is, since the envelope of the interference pattern signal of the interference light L10 can be obtained at a high speed, the image of the object S can be generated as an instantaneous image. The ability to generate the image of the object S as an instantaneous image is extremely effective when the object S is a moving object, such as when the object S is transported by the support unit 30.

[0107] [Modifications]

[0108] The present invention is not limited to the above-mentioned embodiment. For example, in the above-mentioned embodiment, each time range T1, T2, T3, T4 is the same length as each other, but each time range T1, T2, T3, T4 may not be the same length as each other. In the above-mentioned embodiment, the start timing (timing) of the time range T5 in which the discharge gates 6a and 6b are set to the charge discharge state is consistent with the end timing of each time range T1, T2, T3, T4 in which each transfer gate 4a, 4b, 4c, 4d is set to the charge transfer state, but as long as the end timing of the time range T5 is consistent with the start timing of each time range T1, T2, T3, T4, the start timing of the time range T5 may be delayed from the end timing of each time range T1, T2, T3, T4.

[0109] The control unit 60 may also apply an electrical signal to the optical sensor 50 in such a manner that, for each cycle of the interference pattern signal of the interference light L10, in at least three time ranges separated from each other, a plurality of transfer gates (at least two of the transfer gates 4a, 4b, 4c, and 4d) are successively placed in a charge transfer state, and in a time range other than the at least three time ranges, a discharge gate (at least one of the discharge gates 6a and 6b) is placed in a charge discharge state.

[0110] If charges are acquired in at least three mutually separated time ranges for each cycle of the interference pattern signal of the interference light L10, the reason why the interference pattern signal of the interference light L10 can be reproduced is as follows. First, the interference pattern signal I of the interference light L10 can be represented by a sinusoidal function of the phase difference. That is, it can be expressed as I=A+B·cosφ. Here, the central wavelength of the light L0 is set to λ. For example, it is assumed that the reflector device 20 reciprocates with sinusoidal vibrations at a maximum displacement L and an angular frequency ω. At this time, φ=(2π / λ)·L·sin(ωt)+φ0. Furthermore, for example, when L=λ / 2,

[0111] I=A+B·cos{π·sin(ωt)+φ0}

[0112] In this formula, the unknowns are A, B, and φ0. Therefore, if charges are acquired in at least three mutually separated time ranges for each cycle of the interference pattern signal of the interference light L10, the value of B representing its envelope can be reproduced based on the interference pattern signal of the interference light L10.

[0113] Each of the at least three time ranges (for example, four time ranges) in which the charge is obtained in each period of the interference pattern signal of the interference light L10 may be a time range centered on the time when the phase of the interference pattern signal of the interference light L10 is shifted by π / 2. Accordingly, the operation for converting the interference pattern signal of the interference light L10 into its envelope can be simplified. By simplifying the operation, a part or all of the operation can be implemented in hardware, and it can contribute to the overall high-speed processing. For example, when the initial phase is set to φ0 in the above-mentioned I=A+B·cosφ, the I when the phase is shifted from the initial phase by 0, π / 2, π, and 3π / 2 is set to I0, I1, I2, I3, I4, I5, I6, I7, I8, I9, I10, I11, I22, I12, I13, I14, I15, I16, I17, I18, I19, I21, I22, I23, I24, I25, I26, I27, I28, I29, I30, I31 π / 2 ,I π ,I 3π / 2 hour,

[0114] I0=A+B·cos(0+φ0)=A+B·cosφ0

[0115] I π / 2 =A+B·cos(π / 2+φ0)=AB·sinφ0

[0116] I π =A+B·cos(π+φ0)=AB·cosφ0

[0117] I 3π / 2 =A+B·cos(3π / 2+φ0)=A+B·sinφ0

[0118] Thus, I0-I can be derived π =2B·cosφ0 and I 3π / 2 -Iπ / 2 =2B·sinφ0, and B can be found from the sum of their squares.

[0119] Fig.10 : is a graph showing the relationship between “temporal change in the position of the movable reflecting mirror 21 ” and “temporal change in the intensity of the interference light L10 when the initial phase φ0=0”. Fig.11 : This is a graph showing the relationship between “temporal change in the position of the movable reflecting mirror 21 ” and “temporal change in the intensity of the interference light L10 when the initial phase φ0=π / 2”. Fig.12 : This is a graph showing the relationship between “temporal change in the position of the movable reflecting mirror 21 ” and “temporal change in the intensity of the interference light L10 when the initial phase φ0=π”. Fig.13 : This is a graph showing the relationship between “temporal change in the position of the movable reflecting mirror 21 ” and “temporal change in the intensity of the interference light L10 when the initial phase φ0=3π / 2”.

[0120] exist Fig.10 , Fig.11 , Fig.12 and Fig.13 In any of the cases shown, if each of the four time ranges for acquiring the charge is set as a time range centered on the time when the phase is shifted by π / 2, the acquisition of the charge is not performed at a constant time interval. In such a case, in the optical interference tomography apparatus 100, since the charge is acquired in four mutually separated time ranges for each cycle of the interference pattern signal of the interference light L10, the envelope of the interference pattern signal of the interference light L10 can also be acquired with high accuracy.

[0121] For example, when one cycle of the interference pattern signal of the interference light L10 is divided into four time ranges (continuous time ranges), and charges are accumulated in each time range (that is, when all charges are acquired as signal charges without performing charge discharge at all), for example, when the speed of the reciprocating motion of the movable reflecting mirror 21 is not constant or when the acquisition of charges is not performed at a constant time interval (in the latter case, even if the speed of the reciprocating motion of the movable reflecting mirror 21 is constant), the interference pattern signal of the interference light L10 cannot be converted into its envelope with high accuracy. According to the optical interference tomography apparatus 100, the envelope of the interference pattern signal of the interference light L10 can be acquired with high accuracy in any case.

[0122] In the optical sensor 50, each pixel 51 may also be Fig.14 As shown, it includes two transmission gates 4a and 4b (in Fig.14, two transfer electrodes TX1 and TX2 corresponding to the two transfer gates 4a and 4b are shown). That is, each pixel 51 only needs to include a plurality of transfer gates. In the optical sensor 50, the plurality of pixels 51 may also be arranged in one dimension. The reflector device 20 may also be a structure in which the movable reflector 21 is reciprocated by a magnetic force, or a structure in which the movable reflector 21 is reciprocated by a driving source such as a piezoelectric actuator. According to the present invention, in an optical interference tomography apparatus having a reflector device in which the speed of movement of the movable reflector is not constant, the envelope of the interference pattern signal of the interference light can be obtained with high precision. At this time, in the case where the movement amount of the movable reflector deviates from the control signal, it is possible to easily compensate by adjusting the time ranges in which each transfer gate of the optical sensor is in the charge transfer state in coordination with the deviation of the movement amount of the movable reflector.

[0123] In the above-mentioned optical sensor 50, a grating structure light receiving unit is exemplified as the light receiving unit 2. However, the light receiving unit 2 is not limited to the grating structure and may also be other structures. Fig.15 As shown in (a), the light receiving unit 2 is an embedded PD structure. In this case, the light receiving unit 2 is composed of a PD provided in the second semiconductor region 5 on the second main surface 1b side. + The second semiconductor region 5 is composed of an n-type semiconductor region 2B and an n-type semiconductor region 2A provided in the second semiconductor region 5 just below the semiconductor region 2B.

[0124] In this case, in order to carry out high-speed charge transfer, the potential inclination can be set in the light receiving part 2. As an example of a structure to achieve this purpose, the following can be cited. Fig.15 As shown in (b) and (c) of FIG. 1 , the n-type semiconductor region 2A includes a plurality of (here, three) n-type semiconductor regions 2a, 2b, and 2c arranged in a manner such that the impurity concentration increases toward the transfer gate 4a, and the electric field has a gradient structure. In addition, Fig.15 (b) is a schematic cross-sectional view, Fig.15 (c) is a top view.

[0125] As a structure for setting the potential in the light receiving part 2, the inclined structure may also be as follows Fig.16 As shown, the n-type semiconductor region 2A includes a pair of n-type semiconductor regions 2d and 2e, and an n-type semiconductor region 2a sandwiched by the semiconductor regions 2d and 2e and having a width W that increases toward the transfer gate 4a. + The type of semiconductor region 2f, and the electric field has a gradient structure. In addition, Fig.16 This is a plan view from the second main surface 1b side.

[0126] In each structure of the above-mentioned embodiment, it is not limited to the above-mentioned material and shape, and various materials and shapes can be used. In addition, each structure of one embodiment or modification example mentioned above can be arbitrarily applied to each structure of other embodiments or modification examples.

[0127] Description of Reference Numerals

[0128] 100…optical interference tomography device, 2…light receiving unit, 4a, 4b, 4c, 4d…transmission grids, 6a, 6b…emission grids, 10…light source, 20…reflector device, 21…movable reflector, 30…support unit, 40…beam splitter, 50…light sensor, 51…pixel, PG…grating electrode, 60…control unit, L0…light, L1…first light, L2…second light, L10…interference light, S…object.

Claims

1. An optical interference tomography device, wherein: have: light source; A reflector device including a movable reflector that performs a reciprocating motion; a supporting portion that supports an object; a beam splitter that splits the light emitted from the light source into a first light and a second light, and generates interference light by coupling the first light reflected by the movable reflector and the second light reflected by the object; a light sensor that detects the interference light generated by the beam splitter; and a control unit, which is electrically connected to at least the optical sensor, The light sensor includes a plurality of pixels. Each of the plurality of pixels includes a light receiving portion that generates charges according to incident light, a plurality of transfer gates for transferring the charges generated by the light receiving portion, and a discharge gate for discharging the charges generated by the light receiving portion. The control unit applies an electrical signal to the photosensor in such a manner that, for each cycle of the interference pattern signal of the interference light, in at least three time ranges separated from each other, the multiple transfer gates are successively in a charge transfer state, and in a time range other than the at least three time ranges, the discharge gate is in a charge discharge state.

2. The optical interference tomography apparatus according to claim 1, wherein: The movable mirror reciprocates by resonating with the mirror element.

3. The optical interference tomography apparatus according to claim 1 or 2, wherein: The movable mirror reciprocates at a frequency of 1 kHz or more.

4. The optical interference tomography apparatus according to any one of claims 1 to 3, wherein: The plurality of pixels are arranged two-dimensionally.

5. The optical interference tomography apparatus according to any one of claims 1 to 4, wherein: The mirror device is a MEMS mirror device.

6. The optical interference tomography apparatus according to any one of claims 1 to 5, wherein: Each of the plurality of pixels further includes a photogate electrode that attracts the charges generated by the light receiving portion to the plurality of transfer gates and the discharge gate side.

7. The optical interference tomography apparatus according to any one of claims 1 to 6, wherein: Each of the at least three time ranges is a time range centered at a time at which the phase of the interference pattern signal is shifted by π / 2.

Citation Information

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