A soft start control method, device and circuit of a frequency converter

Abstract

The application discloses a soft start control method and device of a frequency converter and a soft start control circuit, wherein the soft start control method of the frequency converter comprises the following steps: acquiring a bus voltage; when the bus voltage is less than a preset first threshold value, adopting a first synchronization signal with a trigger angle movable interval of [90 DEG, 180 DEG]; and when the bus voltage is greater than or equal to the first threshold value, adopting a second synchronization signal with a trigger angle movable interval of [0 DEG, 180 DEG]. The first synchronization signal and the second synchronization signal are adopted for soft start, the first synchronization signal is used for a bus voltage rising process (from 0V to ), the interval is 90 DEG, namely the trigger angle movable interval is [90 DEG, 180 DEG], the trigger angle can be reduced from 180 DEG to 90 DEG along with the rising of the bus voltage, so that the situation that the trigger angle changes from 120 DEG to 0 DEG does not occur at the natural commutation point voltage (at this time, the trigger angle is 120 DEG), thereby solving the voltage step problem.

Description

Technical Field

[0001] This invention relates to the field of control circuit technology, and specifically to a soft-start control method, device, and soft-start control circuit for a frequency converter. Background Technology

[0002] Because a large-value capacitor is installed on the inverter bus for voltage regulation, a large instantaneous current is generated at the rectifier end to charge the bus during inverter power-on. To avoid power-on surge, existing technology provides a thyristor-based soft-start control method. Specifically, this control method uses a three-phase half-controlled rectifier topology, mainly by controlling the thyristor firing angle to increase the bus voltage. When the inverter is powered on, the soft-start controller obtains a firing angle slightly less than 180° (e.g., 179°) through a preset bus voltage bias value, causing the bus voltage to rise. The rise in bus voltage causes the firing angle to decrease, i.e., the firing range to increase. The increase in firing range causes the bus voltage to rise further... This cycle continues until the bus voltage equals the natural commutation point voltage (at which point the firing angle is 120°), the firing range will step, the firing angle will become 0°, i.e., the thyristor will be fully conducting, and the bus voltage will rise sharply from the natural commutation point voltage, completing the soft-start process.

[0003] Although existing technologies can achieve soft start of frequency converters, there is still a problem of a sharp rise in bus voltage caused by a step in the trigger angle. A large bus voltage change rate can lead to a large inrush current, which may damage the circuit components. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide a soft-start control method, device and soft-start control circuit for a frequency converter to solve the problem of steep rise in bus voltage in existing control methods.

[0005] According to a first aspect, embodiments of the present invention provide a soft-start control method for a frequency converter, comprising the following steps: acquiring a bus voltage; when the bus voltage is less than a preset first threshold, using a first synchronization signal with a trigger angle movable range of [90°, 180°]; when the bus voltage is greater than or equal to the first threshold, using a second synchronization signal with a trigger angle movable range of [0°, 180°].

[0006] In conjunction with the first aspect, in the first embodiment of the first aspect, the use of a first synchronization signal with a trigger angle movable range of [90°, 180°] includes: setting the line voltage U... UW U VU U WV The second synchronization signals of the three phases U, V, and W are obtained by comparing them with the zero point position respectively; the second synchronization signals are adjusted using a preset clock pulse signal to obtain the first synchronization signal.

[0007] In conjunction with the first embodiment of the first aspect, in the second embodiment of the first aspect, the clock pulse signal is a rising edge at a trigger angle of 0°.

[0008] In conjunction with the first aspect, in the third embodiment of the first aspect, the use of a second synchronization signal with a trigger angle movable range of [0°, 180°] includes: [the following is a separate, unrelated sentence: "to convert the line voltage U..."] UW U VU U WV The second synchronization signals of the three phases U, V, and W are obtained by comparing them with the zero point position.

[0009] In conjunction with the first aspect, in the fourth embodiment of the first aspect, before obtaining the bus voltage, the method further includes: turning on the thyristor and charging the bus.

[0010] According to a second aspect, embodiments of the present invention also provide a soft-start control device for a frequency converter, including an acquisition module and a processing module. The acquisition module is used to acquire the bus voltage; the processing module is used to use a first synchronization signal with a trigger angle movable range of [90°, 180°] when the bus voltage is less than a preset first threshold; and to use a second synchronization signal with a trigger angle movable range of [0°, 180°] when the bus voltage is greater than or equal to the first threshold.

[0011] According to a third aspect, embodiments of the present invention also provide a soft-start control circuit for a frequency converter, including a sampling module, a phase-shifting signal module, and a synchronization signal module: the sampling module is used to acquire the line voltage U. UW U VU U WV The phase-shifting signal module is connected to the sampling module and is used to measure the line voltage U. UW U VU U WV A phase-shifting signal is generated; the synchronization signal module is connected to the sampling module and the phase-shifting signal module, and when the bus voltage is less than a preset first threshold, it is used to generate a phase-shifting signal based on the line voltage U. UW U VU U WV The phase-shifting signal generates a first synchronization signal with a trigger angle movable range of [90°, 180°]; when the bus voltage is greater than or equal to the first threshold, it is used to determine the line voltage U. UW U VU U WV The phase-shifting signal generates a second synchronization signal with a firing angle movable range of [0°, 180°].

[0012] In conjunction with the third aspect, in the first embodiment of the third aspect, the synchronization signal module includes a line voltage comparator circuit, a zero-crossing comparator circuit, a D flip-flop circuit, a first operational circuit, and a second operational circuit; the line voltage comparator circuit is used to obtain a clock pulse signal with a rising edge at a trigger angle of 0°; the zero-crossing comparator circuit is connected to the sampling module and is used to convert the line voltage U UW U VU U WV The first arithmetic circuit, connected to the line voltage comparison circuit and the zero-crossing comparison circuit, is used to obtain the first synchronization signal based on the clock pulse signal and the second synchronization signal. The D flip-flop circuit, connected to the phase-shifting signal module and the line voltage comparison circuit, is used to output a low level when the bus voltage is less than a preset first threshold and to output a high level when the bus voltage is greater than or equal to the first threshold. The second arithmetic circuit, connected to the D flip-flop circuit, the first arithmetic circuit, and the zero-crossing comparison circuit, is used to output the first synchronization signal when the bus voltage is less than the first threshold and to output the second synchronization signal when the bus voltage is greater than or equal to the first threshold, based on the output signal of the D flip-flop circuit, the first synchronization signal, and the second synchronization signal.

[0013] In conjunction with the first embodiment of the third aspect, in the second embodiment of the third aspect, the second arithmetic circuit is used to perform an AND operation on the output signal of the D flip-flop circuit and the second synchronization signal, and then perform an OR operation on the result of the AND operation with the first synchronization signal.

[0014] In conjunction with the third aspect, in the third embodiment of the third aspect, the soft-start control circuit of the frequency converter further includes a trigger signal module, which is connected to the synchronization signal module.

[0015] The soft-start control method, device, and soft-start control circuit for frequency converters provided in this invention employ a first synchronization signal and a second synchronization signal for soft starting. The first synchronization signal is used during the bus voltage rise process (from 0V to...). The firing angle can move within a 90° range, meaning the firing angle is [90°, 180°]. The firing angle can decrease from 180° to 90° as the bus voltage increases. Therefore, when the bus voltage is greater than or equal to the natural commutation point voltage (at which point the firing angle is 120°), the firing angle will not change from 120° to 0°, thus solving the voltage step problem. At a firing angle of 90°, the instantaneous value of the bus voltage is... At this point, the synchronization signal changes from the first synchronization signal to the second synchronization signal. The second synchronization signal represents the 180° movable range of the trigger pulse, meaning the trigger angle can move within the range of [0, 180°]. When the trigger angle is 90°, a step occurs at the trigger point, changing the trigger angle from 90° to 0°. At this point, the rectifier operates in diode mode. Although a step occurs at the trigger point, the bus voltage remains equal to... Therefore, no voltage step occurs. Attached Figure Description

[0016] The features and advantages of the invention will be more clearly understood by referring to the accompanying drawings, which are schematic and should not be construed as limiting the invention in any way. In the drawings:

[0017] Figure 1 A simplified diagram of a circuit module in the prior art;

[0018] Figure 2 Existing technology shows the waveform of bus voltage rise during soft start;

[0019] Figure 3 This is a flowchart illustrating the inverter soft-start control method in Embodiment 1 of the present invention;

[0020] Figure 4 The waveform diagram shows the changes in the conduction interval;

[0021] Figure 5 Here is a flowchart of an example soft start process;

[0022] Figure 6 This is a waveform diagram of the rising voltage of the bus.

[0023] Figure 7 A circuit diagram of the improved soft-start control circuit.

[0024] Figure 8 This is a schematic diagram of the inverter soft-start control device in Embodiment 3 of the present invention. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0026] Example 1

[0027] like Figure 1As shown, existing soft-start control technology consists of four parts: a sampling module, a phase-shifting signal module, a synchronization signal module, and a trigger signal module. It achieves a slow rise in bus voltage by controlling the decrease in the trigger angle. Its basic control principle is as follows:

[0028] ① The sampling module samples the three-phase voltage to obtain the line voltage U. UW U VU U WV Its positive intervals correspond to the synchronization signals of U, V, and W respectively, which is the 180° movable range of the trigger angle.

[0029] ② The phase-shifting signal determines the firing angle of the trigger pulse. As the bus voltage increases, the firing angle becomes smaller and smaller, and the corresponding bus voltage becomes larger and larger, achieving the control effect of soft start.

[0030] ③ The phase-shifting signal and the synchronization signal are ANDed to generate a trigger pulse, ensuring that the trigger angle is within the synchronization signal range.

[0031] The bus rise waveform of existing soft-start control technology is shown in the attached figure. Figure 2 As shown, a significant voltage step phenomenon exists in the later stage of the bus voltage rise. This is because, during the process of the firing angle decreasing from 180° to 0°, the phase-shifting signal undergoes a pulse change when the bus voltage is greater than or equal to the natural commutation point voltage (at which point the firing angle is 120°). This causes the firing pulse to change, the firing angle to become 0°, and the bus voltage to jump from the natural commutation point voltage to...

[0032] Based on this, Embodiment 1 of the present invention provides a soft-start control method for a frequency converter. Figure 3 This is a flowchart illustrating the inverter soft-start control method in Embodiment 1 of the present invention, as shown below. Figure 3 As shown, the soft-start control method of Embodiment 1 of the present invention includes the following steps:

[0033] S101: Obtain bus voltage.

[0034] Specifically, the bus voltage can be obtained by sampling the bus voltage using a bus voltage sampling circuit.

[0035] S102: When the bus voltage is less than a preset first threshold, a first synchronization signal with a trigger angle movable range of [90°, 180°] is used; when the bus voltage is greater than or equal to the first threshold, a second synchronization signal with a trigger angle movable range of [0°, 180°] is used.

[0036] Specifically, the first threshold is

[0037] In the soft-start control method of Embodiment 1 of the present invention, a first synchronization signal and a second synchronization signal are used. The first synchronization signal is used during the bus voltage rise process (from 0V to...). The firing angle can move within a 90° range, meaning the firing angle is [90°, 180°]. The firing angle can decrease from 180° to 90° as the bus voltage increases. Therefore, when the bus voltage is greater than or equal to the natural commutation point voltage (at which point the firing angle is 120°), the firing angle will not change from 120° to 0°, thus solving the voltage step problem. At a firing angle of 90°, the instantaneous value of the bus voltage is... At this point, the synchronization signal changes from the first synchronization signal to the second synchronization signal. The second synchronization signal represents the 180° movable range of the trigger pulse, meaning the trigger angle can move within the range of [0, 180°]. When the trigger angle is 90°, a step occurs at the trigger point, changing the trigger angle from 90° to 0°. At this point, the rectifier operates in diode mode. Although a step occurs at the trigger point, the bus voltage remains equal to... Therefore, no voltage step occurs, which meets the improvement requirements.

[0038] As attached Figure 4 As shown, waveform 1 is the trigger pulse when the trigger angle is less than 90°, waveform 2 is the trigger pulse when the trigger angle is equal to 90°, and waveform 3 is the trigger pulse when the trigger angle is equal to 0°.

[0039] Specifically, the first synchronization signal with a trigger angle movable range of [90°, 180°] can adopt the following technical solution: The line voltage U... UW U VU U WV The second synchronization signals for phases U, V, and W are obtained by comparing them with the zero point position respectively; the second synchronization signals are then adjusted using a preset clock pulse signal to obtain the first synchronization signal. The clock pulse signal has a rising edge at a trigger angle of 0°.

[0040] Specifically, the second synchronization signal, which uses a firing angle movable range of [0°, 180°], includes: setting the line voltage U... UW U VU U WV The second synchronization signals of the three phases U, V, and W are obtained by comparing them with the zero point position.

[0041] Furthermore, before obtaining the bus voltage, the process also includes: turning on the thyristor and charging the bus.

[0042] To illustrate the soft-start control method of Embodiment 1 of the present invention in more detail, a specific example is given. For example... Figure 5 As shown, the soft-start control method includes the following steps:

[0043] When the inverter is powered on, the soft-start controller uses a preset bus voltage bias value to give the thyristors a firing angle slightly less than 180°, causing the bus voltage to rise. When the bus voltage is less than... When the D flip-flop outputs a low level, the synchronization signal is the first synchronization signal, meaning the movable range of the firing angle is [90°, 180°]. The increase in bus voltage causes the firing angle to decrease, and the decrease in the firing angle further increases the bus voltage. When When the D flip-flop outputs a high level, the synchronization signal at this time is the second synchronization signal, that is, the firing angle can move in the range of [0°, 180°]. At this time, the firing angle changes from 90° to 0°, the thyristor is fully turned on, and the rectifier works in diode mode, and the soft start ends.

[0044] The improved soft-start bus voltage rise waveform is shown in the attached figure. Figure 6 As shown in the waveform, there was no voltage step phenomenon during the bus rise process, which meets the improvement requirements.

[0045] Example 2

[0046] To implement the soft-start control method of Embodiment 1 of the present invention, Embodiment 2 of the present invention provides a soft-start control circuit for a frequency converter. For example... Figure 7 As shown, the soft-start control circuit includes a sampling module, a phase-shifting signal module, and a synchronization signal module.

[0047] Specifically, the sampling module is used to acquire the line voltage U UW U VU U WV .

[0048] The phase-shifting signal module is connected to the sampling module and is used to measure the line voltage U. UW U VU U WV Generate a phase-shifted signal.

[0049] The synchronization signal module is connected to the sampling module and the phase-shifting signal module. When the bus voltage is less than a preset first threshold, it is used to determine the line voltage U. UW U VU U WV The phase-shifting signal generates a first synchronization signal with a trigger angle movable range of [90°, 180°]; when the bus voltage is greater than or equal to the first threshold, it is used to determine the line voltage U. UW U VU U WV The phase-shifting signal generates a second synchronization signal with a firing angle movable range of [0°, 180°].

[0050] The main improvement of the soft-start control circuit in Embodiment 2 of this invention is the synchronization signal module. The sampling module and the phase-shifting signal module can be integrated with... Figure 1 same.

[0051] Specifically, the synchronization signal module includes a line voltage comparator circuit, a zero-crossing comparator circuit, a D flip-flop circuit, a first operational circuit, and a second operational circuit; the line voltage comparator circuit is used to obtain a clock pulse signal with a rising edge at a trigger angle of 0°; the zero-crossing comparator circuit is connected to the sampling module and is used to convert the line voltage U UW U VU U WV The first arithmetic circuit, connected to the line voltage comparison circuit and the zero-crossing comparison circuit, is used to obtain the first synchronization signal based on the clock pulse signal and the second synchronization signal. The D flip-flop circuit, connected to the phase-shifting signal module and the line voltage comparison circuit, is used to output a low level when the bus voltage is less than a preset first threshold and to output a high level when the bus voltage is greater than or equal to the first threshold. The second arithmetic circuit, connected to the D flip-flop circuit, the first arithmetic circuit, and the zero-crossing comparison circuit, is used to output the first synchronization signal when the bus voltage is less than the first threshold and to output the second synchronization signal when the bus voltage is greater than or equal to the first threshold, based on the output signal of the D flip-flop circuit, the first synchronization signal, and the second synchronization signal.

[0052] In other words, the specific working principle of the synchronization signal module is as follows:

[0053] (1) The clock pulse signal CP with the rising edge at the trigger angle of 0° is obtained by the line voltage comparison circuit.

[0054] Specifically, the U-phase clock signal is obtained by comparing the line voltages UW and WV; the V-phase clock signal is obtained by comparing the line voltages VU and UW; and the W-phase clock signal is obtained by comparing the line voltages WV and VU.

[0055] (2) Through the zero-crossing comparator circuit, the line voltage U UW U VU U WV The second synchronization signals of the three phases U, V, and W are obtained by comparing them with the zero point respectively. The range of the second synchronization signal is 180°, that is, the movable range of the trigger angle is [0, 180°].

[0056] (3) The clock signal and the second synchronization signal generate the first synchronization signal through the operation circuit. The first synchronization signal range is 90°, that is, the firing angle can be moved in the range of [90°, 180°].

[0057] (4) The D flip-flop uses the phase-shift signal as the D input signal and the signal generated by the line voltage comparator circuit as the clock pulse signal. The reset terminal R and the clear terminal S are grounded. According to the characteristics of the D flip-flop, the set terminal S and the clear terminal R are active high. When both are low, the output Q = D only at the rising edge of the clock signal, and Q remains unchanged at other times. The truth table used in this improved scheme is shown in Table 1. During the rise of the bus voltage (from 0V to...) In this circuit, the D signal (phase-shifting signal) is low at the rising edge of the clock signal, and the output Q of the D flip-flop remains low. When When the trigger angle is not less than 90°, the D signal (phase-shifting signal) is high at the rising edge of the clock signal, and the output Q of the D flip-flop is high.

[0058] Table 1 Truth Table of D Flip-Flop

[0059]

[0060] ↑: indicates rising edge; ↓: indicates falling edge; ×: state is indeterminate.

[0061] (5) The D flip-flop output Q is ANDed with the second synchronization signal, and its output is then ORed with the first synchronization signal to determine the final synchronization signal. During the bus voltage rise process (firing angle from 180° to 90°), the D flip-flop output Q remains low. After ANDing with the second synchronization signal, it outputs a low level. This output is then ORed with the first synchronization signal, resulting in the first synchronization signal. Therefore, during this process, the synchronization signal is the first synchronization signal. When the bus voltage rises... When the output Q of the D flip-flop is high, it is ANDed with the second synchronization signal to produce the second synchronization signal. When the output is ORed with the synchronization signal, it also produces the second synchronization signal. Therefore, the synchronization signal at this time is the second synchronization signal.

[0062] Example 3

[0063] Corresponding to Embodiment 1 of the present invention, Embodiment 3 of the present invention provides a soft-start control device for a frequency converter. For example... Figure 8 As shown, the soft-start control device for the frequency converter includes an acquisition module 20 and a processing module 21.

[0064] Specifically, module 20 is used to acquire the bus voltage;

[0065] Processing module 21 uses a first synchronization signal with a trigger angle movable range of [90°, 180°] when the bus voltage is less than a preset first threshold; and uses a second synchronization signal with a trigger angle movable range of [0°, 180°] when the bus voltage is greater than or equal to the first threshold.

[0066] For details regarding the soft-start control device of the aforementioned frequency converter, please refer to the relevant documentation. Figures 1 to 7 The relevant descriptions and effects in the illustrated embodiments are for understanding purposes only and will not be repeated here.

[0067] Example 4

[0068] This invention also provides an electronic device that may include a processor and a memory, wherein the processor and the memory may be connected via a bus or other means.

[0069] The processor can be a central processing unit (CPU). The processor can also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or combinations of the above types of chips.

[0070] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs, non-transitory computer-executable programs, and modules, such as the program instructions / modules corresponding to the soft-start control method of the frequency converter in this embodiment of the invention (e.g., Figure 7 (As shown in the acquisition module 20 and processing module 21). The processor executes various functional applications and data processing by running non-transitory software programs, instructions, and modules stored in the memory, thereby implementing the soft-start control method for the frequency converter in the above method embodiments.

[0071] The memory may include a program storage area and a data storage area. The program storage area may store the operating system and applications required for at least one function; the data storage area may store data created by the processor, etc. Furthermore, the memory may include high-speed random access memory and non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, the memory may optionally include memory remotely located relative to the processor, which can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0072] The one or more modules are stored in the memory, and when executed by the processor, they perform actions such as... Figures 1 to 7The soft-start control method for the frequency converter in the illustrated embodiment.

[0073] For specific details regarding the aforementioned electronic devices, please refer to the relevant documentation. Figures 1 to 8 The relevant descriptions and effects in the illustrated embodiments are for understanding purposes only and will not be repeated here.

[0074] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), random access memory (RAM), flash memory, hard disk drive (HDD), or solid-state drive (SSD), etc.; the storage medium can also include combinations of the above types of memory.

[0075] Although embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. A soft-start control method for a frequency converter, characterized in that, include: Obtain the bus voltage; When the bus voltage is less than a preset first threshold, a first synchronization signal with a firing angle movable range of [90°, 180°] is used, and the first threshold is... When the bus voltage is greater than or equal to the first threshold, a second synchronization signal with a trigger angle movable range of [0°, 180°] is used; The first synchronization signal, which uses a firing angle movable range of [90°, 180°], includes: Line voltage U UW U VU U WV The second synchronization signals of the three phases U, V, and W are obtained by comparing them with the zero point position respectively; The second synchronization signal is adjusted using a preset clock pulse signal to obtain the first synchronization signal.

2. The method according to claim 1, characterized in that, The clock pulse signal has a rising edge at a trigger angle of 0°.

3. The method according to claim 1, characterized in that, The second synchronization signal, which uses a firing angle movable range of [0°, 180°], includes: Line voltage U UW U VU U WV The second synchronization signals of the three phases U, V, and W are obtained by comparing them with the zero point position.

4. The method according to claim 1, characterized in that, Before obtaining the bus voltage, the following steps are also included: Turn on the thyristor and charge the bus.

5. A soft-start control device for a frequency converter, characterized in that, include: The acquisition module is used to acquire the bus voltage; The processing module, when the bus voltage is less than a preset first threshold, uses a first synchronization signal with a firing angle movable range of [90°, 180°]. The first threshold is... When the bus voltage is greater than or equal to the first threshold, a second synchronization signal with a trigger angle movable range of [0°, 180°] is used; The first synchronization signal, which uses a firing angle movable range of [90°, 180°], includes: setting the line voltage U... UW U VU U WV The second synchronization signals of the three phases U, V, and W are obtained by comparing them with the zero point position respectively; the second synchronization signals are adjusted using a preset clock pulse signal to obtain the first synchronization signal.

6. A soft-start control circuit for a frequency converter, characterized in that, include: The sampling module is used to acquire the line voltage U. UW U VU U WV ; A phase-shifting signal module, connected to the sampling module, is used to measure the line voltage U. UW U VU U WV Generate a phase-shifted signal; A synchronization signal module, connected to the sampling module and the phase-shifting signal module, is used to determine the line voltage U when the bus voltage is less than a preset first threshold. UW U VU U WV The phase-shifting signal generates a first synchronization signal with a trigger angle movable range of [90°, 180°]; when the bus voltage is greater than or equal to the first threshold, it is used to determine the line voltage U. UW U VU U WV The phase-shifting signal generates a second synchronization signal with a firing angle movable range of [0°, 180°].

7. The soft-start control circuit according to claim 6, characterized in that, The synchronization signal module includes a line voltage comparator circuit, a zero-crossing comparator circuit, a D flip-flop circuit, a first operational circuit, and a second operational circuit. The line voltage comparison circuit is used to obtain a clock pulse signal with a rising edge at a trigger angle of 0°; The zero-crossing comparator circuit is connected to the sampling module and is used to convert the line voltage U UW U VU U WV The second synchronization signal is obtained by comparing it with the zero point position; The first operational circuit, connected to the line voltage comparison circuit and the zero-crossing comparison circuit, is used to obtain the first synchronization signal based on the clock pulse signal and the second synchronization signal; The D flip-flop circuit is connected to the phase-shifting signal module and the line voltage comparison circuit, and is used to output a low level when the bus voltage is less than a preset first threshold, and output a high level when the bus voltage is greater than or equal to the first threshold. The second operational circuit is connected to the D flip-flop circuit, the first operational circuit, and the zero-crossing comparator circuit. It is used to output the first synchronization signal when the bus voltage is less than the first threshold, and to output the second synchronization signal when the bus voltage is greater than or equal to the first threshold, based on the output signal of the D flip-flop circuit, the first synchronization signal, and the second synchronization signal.

8. The soft-start control circuit according to claim 7, characterized in that, The second arithmetic circuit is used to perform an AND operation between the output signal of the D flip-flop circuit and the second synchronization signal, and then perform an OR operation between the result of the AND operation and the first synchronization signal.

9. The soft-start control circuit according to claim 6, characterized in that, Also includes: A trigger signal module, which is connected to the synchronization signal module.

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