Semiconductor packaging method and semiconductor packaging structure

Abstract

The semiconductor packaging method and semiconductor packaging structure provided by the present application relate to the technical field of semiconductor packaging. The method includes providing a first substrate; mounting a first electronic device on the first substrate to form a first packaging component; a first conductive adhesive film is provided on a side of the first electronic device away from the first substrate; providing a second substrate; mounting a second electronic device on the second substrate to form a second packaging component; a first conductive bump is provided on the second substrate and / or the second electronic device; flipping the second packaging component and mounting it on the first packaging component; the first conductive bump is electrically connected to the first conductive adhesive film so that the first conductive adhesive film electrically connects the second electronic device to the second substrate, and / or, the first conductive adhesive film electrically connects at least two second electronic devices on the second substrate. By providing a conductive adhesive film, electrical connection between adjacent electronic devices or connection between a substrate and an electronic device can be achieved, the number of wiring layers is reduced, the electrical connection is reliable, and the packaging quality and efficiency are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor packaging, and more particularly, to a semiconductor packaging method and a semiconductor packaging structure. Background Art

[0002] In existing packaging structures, to achieve the interconnection of multiple chips or multiple packaging components, wire bonding or vertical interconnection through through-silicon via technology, or connection through the fabrication of RDL (Redistribution Layer) is usually adopted. The above processes are complex, and the wire bonding method is also prone to increasing the module height. The through-silicon via technology is prone to problems such as unstable electrical connection and poor conductivity. Summary of the Invention

[0003] The objectives of the present invention include, for example, providing a semiconductor packaging method and a semiconductor packaging structure that can achieve the interconnection of adjacent electronic devices, reduce the number of wiring layers, shorten the length of interconnection lines, reduce signal transmission delay and loss, reduce power consumption and packaging volume, and improve packaging quality and efficiency.

[0004] Embodiments of the present invention can be implemented as follows:

[0005] In a first aspect, the present invention provides a semiconductor packaging method, including:

[0006] Providing a first substrate;

[0007] Mounting a first electronic device on the first substrate to form a first packaging component; wherein, a first conductive adhesive film is provided on a side of the first electronic device away from the first substrate.

[0008] Providing a second substrate;

[0009] Mounting a second electronic device on the second substrate to form a second packaging component; wherein, a first conductive bump is provided on the second substrate and / or the second electronic device.

[0010] Flipping the second packaging component and mounting it on the first packaging component; wherein, the first conductive bump is electrically connected to the first conductive adhesive film, so that the first conductive adhesive film electrically connects the second electronic device to the second substrate, and / or, the first conductive adhesive film electrically connects at least two of the second electronic devices on the second substrate.

[0011] In an alternative embodiment, the step of mounting a first electronic device on the first substrate to form a first packaging component includes: forming a first conductive adhesive film on a side of the first electronic device away from the first substrate before or after the step of mounting the first electronic device.

[0012] In an alternative embodiment, the first electronic device is provided with pads. The step of forming a first conductive adhesive film on a side of the first electronic device away from the first substrate includes:

[0013] Attach a conductive adhesive layer to a side of the first electronic device away from the pads, and form a conductive trace line on the conductive adhesive layer.

[0014] In an alternative embodiment, the step of forming a conductive trace line on the conductive adhesive layer includes:

[0015] Form a conductive trace line on the conductive adhesive layer by means of laser cutting.

[0016] In an alternative embodiment, the step of attaching a conductive adhesive layer to a side of the first electronic device away from the pads and forming a conductive trace line on the conductive adhesive layer further includes:

[0017] A plurality of the first electronic devices are attached to the conductive adhesive layer at intervals. The conductive adhesive layer is provided with dicing channels. After forming the conductive trace line by means of laser cutting, cut along the dicing channels to form individual first electronic devices with conductive trace lines.

[0018] In an alternative embodiment, before the step of forming a first conductive adhesive film on a side of the first electronic device away from the first substrate, the semiconductor packaging method further includes:

[0019] Grind the first electronic device to reduce the thickness of the first electronic device to a preset thickness.

[0020] In an alternative embodiment, the first electronic device includes a face-up chip and a first flip-chip. The step of mounting the first electronic device on the first substrate includes:

[0021] Mount the face-up chip on the first substrate;

[0022] Mount the first flip-chip on a side of the face-up chip away from the first substrate. A first conductive adhesive film is provided on a side of the first flip-chip away from the face-up chip.

[0023] In an alternative embodiment, the step of mounting the first flip-chip on a side of the face-up chip away from the first substrate includes:

[0024] Mount the first flip-chip on two adjacent face-up chips.

[0025] In an alternative embodiment, the first electronic device further includes a second flip-chip. The step of mounting the first electronic device on the first substrate further includes:

[0026] Mount the second flip chip on the first substrate, with the second flip chip spaced from the front-mounted chip, and form a gap groove between the front-mounted chip and the second flip chip.

[0027] In an alternative embodiment, the step of mounting the second flip chip on the first substrate further includes:

[0028] Fill the gap groove with a protective adhesive, with the surface of the protective adhesive flush with the side of the second flip chip away from the first substrate.

[0029] In an alternative embodiment, the step of mounting the first flip chip on the side of the front-mounted chip away from the first substrate further includes:

[0030] Provide a first conductive post on the first flip chip, such that after the first packaging component and the second packaging component are mounted, the first conductive post electrically connects the first packaging component and the second packaging component.

[0031] In an alternative embodiment, second conductive bumps are provided on the first substrate and / or the first electronic device; a second conductive adhesive film is provided on the side of the second electronic device away from the second substrate;

[0032] Flip the second packaging component and mount it on the first packaging component, such that the first conductive bump electrically connects to the first conductive adhesive film, and the second conductive bump electrically connects to the second conductive adhesive film.

[0033] In an alternative embodiment, the semiconductor packaging method further includes:

[0034] Mount a heat sink on the first substrate and / or the first electronic device; wherein, third conductive adhesive films are provided on both sides of the heat sink.

[0035] In an alternative embodiment, the step of mounting the heat sink on the first substrate and / or the first electronic device includes:

[0036] Provide a second conductive post on the heat sink, such that after the first packaging component and the second packaging component are mounted, the second conductive post electrically connects the first packaging component and the second packaging component.

[0037] In an alternative embodiment, the step of providing a first substrate and mounting a first electronic device on the first substrate includes:

[0038] Form a groove in the first substrate and attach the first electronic device in the groove.

[0039] In an alternative embodiment, the first substrate includes a first surface and a second surface disposed opposite to each other, and the step of providing the first substrate further includes:

[0040] Forming a first pad, a second pad, and a third pad on the first substrate; wherein, the first pad and the second pad are disposed on the first surface of the first substrate, and the third pad is disposed on the second surface of the first substrate;

[0041] An intermediate circuit layer is provided in the first substrate for electrically connecting the first pad and the third pad, and / or for electrically connecting the second pad and the third pad.

[0042] In an alternative embodiment, after the step of flipping the second encapsulation component and mounting it on the first encapsulation component, the method further includes:

[0043] Encapsulating the first encapsulation component and the second encapsulation component to form an encapsulation body.

[0044] In an alternative embodiment, the method of forming the second encapsulation component is the same as the method of forming the first encapsulation component.

[0045] In a second aspect, the present invention provides a semiconductor packaging structure, including: a first encapsulation component and a second encapsulation component;

[0046] The first encapsulation component includes a first substrate, a first electronic device is mounted on the first substrate, and a first conductive adhesive film is provided on a side of the first electronic device away from the first substrate;

[0047] The second encapsulation component includes a second substrate, a second electronic device is mounted on the second substrate, and first conductive bumps are provided on the second substrate and / or the second electronic device;

[0048] The second encapsulation component is connected to the first encapsulation component so that the first conductive bumps are electrically connected to the first conductive adhesive film, so that the first conductive adhesive film electrically connects the second electronic device and the second substrate, and / or, the first conductive adhesive film electrically connects at least two of the second electronic devices on the second substrate.

[0049] In an alternative embodiment, the first electronic device includes a front-mounted chip and a first flip-chip, the front-mounted chip is disposed on the first substrate, the first flip-chip is disposed on a side of the front-mounted chip away from the first substrate, and the first conductive adhesive film is provided on a side of the first flip-chip away from the front-mounted chip; the first flip-chip is mounted on two adjacent front-mounted chips.

[0050] In an alternative embodiment, the first electronic device further includes a second flip chip disposed on the first substrate. The second flip chip is spaced apart from the direct chip, and a gap groove is formed between the direct chip and the second flip chip.

[0051] In an alternative embodiment, a protective glue is provided in the gap groove, and the surface of the protective glue is flush with the side of the second flip chip away from the first substrate.

[0052] In an alternative embodiment, the width of the gap groove is at least greater than twice the particle size of the colloid of the protective glue.

[0053] In an alternative embodiment, a groove is formed on the first substrate, and the first electronic device is disposed in the groove; and / or a groove is formed on the second substrate, and the second electronic device is disposed in the groove.

[0054] In an alternative embodiment, the first electronic device includes a direct chip, a first flip chip, and a second flip chip. The direct chip and the second flip chip are disposed in the groove, and the heights of the direct chip and the second flip chip are respectively equal to the depth of the groove; the first flip chip is disposed on two adjacent direct chips, and / or on the direct chip and the first substrate.

[0055] In an alternative embodiment, the first flip chip is provided with a first conductive post. One end of the first conductive post is connected to the first conductive adhesive film, and the other end is electrically connected to the solder joint of the first flip chip, so that the first flip chip is electrically connected to the second electronic device on the second substrate.

[0056] In an alternative embodiment, the size of the first substrate is larger than the size of the second substrate.

[0057] In an alternative embodiment, a heat dissipation block is further included. The heat dissipation block is disposed on the first substrate and / or the first electronic device. Third conductive adhesive films are respectively provided on both sides of the heat dissipation block. One side of the third conductive adhesive film is electrically connected to the first substrate and / or the first electronic device, and the other side of the third conductive adhesive film is electrically connected to the second substrate and / or the second electronic device.

[0058] In an alternative embodiment, a second conductive post is provided in the heat dissipation block, and the second conductive post electrically connects the third conductive adhesive films on both sides.

[0059] In an alternative embodiment, second conductive bumps are provided on the first substrate and / or the first electronic device; a second conductive adhesive film is provided on the side of the second electronic device away from the second substrate;

[0060] The second encapsulation component is mounted on the first encapsulation component, so that the first conductive bumps are electrically connected to the first conductive adhesive film, and the second conductive bumps are electrically connected to the second conductive adhesive film.

[0061] In an alternative embodiment, the first electronic device and the second electronic device have a centrosymmetric structure.

[0062] The beneficial effects of the embodiments of the present invention include:

[0063] The semiconductor encapsulation method and structure provided by the embodiments of the present invention, by providing a conductive adhesive film on an electronic device, after the first encapsulation component and the second encapsulation component are adhered, the conductive bumps in the second encapsulation component are embedded in the conductive adhesive film in the first encapsulation component, realizing the electrical connection between the conductive bumps and the conductive adhesive film, thereby realizing the electrical connection between adjacent electronic devices in the second encapsulation component, and also realizing the electrical connection between the electronic device in the second encapsulation component and the second substrate. Using the conductive adhesive film to achieve the electrical connection between adjacent electronic devices can effectively reduce the number of wiring layers, shorten the length of the interconnecting wires, reduce signal transmission delay and loss, reduce power consumption and package volume, and improve the package quality and efficiency. Description of the Drawings

[0064] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the embodiments. It should be understood that the following drawings only show some embodiments of the present invention, and thus should not be regarded as limiting the scope. For those of ordinary skill in the art, without creative efforts, other related drawings can also be obtained based on these drawings.

[0065] Figure 1 Schematic structural diagram of the first substrate provided by the embodiments of the present invention;

[0066] Figure 2 Schematic structural diagram of a front-mounted chip mounted on the first substrate provided by the embodiments of the present invention;

[0067] Figure 3 Schematic structural diagram of a second flip-chip mounted on the first substrate provided by the embodiments of the present invention;

[0068] Figure 4 Schematic structural diagram of a first flip-chip mounted on the first substrate provided by the embodiments of the present invention;

[0069] Figure 5 Schematic structural diagram of a first conductive column provided on the first flip-chip in the embodiments of the present invention;

[0070] Figure 6 Schematic structural diagram of a heat sink mounted on the first substrate provided by the embodiments of the present invention;

[0071] Figure 7 Schematic diagram of the structure of the second encapsulation component provided by an embodiment of the present invention;

[0072] Figure 8 Schematic diagram of the second encapsulation component mounted on the first encapsulation component provided by an embodiment of the present invention;

[0073] Figure 9 Schematic diagram of the processes of plastic encapsulation and ball implantation in the semiconductor encapsulation method provided by an embodiment of the present invention;

[0074] Figure 10 Schematic diagram of the structure of the semiconductor encapsulation method provided by an embodiment of the present invention after being cut into single encapsulation bodies;

[0075] Figure 11 The first schematic diagram of the structure of the semiconductor encapsulation structure provided by an embodiment of the present invention;

[0076] Figure 12 The second schematic diagram of the structure of the semiconductor encapsulation structure provided by an embodiment of the present invention;

[0077] Figure 13 The third schematic diagram of the structure of the semiconductor encapsulation structure provided by an embodiment of the present invention;

[0078] Figure 14 The fourth schematic diagram of the structure of the semiconductor encapsulation structure provided by an embodiment of the present invention.

[0079] Icon: 100 - Semiconductor encapsulation structure; 110 - First substrate; 111 - First surface; 113 - Second surface; 114 - Groove; 115 - First pad; 116 - Second pad; 117 - Third pad; 120 - Front-mounted chip; 121 - Front-mounted pad; 130 - First flip-chip; 131 - First flip-chip pad; 135 - First conductive pillar; 140 - Second flip-chip; 141 - Second flip-chip pad; 150 - First conductive adhesive film; 143 - Gap groove; 145 - Protective adhesive; 160 - Heat sink; 161 - Third conductive adhesive film; 165 - Second conductive pillar; 170 - Plastic package; 180 - Solder ball; 210 - Second substrate; 220 - Second conductive adhesive film. Detailed implementation manners

[0080] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some but not all of the embodiments of the present invention. Usually, the components of the embodiments of the present invention described and illustrated in the accompanying drawings here can be arranged and designed in various different configurations.

[0081] Accordingly, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the scope of protection of the present invention.

[0082] It should be noted that like reference numerals and letters denote like items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.

[0083] In the description of the present invention, it should be noted that if terms such as "upper", "lower", "inner", "outer", etc. are used to indicate the orientation or positional relationship, it is based on the orientation or positional relationship shown in the drawings or the orientation or positional relationship in which the product of the present invention is usually placed during use. This is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present invention.

[0084] In addition, if terms such as "first", "second", etc. are used only for distinguishing descriptions, they cannot be understood as indicating or implying relative importance.

[0085] It should be noted that, without conflict, the features in the embodiments of the present invention may be combined with each other.

[0086] With the rapid development of the semiconductor industry, the new design method of chiplet technology packages small chips with different functions together to form a heterogeneous integrated chip packaging structure. As the input and output density of chips increases, the number of chips integrated in a single package has increased significantly. Various 2.5D and 3D packaging technologies, as multi-chip packaging solutions, are used to connect the adjacent chip pad lines within a single package to improve its packaging integration. 2.5D and 3D packaging technologies usually use through-silicon via technology on a silicon interposer to fabricate vertical interconnect structures, and flip chips are mounted on the surface of the interconnect structure or adjacent chips are directly interconnected using through-silicon via technology. Through-silicon via technology (TSV) realizes vertical interconnection between chips by drilling vias on a silicon interposer, achieving system-level packaging of multi-functional and high-performance chips.

[0087] The existing COWOS (Chip-on-Wafer-on-Substrate) is a 2.5D packaging technology introduced by TSMC, also known as wafer-level packaging. TSMC's 2.5D packaging technology packages chips onto a silicon interposer and uses TSV high-density wiring on the silicon interposer for interconnection. Among them, COWOS is mainly targeted at the high-end market, with a relatively large number, density, and packaging size of interconnect lines. In the existing packaging method, if high-integration packaging is to be achieved, it is necessary to manufacture a redistribution layer on the silicon interposer and then mount the chips, and the process is complex; moreover, the silicon through-hole technology is prone to causing the silicon interposer to crack during perforation, and it is easy to have problems such as insufficient electroplating when forming conductive pillars, resulting in unstable electrical connection and affecting the conductive performance. In addition, the materials of the silicon interposer and the substrate are different, and during the product reflow soldering process, it is easy to cause product warping and hidden cracks in the interposer. Different packaging bodies use different materials, which are prone to causing product warping, resulting in bridging or poor soldering between the solder balls 180 and the substrate.

[0088] To solve at least one defect of the existing technology, the present application proposes a new way of interconnecting chips in a packaging structure, which can achieve high-density, multi-functional, and high-performance chip packaging, is beneficial to reducing the number of wiring layers, shortening the length of interconnect lines, making the electrical connection more reliable, reducing signal transmission delay and loss, reducing power consumption and packaging volume, improving packaging quality and efficiency, and avoiding the risks and defects brought by the silicon through-hole technology.

[0089] First Embodiment

[0090] Please refer to Figures 1 to 10 , this embodiment provides a semiconductor packaging method, which can be used for the packaging of high-density electronic devices. The method includes:

[0091] Step S100: Provide a first substrate 110;

[0092] Step S200: Mount a first electronic device on the first substrate 110 to form a first packaging component; wherein, a first conductive adhesive film 150 is provided on the side of the first electronic device away from the first substrate 110;

[0093] Step S300: Provide a second substrate 210;

[0094] Step S400: Mount a second electronic device on the second substrate 210 to form a second packaging component; wherein, a first conductive bump is provided on the second substrate 210 and / or the second electronic device;

[0095] Step S500: Flip the second encapsulation component and mount it on the first encapsulation component; wherein, the first conductive bumps are electrically connected to the first conductive adhesive film 150, so that the first conductive adhesive film 150 electrically connects the second electronic device and the second substrate 210, and / or the first conductive adhesive film 150 electrically connects at least two second electronic devices on the second substrate 210. The arrangement of the first conductive adhesive film 150 can effectively reduce the number of wiring layers, shorten the length of the interconnecting wires, reduce signal transmission delay and loss, ensure reliable electrical connection, reduce power consumption and package volume, and simplify the encapsulation process, improving the encapsulation quality and efficiency.

[0096] Combine Figure 1 , in step S100, the first substrate 110 can be a glass fiber cloth substrate, silicon, ceramic, etc. To reduce the overall encapsulation height, a groove 114 can be formed on the first substrate 110, and the first electronic device is mounted in the groove 114. Of course, the first electronic device can also be mounted outside the groove 114. By forming the groove 114, while reducing the encapsulation height, the integration degree of the electronic devices can be improved, and the number of mounted electronic devices can be increased. Optionally, the groove 114 can be formed by laser grooving or etching.

[0097] In this embodiment, the first substrate 110 includes a first surface 111 and a second surface 113 which are oppositely arranged. A first pad 115, a second pad 116 and a third pad 117 are provided on the first substrate 110; wherein, the first pad 115 and the second pad 116 are arranged on the first surface 111 of the first substrate 110, the third pad 117 is arranged on the second surface 113 of the first substrate 110, and the groove 114 can be formed on the first surface 111. Optionally, the first electronic device includes a front-mounted chip 120, a first flip-chip 130 and a second flip-chip 140. The first pad 115 is arranged outside the groove 114 and is used to realize the electrical connection between the first substrate 110 and the front-mounted chip 120. The second pad 116 is arranged in the groove 114 and is used to realize the electrical connection between the first substrate 110 and the second flip-chip 140. The third pad 117 can be used for ball planting, so as to electrically connect the entire semiconductor encapsulation structure 100 to a circuit board or other modules.

[0098] An intermediate circuit layer is provided in the first substrate 110 and is used to realize the electrical connection between the first pad 115 and the third pad 117, or the electrical connection between the second pad 116 and the third pad 117, or the electrical connection between the first pad 115 and the second pad 116 respectively and the third pad 117. Optionally, the intermediate circuit layer can be fabricated in a board factory.

[0099] Combine Figures 2 to 4, in step S200, a first electronic device is mounted on the first substrate 110 to form a first packaging component. Optionally, a direct-mounted chip 120 is mounted at intervals in the groove 114, a second flip-chip 140 is mounted between two direct-mounted chips 120, and a first flip-chip 130 is mounted on the side of the direct-mounted chip 120 away from the first substrate 110. A first conductive adhesive film 150 is provided on the side of the first flip-chip 130 away from the direct-mounted chip 120, and the first flip-chip 130 is mounted on two adjacent direct-mounted chips 120.

[0100] It can be understood that the direct-mounted chip 120 is provided with a direct-mounted pad 121. After the direct-mounted chip 120 is mounted, the direct-mounted pad 121 of the direct-mounted chip 120 faces upward, and the direct-mounted chip 120 can be fixedly mounted on the first substrate 110 by means of colloid bonding. The colloid is not limited to conductive glue or insulating glue, and the colloid can be baked and cured to achieve stable mounting of the direct-mounted chip 120.

[0101] The first flip-chip 130 is provided with a first flip-chip pad 131, and the second flip-chip 140 is provided with a second flip-chip pad 141. After the second flip-chip 140 is mounted, the second flip-chip pad 141 is connected to the second pad 116 on the first substrate 110. And the second flip-chip 140 and the direct-mounted chip 120 are arranged at intervals, that is, a gap groove 143 is formed between the direct-mounted chip 120 and the second flip-chip 140. Optionally, a protective glue 145 is filled in the gap groove 143, and the surface of the protective glue 145 is flush with the side of the second flip-chip 140 away from the first substrate 110. The protective glue 145 is made of insulating glue and is used to protect the second flip-chip pad 141 to ensure the electrical connection between the second flip-chip pad 141 and the second pad 116.

[0102] In this embodiment, the width of the gap groove 143 is at least twice the particle size of the protective glue 145. For example, if the particle diameter of the protective glue 145 is about 35 microns, the width of the gap groove 143 is at least 70 microns. In this way, when filling the protective glue 145, it is convenient for the protective glue 145 to fill the gap groove 143 completely, preventing other sundries, foreign objects, conductive particles, etc. from falling into the gap groove 143. Optionally, the heights of the front-mounted chip 120 and the second flip-chip 140 are equal. After filling the protective glue 145, the surface of the protective glue 145 is flush with the front-mounted chip 120 and the second flip-chip 140 respectively, which is convenient for subsequent mounting of the first flip-chip 130 above the front-mounted chip 120. Optionally, the depth of the groove 114 on the first substrate 110, the height of the front-mounted chip 120, and the height of the second flip-chip 140 are all equal, which is convenient for stacking chips above the front-mounted chip 120 and the second flip-chip 140, and for stacking chips outside the groove 114 of the first substrate 110. The structure is more flat and stable, and the protective glue 145 can also play a role in heat dissipation, support and buffering. It is easy to understand that the height of the front-mounted chip 120 is equal to the depth of the groove 114, so that the front-mounted pads 121 and the first pads 115 are on the same plane, and the two can be electrically connected through the second flip-chip 140 or the conductive adhesive film, avoiding the height increase caused by wire bonding.

[0103] In this embodiment, the first flip-chip 130 is mounted on two adjacent front-mounted chips 120. The size of the second flip-chip 140 is smaller than that of the first flip-chip 130, and the first flip-chip 130 is also located above the second flip-chip 140. At least two first flip-chip pads 131 are provided on the same first flip-chip 130, and the two first flip-chip pads 131 are respectively welded to the front-mounted pads 121 of two different front-mounted chips 120 to realize the interconnection of the two front-mounted chips 120. Of course, for the first flip-chip 130 located at the edge of the groove 114, its two first flip-chip pads 131 are respectively welded to the first pad 115 and the front-mounted pad 121 to realize the interconnection of the first substrate 110 and the front-mounted chip 120, reducing the wire bonding structure, thereby reducing the package size. The first conductive adhesive film 150 is located on the side of the first flip-chip 130 away from the first substrate 110. After mounting the second packaging component, the first conductive adhesive film 150 can realize the electrical connection between the second substrate 210 and the second electronic device on the second substrate 210, and realize the electrical connection between two second electronic devices on the second substrate 210, reducing the wire bonding structure, lowering the package height, and reducing the package size.

[0104] Optionally, the first conductive adhesive film 150 can be formed on the first electronic device before the step of mounting the first electronic device. The first electronic device and the first conductive adhesive film 150 are mounted as a whole. For example, the first electronic device is provided with pads. A conductive adhesive layer is attached to the side of the first electronic device away from the pads, and a conductive trace line is formed on the conductive adhesive layer by means of laser cutting to form the above-mentioned first conductive adhesive film 150. The conductive trace line can be designed according to the electrical connection requirements of the actual chip.

[0105] It is easy to understand that the first electronic device can be ground first to a preset thickness, such as 400 um to 500 um; then a plurality of first electronic devices are spaced and attached to the conductive adhesive layer. The conductive adhesive layer is provided with cutting channels. After the conductive trace line is formed by means of laser cutting, it is cut along the cutting channels to form individual first electronic devices with conductive trace lines. First, a plurality of first electronic devices are attached to the conductive adhesive layer, and then laser cutting is used to form the conductive trace line, which can achieve mass production. This method can improve the preparation efficiency of the first conductive adhesive film 150, and grinding is beneficial to reducing the overall packaging height and also improving the bonding force between the first conductive adhesive film 150 and the first electronic device.

[0106] The first conductive adhesive film 150 can be formed by mixing polyester (PET), high molecular epoxy resin, adhesive, conductive particles, etc., which plays a role in conduction and bonding and has thermoplasticity. After heating, the first conductive adhesive film 150 softens, which is beneficial to protecting the first conductive bumps embedded in the first conductive adhesive film 150. Among them, the conductive particles can be nano silver or nano copper, etc.

[0107] Of course, in other embodiments, the first conductive adhesive film 150 can also be formed on the side of the first electronic device away from the first substrate 110 after the first electronic device is mounted on the first substrate 110, which is not specifically limited here.

[0108] Combined Figure 5, optionally, after mounting the first flip chip 130, it further includes forming a first conductive post 135 on the first flip chip 130. For example, first form a first conductive hole on the first flip chip 130, and then fill the first conductive hole with a metal medium to form the first conductive post 135. In this embodiment, the first conductive post 135 can electrically connect the first flip chip pad 131 on the first flip chip 130 and the first conductive adhesive film 150 on the other side. In this way, after the second package component is mounted to the first package component, since the first flip chip 130 is electrically connected to the direct chip 120 on the first substrate 110 through the first flip chip pad 131, and at the same time the first flip chip 130 is electrically connected to the direct chip 120 on the second substrate 210 through the first conductive adhesive film 150, and the first flip chip pad 131 and the first conductive adhesive film 150 are electrically connected through the first conductive post 135, the electrical connection between the first package component and the second package component is realized. The electrical connection between the first package component and the second package component may include but is not limited to the electrical connection between the first substrate 110 and the second substrate 210 and the electrical connection between the first electronic device and the second electronic device.

[0109] In this embodiment, second conductive bumps are provided on the first substrate 110 and / or the first electronic device; a second conductive adhesive film 220 is provided on the side of the second electronic device away from the second substrate 210. It can be understood that the second conductive bumps include but are not limited to the first pads 115 on the first substrate 110 and the direct chip pads 121 on the direct chip 120. When mounting the first flip chip 130, the first flip chip 130 does not completely cover the direct chip pads 121 of the direct chip 120, but exposes some of the direct chip pads 121 and the first pads 115. It can be understood that in the first package component, a first conductive adhesive film 150 and second conductive bumps are respectively provided, and in the second package component, a second conductive adhesive film 220 and first conductive bumps are respectively provided. After the second package component is flipped and mounted to the first package component, the first conductive bumps on the second package component are embedded in the first conductive adhesive film 150 in the first package component, and the second conductive bumps on the first package component are embedded in the second conductive adhesive film 220 in the second package component. Among them, the first conductive adhesive film 150 realizes the electrical connection between two adjacent direct chips 120 in the second package component, and the first conductive adhesive film 150 realizes the electrical connection between the direct chip 120 in the second package component and the second substrate 210. Similarly, the second conductive adhesive film 220 realizes the electrical connection between two adjacent direct chips 120 in the first package component, and the second conductive adhesive film 220 realizes the electrical connection between the direct chip 120 in the first package component and the first substrate 110.

[0110] Combined with Figure 6, Optionally, step S200 further includes: mounting a heat sink 160 on the first substrate 110 and / or the first electronic device; wherein, third conductive adhesive films 161 are respectively provided on both sides of the heat sink 160. For example, when mounting the first flip chip 130, the heat sink 160 can also be mounted. Third conductive adhesive films 161 are respectively provided on two opposite surfaces of the heat sink 160. The third conductive adhesive film 161 on one side is electrically connected to two adjacent front-mounted chips 120 on the first substrate 110, or is electrically connected to the first substrate 110 and the front-mounted chip 120 on the first substrate 110; the third conductive adhesive film 161 on the other side is electrically connected to two adjacent front-mounted chips 120 on the second substrate 210, or is electrically connected to the second substrate 210 and the front-mounted chip 120 on the second substrate 210. Further, second conductive posts 165 can be formed on the heat sink 160. After the first packaging component and the second packaging component are mounted, the second conductive posts 165 electrically connect the first packaging component and the second packaging component. The formation method and electrical connection principle of the second conductive posts 165 can refer to the formation method and electrical connection principle of the first conductive posts 135 in the above text, which will not be elaborated here.

[0111] It should be noted that the heat sink 160 can be made of ceramic or high heat dissipation material. The heat sink 160 can be mounted on the first substrate 110, can be mounted on the first substrate 110 and the front-mounted chip 120, or can be mounted on the first flip chip 130, and no specific limitation is made here. In addition, only the first flip chip 130 can be mounted on the first substrate 110 and the front-mounted chip 120, or only the heat sink 160 can be mounted, or the first flip chip 130 and the heat sink 160 can be respectively mounted, and the mounting is carried out according to actual needs, and no specific limitation is made here.

[0112] Combined with Figure 7 , In step S300, a second substrate 210 is provided, wherein the structure of the second substrate 210 is the same as that of the first substrate 110. Optionally, the material and preparation method are both the same, which is convenient for unified preparation on the same production line.

[0113] In step S400, the method of mounting the second electronic device is the same as that of mounting the first electronic device. Among them, the first conductive bumps can be the first pads 115 on the second substrate 210 and the front-mounted pads 121 exposed by the front-mounted chips 120 on the second substrate 210. Optionally, a second conductive adhesive film 220 is provided on the second electronic device. The second conductive adhesive film 220 can electrically connect at least two first electronic devices in the first packaging component, or can also electrically connect the first substrate 110 and the front-mounted chips 120 on the first substrate 110.

[0114] It should be understood that the method for forming the second encapsulation component is the same as that for forming the first encapsulation component, that is, step S300 is the same as step S100, and step S400 is the same as step S200. That is, the structures of the first encapsulation component and the second encapsulation component are the same. After the first encapsulation component is formed, steps S300 and S400 can be repeated to obtain the second encapsulation component, and then the second encapsulation component is flipped and mounted on the first encapsulation component; alternatively, in steps S100 and S200, multiple first encapsulation components can be prepared in batches and obtained at one time, and then any two first encapsulation components are selected, and one of the first encapsulation components is flipped and mounted on the other first encapsulation component, which is not specifically limited here.

[0115] It is easy to understand that the second encapsulation component includes a second substrate 210 and second electronic devices. The second electronic devices include a direct chip 120, a first flip chip 130, and a second flip chip 140. The second encapsulation component also selectively includes a heat sink 160.

[0116] Combined with Figures 8 to 10 , in step S500, the second encapsulation component needs to be flipped 180 degrees and rotated 180 degrees before being mounted, that is, the second encapsulation component needs to be flipped up and down and then flipped left and right before being mounted on the first encapsulation component, so that the first conductive bumps are electrically connected to the first conductive adhesive film 150, and the second conductive bumps are electrically connected to the second conductive adhesive film 220. It is easy to understand that after the second encapsulation component is mounted, the first flip chip 130 on the second encapsulation component is mounted on the direct chip 120 of the first encapsulation component, and the direct chip 120 on the second encapsulation component is mounted on the first flip chip 130 of the first encapsulation component. In this way, the structure is more compact, the encapsulation size is reduced, the space utilization rate is higher, which is beneficial to the interconnection between electronic devices and improves the integration degree.

[0117] Optionally, when mounting, the first encapsulation component and the second encapsulation component are respectively heated to soften the first conductive adhesive film 150 and the second conductive adhesive film 220, which is beneficial to the first conductive bumps being embedded in the first conductive adhesive film 150 and the second conductive bumps being embedded in the second conductive adhesive film 220, and the electrical connection is more stable and reliable. The first encapsulation component can be heated through a mounting platform, and the second encapsulation component can be heated through a mounting head. The heat-softened conductive adhesive film covers the pads of the chip or the substrate, realizing the electrical connection with the pads, and at the same time can protect the pads and the bumps on the pads. This way of electrically connecting through the conductive adhesive film avoids the complex process of the through-silicon via technology and a series of defects brought by the through-silicon via technology, can reduce the number of wirings on the substrate, shorten the length of the interconnection lines, reduce the transmission path, reduce the signal transmission delay and loss, reduce the power consumption and the encapsulation volume, and realize the multi-functional and high-performance chip system-level packaging.

[0118] After step S500, the first encapsulation component and the second encapsulation component are encapsulated to form an encapsulation body 170. By filling the encapsulation material, the chip connection structure is protected. The encapsulation body 170 covers the first encapsulation component and the second encapsulation component, playing a protective role. It should be noted that after encapsulation, the third pads 117 on the first substrate 110 and the second substrate 210 are respectively exposed outside the encapsulation body 170. After encapsulation, ball implantation is performed on the first substrate 110 or the second substrate 210, and finally dicing is performed to form single encapsulation bodies. It is easy to understand that the third pads 117 are respectively provided on the first substrate 110 and the second substrate 210. After ball implantation is performed on the third pads 117 of one substrate, the third pads 117 on the other substrate can continue to stack electronic devices or components, or be used as test pads to improve the encapsulation integration and facilitate test connection, etc.

[0119] It should be noted that the first conductive pillar 135 and the second conductive pillar 165 can be selectively provided. If the first conductive pillar 135 or the second conductive pillar 165 is not provided, that is, the first substrate 110 and the second substrate 210 are not electrically connected. Solder balls 180 are provided on the first substrate 110 and are soldered to the circuit board through the solder balls 180, which can play a role in improving the performance of the circuit board; electronic devices or components can continue to be mounted on the side of the second substrate 210 away from the second electronic device, which can improve the performance of the electronic device. Encapsulating the first encapsulation component and the second encapsulation component with the same structural performance in the same structure can play a role in reducing the encapsulation volume and achieving two-sided functional partitioning. If the first conductive pillar 135 or the second conductive pillar 165 is provided, and of course, the first conductive pillar 135 and the second conductive pillar 165 can also be provided simultaneously, the electrical connection between the first substrate 110 and the second substrate 210 can be realized, which can improve the integration of electronic devices and is beneficial to high-performance and multi-functional chip encapsulation.

[0120] In the semiconductor encapsulation method provided by the embodiment of the present invention, conductive adhesive films and conductive bumps are respectively formed on two encapsulation components. One encapsulation component is flipped and mounted on the other encapsulation component so that the conductive adhesive film on one encapsulation component is electrically connected to the conductive bumps on the other encapsulation component, thereby realizing the interconnection between chips or the interconnection between a chip and a substrate. The number of wiring layers on the substrate is reduced, the length of the interconnection line is shortened, the transmission path is reduced, the electrical connection is more reliable, the signal transmission delay and loss are reduced, the power consumption and the encapsulation volume are reduced, a multi-functional and high-performance chip system-level encapsulation is realized, and the encapsulation quality and efficiency are improved. In addition, after mounting, the conductive bumps can be embedded in the conductive adhesive film, and the conductive adhesive film plays a protective role for the conductive bumps, solving the problem that the bumps are broken due to stress generated by bump welding in the prior art, and the electrical connection performance is more stable.

[0121] Second Embodiment

[0122] Combined with Figure 11, an embodiment of the present invention provides a semiconductor package structure 100, including a first package component and a second package component; the first package component includes a first substrate 110, a first electronic device is mounted on the first substrate 110, and a first conductive adhesive film 150 is provided on a side of the first electronic device away from the first substrate 110;

[0123] The second package component includes a second substrate 210, a second electronic device is mounted on the second substrate 210, and first conductive bumps are provided on the second substrate 210 and / or the second electronic device;

[0124] The second package component is connected to the first package component so that the first conductive bumps are electrically connected to the first conductive adhesive film 150, so that the first conductive adhesive film 150 electrically connects the second electronic device and the second substrate 210, and / or, the first conductive adhesive film 150 electrically connects at least two second electronic devices on the second substrate 210. It can be understood that a part of the first conductive adhesive film 150 electrically connects two or more electronic devices, and another part of the first conductive adhesive film 150 electrically connects the electronic device and the first substrate 110.

[0125] Optionally, the first electronic device includes a flip-chip-on-board 120 and a first flip-chip 130. The flip-chip-on-board 120 is disposed on the first substrate 110, the first flip-chip 130 is disposed on a side of the flip-chip-on-board 120 away from the first substrate 110, and a first conductive adhesive film 150 is provided on a side of the first flip-chip 130 away from the flip-chip-on-board 120; the first flip-chip 130 is attached to two adjacent flip-chip-on-boards 120.

[0126] The first electronic device further includes a second flip-chip 140. The second flip-chip 140 is disposed on the first substrate 110, and the second flip-chip 140 is spaced apart from the flip-chip-on-board 120, and a gap groove 143 is formed between the flip-chip-on-board 120 and the second flip-chip 140. A protective adhesive 145 is provided in the gap groove 143, and a surface of the protective adhesive 145 is flush with a side of the second flip-chip 140 away from the first substrate 110. The width of the gap groove 143 is at least greater than twice the particle size of the colloid of the protective adhesive 145, so that the protective adhesive 145 can smoothly fill the gap groove 143 to better protect the pads at the bottom of the second flip-chip 140 and prevent the second conductive adhesive film 220 in the second package component from falling into the gap groove 143.

[0127] A groove 114 is formed on the first substrate 110, and the first electronic device is disposed in the groove 114; and / or a groove 114 is formed on the second substrate 210, and the second electronic device is disposed in the groove 114. In this embodiment, in order to facilitate the packaging process and reduce the packaging height, grooves 114 are respectively formed on the first substrate 110 and the second substrate 210.

[0128] The first electronic device includes a flip-chip 120, a first flip-chip 130, and a second flip-chip 140. The flip-chip 120 and the second flip-chip 140 are disposed in the groove 114, and the heights of the flip-chip 120 and the second flip-chip 140 are respectively equal to the depth of the groove 114. The first flip-chip 130 is disposed on two adjacent flip-chips 120, and / or on the flip-chip 120 and the first substrate 110. In this embodiment, the number of the first flip-chips 130 is multiple. Some of the first flip-chips 130 are disposed on two adjacent flip-chips 120, and some of the first flip-chips 130 are disposed on the flip-chip 120 and the first substrate 110.

[0129] Combined with Figure 12 , optionally, the first flip-chip 130 is provided with a first conductive post 135. One end of the first conductive post 135 is connected to the first conductive adhesive film 150, and the other end is electrically connected to the solder joint of the first flip-chip 130, so that the first flip-chip 130 is electrically connected to the second electronic device on the second substrate 210. It can be understood that the setting of the first conductive post 135 can realize the interconnection between the first substrate 110 and the second substrate 210, or realize the interconnection between the first electronic device and the second electronic device.

[0130] Combined with Figure 13 , further, in this embodiment, the size of the first substrate 110 is larger than the size of the second substrate 210. When performing plastic encapsulation protection, the plastic encapsulant 170 can protect the side wall of the second substrate 210, and the protection performance is better. Moreover, the second substrate 210 is smaller, which can increase the flowability of the plastic encapsulant entering the intermediate layer space between the first substrate 110 and the second substrate 210. The plastic encapsulant can enter the intermediate layer space from the side wall of the second substrate 210 to better protect the chips and connection structures between the first substrate 110 and the second substrate 210, and can also play a role in protecting the side wall of the second substrate 210.

[0131] It can be understood that although the sizes of the first substrate 110 and the second substrate 210 are different, the sizes of the grooves 114 on the first substrate 110 and the grooves 114 on the second substrate 210 can be the same. Such a setting facilitates the realization of a consistent mounting structure of the electronic devices in the grooves 114, is conducive to the symmetry of the electronic device mounting, balances the stress generated during the mounting process, alleviates the structural warping, and the structure is more compact, with high space utilization rate and smaller packaging volume, which is conducive to realizing high-density and high-integration chip packaging.

[0132] Combined with Figure 14, Optionally, the semiconductor package structure 100 further includes a heat sink 160. The heat sink 160 is disposed on the first substrate 110 and / or the first electronic device. Third conductive film 161 is provided on both sides of the heat sink 160. One side of the third conductive film 161 is electrically connected to the first substrate 110 and / or the first electronic device, and the other side of the third conductive film 161 is electrically connected to the second substrate 210 and / or the second electronic device. In this embodiment, the heat sink 160 is disposed on two adjacent flip-chip 120s, or the heat sink 160 is disposed on the flip-chip 120 and the first substrate 110. Alternatively, the number of heat sinks 160 is multiple, part of them are disposed on two flip-chip 120s, and part of them are disposed on the flip-chip 120 and the first substrate 110. Further, a second conductive post 165 is provided in the heat sink 160. The second conductive post 165 penetrates the heat sink 160 to electrically connect the third conductive films 161 on both sides, thereby realizing the electrical connection between the first electronic device and the second electronic device, and realizing the electrical connection between the first substrate 110 and the second substrate 210.

[0133] It should be noted that, in some embodiments, the heat sink 160 can partially or completely replace the first flip-chip 130. The heat sink 160 has functions such as heat dissipation, support, buffering, electrical connection, and stress balance.

[0134] Optionally, second conductive bumps are provided on the first substrate 110 and / or the first electronic device; a second conductive film 220 is provided on the side of the second electronic device away from the second substrate 210; the second package component is mounted on the first package component so that the first conductive bumps are electrically connected to the first conductive film 150, and the second conductive bumps are electrically connected to the second conductive film 220. The second conductive bumps include but are not limited to the first pads 115 and the flip-chip pads 121. After mounting the first flip-chip 130, part of the first pads 115 are electrically connected to the first flip-chip 130, and part of the first pads 115 are exposed; part of the flip-chip pads 121 are electrically connected to the first flip-chip 130, and part of the flip-chip pads 121 are exposed. The exposed first pads 115 and flip-chip pads 121 are respectively electrically connected to the second conductive film 220 on the second package component.

[0135] It is easy to understand that bumps for electrical connection are also provided on the first pads 115 and the flip-chip pads 121. The first conductive film 150, the second conductive film 220, etc. in this embodiment can protect the pads and the bumps on the pads.

[0136] In this embodiment, before mounting, the mounting layouts of the first electronic device and the second electronic device are exactly the same. In the mounted structure, the first electronic device and the second electronic device are in a centrosymmetric structure, which can balance the mounting stress, relieve the structure warping, and make the package structure more stable.

[0137] The parts not mentioned in this embodiment are similar to those described in the first embodiment, and will not be elaborated here.

[0138] In summary, the semiconductor packaging method and the semiconductor packaging structure 100 provided by the embodiments of the present invention have the following beneficial effects:

[0139] The semiconductor packaging method and structure provided by the embodiments of the present invention are configured such that after a conductive adhesive film is disposed on an electronic device and a first packaging component and a second packaging component are attached, conductive bumps in the second packaging component are embedded in the conductive adhesive film in the first packaging component, thereby achieving electrical connection between the conductive bumps and the conductive adhesive film, and thus achieving electrical connection between adjacent electronic devices in the second packaging component, and also achieving electrical connection between the electronic devices in the second packaging component and the second substrate 210. Implementing electrical connection between adjacent electronic devices by using a conductive adhesive film provides reliable electrical connection, can effectively reduce the number of wiring layers, shorten the length of interconnecting wires, reduce signal transmission delay and loss, lower power consumption and packaging volume, and improve packaging quality and efficiency. In addition, in the semiconductor packaging structure 100, the conductive bumps can be embedded in the conductive adhesive film, and the conductive adhesive film protects the conductive bumps, solving the problem of fracture of the bumps caused by stress generated during bump welding in the prior art, and making the electrical connection performance more stable.

[0140] The above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed by the present invention should be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. A semiconductor packaging method, characterized in that, it includes: providing a first substrate; mounting a first electronic device on the first substrate to form a first packaging component; wherein, the first electronic device is provided with pads; a conductive adhesive layer is attached to a side of the first electronic device away from the pads, and a conductive trace line is formed on the conductive adhesive layer to form a first conductive adhesive film; second conductive bumps are provided on the first substrate and / or the first electronic device; providing a second substrate; mounting a second electronic device on the second substrate to form a second packaging component; wherein, first conductive bumps are provided on the second substrate and / or the second electronic device; a conductive adhesive layer is provided on a side of the second electronic device away from the second substrate, and a conductive trace line is formed on the conductive adhesive layer to form a second conductive adhesive film; flipping the second packaging component and mounting it on the first packaging component; wherein, the first conductive bumps are electrically connected to the first conductive adhesive film, so that the first conductive adhesive film electrically connects the second electronic device and the second substrate, and / or, the first conductive adhesive film electrically connects at least two of the second electronic devices on the second substrate; the second conductive bumps are electrically connected to the second conductive adhesive film; the second conductive adhesive film electrically connects the first electronic device and the first substrate, and / or, the second conductive adhesive film electrically connects at least two of the first electronic devices on the first substrate.

2. The semiconductor packaging method according to claim 1, characterized in that, the step of mounting the first electronic device on the first substrate to form the first packaging component includes: before or after the step of mounting the first electronic device, forming a first conductive adhesive film on a side of the first electronic device away from the first substrate.

3. The semiconductor packaging method according to claim 1, characterized in that, the step of forming a conductive trace line on the conductive adhesive layer includes: forming a conductive trace line on the conductive adhesive layer by means of laser cutting.

4. The semiconductor packaging method according to claim 1, characterized in that, the step of attaching a conductive adhesive layer to a side of the first electronic device away from the pads and forming a conductive trace line on the conductive adhesive layer further includes: a plurality of the first electronic devices are spaced apart and attached to the conductive adhesive layer, a scribe lane is provided on the conductive adhesive layer, after forming the conductive trace line by means of laser cutting, cutting along the scribe lane to form a single first electronic device having a conductive trace line.

5. The semiconductor packaging method according to claim 2, characterized in that, before the step of forming a first conductive adhesive film on a side of the first electronic device away from the first substrate, the semiconductor packaging method further includes: grinding the first electronic device to reduce the thickness of the first electronic device to a preset thickness.

6. The semiconductor packaging method according to claim 1, characterized in that, the first electronic device includes a front-mounted chip and a first flip-chip, and the step of mounting the first electronic device on the first substrate includes: mounting the front-mounted chip on the first substrate; Mount the first flip chip on the side of the direct chip away from the first substrate, and a first conductive adhesive film is provided on the side of the first flip chip away from the direct chip.

7. The semiconductor packaging method according to claim 6, wherein, the step of mounting the first flip chip on the side of the direct chip away from the first substrate includes: Mount the first flip chip on two adjacent direct chips.

8. The semiconductor packaging method according to claim 6, wherein, the first electronic device further includes a second flip chip, and the step of mounting the first electronic device on the first substrate further includes: Mount the second flip chip on the first substrate, the second flip chip is arranged at an interval from the direct chip, and a gap groove is formed between the direct chip and the second flip chip.

9. The semiconductor packaging method according to claim 8, wherein, the step of mounting the second flip chip on the first substrate further includes: Fill the gap groove with a protective adhesive, and the surface of the protective adhesive is flush with the side of the second flip chip away from the first substrate.

10. The semiconductor packaging method according to claim 6, wherein, the step of mounting the first flip chip on the side of the direct chip away from the first substrate further includes: Provide a first conductive pillar on the first flip chip, so that after the first packaging component and the second packaging component are mounted, the first conductive pillar electrically connects the first packaging component and the second packaging component.

11. The semiconductor packaging method according to claim 1, wherein, the semiconductor packaging method further includes: Mount a heat sink on the first substrate and / or the first electronic device; wherein, third conductive adhesive films are provided on both sides of the heat sink.

12. The semiconductor packaging method according to claim 11, wherein, the step of mounting the heat sink on the first substrate and / or the first electronic device includes: Provide a second conductive pillar on the heat sink, and after the first packaging component and the second packaging component are mounted, the second conductive pillar electrically connects the first packaging component and the second packaging component.

13. The semiconductor packaging method according to claim 1, wherein, the step of providing the first substrate and mounting the first electronic device on the first substrate includes: Open a groove in the first substrate, and mount the first electronic device in the groove.

14. The semiconductor packaging method according to claim 1, wherein, the first substrate includes a first surface and a second surface arranged opposite to each other, and the step of providing the first substrate further includes: Form a first pad, a second pad and a third pad on the first substrate; wherein, the first pad and the second pad are arranged on the first surface of the first substrate, and the third pad is arranged on the second surface of the first substrate; An intermediate circuit layer is provided in the first substrate for realizing the electrical connection between the first pad and the third pad, and / or realizing the electrical connection between the second pad and the third pad.

15. The semiconductor packaging method according to claim 1, characterized in that, after the step of flipping the second packaging component and mounting it on the first packaging component, it further includes: Encapsulating the first packaging component and the second packaging component to form an encapsulation body.

16. The semiconductor packaging method according to any one of claims 1 to 15, characterized in that, The method of forming the second packaging component is the same as the method of forming the first packaging component.

17. A semiconductor packaging structure, characterized in that, comprising: A first packaging component and a second packaging component; The first packaging component includes a first substrate, a first electronic device is mounted on the first substrate, and a first conductive adhesive film is provided on a side of the first electronic device away from the first substrate; second conductive bumps are provided on the first substrate and / or the first electronic device; The second packaging component includes a second substrate, a second electronic device is mounted on the second substrate, and first conductive bumps are provided on the second substrate and / or the second electronic device; a second conductive adhesive film is provided on a side of the second electronic device away from the second substrate; The second packaging component is connected to the first packaging component so that the first conductive bumps are electrically connected to the first conductive adhesive film, so that the first conductive adhesive film electrically connects the second electronic device and the second substrate, and / or, the first conductive adhesive film electrically connects at least two of the second electronic devices on the second substrate; The second conductive bumps are electrically connected to the second conductive adhesive film; the second conductive adhesive film electrically connects the first electronic device and the first substrate, and / or, the second conductive adhesive film electrically connects at least two of the first electronic devices on the first substrate; Wherein, the first conductive adhesive film and the second conductive adhesive film are respectively conductive trace lines formed on a conductive adhesive layer.

18. The semiconductor packaging structure according to claim 17, characterized in that, The first electronic device includes a front-mounted chip and a first flip-chip, the front-mounted chip is disposed on the first substrate, the first flip-chip is disposed on a side of the front-mounted chip away from the first substrate, and the first conductive adhesive film is provided on a side of the first flip-chip away from the front-mounted chip; the first flip-chip is attached to two adjacent front-mounted chips.

19. The semiconductor packaging structure according to claim 18, characterized in that, The first electronic device further includes a second flip-chip, the second flip-chip is disposed on the first substrate, the second flip-chip is spaced apart from the front-mounted chip, and a gap groove is formed between the front-mounted chip and the second flip-chip.

20. The semiconductor packaging structure according to claim 19, characterized in that, A protective adhesive is provided in the gap groove, and the surface of the protective adhesive is flush with a side of the second flip-chip away from the first substrate.

21. The semiconductor packaging structure according to claim 20, characterized in that, The width of the gap groove is at least greater than twice the particle size of the colloid of the protective glue.

22. The semiconductor package structure according to claim 17, wherein, a groove is formed on the first substrate, and the first electronic device is disposed in the groove; and / or a groove is formed on the second substrate, and the second electronic device is disposed in the groove.

23. The semiconductor package structure according to claim 22, wherein, the first electronic device includes a flip-chip, a first flip-chip and a second flip-chip, the flip-chip and the second flip-chip are disposed in the groove, and the heights of the flip-chip and the second flip-chip are respectively equal to the depth of the groove; the first flip-chip is disposed on two adjacent flip-chips, and / or disposed on the flip-chip and the first substrate.

24. The semiconductor package structure according to claim 18, wherein, the first flip-chip is provided with a first conductive post, one end of the first conductive post is connected to the first conductive adhesive film, and the other end is electrically connected to the solder joint of the first flip-chip, so that the first flip-chip is electrically connected to the second electronic device on the second substrate.

25. The semiconductor package structure according to claim 17, wherein, the size of the first substrate is larger than the size of the second substrate.

26. The semiconductor package structure according to claim 17, wherein, further comprising a heat sink, the heat sink is disposed on the first substrate and / or the first electronic device, and third conductive adhesive films are respectively disposed on two sides of the heat sink, one side of the third conductive adhesive film is electrically connected to the first substrate and / or the first electronic device, and the other side of the third conductive adhesive film is electrically connected to the second substrate and / or the second electronic device.

27. The semiconductor package structure according to claim 26, wherein, a second conductive post is disposed in the heat sink, and the second conductive post electrically connects the third conductive adhesive films on both sides.

28. The semiconductor package structure according to claim 17, wherein, second conductive bumps are disposed on the first substrate and / or the first electronic device; a second conductive adhesive film is disposed on a side of the second electronic device away from the second substrate; the second package component is mounted on the first package component, so that the first conductive bumps are electrically connected to the first conductive adhesive film, and the second conductive bumps are electrically connected to the second conductive adhesive film.

29. The semiconductor package structure according to any one of claims 17 to 28, wherein, the first electronic device and the second electronic device are in a centrosymmetric structure.

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