A constant voltage output system
Through the combination of the ramp signal generation module and the comparison control module, the control circuit is simplified, the components are reduced, the stability of the output voltage and the miniaturization of the system are achieved, and the problems of complexity and large number of components in the traditional constant voltage output system are solved.
Patent Information
- Application Number
- CN202210911191.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-07-29
- Publication Date
- 2025-09-16
- Estimated Expiration
- 2042-07-29
AI Technical Summary
The traditional constant voltage output system has a complex control circuit and a large number of components, which makes the system difficult to miniaturize and integrate, and the load current changes affect the output voltage stability.
The combination of a ramp signal generation module, a comparison control module and a switch module is adopted. The switching of the switch module is controlled by comparing the ramp signal with the reference voltage to achieve a constant output voltage.
The control circuit is simplified, the number of components is reduced, a constant voltage output that is easy to miniaturize is achieved, and the output voltage is stable and is not affected by changes in input voltage and load current.
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Figure CN115118169B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of power supplies, and in particular relates to a constant voltage output system. Background Art
[0002] The output voltage of a power supply is generally affected by changes in the input voltage (i.e., bus voltage). In addition to the effects of input voltage changes, changes in load current can also affect the output voltage. Generally, an increase in input bus voltage will increase the output voltage, which in turn increases the load current and causes the output voltage to decrease. Large fluctuations in output voltage can damage the load or circuit components.
[0003] Traditional constant-voltage output systems achieve constant voltage by collecting the output voltage and comparing it with a reference voltage to generate a negative feedback signal to control the output of the main power circuit. This ensures that the output voltage approaches the reference voltage, thereby achieving a constant voltage. However, these systems suffer from complex control circuits, large compensation components, a high number of components, and control circuits that only target specific loops. These drawbacks hinder the miniaturization and integrated application of constant-voltage output systems.
[0004] For example, the MP1470 constant voltage output control system Figure 9 As shown, compensation components (circled in the figure) need to be provided. In an integrated circuit, the area of the compensation components is too large. Summary of the Invention
[0005] In view of the deficiencies in the prior art, the present invention provides a constant voltage output system with a relatively simple control circuit, a small number of components, and easy miniaturization.
[0006] A constant voltage output system comprises a ramp signal generating module, a comparison control module and a switch module connected in sequence, wherein the voltage output terminal of the switch module is connected to the input terminal of the ramp signal generating module through a signal feedback module;
[0007] The switch module is used to connect its voltage input end and voltage output end when it is turned on, and disconnect its voltage input end and voltage output end when it is turned off;
[0008] The signal feedback module is configured to generate a feedback voltage according to the output voltage of the switch module and send the feedback voltage to the ramp signal generation module;
[0009] The ramp signal generating module is configured to convert the feedback voltage into a ramp signal output, and regenerate the ramp signal upon receiving a reset signal;
[0010] The comparison control module is configured to compare the ramp signal with a reference voltage, and when the ramp signal exceeds the reference voltage, control the switch module to be closed and send the reset signal to the ramp signal generation module; otherwise, control the switch module to be opened.
[0011] As a preferred solution, the signal feedback module includes a feedback voltage divider network and a buffer;
[0012] The feedback voltage divider network is used to generate a feedback voltage;
[0013] The buffer is used to drive the feedback voltage to the ramp signal generating module.
[0014] As a preferred solution, the feedback voltage divider network includes resistors R1 and R2; the resistors R1 and R2 are connected in series, one end of which is connected to the output end of the switch module and the other end is grounded; the positive input end of the buffer is connected between the resistors R1 and R2, the negative input end is connected to its output end, and its output end is connected to the ramp signal generating module.
[0015] As a preferred solution, the ramp signal generating module includes an oscillator, a digital control unit and a digital-to-analog converter connected in sequence;
[0016] The oscillator is used to generate a clock signal;
[0017] The digital control unit is configured to generate a continuously increasing control signal according to the clock signal;
[0018] The digital-to-analog converter is used to generate and output a ramp signal according to the feedback voltage and the control signal.
[0019] As a preferred solution, the digital control unit adopts 74HC194.
[0020] As a preferred solution, the digital-to-analog converter adopts MAX5360.
[0021] As a preferred solution, the comparison control module includes a comparator, a D flip-flop and a driving module connected in sequence;
[0022] The comparator is used to compare the ramp signal with a reference voltage and output a comparison result;
[0023] The D flip-flop is used to control the turning on and off of the driving module according to the comparison result;
[0024] The driving module is used to drive the switch module to be turned on and off.
[0025] As a preferred solution, the switch module adopts a MOS tube.
[0026] Compared with the prior art, the present invention has the following beneficial effects:
[0027] When the input voltage V in When a change occurs, a ramp signal is generated by the ramp signal generation module, and the output duty cycle of the driving module is adjusted by comparing it with the reference voltage, thereby achieving the purpose of constant voltage output; its control circuit is relatively simple, the number of components is small, and it is easy to miniaturize. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0029] Figure 1 This is a schematic diagram of the module structure of a constant voltage output system of the present invention;
[0030] Figure 2 This is a schematic diagram of the circuit structure of a constant voltage output system of the present invention;
[0031] Figure 3 A schematic diagram of a timing state 1 of a digital control unit of a constant voltage output system of the present invention;
[0032] Figure 4 A schematic diagram of a timing state 2 of a digital control unit of a constant voltage output system according to the present invention;
[0033] Figure 5 This is a working timing diagram of a digital-to-analog converter of a constant voltage output system of the present invention;
[0034] Figure 6 A schematic diagram of an output voltage duty cycle of a constant voltage output system according to the present invention;
[0035] Figure 7 A timing diagram of a comparator in a constant voltage output system according to the present invention;
[0036] Figure 8 A timing diagram of a D flip-flop of a constant voltage output system according to the present invention;
[0037] Figure 9 This is a schematic diagram of the structure of an MP1470 constant voltage output control system in the prior art (including compensation components).
[0038] Among them, 1 ramp signal generating module; 11 oscillator; 12 digital control unit; 13 digital-to-analog converter;
[0039] 2 comparison control module; 21 comparator; 22 D trigger; 23 driving module;
[0040] 3 switch modules;
[0041] 4 signal feedback modules; 41 buffers. DETAILED DESCRIPTION
[0042] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.
[0043] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.
[0044] A constant voltage output system comprises a ramp signal generating module 1, a comparison control module 2 and a switch module 3 connected in sequence, wherein the voltage output end of the switch module 3 is connected to the input end of the ramp signal generating module 1 through a signal feedback module 4;
[0045] The switch module 3 is used to connect its voltage input end and voltage output end when it is turned on, and disconnect its voltage input end and voltage output end when it is turned off;
[0046] The signal feedback module 4 is used to generate a signal according to the output voltage V out Generate feedback voltage V FB and sent to the ramp signal generating module;
[0047] The ramp signal generating module 1 is used to convert the feedback voltage V FB Converted into a ramp signal V O1 output, and regenerate the ramp signal V upon receiving the reset signal RST O1 ;
[0048] The comparison control module 2 is used to compare the ramp signal V O1 With reference voltage V REF When the ramp signal exceeds the reference voltage V REF When the reset signal RST is sent to the ramp signal generating module, the switch module is controlled to be closed; otherwise, the switch module is controlled to be opened.
[0049] In this embodiment, Figure 1 As shown, the switch module can be a MOS tube. The ramp signal generating module and the comparison control module form a voltage control circuit. When the input voltage V in When a change occurs, the feedback voltage is converted into a ramp signal by the ramp signal generation module, and the ramp signal is compared with the reference voltage by the comparison control module to control the opening and closing of the switch module, thereby adjusting the duty cycle of the output voltage and achieving the purpose of constant voltage output.
[0050] As a further preferred embodiment, the signal feedback module 4 includes a feedback voltage divider network and a buffer 41;
[0051] The feedback voltage divider network is used to generate the feedback voltage V FB ;
[0052] The buffer 41 is used to drive the feedback voltage V FB To the ramp signal generating module 1.
[0053] In this embodiment, Figure 2 As shown, the feedback voltage divider network includes resistors R1 and R2; the resistors R1 and R2 are connected in series, one end of which is connected to the output of the switch module and the other end is grounded. The non-inverting input of the buffer is connected between the resistors R1 and R2, the inverting input is connected to the output of the buffer, and the output of the buffer is connected to the ramp signal generation module.
[0054] Among them, the feedback voltage of the feedback voltage divider network is V FB , V FB With the output voltage V out The relationship is:
[0055] Where the sampling scale factor Then V FB =V out *k.
[0056] The buffer is an op amp with a gain of 1, which means that its output amplification factor is 1 (the output voltage is equal to the input voltage), and the driving capability of its output voltage is provided by the buffer. The buffer outputs an output signal with the same value as the input voltage but with improved driving capability, i.e., V B =V FB =V out *k; that is, the buffer provides a feedback voltage V FB driving capability.
[0057] As a further preferred embodiment, the ramp signal generating module 1 comprises an oscillator 11, a digital control unit 12 and a digital-to-analog converter 13 connected in sequence;
[0058] The oscillator 11 is used to generate a clock signal CLK;
[0059] The digital control unit 12 is configured to generate a continuously increasing control signal Ctrl according to the clock signal CLK;
[0060] The digital-to-analog converter 13 is used to convert the feedback voltage V FB and the control signal Ctrl generates a ramp signal V O1 And output.
[0061] In this embodiment, Figure 2 As shown, the oscillator can provide the periodic clock signal required for the constant voltage output system of the present invention to operate, for example, a 33K periodic clock signal with a duty cycle of 50%.
[0062] like Figure 2 As shown, the digital control unit can output a continuous, increasing control signal Ctrl according to the number of cycles of the input clock, which belongs to the existing technology. For example, 74HC194 can be used. Take a 6-bit control signal (000000~111111) as an example: when the first clock arrives, 000000 is output; when the second clock arrives, 000001 is output; when the third clock arrives, 000010 is output; and so on, until the 64th clock arrives, 111111 is output. When a reset occurs, the digital control unit starts counting the number of clocks from the beginning and outputs the corresponding control signal. The timing state of the digital control unit is specifically described as follows:
[0063] Timing state 1: If Figure 3 As shown, when there is no reset signal during the entire process, the system continuously outputs digital control signals until the output of all bit signals is completed.
[0064] Timing state 2: If Figure 4 As shown, when the reset signal is advanced, the output of the bit control signal is terminated in advance until the reset signal ends, and the number of clocks is counted again from the beginning.
[0065] like Figure 2 As shown, the digital-to-analog converter, under the control signal Ctrl sent by the digital control unit, converts the feedback signal FB into a ramp signal output (linearizes the output sampled signal), for example, MAX5360 can be used. In this embodiment, a 6-bit digital-to-analog converter is used as an example, which can output 64 step signals, and the voltage value of each step is The digital control unit makes the voltage V output by the digital-to-analog converter O1 Each clock cycle increases one step output: Until V O1 =VREF (reference voltage), from which formula ① can be derived: Its working sequence is as follows Figure 5 shown.
[0066] In this embodiment, the output voltage V out The high level is V in , the low level is 0. Formula ① is rewritten as formula ②: like Figure 6 As shown, V in one clock cycle T out of That is And here is the high level duty cycle of the clock cycle. That is to say, the output voltage V out is a time-related parameter.
[0067] As a further preferred embodiment, the comparison control module 2 includes a comparator 21, a D flip-flop 22 and a driving module 23 connected in sequence;
[0068] The comparator 21 is used to convert the ramp signal V o1 With reference voltage V REF Compare and output the comparison results;
[0069] The D flip-flop 22 is used to control the opening and closing of the driving module 23 according to the comparison result;
[0070] The driving module 23 is used to drive the switch module 3 to be turned on and off.
[0071] In this embodiment, Figure 2 As shown, the comparator can output the ramp signal V O1 With reference voltage V REF For comparison (reference voltage V REF It is a voltage signal that is independent of the system voltage and ambient temperature). Figure 7 As shown, when V P1 Greater than V REF When V O1 Less than V REF When , the comparator outputs a low level; the result of the comparator is used to control the reset of the D flip-flop.
[0072] like Figure 2 As shown, the D flip-flop can fix the frequency f (fixed period is In this embodiment, a periodic clock signal (50 Hz, with a period of 20 ms) is output to control the opening or closing of the driving module; when the high level is high, the driving module is turned on, and when the low level is low, the driving module is turned off.
[0073] like Figure 8 As shown, when the comparator outputs a high level, the D flip-flop is reset, and the D flip-flop outputs a low level, turning off the drive module. The control signal output time of the entire system is t1, and the duty cycle of the output control signal is D t = t1 * f. The D flip-flop output Q has a fixed period of T, where the high-level time t1 is determined by the module circuit described above. Rst is the D flip-flop reset signal, which can occur at any time in the system. When Rst reset occurs, the D flip-flop output Q outputs a reset signal at a low level.
[0074] like Figure 2 As shown, the driving module can control the switch module to open or close, so that V out Periodically with V in Connected. V out =V in *D t =V in *t1*f, substitute formula ② to get: According to the system settings of the digital-to-analog converter bit number, reference voltage V REF , clock frequency f and feedback coefficient k, constant voltage output can be achieved. The output voltage value V out , only with the system setting of the digital-to-analog converter bit, reference voltage V REF , clock frequency f and feedback coefficient k, and has nothing to do with input voltage (bus voltage VIN) and output load.
[0075] The above-described embodiments merely illustrate several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that variations and modifications are possible without departing from the scope of the present invention, and such variations and modifications are fully within the scope of protection of the present invention.
Claims
1. A constant voltage output system, characterized in that: It includes a ramp signal generating module, a comparison control module and a switch module connected in sequence, wherein the voltage output end of the switch module is connected to the input end of the ramp signal generating module through a signal feedback module; The switch module is used to connect its voltage input end and voltage output end when it is turned on, and disconnect its voltage input end and voltage output end when it is turned off; The signal feedback module is configured to generate a feedback voltage according to the output voltage of the switch module and send the feedback voltage to the ramp signal generation module; The ramp signal generating module is configured to convert the feedback voltage into a ramp signal output, and regenerate the ramp signal upon receiving a reset signal; The comparison control module is configured to compare the ramp signal with a reference voltage, and when the ramp signal exceeds the reference voltage, control the switch module to turn off and send the reset signal to the ramp signal generation module; otherwise, control the switch module to turn on; The ramp signal generating module includes an oscillator, a digital control unit and a digital-to-analog converter connected in sequence; The oscillator is used to generate a clock signal; The digital control unit is configured to generate a continuously increasing control signal according to the clock signal; The digital-to-analog converter is configured to generate and output a ramp signal according to the feedback voltage and the control signal; The comparison control module includes a comparator, a D trigger and a driving module connected in sequence; The comparator is used to compare the ramp signal with a reference voltage and output a comparison result; The D flip-flop is used to control the turning on and off of the driving module according to the comparison result; The driving module is used to drive the switch module to be turned on and off.
2. A constant voltage output system according to claim 1, characterized in that: The signal feedback module includes a feedback voltage divider network and a buffer; The feedback voltage divider network is used to generate a feedback voltage; The buffer is used to drive the feedback voltage to the ramp signal generating module.
3. A constant voltage output system according to claim 2, characterized in that: The feedback voltage divider network, including resistors and The resistance and connected in series, one end is connected to the output end of the switch module and the other end is grounded; the positive input end of the buffer is connected to the resistor and The inverting input end is connected to the output end thereof, and the output end thereof is connected to the ramp signal generating module.
4. The constant voltage output system according to claim 1, characterized in that: The digital control unit adopts 74HC194.
5. The constant voltage output system according to claim 1, characterized in that: The digital-to-analog converter adopts MAX5360.
6. The constant voltage output system according to claim 1, characterized in that: The switch module adopts MOS tube.
Citation Information
Patent Citations
Switching converter, and control circuit and control method thereof
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Switching power supply and control circuit thereof
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