Display device, driver circuit and operation method thereof

Abstract

The present disclosure relates to a display device, a driver circuit and an operating method thereof. The display device includes a control circuit, an LED zone array and an array of driver circuits distributed in the display area. The driver circuits are arranged in groups and connected into a serial chain through grouped communication lines. The grouped driver circuits can be configured between a serial communication mode and a parallel communication mode. In the serial communication mode, each driver circuit receives an incoming signal on an input pin, processes the signal through a serial communication logic to generate an outgoing signal, and outputs the outgoing signal to an output pin, so that the driver circuit processes the incoming signal serially. In the parallel communication mode, each driver circuit transmits the incoming signal from the input pin to the output pin by bypassing the serial communication logic, so that all driver circuits in the group can process the incoming signal in parallel.

Description

Technical Field

[0001] The present disclosure relates generally to light emitting diodes (LEDs) and LED driver circuits for displays, and more particularly to display architectures with distributed driver circuits. Background Art

[0002] LEDs are used in many electronic display devices, such as televisions, computer monitors, laptops, tablet computers, smart phones, projection systems, and head-mounted devices. Modern displays can include far more than 10 million individual LEDs, which can be arranged in rows and columns in a display area. To drive each LED, current methods use driver circuits that require a large amount of external chip area, which affects the size of the display device. Summary of the invention

[0003] In a first aspect, a display device includes an array of light-emitting diode zones, a control circuit, a grouped driver circuit, and a grouped communication line. The array of light-emitting diode zones each includes one or more light-emitting diodes that generate light in response to a corresponding driver current. The control circuit generates a driver control signal and a readback command signal. The grouped driver circuits are distributed in a display area of ​​the display device, and each drives a corresponding light-emitting diode zone by controlling a corresponding driver current in response to the driver control signal. The driver circuit also generates readback data to the control circuit in response to the readback command signal. The grouped communication line couples the grouped driver circuits to each other and the coupled control circuit in a serial chain. The grouped driver circuits can switch between a serial communication mode and a parallel communication mode. In the serial communication mode, the grouped driver circuits serially process the communication signals received on the grouped communication lines and serially propagate the communication signals through the serial chain. In the parallel communication mode, the grouped driver circuits directly propagate the communication signals between the driver circuits via the grouped communication lines to achieve parallel processing of the communication signals.

[0004] In another aspect, a driver circuit includes a mode control logic, a parallel communication control logic, an LED driver, a serial communication logic, and a multiplexer. The mode control logic configures the communication mode of the driver circuit between a parallel communication mode and a serial communication mode. The parallel communication logic receives a driver input signal and generates an LED control signal based on the driver input signal received on a data input pin. The LED driver drives the LED zone in response to the LED control signal. The serial communication logic receives the driver input signal and outputs an outgoing serial communication signal. The multiplexer selects between: outputting the driver input signal to the data output pin when the driver circuit is configured in the parallel communication mode; and outputting the outgoing serial communication signal to the data output pin when the driver circuit is configured in the serial communication mode.

[0005] In another aspect, a method for operating a display device is provided, the display device comprising grouped driver circuits coupled to each other and to a control circuit in a serial chain via a grouped communication line. The control circuit generates a driver control signal and a readback command signal. The grouped driver circuits are configured in a serial communication mode, and address allocation is facilitated using an addressing signal that is serially propagated through the serial chain via the grouped communication line. Each of the grouped driver circuits processes the addressing signal serially using serial communication logic. After address allocation, the grouped driver circuits are configured in a parallel communication mode in which the serial communication logic is bypassed. The driver control signal is sent to the grouped driver circuits via the communication line in the parallel communication mode so that the grouped driver circuits can process the driver control signal in parallel. The grouped driver circuits drive corresponding light-emitting diode areas by controlling corresponding driver currents in response to the driver control signals. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The teachings of embodiments of the present invention can be readily understood by considering the following detailed description in conjunction with the accompanying drawings.

[0007] Figure 1 is a circuit diagram of a first embodiment of a display device including a distributed driver circuit.

[0008] Figure 2A is a circuit diagram of an embodiment of a driver circuit.

[0009] Figure 2B is a circuit diagram of an embodiment of a driver circuit, Figure 2B The signal paths when operating in parallel communication mode are shown.

[0010] Figure 2C is a circuit diagram of an embodiment of a driver circuit, Figure 2C The signal paths are shown when operating in serial communication mode.

[0011] Figure 2D is a circuit diagram of an alternative implementation of a driver circuit that implements bidirectional parallel communication.

[0012] Figure 3 is a flow chart illustrating an example implementation of a process for operating a display device having a driver circuit that is configurable between a serial communication mode and a parallel communication mode.

[0013] Figure 4A is a cross-sectional view of a first embodiment of an LED and a driver circuit that can be used in a display device.

[0014] Figure 4Bis a cross-sectional view of a second embodiment of an LED and a driver circuit that can be used in a display device.

[0015] Figure 4C is a cross-sectional view of a third embodiment of an LED and a driver circuit that can be used in a display device.

[0016] Figure 5 is a top view of a display device using an LED and a driver circuit according to one embodiment.

[0017] Figure 6 A schematic diagram showing several layers of an LED and driver circuit for a display device according to one embodiment.

[0018] The features and advantages described in this specification are not all-inclusive, and in particular, many additional features and advantages will be apparent to those of ordinary skill in the art in view of the drawings, description and claims. In addition, it should be noted that the language used in this specification is primarily selected for readability and instructional purposes, and is not selected to describe or limit the inventive subject matter. DETAILED DESCRIPTION

[0019] The display device includes a control circuit, an array of LED zones, and an array of driver circuits distributed in the display area. The driver circuits are arranged in groups and connected into a serial chain through group communication lines. The group of driver circuits can be configured between a serial communication mode and a parallel communication mode. In the serial communication mode, each driver circuit receives an input signal on an input pin, processes the signal through a serial communication logic to generate an output signal, and outputs the output signal to an output pin, so that the driver circuit processes the input signal in series. In the parallel communication mode, each driver circuit transmits the input signal from the input pin to the output pin by bypassing the serial communication logic, so that all driver circuits in the group can process the input signal in parallel.

[0020] Figure 11 is a circuit diagram of a display device 100 for displaying an image or video. In various embodiments, the display device 100 can be implemented in any suitable form factor, including display screens for computer display panels, televisions, mobile devices, billboards, etc. The display device 100 may include a display area 105, a control circuit 110, and a group of control lines 115. The display area 105 includes a distributed driver circuit 120 that drives an LED zone 130 and an array of LED zones 130. The display area 105 includes a pixel array for displaying an image based on data received from the control circuit 110. The display area 105 may include the LED zones 130, the group of distributed driver circuits 120, power supply lines, and various signal lines, the power supply lines including VLED lines (e.g., VLED_1, ..., VLED_M), driver supply lines Pwr, and ground (GND) lines, and the signal lines include communication lines 155 that couple the driver circuits 120 to each other and to the control circuit 110, and optional readback lines 125.

[0021] The driver circuit 120 and the corresponding LED region 130 may be implemented in an integrated package such that the LED region 130 is stacked above the driver circuit 120 on a substrate, as shown in FIGS. 4 to 5. Figure 6 Alternatively, the driver circuit 120 and the corresponding LED zone 130 may be implemented in separate packages.

[0022] The display device 100 may include a liquid crystal display (LCD) device or an LED display device. In an LCD display device, an LED provides a white light backlight that passes through a liquid crystal color filter that controls the color of each pixel of the display. Each LED zone 130 may include an LED corresponding to a one-dimensional pixel array or a two-dimensional pixel array. In an LED display device, the LED is directly controlled to emit colored light corresponding to each pixel of the display device 100. Here, each LED zone 130 may include one or more LEDs corresponding to a single pixel, or may include a one-dimensional LED array or a two-dimensional LED array corresponding to a pixel array (e.g., one or more columns or rows). For example, in one embodiment, the LED zone 130 may include one or more groups of red LEDs, green LEDs, and blue LEDs that each correspond to a sub-pixel of a pixel. In another embodiment, the LED zone 130 may include one or more groups of red LED strings, green LED strings, and blue LED strings corresponding to columns or partial columns of sub-pixels or rows or partial rows of sub-pixels. For example, the LED zone 130 may include grouped red sub-pixels, grouped green sub-pixels, or grouped blue sub-pixels.

[0023] The LEDs in each LED zone 130 may be organic light emitting diodes (OLEDs), inorganic light emitting diodes (ILEDs), mini-LEDs (e.g., ranging in size between 100 microns and 300 microns), micro-LEDs (e.g., less than 100 microns in size), white light emitting diodes (WLEDs), active matrix OLEDs (AMOLEDs), transparent OLEDs (TOLEDs), or some other type of LEDs.

[0024] The driver circuits 120 are distributed in the display area 105 and drive corresponding LED zones 130 by controlling a drive current through the LED zones 130 based on a driver control signal received from the control circuit 110. For example, the driver circuits 120 may adjust the current level and / or duty cycle of the drive current to achieve a desired brightness of the LEDs in the LED zones 130. In an embodiment, the driver circuits 120 may control two or more color channels (e.g., a red color channel, a green color channel, and a blue color channel) of the LED zones 130, respectively, via independently controllable drive currents for each channel.

[0025] In an embodiment, the driver circuit 120 may also include an integrated sensor. For example, the driver circuit 120 may include an integrated temperature sensor, a light sensor, a voltage sensor, an image sensor, or other sensing device. In response to a readback command from the control circuit 110, the driver circuit 120 outputs the requested sensor data to the control circuit 110, and the control circuit 110 can use the sensor data to adjust the operation of the display device 100 (e.g., adjust the driver control signal). In an alternative embodiment, the display area 105 may include a dedicated sensor device (not shown) that provides one or more sensing functions outside the driver circuit 120. The dedicated sensor device can similarly provide readback data to the control circuit 110 for adjusting the operation of the display device 100.

[0026] The driver circuits 120 may be arranged in groups (e.g., rows) that share common power supply lines (including driver circuit supply lines Pwr and LED zone supply lines VLED) and control lines 115. For example, the driver circuits 120 in a group may be coupled to each other and to the control circuit 110 via a group communication line 155 and an optional readback line 125. In different implementations, the serial line 155 may be configured for unidirectional or bidirectional communication. In the case of a bidirectional communication line 155, the readback line 125 may be optionally omitted.

[0027] The driver circuit 120 includes control logic that can operate in various modes, including at least an addressing mode, a configuration mode, and an operating mode. During the addressing mode, the control circuit 110 initiates an addressing process so that an address is assigned to each driver circuit 120. During the configuration mode and the operating mode, the control circuit 110 sends commands and data that can be directed to a specific driver circuit based on the address of the specific driver circuit 120. In the configuration mode, the control circuit 110 configures the driver circuit 120 by one or more operating parameters (e.g., overcurrent threshold, overvoltage threshold, clock division ratio, and / or conversion rate control). During the operating mode, the control circuit 110 provides control data to the driver circuit 120, which causes the driver circuit to control the corresponding driver current to the LED zone 130, thereby controlling the brightness. The control circuit 110 can also issue a command to the driver circuit 120 during the operating mode to request readback data (e.g., sensor data), and the driver circuit 120 provides the requested readback data to the control circuit 110 in response to the command.

[0028] The driver circuit 120 may include a power pin 124 , a ground pin (Gnd) 128 , one or more LED drive output pins (Out) 126 , a data input pin (Di) 122 , and a data output pin 132 .

[0029] The ground pin 128 is configured to provide the driver circuit 120 with a path to a ground line, which may be common to the corresponding LED zones 130. The power pin 124 provides a connection to the driver circuit power supply line Pwr.

[0030] Data input pin 122 and data output pin 132 are coupled to communication lines 155 to facilitate communications to and from driver circuit 120. Communication lines 155 may be used, for example, to assign addresses to driver circuit 120, send dimming control signals to the driver circuit, send readback commands to driver circuit 120, or provide readback data to control circuit 110 in response to commands as described below.

[0031] Alternatively, the data input pin 122 and the data output pin 132 may be assigned to different physical pins to enable bidirectional communication. Thus, for example, the driver circuit 120 may be configured for forward ( Figure 1 ), where pin 122 operates as a data input pin and pin 132 operates as a data output pin (e.g., Figure 1 ), or the driver circuit 120 may be configured for reverse ( Figure 1 ), where pin 122 instead operates as a data output pin and pin 132 instead operates as a data input pin.

[0032] One or more LED driver output pins 126 are coupled to the LED zones 130 to control the driver current through the LED zones 130. In an embodiment, the one or more LED driver output pins 126 may include a plurality of pins in groups to control different corresponding channels of the LED zones 130. For example, in an LED display device, the LED driver output 126 may include three pins to control a red channel, a green channel, and a blue channel of the LED zone 130. Alternatively, in an LCD display device, the LED driver output 126 may include a single pin for controlling a white backlight channel.

[0033] The communication line 155 can be used for communication in a serial communication mode or a parallel communication mode. In the serial communication mode, serial communication data (e.g., commands or sensor data) is propagated between the control circuit 110 and one or more driver circuits 120 in the group through a series of serial hops on the communication line 155 and / or the readback line 125. Here, the driver circuit 120 receives an incoming serial communication signal on its data input pin 122, processes the incoming serial communication signal to generate an outgoing serial communication signal (which may be different from the incoming serial communication signal), and outputs the outgoing serial communication signal on its data output pin 132. Thus, for example, in order to send a serial command from the control circuit 110 to the target driver circuit 120, the control circuit 110 sends the command to the first driver circuit 120, the first driver circuit 120 receives the serial command, processes the serial command and outputs the serial command to the next driver circuit 120, and so on until the serial command reaches the target driver circuit 120. To send data from a driver circuit 120 to a control circuit 110, the driver circuit 120 outputs the data on its data output pin 132 to an adjacent driver circuit 120, which receives and processes the data and outputs the data via its data output pin 132 until the data reaches the control circuit 110 via the readback line 125. Alternatively, if bidirectional communication is used, the configurable data input pin 122 and data output pin 132 may be swapped to enable reverse communication from the driver circuit 120 to the control circuit 110.

[0034] The driver circuits 120 may operate in a serial communication mode in conjunction with a clock signal (not shown) or using a clockless protocol. If a clock signal is present, the signals may propagate synchronously between the driver circuits 120 (e.g., one bit of data per clock cycle). Otherwise, if a clockless architecture is used, the data may be encoded using an encoding scheme (e.g., bi-phase mark encoding) that enables data to be asynchronously shifted through the serial communication link.

[0035] In the parallel communication mode, the driver circuits 120 are configured to create a direct connection (with optional buffering) between the data input pin 122 and the data output pin 132, so that the communication line 155 can operate together as a parallel communication bus between the control circuit 110 and each driver circuit 120. For example, in the parallel communication mode, each driver circuit 120 in the group receives data approximately in parallel (e.g., with only a limited propagation delay that can be significantly less than the processing time in the serial communication mode). Here, each driver circuit 120 can optionally buffer the data, but does not change the data or wait for data processing to complete before passing the data to the next driver circuit 120. Therefore, in order to send a parallel command from the control circuit 110 to the target driver circuit 120, the control circuit 110 outputs the command to the first driver circuit 120, the first driver circuit 120 passes the command directly (with operational buffering) to the next driver circuit, and so on, so that all driver circuits 120 in the group receive commands approximately in parallel. After the control circuit issues a read-back request command, the driver circuit 120 may serially send the read-back data from one driver circuit to the next driver circuit, and then finally to the read-back line 12, and finally back to the control circuit.

[0036] In an embodiment, the driver circuits 120 are configured to communicate serially during the addressing mode to serially propagate address information to facilitate address assignment. Here, an addressing signal is sent from the control circuit 110 to the first driver circuit 120 in the group of driver circuits 120 via the communication line 155. The first driver circuit 120 receives the address signal via its data input pin 122, stores the address based on the incoming addressing signal, and generates an outgoing addressing signal for output to the next driver circuit 120 via its data output pin 132 and the communication line 155. The second driver circuit 120 similarly receives the addressing signal from the first driver circuit 120 via its data input pin 122, stores the address based on the incoming addressing signal, and outputs the outgoing addressing signal to the next driver circuit 120 via its data output pin 132. This process continues throughout the chain of driver circuits 120. The last driver circuit 120 may optionally send its assigned address back to the control circuit 110 so that the control circuit 110 can confirm that the address has been correctly assigned. The addressing process may be performed in parallel or sequentially for each group (eg, each row) of driver circuits 120 .

[0037] In an example addressing scheme, each driver circuit 120 may receive an address, store the address, increment the address by 1 or another fixed amount, and send the incremented address as an outgoing addressing signal to the next driver circuit 120 in the group. Alternatively, each driver circuit 120 may receive the address of the previous driver circuit, increment the address, store the incremented address, and send the incremented address to the next driver circuit 120. In other implementations, the driver circuits 120 may generate addresses based on the incoming address signals according to a different function (e.g., decrement).

[0038] After addressing, the driver circuit 120 can be configured in a parallel communication mode in a normal operation mode to receive commands based on the address. The command may include a dimming command for controlling the dimming of the LED zone 130, or a readback command requesting readback data from the driver circuit 120. For the dimming command, the driver circuit 120 receives the dimming data and adjusts the drive current to the corresponding LED zone 130 to achieve the desired brightness. The readback command may request information such as channel voltage information, temperature information, light sensing information, status information, fault information, or other data. In response to these readback commands, the driver circuit 120 can be reconfigured into a serial communication mode to obtain the requested readback data, and send the readback data to the control circuit 110 via serial communication. After the readback is completed, the driver circuit 120 can be reconfigured into a parallel communication mode.

[0039] The readback command may be directed to a single driver circuit 120 or to a group of driver circuits 120 (by specifying a target address). In an example process for implementing a readback command for a target driver circuit 120, the driver circuit 120 is configured in a parallel communication mode, and the control circuit 110 sends a readback command, which is received by all driver circuits 120 in the group. Upon recognizing the command as a readback command, the driver circuit 120 reconfigures itself to a serial communication mode. The target driver circuit 110 obtains the requested readback data and outputs the readback data on its data output pin 132. The next driver circuit 120 receives the readback data on its data input pin 122 and propagates the readback data to the next driver circuit 120 in the serial chain until the readback data reaches the control circuit 110. The readback data may propagate through the chain in either direction in the serial communication mode. In an embodiment, the response to the readback command may include the address of the target driver circuit 120 so that the control circuit 110 can confirm which driver circuit 120 provided the response.

[0040] In the example of a group readback command, the control circuit 110 sends a readback command that is received by all driver circuits 120 in the group. Upon recognizing the command as a readback command, the driver circuits 120 reconfigure themselves into a serial communication mode. Starting with a predefined starting driver circuit 120 (e.g., the first driver circuit 120 in the chain), the relevant readback data may be obtained, processed, and sent to the next driver circuit 120. As the readback data propagates through the chain, each driver 120 combines the data received from the previous driver circuit 120 with its sensed data to provide a single result to the control circuit 110. For example, in one embodiment, the control circuit 110 may issue a channel sense command over the communication line 155. The first driver circuit 120 receives a channel voltage sense command and outputs the command to the next driver circuit 120 along with the channel voltage sensed by the first driver circuit 120. The next driver circuit 120 receives the command and the incoming channel voltage value from the previous driver circuit 120, senses its own channel voltage, and applies a function to the incoming channel voltage value and the sensed channel voltage to generate an outgoing channel voltage value, which the driver circuit 120 outputs via the serial communication line 155. Here, the function may include a minimum function, so that the driver circuit 120 compares the received channel voltage with its sensed channel voltage and outputs the smaller of the following via the communication line 155: the received channel voltage from the previous driver circuit 120 and the sensed channel voltage from the current driver circuit 120. Alternatively, the function may include, for example, a maximum function, an average function, or other functions. This process is repeated throughout the chain of driver circuits 120, so that each driver circuit 120 outputs a result value (e.g., a minimum value, a maximum value, or an average value) based on the sensed channel voltage detected among the current driver circuit 120 and all previous driver circuits 120. The resulting readback data received by the control circuit 110 represents a function (e.g., a minimum, maximum, or average) of each detected channel voltage in the grouped driver circuits 120. The control circuit 110 can then set a shared supply voltage VLED for the LED zones 130 in each group or set another control parameter based on the readback data. For example, by applying a minimum function to obtain the minimum channel voltage in the group, the control circuit 110 can set the supply voltage VLED for the LED zones 130 to a level sufficient to drive the LED zone 130 having the lowest sensed channel voltage to a predetermined level.

[0041] In another example, a group command may be used for temperature sensing. During readback, a driver circuit 120 receives a temperature from an adjacent driver circuit 120, applies a function to the received temperature and its own sensed temperature to generate an outgoing temperature value, and outputs the outgoing temperature to the next driver circuit 120. Thus, the control circuit 110 may obtain a function of the sensed temperature associated with each driver circuit 120 in the group. Here, the function may include, for example, summing or averaging, or detecting a minimum or maximum value. The control circuit 110 may then adjust the operation of the driver circuit 120 to account for temperature-related changes in the output of the LED zone 130.

[0042] In another example, a group command may be used for fault detection. Here, each driver circuit 120 may propagate a fault status flag through the chain, and each driver circuit 120 has the ability to set the fault status flag when a fault occurs. The fault status flag (along with the address of the faulty driver circuit 120) may then be propagated to the control circuit 110 to enable the control circuit 110 to detect the faulty driver circuit 120 and adjust the operation of the driver circuit 120 accordingly.

[0043] The readback data can be used to calibrate the display device 100. For example, the control circuit 110 can change the on / off duty cycle and LED current of the driver circuit 120 based on the feedback received from the driver circuit 120 to change the effective brightness of each LED zone 130. More specifically, the control circuit 110 can calibrate the driver circuit 120 so that the LED zones 130 each output the same brightness in response to the same brightness control signal, regardless of process variations in the LEDs or associated circuits that may otherwise cause the variations. The calibration process can be performed by measuring light output, channel voltage, temperature, or other data that may affect the performance of the LEDs using sensors in the display area 105. Alternatively, the measurements can be made by a device outside the display area 105, such as a separate high-precision photometer dedicated to the calibration sequence. The calibration process can be repeated over time (e.g., when the display device 100 becomes hot during operation).

[0044] In other embodiments, groups of driver circuits 120 do not necessarily correspond to rows of display area 105. In alternative embodiments, groups of connected driver circuits 120 coupled via communication lines 155 may instead correspond to partial rows of display area 105 or all or a portion of columns of display area 105. In another embodiment, groups of driver circuits 120 may correspond to blocks of adjacent or non-adjacent driver circuits 120 that may span multiple rows and columns.

[0045] In a different configuration, one or more dedicated sensor circuits (not shown) may be coupled in the group driver circuit 120. Here, the sensor circuit may have a similar pin configuration and connectivity as the driver circuit 120, except that the sensor circuit is not coupled to drive the LED zone 130. The sensor circuit may similarly facilitate addressing and readback over the communication link, and may similarly respond to a readback command with sensed readback data.

[0046] Figure 2A An example implementation of driver circuit 120 is shown. The driver circuit includes parallel communication control logic 206, serial communication control logic 204, LED driver 208, mode configuration logic 224, and multiplexer 210. Additional components (e.g., power regulators, fault protection logic, etc.) are omitted from the figure for clarity of description.

[0047] The mode configuration logic 214 configures the driver circuit 110 to a serial communication mode or a parallel communication mode. For example, in an embodiment, the mode configuration logic 224 configures the driver circuit 120 to a serial communication mode during an addressing mode and during a readback operation, and additionally configures the driver circuit 110 to a parallel communication mode to receive commands during normal operation. The mode configuration logic 214 can switch between modes based on a data input signal received on a data input pin 122. For example, the mode configuration logic 214 can initially configure the driver circuit 120 to a serial communication mode after power-on and before address assignment. Once the driver circuit 120 obtains an address, the driver circuit 120 switches to a parallel communication mode to receive dimming and readback commands. When the mode configuration logic 214 recognizes a readback command, the driver circuit 120 switches to a serial communication mode for readback. Then, after the driver circuit 120 performs its serial communication function for readback, the driver circuit 120 switches back to the parallel communication mode.

[0048] The parallel communication control logic 206 receives the data input signal from the data input pin 122 and passes the dimming command to the LED driver 208, which controls the driving of the LED zone 130 via the LED drive output pin 126. For example, the LED drive logic 208 controls the current through the LED zone 130 based on the desired brightness in the dimming command.

[0049] The serial communication control logic 204 also receives a data input signal from the data input pin 122. The serial communication control logic 204 processes the incoming serial communication signal data to generate an outgoing serial communication signal 222. For example, in an addressing mode, the serial communication control logic 204 may receive an incoming addressing signal and generate an outgoing addressing signal as a serial output signal 222. For readback, the serial communication control logic 204 may receive incoming readback data and generate outgoing readback data as a serial output signal 222. In an embodiment, the serial communication control logic 204 may ignore commands intended for parallel communication, such as dimming commands.

[0050] When the S / P flag 212 is configured for parallel communication, the multiplexer 210 outputs a buffered data input signal, and when the S / P flag 212 is configured for serial communication, the multiplexer 210 outputs a buffered serial output signal 222. In an example implementation, the multiplexer 210 includes a parallel channel buffer 214, an inverter 216, and a serial channel buffer 218. When the mode configuration logic 224 sets the S / P flag 212 to the parallel mode, the parallel channel buffer 214 is turned on and the serial channel buffer 218 is turned off (tri-state) based on the inverted S / P flag 224 generated by the inverter 216. Therefore, the data input signal on the data input pin 122 is buffered and directly passed to the data output pin 132. When the mode configuration logic 224 sets the S / P flag 212 to the serial mode, the parallel channel buffer 214 is turned off (tri-state) and the serial channel buffer 218 is turned on based on the inverted S / P flag 224 generated by the inverter. Thus, the data input pin 122 is processed by the serial communication control logic 214 to generate an outgoing serial communication 222 which is buffered and output to the data output pin 132 .

[0051] Figure 2BAn example implementation of a signal path (shown in bold) is shown when the driver circuit 120 is operated in parallel communication mode to process a dimming command in normal operation mode. Here, an input command is received at the data input pin 122. The mode configuration logic 212 recognizes the dimming command and provides the dimming command to the LED drive logic 206, which drives the LED zone 130 via the LED drive output pin 126 according to the dimming control signal. The mode configuration logic 224 controls the S / P flag 212 to cause the multiplexer 210 to turn on the parallel channel buffer 214 and turn off (high impedance) the serial channel buffer 218 to bypass the serial communication logic and output the buffered data input signal directly to the data output pin 132. In a clocked system, the propagation delay from the data input pin 122 to the data output pin 132 is much less than the clock cycle time, so that the chained driver circuits 120 in the group can effectively receive signals in parallel. In a system using clockless communication, the delay has no effect on signal synchronization (because there is no clock, by definition, the system is asynchronous). The propagation delay will accumulate from the first driver in a row to the last driver in a row. However, the total gate delay caused by the buffer 214 is so small compared to the frame rate of the display that the total gate delay is practically negligible.

[0052] Figure 2C An example implementation of a signal path (shown in bold) when operating the driver circuit 120 in a serial communication mode (e.g., processing addressing signals or outputting readback data) is shown. A data input signal is received at the data input pin 122. If the mode configuration logic 224 identifies the data input signal as an addressing signal or a readback signal, the mode configuration logic 224 configures the S / P flag to cause the multiplexer 210 to turn on the serial channel buffer 218 and bypass the parallel communication lines via the parallel channel buffer 214. In this mode, all signals passed from the data input pin 122 to the data output pin 132 are processed by the serial communication control logic 204, which can perform various transformations on the signals according to the serial communication function.

[0053] In another embodiment, the parallel path buffer 214 may be configured as follows: Figure 2D The switch 226 shown is replaced. When operating in the parallel communication mode, the switch 226 is closed, and when operating in the serial communication mode, it is open. In this embodiment, when the driver circuit 120 uses the parallel communication mode, data can be communicated bidirectionally. By using handshake technology with the controller 110, the driver circuit 120 can receive commands in parallel and then output data in response to the commands in parallel according to the commands. Various anti-collision techniques can be used to prevent any data loss due to data collision.

[0054] Figure 3 30 is an example implementation of a process for operating a display device 100 having a driver circuit 120 that can be configured between serial and parallel communication modes. At initial power-on, before address assignment, the driver circuit 120 is configured 302 to be in serial communication mode. The control circuit 110 and the driver circuit 120 perform 304 an addressing process in the serial communication mode to facilitate the assignment of addresses to the driver circuit 120. After the addresses are assigned, the driver circuit 120 is configured 306 to be in parallel communication mode for normal operation. Here, the driver circuit 120 processes 308 an LED control signal in the parallel communication mode to control the LED brightness. The driver circuit 120 detects 310 when a readback command is received (or otherwise remains in the parallel communication mode to process 308 an LED control signal). If a readback command is received, the driver circuit 120 switches to the serial communication mode to process 312 the readback command. After processing the readback command, the driver circuit 120 switches back to the parallel communication mode.

[0055] In embodiments where addresses are already stored to non-volatile memory upon initial power-up, steps 302 , 304 may be skipped and the driver circuit 120 may alternatively initially operate in a parallel communication mode, bypassing the addressing mode.

[0056] Figure 4A is a cross-sectional view of a first embodiment of a zone IC 400 including integrated LEDs and driver circuitry 405 in a single package. Figure 4A In the example shown, the circuit 400 includes: a printed circuit board (PCB) 410, a PCB interconnect layer 420, and an integrated LED and driver circuit 405, which includes: a substrate 430, a driver circuit layer 440, an interconnect layer 450, a conductive redistribution layer 460, and an LED layer 470. A bonding wire 455 may be included for connection between the PCB interconnect layer 420 and the integrated LED and driver circuit 405. The PCB 410 includes a support board for mounting the integrated LED and driver circuit 405, a control circuit, and various other supporting electronic devices. The PCB 410 may include internal electrical traces and / or vias that provide electrical connections between the electronic devices. The PCB interconnect layer 420 may be formed on the surface of the PCB 410. The PCB interconnect layer 420 includes pads for mounting various electronic devices and traces for connections between the electronic devices.

[0057] The integrated LED and driver circuit 405 includes a substrate 430 that can be mounted on the surface of the PCB interconnect layer 420. The substrate 430 can be, for example, a silicon (Si) substrate. In other embodiments, the substrate 430 can include various materials, such as gallium arsenide (GaAs), indium phosphide (InP), gallium nitride (GaN), AlN, sapphire, silicon carbide (SiC), etc.

[0058] The driver circuit layer 440 may be manufactured on the surface of the substrate 430 using a silicon transistor process (e.g., BCD processing) or other transistor processes. The driver circuit layer 440 may include one or more driver circuits (e.g., a single driver circuit or a group of driver circuits arranged in an array). The interconnect layer 450 may be formed on the surface of the driver circuit layer 440. The interconnect layer 450 may include one or more metal or metal alloy materials, such as Al, Ag, Au, Pt, Ti, Cu, or any combination thereof. The interconnect layer 450 may include electrical traces to electrically connect the driver circuits in the driver circuit layer 440 to the wire bonding members 455, which in turn are connected to the control circuits on the PCB 410. In an embodiment, each wire bonding member 455 provides an electrical connection to the control circuit according to the connection described in any of the aforementioned embodiments.

[0059] In an embodiment, the interconnect layer 450 is not necessarily distinct from the driver circuit layer 440 , and these layers 440 , 450 may be formed in a single process, with the interconnect layer 450 representing the top surface of the driver layer 440 .

[0060] The conductive redistribution layer 460 may be formed on the surface of the interconnect layer 450. The conductive redistribution layer 460 may include a metal grid made of a conductive material such as Cu, Ag, Au, Al, etc. The LED layer 470 includes LEDs on the surface of the conductive redistribution layer 460. The LED layer 470 may include an LED array arranged into an LED area as described above. The conductive redistribution layer 460 provides electrical connections between the LEDs in the LED layer 470 and one or more driver circuits in the driver circuit layer 440 for supplying driver current, and the conductive redistribution layer 460 provides a mechanical connection that fixes the LEDs above the substrate 430 so that the LED layer 470 and the conductive redistribution layer 460 are vertically stacked on the driver circuit layer 440.

[0061] Thus, in the illustrated circuit 400, one or more driver circuits and an LED region including LEDs are integrated into a single package including a substrate 430, wherein the LEDs in an LED layer 470 are stacked on driver circuits in a driver circuit layer 440. By stacking the LED layer 470 on the driver circuit layer 440 in this manner, the driver circuits can be distributed throughout the display area of ​​the display device.

[0062] Figure 4B is a cross-sectional view of a second embodiment of a display device 480 including an integrated LED and driver circuit 485 according to one embodiment. The device 480 is substantially similar to Figure 4A The device 400 described above is a device 400, but the electrical connection between the driver circuit layer 440 and the PCB 410 is formed by using vias 432 and corresponding connecting solder balls 434 instead of using wires 455. Here, the vias 432 are plated vertical electrical connections that pass completely through the substrate layer 430. In one embodiment, the substrate layer 430 is a Si substrate, and the through-chip vias 432 are through-silicon vias (TSV). The through-chip vias 432 are etched into the substrate layer 430 during manufacturing and penetrate the substrate layer 430, and the through-chip vias 432 can be filled with metal, such as tungsten (W), copper (C) or other conductive materials. The solder balls 434 include conductive materials that provide electrical and mechanical connections to the electrical traces on the PCB interconnect layer 420 and the plating of the vias 432. In one embodiment, each via 432 provides an electrical connection for providing signals such as driver control signals from the control circuit on the PCB 410 to the grouped driver circuits on the driver circuit layer 440. The vias 432 may also provide connections for incoming and outgoing addressing signals, a supply voltage (eg, VLED) to the LEDs in the LED regions on the LED layer 470, and a path to circuit ground (GND).

[0063] Figure 4C is a cross-sectional view of a third embodiment of a display device 490 including an integrated LED and driver circuit 495. The device 490 is substantially similar to Figure 4B 4. The device 480 described in the foregoing, but includes a driver circuit layer 440 and an interconnect layer 450 on the opposite side of the substrate 430 from the conductive redistribution layer 460 and the LED layer 470. In this embodiment, the interconnect layer 450 and the driver circuit layer 440 are electrically connected to the PCB 410 via a lower conductive redistribution layer 465 and solder balls 434. The lower conductive redistribution layer 465 and the solder balls 434 provide mechanical and electrical connections (e.g., for driver control signals) between the driver circuit layer 440 and the PCB interconnect layer 420. The driver circuit layer 440 and the interconnect layer 450 are electrically connected to the LEDs of the conductive redistribution layer 460 and the LED layer 470 via one or more plated vias 432 through the substrate 430. Figure 4C The one or more vias 432 seen in FIG. 4A may be used to provide driver current from a driver circuit in the driver circuit layer 440 to the LEDs in the LED layer 470 as well as to provide other signals as described above.

[0064] In alternative embodiments, the integrated driver and LED circuits 405 , 485 , 495 may be mounted to a different substrate, such as a glass substrate, rather than to the PCB 410 .

[0065] Figure 5 is a top view of a display device using an integrated LED and driver circuit 500 according to one embodiment. The circuit 500 may correspond to FIG. 4A to FIG. 4C 4. A top view of any integrated LED and driver circuit 405, 485, 495 depicted in FIG. 4. The plurality of LEDs of the LED layer 470 are arranged in rows and columns (e.g., C1, C2, C3, ..., Cn-1, Cn). For a passive matrix architecture, each row of LEDs of the LED layer 470 is connected to a demultiplexer that outputs a plurality of VLED signals (i.e., VLED_1, ..., VLED_M) via a conductive redistribution layer 460. The VLED signal provides power (i.e., supply voltage) to the LEDs of the corresponding row of the LED layer 470 via the conductive redistribution layer 460.

[0066] Figure 6 A schematic diagram 600 of several layers of a display device with integrated LEDs and driver circuits according to one embodiment is shown. The schematic diagram includes FIG. 4A to FIG. 4C PCB 410, driver circuit layer 440, conductive redistribution layer 460 and LED layer 470 described in. Figure 6 The schematic diagram shows FIG. 4A to FIG. 4C The circuit connections of the circuits 405, 485, 495 of FIG. 4 are shown, but the physical layout is not reflected. As described above, in the physical layout, the LED layer 470 is located on the conductive redistribution layer 460 (i.e., vertically stacked on the conductive redistribution layer 460). The conductive redistribution layer 460 is located on the driver circuit layer 440 and the driver circuit layer 440 is located on the PCB 410.

[0067] PCB 410 includes connections to a power source (e.g., VLED) that powers the LEDs, control circuits for generating control signals, general I / O connections, and ground (GND) connections. Driver circuit layer 440 includes multiple driver circuits (e.g., DC1, DC2, ..., DCn) and a demultiplexer DeMux. Conductive redistribution layer 460 provides electrical connections between the driver circuits and demultiplexer DeMux in driver circuit layer 440 to multiple LEDs in LED layer 470. LED layer 470 includes multiple LEDs arranged in rows and columns. In this example implementation, each column of LEDs is electrically connected to a driver circuit in driver circuit layer 440 via conductive redistribution layer 460. The electrical connection established between each driver circuit and its corresponding LED column controls the supply of driver current from the driver circuit to the column. In this embodiment, each diode shown in the LED layer corresponds to an LED zone. Each row of LEDs is electrically connected to one output (e.g., VLED_1, VLED_2, ..., VLED_M) of a demultiplexer DeMux in the driver circuit layer 440 via a conductive redistribution layer 460. The demultiplexer DeMux in the driver circuit layer 440 is connected to a power supply (VLED) and a control signal from the PCB 410. The control signal indicates to the demultiplexer DeMux which row or rows of LEDs are to be enabled and powered using the VLED line. Thus, when power (VLED) is supplied on the row associated with a particular LED in the LED layer 470 and a driver current is supplied to its associated column, the particular LED is activated.

[0068] After reading this disclosure, those skilled in the art will recognize yet further alternative embodiments through the principles disclosed herein. Therefore, although specific embodiments and applications have been shown and described, it should be understood that the disclosed embodiments are not limited to the exact configurations and components disclosed herein. Various modifications, changes and variations that will be apparent to those skilled in the art may be made to the arrangement, operation and details of the methods and devices disclosed herein without departing from the scope described herein.

Claims

1. A display device, comprising: an array of LED zones, each LED zone comprising one or more LEDs that generate light in response to a corresponding driver current; a control circuit that generates a driver control signal and a readback command signal; a group of driver circuits distributed in a display area of ​​the display device, the group of driver circuits each driving a corresponding light emitting diode area by controlling a corresponding driver current in response to the driver control signal, and the driver circuits generating readback data to the control circuit in response to the readback command signal; a group communication line coupling the group of driver circuits in a serial chain to each other and to the control circuit; and wherein the group driver circuit is capable of switching between a serial communication mode and a parallel communication mode, wherein in the serial communication mode, the group driver circuit receives a communication signal received on the group communication line and propagates the communication signal through a serial communication logic; In the parallel communication mode, the group of driver circuits receives communication signals received on the group of communication lines and directly propagates the communication signals between driver circuits via the group of communication lines to achieve parallel processing of the communication signals.

2. The display device according to claim 1, in, In the serial communication mode, each driver circuit receives an input data signal on a data input pin, processes the input data signal through the serial communication logic to generate an output data signal, and outputs the output data signal on a data output pin, and Wherein, in the parallel communication mode, each driver circuit receives a parallel communication signal on the data input pin, transmits the parallel communication signal from the data input pin to the data output pin by bypassing the serial communication logic, and outputs the parallel communication signal on the data output pin.

3. The display device according to claim 2, wherein: In the parallel communication mode, each driver circuit buffers the parallel communication signal while bypassing the serial communication logic.

4. The display device according to claim 1, wherein: In an addressed mode, the grouped driver circuits are configured in the serial communication mode to facilitate address assignment based on an addressing signal propagated serially through the serial chain.

5. The display device according to claim 1, wherein: The ganged driver circuit starts up in the serial communication mode at initial power-up prior to address assignment, operates in the serial communication mode to facilitate address assignment, and switches to the parallel communication mode after address assignment.

6. The display device according to claim 1, wherein: The grouped driver circuits are configured to operate in the parallel communication mode during a normal operating mode to receive and process the driver control signals in parallel.

7. The display device according to claim 1, wherein: The ganged driver circuit is configured to receive the readback command signal while operating in the parallel communication mode, and in response to receiving the readback command signal, switch to the serial communication mode to serially transmit the readback data to the control circuit.

8. The display device according to claim 1, wherein: The communication line includes a readback line coupling a last driver circuit in the serial chain to the control circuit, wherein the control circuit sends the readback command to the driver circuit in a first direction through the serial chain, and wherein the driver circuit outputs the readback data to the control circuit in the same direction through the readback line.

9. The display device according to claim 1, wherein: The grouped driver circuits are configured for bidirectional communication in the serial communication mode such that the readback commands are sent in a first direction through the serial chain to the target driver circuits, and wherein the readback data are sent in a reverse direction through the serial chain to the control circuits.

10. The display device according to claim 1, wherein: Each of the light emitting diode regions and a corresponding driver circuit are stacked on a substrate in the form of an integrated package.

11. A driver circuit for a display device, comprising: a mode control logic that configures a communication mode of the driver circuit between a parallel communication mode and a serial communication mode; a parallel communication control logic that receives a driver input signal and generates an LED control signal based on the driver input signal received on a data input pin; An LED driver that drives the LED zone in response to the LED control signal; serial communication logic that receives the driver input signal and outputs an outgoing serial communication signal; as well as A multiplexer selects between: outputting the driver input signal to a data output pin when the driver circuit is configured in a parallel communication mode; and outputting an outgoing serial communication signal to the data output pin when the driver circuit is configured in a serial communication mode.

12. The driver circuit according to claim 11, wherein: The mode configuration logic configures the driver circuit to the serial communication mode upon initial power-up and in an addressing mode, wherein when operating in the addressing mode, the serial communication logic receives an incoming addressing signal, stores an address based on the incoming addressing signal, and outputs an outgoing addressing signal based on the incoming addressing signal to the data output pin.

13. The driver circuit according to claim 11, wherein: The mode configuration logic configures the driver circuit to operate in the parallel communication mode during normal operation to receive the driver input signal and generate the LED control signal, and pass the driver input signal to the data output pin by bypassing the serial communication logic.

14. The driver circuit according to claim 11, wherein: The mode configuration logic is configured to detect a readback command in the driver input signal, configure the driver circuit to the serial communication mode in response to the readback command, and transmit readback data from the serial communication logic to a control circuit.

15. The driver circuit according to claim 11, wherein: The multiplexer comprises: a parallel channel buffer that buffers the driver input signal to generate a buffered driver output signal provided to the data output pin when operating in the parallel communication mode; and A serial channel buffer buffers the outgoing serial communication signal to generate a buffered driver output signal to the data output pin when operating in the serial communication mode.

16. The driver circuit according to claim 11, wherein: Each of the LED zones and the corresponding driver circuit are stacked on a substrate in the form of an integrated package.

17. The driver circuit according to claim 11, wherein: The multiplexer comprises: a switch that is turned on to couple the data input pin to the data output pin in the parallel communication mode and is turned off to decouple the data input pin from the data output pin when operating in the serial communication mode; and A serial channel buffer buffers the outgoing serial communication signal to generate a buffered driver output signal to the data output pin when operating in the serial communication mode.

18. A method for operating a display device, comprising: A driver control signal and a read-back command signal are generated by a control circuit; configuring the group of driver circuits in a serial communication mode, the group of driver circuits being coupled to each other and to the control circuit in a serial chain via the group communication line; in the serial communication mode, facilitating assigning addresses to the group of driver circuits using an addressing signal that is serially propagated through the serial chain via the group communication line, wherein each of the group of driver circuits serially processes the addressing signal using serial communication logic; After address assignment, configuring the grouped driver circuits to a parallel communication mode in which the serial communication logic is bypassed; sending driver control signals to the group of driver circuits via the communication line in the parallel communication mode to enable the group of driver circuits to process the driver control signals in parallel; and The corresponding light emitting diode areas are driven by groups of driver circuits distributed in the display area of ​​the display device by controlling corresponding driver currents in response to the driver control signals.

19. The method according to claim 18, further comprising: sending, by the control circuit, a readback command to the group of driver circuits operating in the parallel communication mode; responsive to the readback command, configuring the driver circuit to the serial communication mode; as well as The read-back data is sent to the control circuit by propagating the read-back data through serial communication logic and the communication line.

20. The method according to claim 19, further comprising: After sending the readback data, the grouped driver circuits are reconfigured to the parallel communication mode.

21. The method according to claim 19, wherein: Sending the read back data includes sending the read back data through the serial chain in a reverse direction relative to a direction of the read back command.

22. The method according to claim 18, wherein: Configuring the grouped driver circuits for the parallel communication mode includes closing a switch to couple a data input pin to a data output pin, and wherein configuring the grouped driver circuits for the serial communication mode includes closing the switch to decouple the data input pin from the data output pin.

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