Array substrate, manufacturing method thereof, and display device

Abstract

The present invention provides an array substrate, a preparation method thereof, and a display device, wherein the array substrate comprises at least a gate layer, a gate insulating layer, an active layer, and a light-blocking layer, wherein the gate insulating layer and the active layer are sequentially arranged on the gate layer, the gate insulating layer has a central region overlapping with the active layer and a peripheral region surrounding the central region, the active layer has a first surface facing away from the gate insulating layer, the gate insulating layer has a third surface located in the central region and in contact with the active layer, the light-blocking layer is arranged in the peripheral region, and has a second surface facing away from the gate insulating layer, wherein a height of the second surface relative to the third surface is greater than a height of the first surface relative to the third surface. The present invention adds a light-blocking layer in the peripheral region of the gate insulating layer to block light incident into the peripheral region using the light-blocking layer, thereby preventing the light from being further incident into the active layer due to diffuse reflection in the peripheral region, thereby avoiding light leakage problems in the active layer due to the generation of photocarriers.

Description

Technical Field

[0001] The present invention relates to the technical field of display panels, and in particular to an array substrate and a preparation method thereof, and a display device. Background Art

[0002] With the continuous development of electronic technology, more and more application scenarios in life require the use of display devices, wherein the display device generally includes an array substrate.

[0003] Based on this, how to ensure the reliability of signal transmission in the array substrate is a problem that needs to be solved at present. Summary of the Invention

[0004] In order to solve the above problems or other problems, the present invention provides the following technical solutions.

[0005] In a first aspect, the present invention provides an array substrate, the array substrate comprising at least:

[0006] a gate insulating layer and an active layer sequentially disposed on the gate layer, the gate insulating layer having a central region overlapping the active layer and a peripheral region surrounding the central region, the active layer having a first surface facing away from the gate insulating layer, and the gate insulating layer having a third surface located in the central region and in contact with the active layer; and

[0007] A light-blocking layer is disposed in the peripheral region, and has a second surface facing away from the gate insulating layer, wherein a height of the second surface relative to the third surface is greater than a height of the first surface relative to the third surface.

[0008] According to an array substrate of one embodiment of the present invention, the gate insulation layer has a fourth surface located in the peripheral area and in contact with the light-blocking layer, the third surface and the fourth surface extend in the same plane, the active layer has a first thickness, and the light-blocking layer has a second thickness, wherein the second thickness is greater than the first thickness.

[0009] According to an embodiment of the present invention, the array substrate further includes a source-drain electrode layer, which is disposed on the active layer and has a third thickness, wherein the third thickness is equal to the second thickness.

[0010] According to the array substrate of an embodiment of the present invention, the material of the light blocking layer is the same as that of the source and drain electrode layers, and the light blocking layer and the source and drain electrode layers are separated by a dielectric material.

[0011] According to the array substrate of an embodiment of the present invention, the potential of the light blocking layer is configured to be suspended.

[0012] According to the array substrate of an embodiment of the present invention, the material of the light blocking layer is the same as that of the gate insulating layer.

[0013] According to the array substrate of an embodiment of the present invention, the light blocking layer is in contact with the active layer.

[0014] In a second aspect, the present invention provides a method for preparing an array substrate, the method comprising at least:

[0015] forming a gate insulating layer and an active layer in sequence on the gate layer, wherein the gate insulating layer has a central region overlapping with the active layer and a peripheral region surrounding the central region, the active layer has a first surface facing away from the gate insulating layer, and the gate insulating layer has a third surface located in the central region and in contact with the active layer; and

[0016] A light-blocking layer is formed in the peripheral region, wherein the light-blocking layer has a second surface facing away from the gate insulating layer, and a height of the second surface relative to the third surface is greater than a height of the first surface relative to the third surface.

[0017] According to the preparation method of one embodiment of the present invention, the step of forming the light-blocking layer in the peripheral area specifically includes:

[0018] A light blocking layer located in the peripheral region and a source / drain electrode layer located on the active layer are formed using the same photomask.

[0019] In a third aspect, the present invention provides a display device, which comprises at least the array substrate as described in any one of the above items.

[0020] The beneficial effects of the present invention are as follows: the present invention provides an array substrate, a preparation method thereof, and a display device, wherein the array substrate includes at least a gate layer, a gate insulating layer, an active layer, and a light-blocking layer, wherein the gate insulating layer and the active layer are sequentially arranged on the gate layer, the gate insulating layer has a central area overlapping with the active layer and a peripheral area surrounding the central area, the active layer has a first surface facing away from the gate insulating layer, the gate insulating layer has a third surface located in the central area and in contact with the active layer, the light-blocking layer is arranged in the peripheral area, and has a second surface facing away from the gate insulating layer, wherein the height of the second surface relative to the third surface is greater than the height of the first surface relative to the third surface. The present invention adds a light-blocking layer in the peripheral area of ​​the gate insulating layer to use the light-blocking layer to block the light incident to the peripheral area, thereby avoiding the above-mentioned light from being further incident on the active layer due to diffuse reflection in the peripheral area, thereby avoiding the problem of light leakage in the active layer due to the generation of photocarriers. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solution of the present invention, the following briefly introduces the drawings required for use in describing the various embodiments according to the present invention. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0022] Figure 1 FIG. 1 is a front structural diagram of an array substrate provided in accordance with a first embodiment of the present invention.

[0023] Figure 2 FIG. 1 is a schematic top view of the array substrate provided in accordance with the first embodiment of the present invention.

[0024] Figure 3 FIG. 1 is a flow chart of a method for preparing an array substrate according to a first embodiment of the present invention.

[0025] Figure 4 FIG. 1 is a further schematic flow chart of the method for preparing an array substrate provided in the first embodiment according to the present invention.

[0026] Figures 5a to 5c FIG. 1 is a schematic diagram of a process flow of a method for preparing an array substrate provided in a first embodiment according to the present invention.

[0027] Figure 6 FIG. 1 is a front view structural diagram of an array substrate provided in a second embodiment according to the present invention.

[0028] Figure 7 FIG. 1 is a schematic structural diagram of a display device provided in an embodiment according to the present invention.

[0029] Figure 8 FIG. 1 is a structural diagram of a mobile terminal provided in an embodiment according to the present invention.

[0030] Figure 9 FIG. 1 is a schematic diagram of the detailed structure of a mobile terminal provided in an embodiment according to the present invention. DETAILED DESCRIPTION

[0031] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0032] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like, indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the said features. In the description of the present invention, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.

[0033] In the description of the present invention, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they may refer to fixed connections, detachable connections, or integral connections; mechanical connections, electrical connections, or mutual communication; direct connections or indirect connections through an intermediate medium; and internal communication between two components or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0034] In the present invention, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may include the first and second features being in direct contact, or may include the first and second features being in contact not directly but through another feature between them. Furthermore, a first feature being "above," "above," and "above" a second feature may include the first feature being directly above or obliquely above the second feature, or may simply mean that the first feature is higher in level than the second feature. A first feature being "below," "below," and "below" a second feature may include the first feature being directly below or obliquely below the second feature, or may simply mean that the first feature is lower in level than the second feature.

[0035] The disclosure below provides many different embodiments or examples for realizing different structures of the present invention. In order to simplify the disclosure of the present invention, the components and settings of specific examples are described below. Of course, they are merely examples and are not intended to limit the present invention. In addition, the present invention may repeat reference numbers and / or reference letters in different examples. Such repetition is for the purpose of simplicity and clarity and does not in itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present invention provides examples of various specific processes and materials, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0036] See also Figure 1 and Figure 2 ,in, Figure 1 and Figure 2 The front view and top view of the array substrate 100 provided in the first embodiment according to the present invention are respectively shown. From the figures, the various components of the first embodiment according to the present invention and the relative positional relationship of the various components can be clearly seen.

[0037] like Figure 1 and Figure 2 As shown, the array substrate 100 includes at least a gate layer 110, a gate insulating layer 120, an active layer 130 and a light blocking layer 140. Next, Figure 1 and Figure 2 , each component in the display unit 110 is described in detail.

[0038] The gate insulating layer 120 and the active layer 130 are sequentially arranged on the gate layer 110. Specifically, Figure 1 and Figure 2 As shown, on a plane parallel to the gate layer 110 , the active layer 130 does not completely cover the gate insulating layer 120 . Specifically, the gate insulating layer 120 has a central region S1 overlapping with the active layer 130 and a peripheral region S2 surrounding the central region S1 .

[0039] Furthermore, the active layer 130 has a first surface A1 facing away from the gate insulating layer 120 , and the gate insulating layer 120 has a third surface A3 located in the central region S1 and contacting the active layer 130 .

[0040] Specifically, in an embodiment of the present invention, the material of the gate layer 110 can be a metal, such as silver (Ag), aluminum (Al), nickel (Ni), chromium (Cr), molybdenum (Mo), copper (Cu), tungsten (W), titanium (Ti), or a combination of the above materials. Furthermore, the material of the gate insulating layer 120 can be silicon oxide (SiNx), silicon nitride (SiOx), or a combination of the above materials. Furthermore, the material of the active layer 130 can be amorphous silicon (a-Si) or any other suitable material.

[0041] The light blocking layer 140 is disposed in the peripheral region S2 and has a second surface A2 facing away from the gate insulation layer 120 , wherein in the thickness direction Y of the gate insulation layer 120 , the height of the second surface A2 relative to the third surface A3 is greater than the height of the first surface A1 relative to the third surface A3.

[0042] It should be noted that, in the process of preparing the array substrate 100, process steps such as deposition and etching are performed, which will cause the array substrate 100 to have a rough surface (such as the above-mentioned peripheral area S2). Therefore, the light incident from the backlight module at the bottom of the gate layer 110 to the above-mentioned peripheral area S2 will be diffusely reflected due to the rough surface of the peripheral area S2. Then, the light will further be incident on the active layer 130, causing photocarriers to be generated in the active layer 130, resulting in optical leakage, and further worsening vertical crosstalk, causing problems such as threshold voltage shift.

[0043] Now return to reference Figure 1 and Figure 2 In the embodiment of the present invention, since a light-blocking layer 140 is additionally provided in the above-mentioned peripheral region S2, and in the thickness direction Y of the gate insulating layer 120, the second surface A2 of the light-blocking layer 140 facing away from the gate insulating layer 120 is higher than the first surface A1 of the active layer 130 facing away from the gate insulating layer 120, that is, the light-blocking layer 140 can block the light incident on the peripheral region S2, thereby preventing the above-mentioned light from further being incident on the active layer 130, and therefore further avoiding the problem of light leakage in the active layer 130 due to the generation of photocarriers.

[0044] Specifically, the light blocking layer 140 is made of an opaque material, and further, may be made of metal, metal oxide, insulating material or any other suitable material.

[0045] See also Figure 3 and Figures 5a to 5c ,in, Figure 3 and Figures 5a to 5c A schematic flow chart and a schematic process flow chart of a method for preparing an array substrate 100 provided in a first embodiment according to the present invention are respectively shown.

[0046] like Figure 3 and Figures 5a to 5c As shown, the method for preparing the array substrate 100 may specifically include the following steps:

[0047] First step S101: forming a gate insulating layer 120 and an active layer 130 in sequence on the gate layer 110, wherein the gate insulating layer 120 has a central region S1 overlapping with the active layer 130 and a peripheral region S2 surrounding the central region S1, the active layer 130 has a first surface A1 facing away from the gate insulating layer 120, and the gate insulating layer 120 has a third surface A3 located in the central region S1 and in contact with the active layer 130;

[0048] Second step S102 : forming a light blocking layer 140 in the peripheral area S2 , wherein the light blocking layer 140 has a second surface A2 facing away from the gate insulating layer 120 , and a height of the second surface A2 relative to the third surface A3 is greater than a height of the first surface A1 relative to the third surface A3 .

[0049] For further information, please refer to Figure 1 In an embodiment of the present invention, the gate insulation layer 120 has a fourth surface A4 located in the peripheral area S2 and in contact with the light blocking layer 140. The third surface A3 and the fourth surface A4 extend in the same plane, that is, the surface of the gate insulation layer 120 facing away from the gate layer 110 is a plane.

[0050] For further information, please refer to Figure 1 In this embodiment of the present invention, the active layer 130 has a first thickness H1, and the light-blocking layer 140 has a second thickness H2, where the second thickness H2 is greater than the first thickness H1. In other words, in the thickness direction Y of the gate insulating layer 120, the thicker light-blocking layer 140 can block light incident on the peripheral region S2, preventing such light from further entering the active layer 130 and ensuring that no photocarriers are generated in the active layer 130.

[0051] For further information, please refer to Figure 1 The array substrate 100 further includes a source-drain electrode layer 150, which is disposed on the active layer 130. Specifically, the material of the source-drain electrode layer 150 may be a metal such as silver (Ag), aluminum (Al), nickel (Ni), chromium (Cr), molybdenum (Mo), copper (Cu), tungsten (W), titanium (Ti), or a combination of the above materials, or a transparent metal oxide such as indium tin oxide (ITO).

[0052] Specifically, such as Figure 1 and Figure 2 As shown, the source-drain electrode layer 150 includes a source electrode 151 and a drain electrode 152. Further, in this embodiment, the source electrode 151 is approximately U-shaped, and the drain electrode 152 is linear. In other embodiments according to the present invention, the source electrode 151 and the drain electrode 152 may also be designed into any suitable pattern.

[0053] It should be noted that in order to reduce the process cost of preparing the array substrate 100 as much as possible, it is necessary to control the number of masks used in the preparation process. Therefore, in this embodiment, the same mask can be used to simultaneously form the above-mentioned light blocking layer 140 and the source and drain layer 150 in one process step.

[0054] For example, see Figure 4 In the further flow chart of the method for preparing the array substrate 100 according to the first embodiment of the present invention, the second step S102 may specifically be:

[0055] The same mask is used to form a light-blocking layer 140 located in the peripheral area S2 and a source-drain layer 150 located on the active layer 130, wherein the light-blocking layer 140 has a second surface A2 facing away from the gate insulation layer 120, and the height of the second surface A2 relative to the third surface A3 is greater than the height of the first surface A1 relative to the third surface A3.

[0056] It should be noted that since the light-blocking layer 140 and the source-drain electrode layer 150 are formed in the same process step, in some embodiments, the second thickness H2 of the light-blocking layer 140 is equal to the third thickness H3 of the source-drain electrode layer 150, and the material of the light-blocking layer 140 is the same as that of the source-drain electrode layer 150.

[0057] It should be understood that in other variations according to the present invention, due to factors such as process errors or process parameter settings, although the light blocking layer 140 and the source and drain layer 150 are formed in the same process step, the second thickness H2 may not be equal to the third thickness H3.

[0058] Furthermore, since in this embodiment, the materials of the light-blocking layer 140 and the source-drain layer 150 are both metals or metal oxides, in order to ensure that the added light-blocking layer 140 does not affect the transmission of electrical signals in the source-drain layer 150, the light-blocking layer 140 and the source-drain layer 150 are separated by a dielectric material, and the potential of the light-blocking layer 140 is configured to be floating.

[0059] For further information, please refer to Figure 2 ,like Figure 2 As shown, the light-blocking layer 140 is an annular structure. Specifically, the light-blocking layer 140 is disposed around the active layer 130 and is disposed at the edge of the gate insulating layer 120. Furthermore, the light-blocking layer 140 has a plurality of openings (not shown in the figure), the positions of which correspond to the positions where the source electrode 151 and the drain electrode 152 extend out of the active layer 130. It should be noted that the plurality of openings are provided to ensure that the light-blocking layer 140, which is made of metal or metal oxide, does not contact the source electrode 151 and the drain electrode 152.

[0060] According to the foregoing, a first embodiment of the present invention provides an array substrate 100, which includes at least a gate layer 110, a gate insulating layer 120, an active layer 130, and a light-blocking layer 140, wherein the gate insulating layer 120 and the active layer 130 are sequentially arranged on the gate layer 110, the gate insulating layer 120 has a central area S1 overlapping with the active layer 130 and a peripheral area S2 surrounding the central area S1, the active layer 130 has a first surface A1 away from the gate insulating layer 120, the gate insulating layer 120 has a third surface A3 located in the central area S1 and in contact with the active layer 130, the light-blocking layer 140 is arranged in the peripheral area S2, and has A second surface A2 away from the gate insulating layer 120, wherein a height of the second surface A2 relative to the third surface A3 is greater than a height of the first surface A1 relative to the third surface A3. The present invention adds a light-blocking layer 140 to the peripheral area S2 of the gate insulating layer 120, and compared with the first thickness H1 of the active layer 130, the second thickness H2 of the light-blocking layer 140 is greater. Therefore, the light-blocking layer 140 can block the light incident into the peripheral area S2, thereby preventing the above-mentioned light from being further incident into the active layer 130 due to diffuse reflection in the peripheral area S2, thereby avoiding the problem of light leakage in the active layer 130 due to the generation of photocarriers.

[0061] See also Figure 6 , Figure 6 A front view structural diagram of an array substrate 200 provided in accordance with a second embodiment of the present invention is shown. From the figure, the various components of the second embodiment of the present invention and the relative positional relationships of the various components can be clearly seen.

[0062] like Figure 1 and Figure 6 As shown, the structure of the second embodiment is substantially the same as that of the first embodiment, wherein the gate layer 210, the gate insulating layer 220, the active layer 230 and the source-drain electrode layer 250 (including the source electrode 251 and the drain electrode 252) in the second embodiment have the same functions and arrangement positions as the gate layer 110, the gate insulating layer 120, the active layer 130 and the source-drain electrode layer 150 (including the source electrode 151 and the drain electrode 152) in the first embodiment.

[0063] The difference is that, in this embodiment, the light blocking layer 240 is prepared by selecting an opaque insulating material and is in contact with the active layer 230 to further enhance the light shielding effect of the light blocking layer 240 on the active layer 230 .

[0064] Specifically, since the gate insulating layer 220 is also made of an opaque insulating material, in this embodiment, the light blocking layer 240 can be made of the same material as that of the gate insulating layer 220 .

[0065] For further information, please refer to Figure 6 ,like Figure 6 As shown, in this embodiment, the light blocking layer 240 is not only disposed in the peripheral area S2 , but also extends from the peripheral area S2 to the active layer 230 to cover a portion of the active layer 230 , thereby improving the light shielding effect of the light blocking layer 240 .

[0066] See also Figure 7 , Figure 7 A schematic structural diagram of a display device 300 provided in accordance with an embodiment of the present invention is shown. From the diagram, the various components of the embodiment of the present invention and the relative positional relationships of the various components can be intuitively seen.

[0067] like Figure 7 As shown, in this embodiment, the display device 300 includes the array substrate 100 as described in the first embodiment above. Specifically, the display device 300 further includes a backlight module 310 , which is located below the gate layer 110 .

[0068] Furthermore, in other embodiments according to the present invention, the display device 300 may also include the array substrate 200 as described in the second embodiment above, and the present invention is not limited thereto.

[0069] See also Figure 8 , Figure 8 This is a structural diagram of a mobile terminal 400 provided in accordance with an embodiment of the present invention. The above-mentioned display device 500 is applied to the mobile terminal 400. The mobile terminal 400 can be a smart phone or a tablet computer, etc. From the figure, the various components of the present invention and the relative positional relationship of the various components can be intuitively seen.

[0070] like Figure 8 As shown, the mobile terminal 400 includes a processor 401 and a memory 402. The processor 401 is electrically connected to the memory 402.

[0071] The processor 401 is the control center of the mobile terminal 400. It uses various interfaces and lines to connect various parts of the entire mobile terminal. By running or loading applications stored in the memory 402 and calling data stored in the memory 402, it executes various functions of the mobile terminal and processes data, thereby monitoring the mobile terminal as a whole.

[0072] See also Figure 9 , Figure 9 This is a detailed structural diagram of a mobile terminal 400 provided in accordance with an embodiment of the present invention. The mobile terminal 400 may be a smart phone or a tablet computer, etc. From the figure, the various components of the present invention and the relative positional relationships of the various components can be intuitively seen.

[0073] Figure 9 FIG. 4 shows a specific structural block diagram of a mobile terminal 400 provided by an embodiment of the present invention. Figure 9 As shown, the mobile terminal 400 may include a radio frequency (RF) circuit 410, a memory 420 including one or more computer-readable storage media, an input unit 430, a display unit 440, a sensor 450, an audio circuit 460, a transmission module 470 (e.g., wireless fidelity, Wi-Fi), a processor 480 including one or more processing cores, and a power supply 490. It will be understood by those skilled in the art that Figure 9 The structure of the mobile terminal shown in the figure does not constitute a limitation to the mobile terminal, and may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently.

[0074] RF circuit 410 is used to receive and transmit electromagnetic waves, converting them into electrical signals, thereby enabling communication with a communications network or other devices. RF circuit 410 may include various existing circuit components for performing these functions, such as an antenna, a radio frequency transceiver, a digital signal processor, an encryption / decryption chip, a subscriber identity module (SIM) card, memory, and the like. RF circuit 410 can communicate with various networks such as the Internet, an intranet, or a wireless network, or with other devices via a wireless network. Such wireless networks may include cellular telephone networks, wireless local area networks, or metropolitan area networks. The wireless networks may utilize various communication standards, protocols, and technologies, including but not limited to Global System for Mobile Communication (GSM), Enhanced Data GSM Environment (EDGE), Wide-band Code Division Multiple Access (WCDMA), Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Wireless Fidelity (Wi-Fi) (such as Institute of Electrical and Electronics Engineers standards IEEE 802.11a, IEEE 802.11b, IEEE802.11g, and / or IEEE802.11n), Voice over Internet Protocol (VoIP), Worldwide Interoperability for Microwave Access (WI-Max), other protocols for email, instant messaging, and short messaging, and any other suitable communication protocols, including those currently undeveloped.

[0075] The memory 420 can be used to store software programs and modules, such as the corresponding program instructions in the above-mentioned audio power amplifier control method. The processor 480 executes various functional applications and data processing by running the software programs and modules stored in the memory 420, that is, to obtain the frequency of the information transmission signal transmitted by the mobile terminal 400. Generate interference signals and other functions. The memory 420 may include a high-speed random access memory and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 420 may further include a memory remotely located relative to the processor 480, and these remote memories may be connected to the mobile terminal 400 via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0076] The input unit 430 can be used to receive input digital or character information and generate keyboard, mouse, joystick, optical, or trackball signal input related to user settings and function control. Specifically, the input unit 430 may include a touch-sensitive surface 431 and other input devices 432. The touch-sensitive surface 431, also known as a touch display or touchpad, can detect user touch operations on or near it (for example, operations performed by a user using a finger, stylus, or any other suitable object or accessory on or near the touch-sensitive surface 431) and drive corresponding connected devices according to pre-set programs. Optionally, the touch-sensitive surface 431 may include a touch detection device and a touch controller. The touch detection device detects the user's touch position and detects signals generated by the touch operation, transmitting the signals to the touch controller. The touch controller receives the touch information from the touch detection device, converts it into touch point coordinates, and then sends it to the processor 480. It can also receive and execute commands from the processor 480. In addition, the touch-sensitive surface 431 can be implemented using various types, including resistive, capacitive, infrared, and surface acoustic wave. In addition to the touch-sensitive surface 431, the input unit 430 may further include other input devices 432. Specifically, the other input devices 432 may include, but are not limited to, one or more of a physical keyboard, function keys (such as volume control keys, power keys, etc.), a trackball, a mouse, and a joystick.

[0077] The display unit 440 can be used to display information input by the user or information provided to the user, as well as various graphical user interfaces of the mobile terminal 400. These graphical user interfaces can be composed of graphics, text, icons, videos, or any combination thereof. The display unit 440 may include a display panel 441. Optionally, the display panel 441 may be configured in the form of an LCD (Liquid Crystal Display), an OLED (Organic Light-Emitting Diode), or the like. Furthermore, the touch-sensitive surface 431 may cover the display panel 441. When the touch-sensitive surface 431 detects a touch operation on or near it, it transmits the information to the processor 480 to determine the type of touch event. The processor 480 then provides a corresponding visual output on the display panel 441 based on the type of touch event. Although the touch-sensitive surface 431 and the display panel 441 are shown in the figure as two separate components to implement input and output functions, in some embodiments, the touch-sensitive surface 431 and the display panel 441 can be integrated to implement input and output functions.

[0078] The mobile terminal 400 may also include at least one sensor 450, such as a light sensor, a motion sensor, and other sensors. Specifically, the light sensor may include an ambient light sensor and a proximity sensor, wherein the ambient light sensor may adjust the brightness of the display panel 441 according to the brightness of the ambient light, and the proximity sensor may generate an interrupt when the flip cover is closed or closed. As a type of motion sensor, the gravity acceleration sensor can detect the magnitude of acceleration in all directions (generally three axes), and can detect the magnitude and direction of gravity when stationary. It can be used for applications that recognize the posture of the mobile phone (such as horizontal and vertical screen switching, related games, magnetometer posture calibration), vibration recognition related functions (such as pedometer, tapping), etc.; as for other sensors that can be configured in the mobile terminal 400, such as gyroscopes, barometers, hygrometers, thermometers, infrared sensors, etc., they will not be described here.

[0079] Audio circuit 460, speaker 461, and microphone 462 provide an audio interface between the user and mobile terminal 400. Audio circuit 460 converts received audio data into electrical signals and transmits them to speaker 461, which then converts them into sound signals for output. Microphone 462, on the other hand, converts collected sound signals into electrical signals, which are then received by audio circuit 460 and converted into audio data. The audio data is then processed by processor 480 and then transmitted to, for example, another terminal via RF circuit 410. Alternatively, the audio data may be output to memory 420 for further processing. Audio circuit 460 may also include an earphone jack to allow communication between an external headset and mobile terminal 400.

[0080] Mobile terminal 400 can help users receive requests, send information, etc. through transmission module 470 (e.g., a Wi-Fi module), providing users with wireless broadband Internet access. Although transmission module 470 is shown in the figure, it is understandable that it is not a required component of mobile terminal 400 and can be omitted as needed without changing the essence of the invention.

[0081] Processor 480 is the control center of mobile terminal 400. It connects all components of the mobile phone using various interfaces and circuits. By running or executing software programs and / or modules stored in memory 420 and accessing data stored in memory 420, it executes various functions of mobile terminal 400 and processes data, thereby providing overall monitoring of the mobile terminal. Optionally, processor 480 may include one or more processing cores. In some embodiments, processor 480 may integrate an application processor and a modem processor. The application processor primarily handles the operating system, user interface, and application programs, while the modem processor primarily handles wireless communications. It is understood that the modem processor may not be integrated into processor 480.

[0082] Mobile terminal 400 also includes a power supply 490 (e.g., a battery) for supplying power to various components. In some embodiments, the power supply can be logically connected to processor 480 via a power management system, thereby enabling the power management system to manage charging, discharging, and power consumption. Power supply 490 can also include one or more DC or AC power supplies, a recharging system, a power failure detection circuit, a power converter or inverter, a power status indicator, and other arbitrary components.

[0083] Although not shown, the mobile terminal 400 further includes a camera (such as a front camera, a rear camera, etc.), a Bluetooth module, a flashlight, etc., which will not be described in detail. Specifically in this embodiment, the display unit of the mobile terminal 400 is a touch screen display.

[0084] In addition to the above embodiments, the present invention may also have other implementations. Any technical solution formed by equivalent replacement or equivalent replacement falls within the scope of protection required by the present invention.

[0085] In summary, although the preferred embodiments of the present invention have been disclosed above, the above preferred embodiments are not intended to limit the present invention. Those skilled in the art may make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be based on the scope defined by the claims.

Claims

1. An array substrate, characterized in that: The array substrate at least includes: a gate insulating layer and an active layer sequentially disposed on the gate layer, the gate insulating layer having a central region overlapping the active layer and a peripheral region surrounding the central region, the active layer having a first surface facing away from the gate insulating layer, and the gate insulating layer having a third surface located in the central region and in contact with the active layer; and a light-blocking layer disposed in the peripheral region, the light-blocking layer having a second surface facing away from the gate insulating layer, wherein a height of the second surface relative to the third surface is greater than a height of the first surface relative to the third surface; The gate insulating layer has a fourth surface located in the peripheral region and in contact with the light-blocking layer, the third surface and the fourth surface extend in the same plane, the active layer has a first thickness, and the light-blocking layer has a second thickness, wherein the second thickness is greater than the first thickness; Wherein, the array substrate further includes a source-drain electrode layer, and the source-drain electrode layer is arranged on the active layer.

2. The array substrate according to claim 1, wherein: The source and drain layer has a third thickness, wherein the third thickness is equal to the second thickness.

3. The array substrate according to claim 2, wherein: The material of the light-blocking layer is the same as that of the source-drain electrode layer, and the light-blocking layer and the source-drain electrode layer are separated by a dielectric material.

4. The array substrate according to claim 3, wherein: The potential of the light-blocking layer is configured to be floating.

5. The array substrate according to claim 1, wherein: The material of the light blocking layer is the same as that of the gate insulating layer.

6. The array substrate according to claim 5, wherein: The light blocking layer contacts the active layer.

7. A method for preparing an array substrate, characterized in that: The preparation method at least comprises: forming a gate insulating layer and an active layer in sequence on the gate layer, wherein the gate insulating layer has a central region overlapping with the active layer and a peripheral region surrounding the central region, the active layer has a first surface facing away from the gate insulating layer, and the gate insulating layer has a third surface located in the central region and in contact with the active layer; and forming a light-blocking layer in the peripheral region, wherein the light-blocking layer has a second surface facing away from the gate insulating layer, a height of the second surface relative to the third surface is greater than a height of the first surface relative to the third surface, the gate insulating layer has a fourth surface located in the peripheral region and in contact with the light-blocking layer, the third surface and the fourth surface extend in the same plane, and the active layer has a first thickness; The step of forming a light-blocking layer in the peripheral area specifically includes: The light-blocking layer located in the peripheral region and the source-drain electrode layer located on the active layer are formed using the same photomask, wherein the light-blocking layer has a second thickness greater than the first thickness.

8. A display device, characterized in that: The display device at least includes the array substrate according to any one of claims 1 to 6.

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