A parameter configuration system, method, benchmark monitor and medium

Abstract

Embodiments of the present application provide a parameter configuration system, method, reference monitor and medium to solve the problem of poor display effect caused by long parameter configuration time when switching modes in the prior art. In the embodiments of the present application, when switching modes, the MCU sends the target storage location corresponding to the target mode to the DDR, the DDR obtains the target parameters stored in the target storage location, and sends the target parameters to the FPGA. Since the reading speed of the DDR is faster, and the MCU sends the target storage location corresponding to the target mode to the DDR, the DDR directly obtains the target parameters in the target storage location and sends the target parameters to the FPGA, compared with the MCU obtaining the target parameters from the device storing the target parameters and sending the target parameters to the FPGA, the target parameters are effectively avoided from being sent multiple times, so the parameter configuration time can be reduced, thereby improving the display effect.

Description

TECHNICAL FIELD

[0001] The present application relates to display technology, and in particular to a parameter configuration system and method, a reference monitor and a medium. BACKGROUND

[0002] In order to improve the display effect of images or videos, reference monitors have been gradually proposed in the prior art. Unlike common ordinary displays, reference monitors have extremely strict requirements on brightness, contrast, color gamut, product reliability, etc., and are the basis for professionals to measure, judge and decide images. Therefore, reference monitors are also regarded as a "meter" in the field of image quality, which is a quality scale. Among them, there are some reference monitors that support a brightness of up to 1000 nits in full screen range, a contrast ratio of no less than 100000:1, and can perfectly restore 4K and High Dynamic Range Imaging (HDR) video signal content.

[0003] However, when viewing videos and images through the reference monitor, there may be a need to switch between different modes, such as adjusting brighter images or videos to darker images or videos by switching modes. In order to realize the switching between different modes, the prior art usually stores the parameters of different modes in a Microcontroller Unit (MCU). When switching modes, the MCU sends the parameters of the mode to be switched to a Field Programmable Gate Array (FPGA), and the FPGA subsequently applies the received parameters to realize the switching of the mode.

[0004] However, the prior art is limited by the performance of the MCU itself, which has a limited data storage space. The internal storage space of a conventional MCU is less than 1G bit, which cannot meet the demand of the reference monitor to store the parameters of numerous modes, not to mention the higher requirement of the reference monitor. In order to improve the display effect, the prior art proposes to store the parameters of different modes in a storage chip (FLASH). When switching modes, the MCU reads the parameters of the mode to be switched saved in the FLASH through an Application Programming Interface (API) FLASH, sends the read parameters to the FPGA, and the FPGA subsequently applies the received parameters to realize the switching of the mode. However, the working clock of the API FLASH is low, resulting in slow reading speed, which makes the parameter configuration time longer. However, during the parameter configuration period, the reference monitor cannot realize image display, but only can perform black screen or screen display, which affects the display effect. SUMMARY

[0005] Embodiments of the present application provide a parameter configuration system, method, device, reference monitor and medium to solve the problem of poor display effect caused by long parameter configuration time when mode switching is performed in the prior art.

[0006] In a first aspect, embodiments of the present application provide a parameter configuration system, which comprises an MCU, a DDR and an FPGA.

[0007] The MCU is configured to receive a mode switching request carrying a target mode, obtain a target storage location corresponding to the target mode according to a pre-stored correspondence between modes and storage locations, and send the target storage location to the DDR.

[0008] The DDR is configured to read target parameters of the target storage location and send the target parameters to the FPGA.

[0009] The FPGA is configured to apply the target parameters.

[0010] In a second aspect, embodiments of the present application further provide a parameter configuration method applied to a DDR, which comprises the following steps.

[0011] The target storage location is obtained by the MCU according to a pre-stored correspondence between modes and storage locations after the MCU receives a mode switching request carrying a target mode.

[0012] The target parameters of the target storage location are read, and the target parameters are sent to an FPGA.

[0013] In a third aspect, embodiments of the present application further provide a parameter configuration method applied to an MCU, which comprises the following steps.

[0014] A mode switching request carrying a target mode is received, and a target storage location corresponding to the target mode is obtained according to a pre-stored correspondence between modes and storage locations.

[0015] The target storage location is sent to a DDR, so that the DDR reads target parameters of the target storage location and sends the target parameters to an FPGA.

[0016] In a fourth aspect, embodiments of the present application further provide a reference monitor, which comprises the parameter configuration system described in any of the above.

[0017] In a fifth aspect, the embodiments of the present application further provide a computer readable storage medium, which stores a computer program. The computer program is executed by a processor to implement the steps of the parameter configuration method according to any one of the preceding aspects.

[0018] In the embodiments of the present application, after the MCU receives the mode switching request carrying the target mode, the MCU acquires the target storage location corresponding to the target mode according to the pre-stored correspondence between the mode and the storage location, and sends the target storage location to the DDR. After receiving the target storage location, the DDR reads the target parameter stored in the target storage location, and sends the target parameter to the FPGA. The FPGA applies the received target parameter. In the embodiments of the present application, the parameters of different modes are stored in the DDR, and when the mode is switched, the MCU sends the target storage location corresponding to the target mode to the DDR. The DDR acquires the stored target parameter in the target storage location, and sends the target parameter to the FPGA. Since the reading speed of the DDR is faster, and in the embodiments of the present application, the MCU sends the target storage location corresponding to the target mode to the DDR. The DDR directly acquires the target parameter in the target storage location, and sends the target parameter to the FPGA. Compared with the MCU acquiring the target parameter from the device storing the target parameter and sending the target parameter to the FPGA, the embodiments of the present application effectively avoid the target parameter being sent multiple times, and thus the time for parameter configuration can be reduced, thereby improving the display effect. BRIEF DESCRIPTION OF DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the present application or the implementation manners in the related art, the drawings needed to be used in the embodiments or related art description will be briefly introduced. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can also be obtained by those skilled in the art according to these drawings.

[0020] Figure 1 The hardware configuration block diagram of the reference monitor 200 according to some embodiments is exemplarily shown in FIG. 1;

[0021] Figure 2 The software configuration schematic diagram in the reference monitor 200 according to some embodiments is exemplarily shown in FIG. 2;

[0022] Figure 3 The icon control interface display schematic diagram of the application program in the reference monitor 200 according to some embodiments is exemplarily shown in FIG. 3;

[0023] Figure 4 The parameter configuration system structure schematic diagram provided by the embodiments of the present application is shown in FIG. 4;

[0024] Figure 5 The process schematic diagram of the mode switching provided by the embodiments of the present application is shown in FIG. 5;

[0025] Figure 6 A process diagram for saving the first parameter in the SD card in the FLASH when updating the parameter is provided for the embodiment of the present application;

[0026] Figure 7 A module structure diagram needed for saving the first parameter in the SD card in the FLASH when updating the parameter is provided for the embodiment of the present application;

[0027] Figure 8 A process diagram for moving the second parameter stored in the FLASH to the DDR by the FLASH is provided for the embodiment of the present application;

[0028] Figure 9 A module structure diagram needed for moving the second parameter stored in the FLASH to the DDR by the FLASH is provided for the embodiment of the present application;

[0029] Figure 10 A complete module structure diagram of the parameter configuration system is provided for the embodiment of the present application;

[0030] Figure 11 A module structure diagram needed in the prior art is provided;

[0031] Figure 12 A process diagram for FPGA initialization is provided for the embodiment of the present application;

[0032] Figure 13 A module structure diagram used when the FPGA is initialized is provided for the embodiment of the present application;

[0033] Figure 14 A parameter configuration process diagram is provided for the embodiment of the present application;

[0034] Figure 15 A parameter configuration process diagram is provided for the embodiment of the present application;

[0035] Figure 16 A parameter configuration process diagram is provided for the embodiment of the present application;

[0036] Figure 17 A parameter configuration process diagram is provided for the embodiment of the present application;

[0037] Figure 18 A structure diagram of another display device is provided for the embodiment of the present application;

[0038] Figure 19 A structure diagram of another display device is provided for the embodiment of the present application;

[0039] Figure 20 FIG. 2 is a structural diagram of another display apparatus according to an embodiment of the present application;

[0040] Figure 21 FIG. 2 is a structural diagram of another display apparatus according to an embodiment of the present application; DETAILED DESCRIPTION

[0041] The above detailed description of the application has been given by way of example, and it will be obvious to those skilled in the art that modifications and variations of the embodiments described can be effected without departing from the scope of the application. For example, elements of one embodiment can be provided in other embodiments to yield still other embodiments. Thus, the application includes all such modifications and variations as come within the scope of the appended claims and their equivalents.

[0042] Based on the exemplary embodiments described herein, other embodiments will be obvious to those of ordinary skill in the art and can be made without departing from the scope of the application. Additionally, although the disclosure has been described in language specific to structural features, methodical acts, it is to be understood that the application defined in the appended claims is not limited to the specific features or acts described. Rather, the specific features and acts are disclosed as exemplary forms of implementing the claims.

[0043] It is to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art.

[0044] The terms "first", "second", "third", etc., in the specification and claims and the above drawings are used to distinguish similar or like objects or entities, and do not necessarily mean a specific order or sequence, unless otherwise indicated. It should be understood that the terms used in this way can be interchanged as appropriate, for example, those other than the order given can be implemented according to the embodiment illustrated or described in the specification of the present application.

[0045] In addition, the terms "comprise" and "have" and any variations thereof are intended to cover but not exclusively include, for example, a product or device that comprises a list of components without being limited to the clearly listed components, but can include other components not clearly listed or inherent to such products or devices.

[0046] The term "module" used in the present application refers to any known or later developed hardware, software, firmware, artificial intelligence, fuzzy logic, or a combination of hardware and / or software code that can perform a function related to the element.

[0047] The term "remote controller" used in the present application refers to a component of an electronic device (such as the reference monitor disclosed in the present application), which can generally control the electronic device wirelessly within a short distance range. It is generally connected with the electronic device using infrared and / or radio frequency (RF) signals and / or Bluetooth, and can also include WiFi, wireless USB, Bluetooth, motion sensor, etc. For example, a handheld touch remote controller replaces most of the physical built-in hard keys in the general remote control device with a user interface in the touch screen.

[0048] The term "gesture" used in the present application refers to a user behavior for expressing an intended idea, action, purpose, or result through a change in hand shape or hand movement.

[0049] In order to improve the display effect of images or videos, reference monitors have been gradually proposed in the prior art. Unlike common ordinary displays, reference monitors have extremely strict requirements on brightness, contrast, color gamut, product reliability, etc., and are the basis for professionals to measure, judge, and decide images. Therefore, reference monitors are also regarded as "meter" in the image quality field, which is a quality scale. Among them, there are some reference monitors that support a brightness of up to 1000 nits in the full screen range, a contrast ratio of no less than 100000:1, and can perfectly restore 4K and HDR video signal content.

[0050] However, when viewing videos and images through the reference monitor, there can be a need to switch between different modes, such as adjusting brighter images or videos to darker images or videos by switching modes. In order to realize the switching between different modes, the prior art generally stores the parameters of different modes in the MCU. When switching modes, the MCU sends the parameters of the mode to be switched to the FPGA, and the FPGA subsequently applies the received parameters to realize the switching of the mode.

[0051] However, the prior art is limited by the performance of the MCU itself, which has limited data storage space. The internal storage space of a conventional MCU is less than 1G bit, which cannot meet the demand of the reference monitor to store the parameters of numerous modes, not to mention the higher requirement of the reference monitor. In order to improve the display effect, the prior art proposes to store the parameters of different modes in the FLASH. When switching modes, the MCU reads the parameters of the mode to be switched saved in the FLASH through the API FLASH, sends the read parameters to the FPGA, and the FPGA subsequently applies the received parameters to realize the switching of the mode. However, the working clock of the API FLASH is low, resulting in slow reading speed, which makes the parameter configuration time longer. However, during the parameter configuration period, the reference monitor cannot realize image display, but only can perform black screen or flower screen display, which affects the display effect.

[0052] To reduce the time of configuration parameters when switching modes, improve the display effect, the embodiment of the application provides a parameter configuration system, method, device, reference monitor and medium.

[0053] In the embodiment of the application, after the MCU receives the mode switching request carrying the target mode, the target storage location corresponding to the target mode is obtained according to the pre-stored correspondence between the mode and the storage location, and the target storage location is sent to the double data rate synchronous dynamic random access memory (DDR). After receiving the target storage location, the DDR reads the target parameter stored in the target storage location and sends the target parameter to the FPGA, and the FPGA applies the received target parameter.

[0054] Figure 1 The hardware configuration block diagram of the reference monitor 100 according to the exemplary embodiment is exemplarily shown in the figure.

[0055] In some embodiments, the reference monitor 100 includes at least one of the controller 150, the tuning demodulator 110, the communicator 120, the detector 130, the input / output interface 155, the display 175, the audio output interface 185, the memory 160, the power supply 190, the user interface 165, and the external device interface 140.

[0056] In some embodiments, the display 175 is configured to receive image signals originating from the first processor output, and to display video content and image and menu control interface components.

[0057] In some embodiments, the display 175 includes a display screen component for presenting a picture, and a driving component for driving the image display.

[0058] In some embodiments, the display video content can be from broadcast television content, or alternatively, can be various broadcast signals received through wired or wireless communication protocols. Alternatively, various image content transmitted from a network server can be received from a network communication protocol.

[0059] In some embodiments, the display 175 is configured to present a user control UI interface generated in the reference monitor 100 and used to control the reference monitor 100.

[0060] In some embodiments, depending on the type of the display 175, a driving component for driving the display is further included.

[0061] In some embodiments, the display 175 is a projection display, and can further include a projection device and a projection screen.

[0062] In some embodiments, the communicator 120 is a component for communicating with external devices or external servers according to various communication protocol types. For example, the communicator can include at least one of a Wifi module 121, a Bluetooth module 122, a wired Ethernet module 123, and other network communication protocol modules or near field communication protocol modules, and an infrared receiver. The modules can be chips.

[0063] In some embodiments, the reference monitor 100 can establish control signal and data signal transmission and reception between the external control device or the content providing device through the communicator 120.

[0064] In some embodiments, the user interface 165 can be used to receive an infrared control signal of a control device such as an infrared remote controller.

[0065] In some embodiments, the detector 130 is a signal used by the reference monitor 100 to collect the external environment or interact with the outside.

[0066] In some embodiments, the detector 130 includes a light receiver for collecting the intensity of ambient light, and can adaptively change the display parameters by collecting ambient light.

[0067] In some embodiments, the detector 130 can also include an image collector 132 such as a camera, a camera, etc., which can be used to collect the external environment scene, and can be used to collect the attributes of the user or the interaction gestures with the user, and can adaptively change the display parameters, and can also identify the user gestures to realize the function of interaction with the user.

[0068] In some embodiments, the detector 130 can also include a temperature sensor, etc., such as by sensing the ambient temperature.

[0069] In some embodiments, the reference monitor 100 can adaptively adjust the display color temperature of the image. For example, when the temperature of the environment is too high, the display color temperature of the reference monitor 100 can be adjusted to be cold, or when the temperature of the environment is too low, the display color temperature of the reference monitor 100 can be adjusted to be warm.

[0070] In some embodiments, the detector 130 can also include a sound collector 131 such as a microphone, which can be used to receive the user's voice. For example, it includes a voice signal of a control instruction of the user to control the reference monitor 100, or collects the ambient sound to identify the type of the environment scene, so that the reference monitor 100 can adapt to the ambient noise.

[0071] In some embodiments, such as Figure 1As shown, the input / output interface 155 is configured to enable data transmission between the controller 150 and other external devices or other controllers 150. For example, the input / output interface 155 can receive video signal data and audio signal data from an external device, or command instruction data.

[0072] In some embodiments, the external device interface 140 can include, but is not limited to, any one or more of a high-definition multimedia interface (HDMI) interface, an analog or digital high-definition component input interface, a composite video input interface, a USB input interface, an RGB port, etc. The input / output interface can also be a composite of the above-mentioned interfaces.

[0073] In some embodiments, as shown, the tuner demodulator 110 is configured to receive broadcast television signals via wired or wireless reception, and can perform amplification, mixing, and resonance demodulation processing to demodulate audio and video signals from a plurality of wireless or wired broadcast television signals. The audio and video signals can include television audio and video signals carried by a user-selected television channel frequency, as well as EPG data signals. Figure 1

[0074] In some embodiments, the frequency demodulated by the tuner demodulator 110 is controlled by the controller 150, which can send a control signal to cause the tuner demodulator to respond to a user-selected television signal frequency and demodulate the television signal carried by the frequency.

[0075] In some embodiments, broadcast television signals can be classified according to different television signal broadcast standards, such as terrestrial broadcast signals, cable broadcast signals, satellite broadcast signals, or Internet broadcast signals, etc. Alternatively, they can be classified according to different modulation types, such as digital modulation signals, analog modulation signals, etc. Alternatively, they can be classified according to different signal types, such as digital signals, analog signals, etc.

[0076] In some embodiments, the controller 150 and the tuner demodulator 110 can be located in different separate devices, i.e., the tuner demodulator 110 can also be located in an external device of the main device where the controller 150 is located, such as an external set-top box, etc. In this way, the set-top box outputs the television audio and video signals demodulated from the received broadcast television signals to the main device, and the main device receives the audio and video signals via the first input / output interface.

[0077] In some embodiments, the controller 150 controls the operation of the reference monitor 100 and responds to user operations by storing various software control programs in the memory. The controller 150 can control the overall operation of the reference monitor 100. For example, in response to receiving a user command to select a UI object displayed on the display 175, the controller 150 can perform an operation related to the object selected by the user command. ​

[0078] In some embodiments, the object can be any one of the selectable objects, such as a hyperlink or an icon. The operation related to the selected object, such as displaying the page connected to the hyperlink, a document, an image, etc., or executing the program corresponding to the icon. The user command for selecting the UI object can be a command input through various input devices (e.g., a mouse, a keyboard, a touchpad, etc.) connected to the reference monitor 100 or a voice command corresponding to the voice spoken by the user.

[0079] As shown in FIG. 1, the controller 150 includes at least one of a random access memory 151 (RAM), a read-only memory 152 (ROM), a video processor 170, an audio processor 180, other processors 153 (e.g., a graphics processing unit (GPU), a central processing unit (CPU), a communication interface, and a communication bus 156. Among them, the communication bus connects various components. Figure 1 In some embodiments, the RAM 151 is used to store temporary data of an operating system or other programs running.

[0080] In some embodiments, the ROM 152 is used to store various system startup instructions.

[0081] In some embodiments, the ROM 152 is used to store a basic input / output system, referred to as a basic input / output system (BIOS). It is used to complete the power-on self-test of the system, the initialization of each functional module in the system, the driver program of the basic input / output of the system, and the booting of the operating system.

[0082] In some embodiments, upon receiving a power-on signal, the power supply of the reference monitor 100 starts to start, the CPU runs the system startup instructions in the ROM 152, copies the temporary data of the operating system stored in the memory to the RAM 151, so as to start or run the operating system. When the operating system startup is completed, the CPU copies the temporary data of various application programs in the memory to the RAM 151, and then starts or runs various application programs.

[0083]

[0084] ​In some embodiments, the CPU processor 154 is configured to execute the operating system and application program instructions stored in the memory, and to execute various application programs, data and contents according to various interactive instructions received from the external input, so as to finally display and play various audio and video contents.

[0085] In some example embodiments, the CPU processor 154 can include a plurality of processors. The plurality of processors can include a main processor and one or more sub-processors. The main processor is configured to perform some operations of the reference monitor 100 in the pre-power-on mode and / or to display the screen in the normal mode. The one or more sub-processors are configured to perform an operation in a state such as standby mode.

[0086] In some embodiments, the graphics processor 153 is configured to generate various graphical objects, such as icons, operation menus, and user input instruction display graphics, etc. The graphics processor includes an operator configured to perform operations by receiving various interactive instructions from the user input, and to display various objects according to display attributes. The graphics processor also includes a renderer configured to perform rendering on various objects obtained based on the operator, and the rendered objects are used for display on the display.

[0087] In some embodiments, the video processor 170 is configured to receive external video signals, and to perform video processing such as decompression, decoding, scaling, noise reduction, frame rate conversion, resolution conversion, image synthesis, etc. according to the standard encoding and decoding protocol of the input signal, so as to obtain signals that can be directly displayed or played on the reference monitor 100.

[0088] In some embodiments, the video processor 170 includes a demultiplexing module, a video decoding module, an image synthesizer module, a frame rate conversion module, a display formatting module, etc.

[0089] The demultiplexing module is configured to perform demultiplexing processing on the input audio and video data stream, such as demultiplexing the input MPEG-2 into video signals and audio signals, etc.

[0090] The video decoding module is configured to process the demultiplexed video signals, including decoding and scaling processing, etc.

[0091] The image synthesizer module, such as an image synthesizer, is configured to perform superimposition and mixing processing on the video image after scaling processing and the GUI signal generated by the graphics generator according to the user input or itself, so as to generate an image signal that can be displayed.

[0092] The frame rate conversion module is configured to convert the input video frame rate, such as converting a 60Hz frame rate to a 120Hz frame rate or a 240Hz frame rate, and the conversion is usually implemented in a manner such as frame insertion.

[0093] The display format conversion module is configured to convert the received frame rate conversion video output signal into a signal conforming to a display format, such as an output RGB data signal.

[0094] In some embodiments, the graphics processor 153 and the video processor can be integrated or separated. When integrated, the graphics processor 153 can perform processing of a graphics signal output to a display. When separated, the graphics processor 153 and the video processor can perform different functions, such as a GPU+FRC (Frame Rate Conversion) architecture.

[0095] In some embodiments, the audio processor 180 is configured to receive an external audio signal, decompress and decode the audio signal according to a standard codec protocol of the input signal, and perform noise reduction, digital-to-analog conversion, and amplification processing to obtain a sound signal that can be played on a speaker.

[0096] In some embodiments, the video processor 170 can include one or more chips. The audio processor can also include one or more chips.

[0097] In some embodiments, the video processor 170 and the audio processor 180 can be separate chips or integrated into one or more chips together with the controller.

[0098] In some embodiments, the audio output, under the control of the controller 150, receives a sound signal output by the audio processor 180, such as a speaker 186, and in addition to the speaker carried by the reference monitor 100 itself, can output to an external audio output terminal of an external device, such as an external audio interface or a headphone interface, and can also include a near-field communication module in the communication interface, such as a Bluetooth module for Bluetooth speaker sound output.

[0099] The power supply 190, under the control of the controller 150, provides power supply support for the reference monitor 100 from the power input by the external power supply. The power supply 190 can include a built-in power supply circuit installed inside the reference monitor 100, or can be an external power supply installed outside the reference monitor 100, and a power supply interface for providing an external power supply in the reference monitor 100.

[0100] The user interface 165 is configured to receive a user input signal and then send the received user input signal to the controller 150. The user input signal can be a remote control signal received by an infrared receiver, or various user control signals received by a network communication module.

[0101] In some embodiments, the user inputs the user command through the control device or the mobile terminal, and the user input interface receives the user input according to the user input, and the reference monitor 100 responds to the user input through the controller 150.

[0102] In some embodiments, the user can input the user command through the graphical user interface (GUI) displayed on the display 175, and the user input interface receives the user input command through the graphical user interface (GUI). Alternatively, the user can input the user command by inputting a specific sound or gesture, and the user input interface receives the user input command by recognizing the sound or gesture through the sensor.

[0103] In some embodiments, the "user interface" is a medium interface for interaction and information exchange between an application or an operating system and a user, which realizes the conversion between the internal form of information and the form that the user can accept. The common form of the user interface is the graphical user interface (GUI), which refers to the user interface related to the operation of the computer displayed in a graphical manner. It can be an icon, window, control, etc. interface element displayed in the display screen of the electronic device, and the control can include an icon, button, menu, tab, text box, dialog box, status bar, navigation bar, Widget, etc. visual interface element.

[0104] The memory 160 includes various software modules stored for driving the reference monitor 100. For example, the various software modules stored in the first memory include at least one of a basic module, a detection module, a communication module, a display control module, a browser module, and various service modules, etc.

[0105] The basic module is a bottom layer software module for signal communication between various hardware in the reference monitor 100 and sending processing and control signals to the upper layer module. The detection module is a management module for collecting various information from various sensors or user input interfaces, and performing digital-to-analog conversion and analysis management.

[0106] For example, the voice recognition module includes a voice analysis module and a voice instruction database module. The display control module is a module for controlling the display to display image content, which can be used to play multimedia image content and UI interface information, etc. The communication module is a module for controlling and data communication between external devices. The browser module is a module for performing data communication between servers. The service module is a module for providing various services and various application programs. At the same time, the memory 160 also stores the received external data and user data, the image of each item in various user interfaces, and the visual effect diagram of the focus object, etc.

[0107] Referring to Figure 2In some embodiments, the system is divided into four layers, from top to bottom: the Applications layer (referred to as the "Application Layer"), the Application Framework layer (referred to as the "Framework Layer"), the Android runtime and system library layer (referred to as the "System Runtime Layer"), and the kernel layer.

[0108] In some embodiments, at least one application runs in the application layer. These applications may be built-in Windows programs, system settings programs, clock programs, camera applications, etc., or applications developed by third-party developers, such as HiSee programs, karaoke programs, magic mirror programs, etc. In specific implementations, the application packages in the application layer are not limited to the examples above, and may actually include other application packages. This application embodiment does not impose any limitations on this.

[0109] The framework layer provides application programming interfaces (APIs) and programming frameworks for applications in the application layer. The application framework layer includes predefined functions. It acts as a central processing unit, determining the actions taken by applications in the application layer. Applications can access system resources and obtain system services during execution through the API interface.

[0110] like Figure 2 As shown, the application framework layer in this embodiment includes managers, content providers, etc., wherein the managers include at least one of the following modules: ActivityManager, which interacts with all activities running in the system; LocationManager, which provides access to system location services for system services or applications; PackageManager, which retrieves various information related to application packages currently installed on the device; NotificationManager, which controls the display and clearing of notification messages; and WindowManager, which manages icons, windows, toolbars, wallpapers, and desktop widgets on the user interface.

[0111] In some embodiments, the Activity Manager is used to: manage the lifecycle of each application and general navigation back functions, such as controlling the exit of an application (including switching the currently displayed user interface in the display window to the system desktop), opening an application, and going back (including switching the currently displayed user interface in the display window to the previous level user interface).

[0112] In some embodiments, the window manager is used to manage all window programs, such as obtaining the screen size, determining whether there is a status bar, locking the screen, capturing the screen, and controlling changes to the display window (e.g., shrinking the display window, shaking the display, distorting the display, etc.).

[0113] In some embodiments, the system runtime library layer provides support for the upper layer, namely the framework layer. When the framework layer is used, the Android operating system runs the C / C++ libraries contained in the system runtime library layer to implement the functions that the framework layer needs to perform.

[0114] In some embodiments, the kernel layer is a layer between hardware and software. For example... Figure 2 As shown, the kernel layer includes at least one of the following drivers: audio driver, display driver, Bluetooth driver, camera driver, WIFI driver, USB driver, HDMI driver, sensor driver (such as fingerprint sensor, temperature sensor, touch sensor, pressure sensor, etc.).

[0115] In some embodiments, the kernel layer also includes a power driver module for power management.

[0116] In some embodiments, Figure 2 The software programs and / or modules corresponding to the software architecture in the document are stored in [the relevant database]. Figure 1 In the first or second memory shown.

[0117] In some embodiments, taking the Magic Mirror application (photo-taking application) as an example, when the remote control receiver receives a remote control input operation, the corresponding hardware interrupt is sent to the kernel layer. The kernel layer processes the input operation into a raw input event (including the value of the input operation, the timestamp of the input operation, etc.). The raw input event is stored in the kernel layer. The application framework layer obtains the raw input event from the kernel layer, identifies the control corresponding to the input event based on the current focus position, and determines whether the input operation is a confirmation operation. The control corresponding to the confirmation operation is the Magic Mirror application icon. The Magic Mirror application calls the interface of the application framework layer to start the Magic Mirror application, and then calls the kernel layer to start the camera driver, thereby capturing still images or videos through the camera.

[0118] In some embodiments, for a touch-enabled reference monitor, taking a split screen operation as an example, the reference monitor receives a user input operation (such as a split screen operation) on the display screen, the kernel layer can generate a corresponding input event according to the input operation and report the event to the application framework layer. The activity manager of the application framework layer sets a window mode (such as a multi-window mode) corresponding to the input operation and a window position and size, etc. The window manager of the application framework layer draws a window according to the setting of the activity manager and then sends the drawn window data to the display driver of the kernel layer, which displays the corresponding application interface in different display areas of the display screen.

[0119] In some embodiments, as shown in FIG. 1, the application layer includes at least one application program, which can display a corresponding icon control in the display, such as a live TV application icon control, a video on demand application icon control, a media center application icon control, an application center icon control, a game application icon control, etc. Figure 3

[0120] In some embodiments, the live TV application program can provide live TV through different signal sources. For example, the live TV application program can use input from a cable TV, a radio broadcast, a satellite service or other types of live TV services to provide TV signals. In addition, the live TV application program can display the video of the live TV signal on the reference monitor 100.

[0121] In some embodiments, the video on demand application program can provide videos from different storage sources. Unlike the live TV application program, the video on demand provides video display from certain storage sources. For example, the video on demand can come from a server side of cloud storage or from a local hard disk storage containing stored video programs.

[0122] In some embodiments, the media center application program can provide various multimedia content playing application programs. For example, the media center can provide services for users to access various image or audio services through the media center application program, which is different from the live TV or the video on demand.

[0123] In some embodiments, the application center can provide storage of various application programs. The application program can be a game, an application program or other application programs related to a computer system or other devices but can run in a smart TV. The application center can obtain these application programs from different sources, store them in a local storage and then run them on the reference monitor 100.

[0124] ​The controller in the reference monitor 100 in the embodiment of the present application can receive a target voice instruction input by a user, and then can control the display to display content corresponding to a first predicted intention according to the target voice instruction input by the user, and control the display to display content corresponding to other predicted intentions except the first predicted intention among at least two predicted intentions. The displayed content is more abundant. The controller 150 in the reference monitor 100 is in communication connection with the display 175, and is configured to perform the process of content display. The process of content display provided by the embodiment of the present application is introduced below in combination with the drawings.

[0125] For the convenience of explanation, the above description has been made in combination with specific embodiments. However, the above exemplary discussion is not intended to be exhaustive or to limit the embodiments to the specific form disclosed. Various modifications and variations can be derived from the above teachings. The selection and description of the above embodiments are to better explain the principles and practical applications, so that those skilled in the art can better use the embodiments and various different modified embodiments suitable for specific use considerations.

[0126] The parameter configuration system of the embodiment of the present application is described below in combination with various embodiments.

[0127] Figure 4 A structural schematic diagram of a parameter configuration system provided by the embodiment of the present application is shown in the figure, and the parameter configuration system comprises an MCU 401, a DDR 402 and an FPGA 403.

[0128] The MCU 401 is configured to receive a mode switching request carrying a target mode, obtain a target storage location corresponding to the target mode according to a pre-stored correspondence relationship between modes and storage locations, and send the target storage location to the DDR 402.

[0129] The DDR 402 is configured to read a target parameter of the target storage location, and send the target parameter to the FPGA.

[0130] The FPGA 403 is configured to apply the target parameter.

[0131] In order to improve the efficiency of parameter configuration and improve the display effect of images, the parameter configuration system is provided with an MCU 401, a DDR 402 and an FPGA 403, wherein the MCU 401 is connected with the DDR 402, the FPGA 403 is connected with the DDR 402, and the parameter configuration system can be arranged in a reference monitor.

[0132] In the embodiment of the present application, when there is a demand for switching modes, the user can click an external button on the reference monitor, wherein each mode can correspond to an external button, the external button clicked by the user is the external button corresponding to the target mode that the user wants to switch to, after the user clicks the external button, the MCU can receive a mode switching request, and the mode switching request carries the target mode to be switched to, and the target mode is the mode corresponding to the external button clicked by the user.

[0133] In the embodiment of the present application, the MCU also saves, for each mode, the correspondence between the storage location of the parameters of the mode in the DDR and the mode, so that after receiving the mode switching request, the MCU can obtain the target mode carried in the mode switching request, and according to the correspondence between the mode and the storage location saved in advance, obtain the target storage location corresponding to the target mode, in order to obtain the target parameters corresponding to the target mode, after obtaining the target storage location, the MCU can send the target storage location to the DDR.

[0134] After receiving the target storage location sent by the MCU, the DDR can read the target parameters stored in the target storage location, and after reading the target parameters, the DDR sends the target parameters to the FPGA. In the embodiment of the present application, the reading module of the DDR can perform reading work to obtain the target parameters saved in the target storage location. In the embodiment of the present application, the DDR can be any type of DDR, for example, it can be DDR4.

[0135] In order to realize the switching of the mode, after receiving the target parameters sent by the DDR, the FPGA can save the target parameters and apply the target parameters, so as to realize the switching of the mode. Specifically, in the embodiment of the present application, the receiving module of the FPGA can save the target parameters in the image parameter cache module of the FPGA after receiving the target parameters, or the writing module of the DDR can write the obtained target parameters into the image parameter cache module of the FPGA.

[0136] It is worth mentioning that the interface of DDR is a high-speed parallel interface. Taking the currently used DDR4 as an example: the working clock of DDR4 is 4066Mhz, and the data bit width is 256bit. The data interface of SPI FLASH is a serial interface. The working clock of the currently used SPIFLASH is only 50Mhz at most. Only from the working clock, the data read-write speed of DDR is hundreds of times that of SPI FLASH. If other modes are switched, it means that the parameters saved in the FPGA need to be updated to the parameters of other modes. If the MCU reads the parameters from the FLASH and sends the parameters to the FPGA, the parameter configuration time is relatively long, and the user experience is very poor. In the embodiment of the application, the parameter configuration speed is improved by hundreds of times compared with reading parameters from the SPI FLASH.

[0137] In the embodiment of the application, the parameters of different modes are saved in the DDR, and when the mode is switched, the MCU sends the target storage position corresponding to the target mode to the DDR, the DDR obtains the target parameters stored in the target storage position, and sends the target parameters to the FPGA. Since the reading speed of the DDR is faster, and in the embodiment of the application, the MCU sends the target storage position corresponding to the target mode to the DDR, the DDR directly obtains the target parameters in the target storage position and sends the target parameters to the FPGA, compared with the MCU obtaining the target parameters from the device storing the target parameters and sending the target parameters to the FPGA, the target parameters are effectively avoided from being sent multiple times, so that the parameter configuration time can be reduced, and the display effect is improved.

[0138] In order to improve the image display effect, on the basis of the above embodiment, the MCU 401 is further configured to send a mode switching request to the FPGA 403.

[0139] The FPGA 403 is further configured to determine whether the current is in the blanking interval of the frame signal, and if so, send a parameter acquisition instruction to the DDR 402, and if not, send a parameter acquisition instruction to the DDR 402 in the blanking interval of the next frame signal.

[0140] The DDR 402 is configured to execute the subsequent step of reading the target parameters in the target storage position after receiving the parameter acquisition instruction.

[0141] In the embodiment of the present application, if the DDR directly reads the target parameter stored in the target storage location after receiving the target storage location sent by the MCU and sends the read target parameter to the FPGA, it may cause that when the target parameter stored in the target storage location is read, it is in the period of playing the valid video signal. Since the internal functional module of the reference monitor cannot work normally when the target parameter is read, the received video data or image data cannot be processed, so if the image or video is displayed when the target parameter is read, the user will see a flower screen or a black screen, thereby affecting the user experience.

[0142] In the embodiment of the present application, the MCU can control the DDR to read the target parameter stored in the target storage location when the blanking interval of the frame signal. Specifically, the MCU sends the target storage location to the DDR, and also sends a mode switching request to the FPGA. After receiving the mode switching request, the FPGA judges whether the current is in the blanking interval of the frame signal. The display module of the reference monitor displays the last frame image in the blanking interval of the frame signal. If the current is in the blanking interval of the frame signal, it means that the current is not in the period of playing the valid video signal, and the reading of the target parameter will not affect the display of the image or the video. Therefore, the FPGA sends a parameter acquisition instruction to the DDR. After receiving the parameter acquisition instruction sent by the FPGA, the DDR executes the subsequent step of reading the target parameter of the target storage location. If the current is not in the blanking interval of the frame signal, it means that the current is in the period of playing the valid video signal. If the parameter is configured at the current, the user may see a flower screen or a black screen, that is, the current is not the best time for parameter configuration. Therefore, the FPGA sends a parameter acquisition instruction to the DDR in the blanking interval of the next frame signal. After receiving the parameter acquisition instruction sent by the FPGA, the DDR executes the subsequent step of reading the target parameter of the target storage location. How to determine whether the current is in the blanking interval of the frame signal and how to determine the blanking interval of the next frame signal are the prior art, which will not be described here.

[0143] In the embodiment of the present application, the sequence reference module of the FPGA can detect whether the current is in the blanking interval of the frame signal.

[0144] In the embodiment of the present application, the process that the DDR reads the target parameter stored in the target storage location and sends the target parameter to the FPGA is completed in the blanking interval of the frame signal. Therefore, when the next frame image is acquired, the newly configured target parameter in the FPGA can play a role, and the FPGA can process the next frame image by using the newly acquired target parameter, so that seamless switching can be achieved, the user can see a flower screen, the user experience is improved, and the display effect is improved.

[0145] In the prior art, the switching mode usually takes several frames of time to complete due to slow parameter configuration speed. During the parameter configuration, the internal function module of the reference monitor cannot work normally, and if the display is continued, the user will see a distorted screen. In this case, the black frame is inserted to shield, so the user will see a black screen, and the user will see an instantaneous black screen, and the black screen will disappear after the reference monitor is switched to another mode for a certain time. However, with the development of the reference monitor, it means that the number of future parameters will gradually increase, and the corresponding configuration time will also increase. If the prior art method is used, the black screen time of the switching mode will also increase. However, the embodiments of the present application can complete the parameter configuration in the blanking area of two frames of images by means of the fast read and write speed of the DDR, and truly achieve seamless switching.

[0146] Figure 5 A mode switching process diagram is provided for the embodiments of the present application, and the process includes the following steps:

[0147] S501: The user clicks the external key of the reference monitor.

[0148] S502: The MCU receives the mode switching request carrying the target mode.

[0149] S503: The MCU obtains the target storage location corresponding to the target mode according to the pre-stored correspondence between the mode and the storage location, sends the target storage location to the DDR, and sends the mode switching request to the FPGA.

[0150] S504: The FPGA determines whether the current is in the blanking interval of the frame signal, if yes, S505 is executed, and if not, S506 is executed.

[0151] S505: The FPGA sends a parameter acquisition instruction to the DDR, and S507 is executed.

[0152] S506: The FPGA sends a parameter acquisition instruction to the DDR in the blanking interval of the next frame signal.

[0153] S507: The read module of the DDR reads the target parameter stored in the target storage location, and sends the target parameter to the write module of the DDR.

[0154] S508: The write module of the DDR writes the target parameter into the image parameter cache module of the FPGA.

[0155] In order to realize the application of the target parameter, on the basis of the above embodiments, in the embodiments of the present application, the system further includes an acquisition module 404 and a display module 405.

[0156] The collection module 404 is configured to collect the data to be processed, and send the data to be processed to the FPGA 403.

[0157] The FPGA 403 is further configured to adjust the data to be processed according to the target parameter, obtain the target data after adjustment, and send the target data to the display module 405.

[0158] The display module 405 is configured to display the target data.

[0159] In the embodiment of the present application, the parameter configuration system further includes a collection module 404 and a display module 405, wherein the collection module 404 and the display module 405 are connected with the FPGA 403 respectively.

[0160] In the embodiment of the present application, the collection module of the parameter configuration system is configured to collect the data to be processed, and send the collected data to be processed to the FPGA. After receiving the data to be processed, the FPGA adjusts the data to be processed by using the saved target parameter, obtains the target data after adjustment, sends the obtained target data to the display module, and the display module displays the received target data after receiving the target data.

[0161] In the embodiment of the present application, the FPGA adjusts the received data to be processed by using different parameters, so that the display module displays different effects, for example, the effects can be a high dynamic range image (High-Dynamic Range, HDR) 10, a high dynamic range (Hybrid Log Gamma, HLG), a standard dynamic imaging (Standard Dynamic Range, SDR), and the like.

[0162] Specifically, in the embodiment of the present application, the FPGA receives the data to be processed, wherein the data to be processed is the image data of the current frame obtained by the collection module. After receiving the data to be processed, the FPGA can perform serial-parallel conversion on the data to be processed by using the receiving module of the FPGA, convert the serial data to be processed collected by the collection module into parallel digital signals, send the parallel digital signals to the image processing module of the FPGA, call the target parameter in the image parameter cache module of the FPGA by using the image processing module of the FPGA, adjust the parallel digital signals by using the called target parameter, obtain the parallel target data, send the parallel target data to the sending module of the FPGA by using the image processing module of the FPGA, perform parallel-serial conversion on the parallel target data by using the sending module of the FPGA, convert the parallel target data into serial target data, and send the serial target data to the display module. The display module displays the received serial target data.

[0163] In order to improve the display effect, on the basis of the above embodiments, in the embodiment of the present application, the system further comprises: a secure digital (SD) card 406 and a FLASH 407;

[0164] The SD card 406 is configured to save each first parameter and a FLASH position corresponding to the each first parameter.

[0165] The MCU 401 is further configured to, if a parameter configuration request is detected, acquire the each first parameter and the FLASH position corresponding to the each first parameter saved in the SD card 406, and send the each first parameter and the FLASH position corresponding to the each first parameter to the FLASH 407.

[0166] The FLASH 407 is configured to, for the each first parameter, replace a parameter stored in a FLASH position corresponding to the first parameter with the first parameter, and send the first parameter saved in the FLASH position and information of the FLASH position to the DDR 402.

[0167] The DDR 402 is further configured to receive the parameter saved in the FLASH position and the information of the FLASH position sent by the FLASH 407, determine a first DDR storage position corresponding to the FLASH position according to a pre-stored correspondence between positions and DDR positions, and store the first parameter corresponding to the FLASH position in the first DDR storage position.

[0168] In order to improve the display effect of images or videos, in the embodiment of the present application, the parameter configuration system further comprises an SD card 406 and a FLASH 407, wherein the SD card 406 is connected with the MCU 401, and the FLASH 407 is connected with the MCU 401 and the DDR 402 respectively.

[0169] In actual application scenarios, there may be a demand for updating or initializing parameters of modes, therefore, in the embodiment of the present application, the SD card is configured to save each first parameter and a FLASH position corresponding to the each first parameter, wherein the FLASH position corresponding to the first parameter saved in the SD card is a position selected by a user and wanted to be stored in the FLASH, and the each first parameter saved in the SD card is a parameter that a mode with an updating demand wants to update to, and the user can save the first parameter and the corresponding FLASH position in the SD card through other devices.

[0170] In the embodiment of the present application, when there is a need for parameter initialization or update of a mode, the user can re-power the reference monitor and click the preset key, and then the MCU can receive the parameter configuration request. After receiving the parameter configuration request, the MCU can start to boot up. The MCU acquires each first parameter and the FLASH position corresponding to each first parameter saved in the SD card. The MCU sends each first parameter and the FLASH position corresponding to each first parameter to the FLASH. After receiving each first parameter and the FLASH position corresponding to each first parameter sent by the MCU, the FLASH replaces the parameter stored in the FLASH position corresponding to the first parameter with the first parameter for each first parameter received. Thus, the initialization or update of the parameter of the FLASH can be completed.

[0171] Specifically, the process of replacing the parameter stored in the FLASH corresponding to the first parameter with the first parameter can be that, after acquiring each first parameter and the FLASH position corresponding to each first parameter, the MCU sends the FLASH position corresponding to each first parameter to the erasing module of the FLASH. After receiving the FLASH position corresponding to the first parameter, the erasing module of the FLASH erases the parameter saved in the FLASH position corresponding to the first parameter. After erasing is completed, the MCU is informed. The MCU sends the first parameter and the corresponding FLASH position to the writing module of the FLASH. The writing module of the FLASH writes the first parameter into the corresponding FLASH position.

[0172] In the embodiment of the present application, the parameters corresponding to each mode can be updated in this way, or only the parameters corresponding to individual modes can be updated. For example, only one or several parameters such as parameter 1 or parameter 2 can be updated. The update can be performed according to actual needs.

[0173] In the embodiment of the present application, in order to realize the application of the updated parameter, the FLASH sends each first parameter and the information of the FLASH position corresponding to each first parameter to the DDR. The DDR saves the correspondence between the position in the FLASH and the DDR position. After receiving each first parameter and the information of the FLASH position corresponding to each first parameter sent by the FLASH, the DDR determines the FLASH position corresponding to each first parameter received. According to the pre-saved correspondence between the position and the DDR position, the first DDR storage position corresponding to the FLASH position is determined, and the first parameter is stored in the first DDR storage position. Thus, the update of the first parameter is completed. In this way, each first parameter can be stored in the corresponding DDR storage position. When mode switching is performed subsequently, the updated first parameter can be used.

[0174] In the actual application scenario, after the FLASH writes each first parameter into the corresponding FLASH position, the updated first parameter will take effect only after the power of the reference monitor is re-applied. Therefore, usually after the power is re-applied, the FLASH sends the received each first parameter and the information of the FLASH position corresponding to each first parameter to the DDR.

[0175] Figure 6 A process diagram in which the first parameter in the SD card is saved in the FLASH when the parameter is updated is provided for the embodiments of the present application, Figure 7 A module structure diagram needed when the first parameter in the SD card is saved in the FLASH when the parameter is updated is provided for the embodiments of the present application, and the carrying process of the second parameter will be described below in combination with Figure 7 each module in the module structure diagram.

[0176] S601: The user re-applies power to the reference monitor.

[0177] S602: The MCU starts.

[0178] S603: The MCU acquires each first parameter saved in the SD card and the FLASH position corresponding to each first parameter.

[0179] S604: The MCU sends the FLASH position corresponding to each first parameter to the erasing module of the FLASH.

[0180] S605: The erasing module of the FLASH erases the parameter in the FLASH position corresponding to the first parameter in the FLASH and informs the MCU.

[0181] S606: The MCU sends the first parameter and the FLASH position corresponding to the first parameter to the writing module of the FLASH.

[0182] S607: The writing module of the FLASH writes the parameter into the corresponding FLASH position.

[0183] In order to accurately and quickly realize the switching of the mode, on the basis of the above embodiments, in the embodiments of the present application, the FLASH 407 is further used to send each second parameter saved in each FLASH position and the corresponding FLASH position to the DDR 402 if it is detected that the power is re-applied.

[0184] The DDR 402 is used to determine the second DDR storage position corresponding to the FLASH position corresponding to each second parameter according to the correspondence between the position saved in advance and the DDR position, and store the second parameter in the second DDR storage position.

[0185] In actual application, although a large number of parameters can be cached in the DDR, and the DDR has high read-write speed, but after the reference monitor is powered off, the cached parameters in the DDR are lost, and the reference monitor needs to be powered off and powered on again when the parameters of the mode are updated. Therefore, in the embodiment of the application, when the parameters of the mode are updated or the reference monitor is powered on again due to other reasons, the parameters corresponding to different modes need to be stored in the DDR again.

[0186] Therefore, in the embodiment of the application, if the FLASH detects a power-on again, and no other operation is detected within a preset time after the power-on again, the FLASH moves each parameter saved in the FLASH to the DDR. Specifically, the FLASH sends each second parameter saved in each FLASH position and the FLASH position storing the second parameter to the DDR.

[0187] In the embodiment of the application, the DDR saves the correspondence between the positions in the FLASH and the positions in the DDR, and after receiving the information of each second parameter and the FLASH position storing the second parameter sent by the FLASH, the DDR determines the FLASH position corresponding to each second parameter, determines the second DDR storage position corresponding to the FLASH position according to the pre-stored correspondence between the positions, and stores the second parameter in the second DDR storage position, so as to store each second parameter in the DDR storage position. That is, the parameters corresponding to different modes can be saved in the DDR, which facilitates subsequent mode switching and parameter acquisition.

[0188] Specifically, in the embodiment of the application, the reading module of the FLASH can read the second parameter saved in the FLASH position, the reading module of the FLASH sends each second parameter obtained and the FLASH position storing the second parameter to the writing module of the FLASH, the writing module of the FLASH sends each second parameter obtained and the FLASH position storing the second parameter to the parameter reading and writing module of the DDR, the parameter reading and writing module of the DDR obtains the DDR position corresponding to each FLASH position after receiving the second parameter and the corresponding FLASH position, sends each second parameter and the corresponding DDR position to the writing module of the DDR, and the writing module of the DDR writes each second parameter into the corresponding DDR storage position, thereby completing the moving work of the parameters from the FLASH to the DDR.

[0189] Figure 8 A process diagram in which the FLASH provided in the embodiment of the application moves the second parameter stored in the FLASH to the DDR is shown in FIG. 1, Figure 9The module structure diagram for carrying the second parameter stored in the FLASH to the DDR in need is provided in the embodiment of the present application, and the carrying process of the second parameter is described below in combination with each module in Figure 9

[0190] S801: The reading module of the FLASH reads each second parameter stored in the FLASH, and sends each acquired second parameter and the FLASH position corresponding to the stored second parameter to the writing module of the FLASH.

[0191] S802: The writing module of the FLASH sends each acquired second parameter and the FLASH position corresponding to the stored second parameter to the parameter reading and writing module of the DDR.

[0192] S803: After receiving the second parameter and the corresponding FLASH position, the parameter reading and writing module of the DDR acquires the DDR position corresponding to each FLASH position.

[0193] S804: The parameter reading and writing module of the DDR acquires the DDR position corresponding to each FLASH position, and sends each second parameter and the corresponding DDR position to the writing module of the DDR.

[0194] S805: The writing module of the DDR writes each second parameter into the corresponding DDR storage position.

[0195] In order to maximize the FLASH utilization, on the basis of the above embodiments, in the embodiment of the present application, the FLASH 407 is used to save the corresponding information by means of time division multiplexing.

[0196] In the embodiment of the present application, in order to maximize the FLASH utilization, the FLASH saves the corresponding information by means of time division multiplexing. Specifically, how to save the corresponding information by means of time division multiplexing is prior art, which will not be described here.

[0197] Figure 10 The complete module structure diagram in the parameter configuration system provided in the embodiment of the present application is described below in combination with each module in Figure 10

[0198] Figure 10 ​​​It can be known that in the embodiment of the present application, external keys, SD cards, FLASH, DDR, FPGA, a collection module and a display module are needed when the parameters are configured. In the complete parameter configuration process, when the user has a mode switching demand, the user clicks the external keys of the reference monitor, the MCU receives the mode switching request carrying the target mode, the MCU acquires the target storage location corresponding to the target mode according to the corresponding relationship between the mode and the storage location previously saved, sends the target storage location to the DDR, the reading module of the DDR reads the target parameters stored in the target storage location, and sends the target parameters to the writing module of the DDR. The writing module of the DDR writes the target parameters into the image parameter cache module of the FPGA.

[0199] In the complete parameter configuration process, when the target parameters are applied, the collection module collects the data to be processed, and sends the data to be processed to the receiving module of the FPGA, the receiving module of the FPGA performs serial-parallel conversion on the data to be processed, and sends the converted data to the image processing module of the FPGA, the image processing module of the FPGA calls the target parameters in the image parameter cache module of the FPGA, adjusts the received data by using the called target parameters, acquires parallel target data, the image processing module of the FPGA sends the parallel target data to the sending module of the FPGA, the sending module of the FPGA performs parallel-serial conversion on the parallel target data, acquires serial target data, and sends the serial target data to the display module, and the display module displays the received serial target data.

[0200] In the complete parameter configuration process, when the parameters are updated, the first parameters in the SD card are saved in the FLASH, the MCU acquires each first parameter saved in the SD card and the FLASH location corresponding to each first parameter. The MCU sends the FLASH location corresponding to each first parameter to the erasing module of the FLASH for each first parameter. The erasing module of the FLASH erases the parameters in the FLASH location corresponding to the first parameter in the FLASH, and informs the MCU. The MCU sends the first parameter and the FLASH location corresponding to the first parameter to the writing module of the FLASH. The writing module of the FLASH writes the parameters into the corresponding FLASH location.

[0201] In the complete parameter configuration process, when each second parameter stored in FLASH is transferred to DDR, the FLASH read module reads the second parameter stored in the FLASH location. The FLASH read module sends each obtained second parameter and the corresponding FLASH location where the second parameter is stored to the FLASH write module. The FLASH write module sends each obtained second parameter and the corresponding FLASH location where the second parameter is stored to the DDR parameter read / write module. After receiving the second parameter and the corresponding FLASH location, the DDR parameter read / write module obtains the DDR location corresponding to each FLASH location and sends each second parameter and the corresponding DDR location to the DDR write module. The DDR write module writes each second parameter into the corresponding DDR storage location.

[0202] Figure 11 This is a schematic diagram of the module structure required in existing technologies.

[0203] Depend on Figure 11 As can be seen, the existing technology requires the use of MCU, FLASH, acquisition module, FPGA and display module. Among them, MCU is connected to FPGA and FLASH, acquisition module is connected to FPGA, and display module is connected to FPGA. Specifically, it requires FPGA receiving module, transmitting module and image processing module.

[0204] Depend on Figure 10 and Figure 11 It is understood that the existing technology differs from the system architecture in the embodiments of this application.

[0205] In order to enable the FPGA to run, based on the above embodiments, in this embodiment of the application, the FLASH407 is also used to store the configuration information of the FPGA403;

[0206] The MCU401 is also used to send a configuration information acquisition request to the FLASH407 if it receives an initialization instruction;

[0207] The FLASH407 is also used to detect whether the operating clock of the FPGA403 is stable; if so, the configuration information is sent to the FPGA403; if not, the configuration information is sent to the FPGA403 after the operating clock of the FPGA403 is detected to be stable.

[0208] The FPGA403 is used to store the configuration information and run according to the configuration information.

[0209] In an actual application scenario, the internal parameters of the FPGA need to be supported to run the FPGA, which can be referred to as configuration information. There can be a need to initialize the internal parameters of the FPGA. Therefore, in the embodiments of the present application, when the configuration information of the FPGA is initialized, the FLASH is used to save the configuration information of the FPGA. If the MCU receives an instruction to initialize the FPGA, which can be detected as a power-on, the MCU sends a parameter acquisition request to the FLASH. The MCU can receive the instruction to initialize the FPGA by clicking a preset key of the reference monitor. The MCU can also receive the instruction to initialize the FPGA after detecting a power-on. After the FLASH receives the parameter acquisition request sent by the FPGA, the FLASH sends the saved configuration information of the FPGA to the FPGA. The FPGA saves the received configuration information. When the FPGA saves the received configuration information, it means that the configuration information initialization is completed, which means that the FPGA can start working normally, and the entire parameter configuration system can start working normally.

[0210] In order to accurately send the configuration information of the FPGA to the FPGA, in the embodiments of the present application, the configuration information of the FPGA can be sent to the FPGA when the working clock of the FPGA is stable. The timing reference module of the FPGA can determine whether the working clock of the FPGA is stable. The determination method is to detect the stable time of the lock signal (LOCK) of the working clock phase-locked loop (PLL). If the LOCK signal is continuously high for a preset value, that is, the stable time reaches the preset value, it means that the working clock is stable. If the working clock is stable, the timing reference module of the FPGA informs the reading module of the FLASH that the working clock of the FPGA is stable. The FLASH writes the configuration information saved by itself into the image parameter buffer module of the FPGA, which can be referred to as sending the configuration information of the FPGA to the image parameter buffer module of the FPGA. If the working clock is not stable, it continues to wait until the working clock is stable. The FPGA informs the FLASH that the working clock is stable. The FLASH writes the locally saved configuration information of the FPGA into the image parameter buffer module.

[0211] In the embodiment of the present application, the FLASH also stores a netlist that can enable the FPGA to start running. After the MCU receives the instruction for initializing the FPGA, the MCU informs the FPGA, and the FPGA acquires the netlist stored locally. After the netlist configuration of the FPGA is completed, the corresponding pin FPGA_DONE signal on the FPGA is pulled high, indicating that the netlist loading of the FPGA is successful. After detecting that the FPGA_DONE signal is pulled high, the MCU sends a parameter acquisition request to the FLASH, specifically to the control module of the FLASH, and starts the initialization of the FPGA configuration information. In the embodiment of the present application, the parameter selection module in the FPGA can select the FLASH parameter configuration path to acquire the configuration information stored in the FLASH.

[0212] Figure 12 A process schematic diagram of FPGA initialization provided in the embodiment of the present application is shown in FIG. 1. Figure 13 A module structure schematic diagram needed for FPGA initialization provided in the embodiment of the present application is shown in FIG. 2. The FPGA initialization process is described below in combination with each module in FIG. 2. Figure 13

[0213] S1201: The MCU receives the instruction for initializing the FPGA and informs the FPGA.

[0214] S1202: The FPGA loads the netlist.

[0215] S1203: After detecting that the FPGA_DONE signal is pulled high, the MCU sends a parameter acquisition request to the FLASH.

[0216] S1204: The timing reference module of the FPGA detects whether the current working clock is stable. If yes, S1205 is executed; if no, S1206 is executed.

[0217] S1205: The timing reference module of the FPGA informs the reading module of the FLASH of the information that the working clock is stable, and S1207 is executed.

[0218] S1206: After waiting for the working clock to be stable, the timing reference module of the FPGA informs the reading module of the FLASH of the information that the working clock is stable.

[0219] S1207: The reading module of the FLASH sends the configuration information of the FPGA stored locally to the image parameter buffer module of the FPGA.

[0220] S1208: The image parameter buffer module of the FPGA stores the received configuration information.

[0221] ​On the basis of the above embodiments, the application further provides a parameter configuration method applied to a DDR, Figure 14 A parameter configuration process schematic diagram provided for the embodiments of the application is shown in Figure 14 The method comprises the following steps:

[0222] S1401: receiving a target storage location sent by an MCU; wherein the target storage location is a target storage location corresponding to a target mode obtained by the MCU according to a pre-stored corresponding relationship between modes and storage locations after receiving a mode switching request carrying the target mode.

[0223] S1402: reading a target parameter in the target storage location, and sending the target parameter to an FPGA.

[0224] In a possible implementation, the method further comprises the following steps:

[0225] receiving a first parameter saved in a FLASH location and information of the FLASH location sent by a FLASH;

[0226] determining a first DDR storage location corresponding to the FLASH location according to a pre-stored corresponding relationship between locations and DDR locations;

[0227] storing the first parameter corresponding to the FLASH location in the first DDR storage location.

[0228] In a possible implementation, the method further comprises the following steps:

[0229] if an initialization instruction is received, sending a configuration information acquisition request to the FLASH, so that the FLASH detects whether a working clock of the FPGA is stable; if yes, sending the configuration information to the FPGA; if no, waiting until the working clock of the FPGA is detected to be stable, and then sending the configuration information to the FPGA.

[0230] On the basis of the above embodiments, the application further provides a parameter configuration method applied to an MCU, Figure 15 A parameter configuration process schematic diagram provided for the embodiments of the application is shown in Figure 15 The method comprises the following steps:

[0231] S1501: receiving a mode switching request carrying a target mode, and obtaining a target storage location corresponding to the target mode according to a pre-stored corresponding relationship between modes and storage locations.

[0232] S1502: sending the target storage location to a DDR, so that the DDR reads a target parameter in the target storage location and sends the target parameter to an FPGA.

[0233] In a possible implementation, the method further includes:

[0234] sending a mode switching request to the FPGA to make the FPGA determine whether the current is in a blanking interval of a frame signal; if yes, sending a parameter acquisition instruction to the DDR; if no, sending the parameter acquisition instruction to the DDR in a blanking interval of a next frame signal; and reading, by the DDR after receiving the parameter acquisition instruction, a target parameter in a target storage position.

[0235] In a possible implementation, the method further includes:

[0236] if the parameter configuration request is detected, obtaining each first parameter saved in the SD card and a FLASH position corresponding to the each first parameter;

[0237] sending the each first parameter and the FLASH position corresponding to the each first parameter to the FLASH; making the FLASH replace, for the each first parameter, a parameter stored in the FLASH position corresponding to the first parameter with the first parameter, and sending the first parameter saved in the FLASH position and information of the FLASH position to the DDR.

[0238] On the basis of the above embodiments, the application further provides a parameter configuration method applied to an FPGA, Figure 16 a parameter configuration process schematic diagram provided by the embodiments of the application, as Figure 16 shown, the method includes:

[0239] S1601: receiving a mode switching request sent by an MCU.

[0240] S1602: determining whether the current is in a blanking interval of a frame signal; if yes, sending a parameter acquisition instruction to the DDR; if no, sending the parameter acquisition instruction to the DDR in a blanking interval of a next frame signal; to make the DDR read a target parameter in a target storage position after receiving the parameter acquisition instruction.

[0241] In a possible implementation, the method further includes:

[0242] receiving data to be processed collected by a collection module;

[0243] adjusting the data to be processed according to the saved target parameter, obtaining adjusted target data, and sending the target data to a display module to make the display module display the target data.

[0244] On the basis of the above embodiments, the application further provides a parameter configuration method applied to FLASH, Figure 17 A parameter configuration process schematic diagram provided by the embodiments of the application is shown in the figure, Figure 17 The method comprises the following steps:

[0245] S1701: receiving each first parameter sent by the MCU and a FLASH position corresponding to the each first parameter.

[0246] S1702: for the each first parameter, replacing the parameter stored in the FLASH position corresponding to the first parameter with the first parameter; sending the first parameter saved in the FLASH position and the information of the FLASH position to the DDR.

[0247] In a possible implementation, the method further comprises the following steps:

[0248] If it is detected that the power is re-powered, the second parameter saved in each FLASH position and the corresponding FLASH position are sent to the DDR; so that the DDR determines the second DDR storage position corresponding to the FLASH position corresponding to the each second parameter according to the corresponding relationship between the position and the DDR position saved in advance, and stores the second parameter in the second DDR storage position.

[0249] In a possible implementation, the method further comprises the following steps:

[0250] The corresponding information is saved by means of time division multiplexing.

[0251] In a possible implementation, the method further comprises the following steps:

[0252] If the configuration information acquisition request sent by the MCU is received;

[0253] It is detected whether the working clock of the FPGA is stable; if yes, the configuration information is sent to the FPGA; if no, the configuration information is sent to the FPGA after it is detected that the working clock of the FPGA is stable, so that the FPGA saves the configuration information and runs according to the configuration information.

[0254] Figure 18 Another structure schematic diagram of a display device provided by the embodiments of the application is shown in the figure, Figure 18 The device comprises the following parts:

[0255] The first receiving module 1801 is configured to receive a target storage position sent by an MCU; wherein the target storage position is a target storage position corresponding to a target mode obtained by the MCU according to a pre-stored correspondence between modes and storage positions after receiving a mode switching request carrying the target mode.

[0256] The first processing module 1802 is configured to read a target parameter of the target storage position and send the target parameter to an FPGA.

[0257] In a possible implementation, the first processing module 1802 is further configured to receive a first parameter saved in a FLASH position and information of the FLASH position; determine a first DDR storage position corresponding to the FLASH position according to a pre-stored correspondence between positions and DDR positions; and store the first parameter corresponding to the FLASH position in the first DDR storage position.

[0258] In a possible implementation, the first processing module 1802 is further configured to, if an initialization instruction is received, send a configuration information obtaining request to the FLASH, so that the FLASH detects whether a working clock of the FPGA is stable; if yes, send the configuration information to the FPGA; and if no, wait until the working clock of the FPGA is detected to be stable, and then send the configuration information to the FPGA.

[0259] Figure 19 Another structural schematic diagram of a display device provided by an embodiment of the present application is shown in FIG. 2. Figure 19 As shown in the figure, the device comprises:

[0260] The second processing module 1901 is configured to receive a mode switching request carrying a target mode, and obtain a target storage position corresponding to the target mode according to a pre-stored correspondence between modes and storage positions.

[0261] The sending module 1902 is configured to send the target storage position to a DDR, so that the DDR reads a target parameter of the target storage position and sends the target parameter to an FPGA.

[0262] In a possible implementation, the sending module 1902 is further configured to send a mode switching request to the FPGA, so that the FPGA judges whether the FPGA is currently in a blanking interval of a frame signal; if yes, send a parameter obtaining instruction to the DDR; if no, send a parameter obtaining instruction to the DDR in a blanking interval of a next frame signal; and the DDR reads the target parameter of the target storage position after receiving the parameter obtaining instruction.

[0263] In a possible implementation, the second processing module 1901 is further configured to, if it is detected that the parameter configuration request is received, acquire each first parameter saved in the SD card and a FLASH position corresponding to the each first parameter; send the each first parameter and the FLASH position corresponding to the each first parameter to the FLASH; and cause the FLASH to replace a parameter stored in the FLASH position corresponding to the each first parameter with the each first parameter, and send the first parameter saved in the FLASH position and information of the FLASH position to the DDR.

[0264] Figure 20 Another structural schematic diagram of a display device provided by an embodiment of the present application is shown in FIG. 6. As shown in FIG. 6, the device includes: Figure 20

[0265] The second receiving module 2001 is configured to receive a mode switching request sent by the MCU.

[0266] The third processing module 2002 is configured to determine whether the current is in a blanking interval of a frame signal; if yes, send a parameter acquisition instruction to the DDR; if no, send the parameter acquisition instruction to the DDR in a blanking interval of a next frame signal; and cause the DDR to read a target parameter in a target storage position after receiving the parameter acquisition instruction.

[0267] In a possible implementation, the third processing module 2002 is further configured to receive the to-be-processed data collected by the collecting module; adjust the to-be-processed data according to the saved target parameter, acquire adjusted target data, and send the target data to the display module, so that the display module displays the target data.

[0268] Figure 21 Another structural schematic diagram of a display device provided by an embodiment of the present application is shown in FIG. 6. As shown in FIG. 6, the device includes: Figure 21

[0269] The third receiving module 2101 is configured to receive each first parameter and a FLASH position corresponding to the each first parameter sent by the MCU.

[0270] The fourth processing module 2102 is configured to replace a parameter stored in the FLASH position corresponding to the each first parameter with the each first parameter, and send the first parameter saved in the FLASH position and information of the FLASH position to the DDR.

[0271] ​​In a possible implementation, the fourth processing module 2102 is further configured to, if it is detected that the power is re-applied, send the second parameter saved by each FLASH location and the corresponding FLASH location to the DDR; and cause the DDR to, for each second parameter, determine a second DDR storage location corresponding to the FLASH location corresponding to the second parameter according to the correspondence between the pre-saved locations and the DDR locations, and store the second parameter in the second DDR storage location.

[0272] In a possible implementation, the fourth processing module 2102 is further configured to save the corresponding information in a time division multiplexing manner.

[0273] In a possible implementation, the fourth processing module 2102 is further configured to, if the configuration information acquisition request sent by the MCU is received, detect whether the working clock of the FPGA is stable; if yes, send the configuration information to the FPGA; and if no, wait until the working clock of the FPGA is detected to be stable, and then send the configuration information to the FPGA, so that the FPGA saves the configuration information and runs according to the configuration information.

[0274] Based on the same idea, the embodiment of the present application provides a computer readable storage medium, when the instructions in the storage medium are executed by a processor, the processor can execute any one of the parameter configuration methods realized in the above embodiments.

[0275] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can be in the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can be in the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0276] The present application is described with reference to flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the present application. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, and the combination of the flows and / or blocks in the flowcharts and / or block diagrams can be implemented by computer program instructions. These computer program instructions can be provided to a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to produce a machine, so that the instructions executed by the computer or other programmable data processing devices produce a device that implements the functions specified in the flowcharts and / or block diagrams. Figure 1 The functions specified in one flow or multiple flows and / or blocks Figure 1 The device that implements the functions specified in one flow or multiple flows and / or blocks.

[0277] These computer program instructions can also be stored in a computer- readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instructions which implement the Figure 1 function specified in the flow or flows and / or blocks Figure 1 of the block or blocks.

[0278] These computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions that are executed on the computer or other programmable apparatus provide steps for implementing the Figure 1 function specified in the flow or flows and / or blocks Figure 1 of the block or blocks.

[0279] Obviously, numerous modifications and variations of the present application are possible in light of the above teachings. It is therefore to be understood that within the scope of the appended claims and their equivalents, the application can be practiced otherwise than as specifically described.

Claims

1. A parameter configuration system, characterized by, The system comprises a micro control unit (MCU), a double data rate synchronous dynamic random access memory (DDR) and a field programmable gate array (FPGA); The MCU is configured to receive a mode switching request carrying a target mode, acquire a target storage location corresponding to the target mode according to a pre-stored correspondence between modes and storage locations, and send the target storage location to the DDR; if an external key is clicked, the MCU receives a mode switching request carrying a target mode corresponding to the clicked external key; the interface of the DDR is a high-speed parallel interface; The DDR is configured to read a target parameter in the target storage location and send the target parameter to the FPGA; The FPGA is configured to apply the target parameter; The MCU is further configured to send a mode switching request to the FPGA; The FPGA is further configured to determine whether a current frame signal is in a blanking interval; if yes, send a parameter acquisition instruction to the DDR; if no, send the parameter acquisition instruction to the DDR in a blanking interval of a next frame signal; The DDR is configured to perform the subsequent step of reading a target parameter in the target storage location after receiving the parameter acquisition instruction.

2. The system of claim 1, wherein, The system further comprises a collection module and a display module; The collection module is configured to collect data to be processed and send the data to be processed to the FPGA; The FPGA is further configured to adjust the data to be processed according to the target parameter, acquire adjusted target data, and send the target data to the display module; The display module is configured to display the target data.

3. The system of claim 1, wherein, The system further comprises a secure digital (SD) card and a storage chip FLASH; The SD card is configured to save each first parameter and a FLASH location corresponding to each first parameter; The MCU is further configured to, if a parameter configuration request is detected, acquire the each first parameter and the FLASH location corresponding to each first parameter saved in the SD card, and send the each first parameter and the FLASH location corresponding to each first parameter to the FLASH; The FLASH is configured to replace a parameter stored in a FLASH location corresponding to each first parameter with the first parameter for each first parameter, and send the first parameter saved in the FLASH location and information of the FLASH location to the DDR; The DDR is further configured to receive the first parameter saved in the FLASH location and the information of the FLASH location sent by the FLASH, determine a first DDR storage location corresponding to the FLASH location according to a pre-stored correspondence between locations and DDR locations, and store the first parameter corresponding to the FLASH location in the first DDR storage location.

4. The system of claim 1 or 3, wherein, The FLASH is further configured to, if a power-on is detected, send each second parameter saved in a FLASH location and a corresponding FLASH location to the DDR; The DDR is configured to determine, for each second parameter, a second DDR storage position corresponding to a FLASH position corresponding to the second parameter according to a pre-stored correspondence between positions and DDR positions, and store the second parameter in the second DDR storage position.

5. The system of claim 3, wherein, The FLASH is further configured to store configuration information of the FPGA. The MCU is further configured to send a configuration information acquisition request to the FLASH if an initialization instruction is received. The FLASH is further configured to detect whether a working clock of the FPGA is stable, and send the configuration information to the FPGA if the working clock of the FPGA is stable, or send the configuration information to the FPGA after detecting that the working clock of the FPGA is stable if the working clock of the FPGA is not stable. The FPGA is configured to store the configuration information and run according to the configuration information.

6. A method of parameter configuration, characterized by, The method applied to the DDR comprises the following steps: receiving a target storage position sent by an MCU; wherein the target storage position is a target storage position corresponding to a target mode acquired by the MCU according to a pre-stored correspondence between modes and storage positions after receiving a mode switching request carrying the target mode; wherein the MCU receives the mode switching request carrying the target mode corresponding to an external key being clicked if the external key is clicked; and an interface of the DDR is a high-speed parallel interface; reading a target parameter of the target storage position and sending the target parameter to an FPGA; after the step of receiving the target storage position sent by the MCU, the method further comprises the following steps: receiving a parameter acquisition instruction sent by the FPGA and executing a subsequent step of reading the target parameter of the target storage position; wherein the FPGA judges whether a current position is in a blanking interval of a frame signal after receiving a mode switching request sent by the MCU, and sends a parameter acquisition instruction to the DDR if the current position is in the blanking interval of the frame signal, or sends the parameter acquisition instruction to the DDR in a blanking interval of a next frame signal if the current position is not in the blanking interval of the frame signal.

7. A method of parameter configuration, characterized by, The method applied to the MCU comprises the following steps: receiving a mode switching request carrying a target mode and acquiring a target storage position corresponding to the target mode according to a pre-stored correspondence between modes and storage positions; wherein the MCU receives the mode switching request carrying the target mode corresponding to an external key being clicked if the external key is clicked; sending the target storage position to a DDR to enable the DDR to read a target parameter of the target storage position and send the target parameter to an FPGA; and an interface of the DDR is a high-speed parallel interface; the method further comprises the following steps: sending a mode switching request to the FPGA to enable the FPGA to judge whether a current position is in a blanking interval of a frame signal, and sending a parameter acquisition instruction to the DDR if the current position is in the blanking interval of the frame signal, or sending the parameter acquisition instruction to the DDR in a blanking interval of a next frame signal if the current position is not in the blanking interval of the frame signal; and the DDR is configured to execute a subsequent step of reading the target parameter of the target storage position after receiving the parameter acquisition instruction.

8. A reference monitor, characterized in that, The reference monitor comprises the parameter configuration system according to any one of claims 1-5.

9. A computer-readable storage medium, characterized in that, The computer program is stored in the computer readable medium and is executed by the processor to implement the steps of the parameter configuration method according to any one of claims 6-7.

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