Display panel and manufacturing method thereof, and display device

Abstract

Embodiments of the present application provide a display panel, a method for manufacturing the same, and a display device. The display panel includes a first display area and a second display area, wherein the first display area reuses the photosensitive component area. The first display area and the second display area each include a pixel circuit, wherein the pixel circuit includes multiple transistors, each transistor including an active structure and multiple electrodes. An insulating layer is provided between the active structure and the electrodes in a direction perpendicular to the plane of the display panel, and a first via hole is provided in the insulating layer that penetrates the insulating layer. The first via hole at least partially overlaps the active structure in a direction perpendicular to the plane of the display panel. The overlapping area between the first via hole in the first display area and the active structure in the first display area is greater than the overlapping area between the first via hole in the second display area and the active structure in the second display area. Embodiments of the present application can improve the black cluster phenomenon in the photosensitive component area.

Description

Technical Field

[0001] The present application belongs to the field of display technology, and in particular relates to a display panel and a manufacturing method thereof, and a display device. Background Art

[0002] With the development of technology, display devices are no longer limited to display functions. For example, they can also have functions such as photography and fingerprint recognition. To enable display devices to have such functions, a light-sensing component area is usually set on the display screen of the display device, and then functional devices such as an under-screen camera (CUP) or fingerprint recognition sensor are installed below the light-sensing component area.

[0003] However, the inventors of the present application discovered that after a reliability (RA) test, a dark mass phenomenon with dim brightness may appear in the light sensing component area of the display screen. Summary of the Invention

[0004] The embodiments of the present application provide a display panel and a method for manufacturing the same, as well as a display device, which can improve the black cluster phenomenon in the photosensitive component area.

[0005] In a first aspect, an embodiment of the present application provides a display panel, which includes a first display area and a second display area, the first display area multiplexing a photosensitive component area; the first display area and the second display area both include pixel circuits, the pixel circuits include multiple transistors, and the transistors include active structures and multiple electrodes: along a direction perpendicular to the plane where the display panel is located, an insulating layer is arranged between the active structure and the electrode, and a first via hole penetrating the insulating layer is opened on the insulating layer; along a direction perpendicular to the plane where the display panel is located, the first via hole and the active structure at least partially overlap; wherein, an overlapping area between the first via hole in the first display area and the active structure in the first display area is greater than an overlapping area between the first via hole in the second display area and the active structure in the second display area.

[0006] In a second aspect, an embodiment of the present application provides a display device, which includes the display panel provided in the first aspect.

[0007] In a third aspect, an embodiment of the present application provides a method for preparing a display panel, wherein the display panel includes a first display area and a second display area, the first display area multiplexing a photosensitive component area, the first display area and the second display area include pixel circuits, the pixel circuits include multiple transistors, and the transistors include active structures and multiple electrodes. The preparation method includes: providing a substrate; forming an active structure on one side of the substrate; forming an insulating layer on a side of the active structure facing away from the substrate, and opening a first via hole penetrating the insulating layer on the insulating layer, wherein the first via hole and the active structure at least partially overlap in a direction perpendicular to the plane of the display panel; wherein an overlapping area between the first via hole in the first display area and the active structure in the first display area is greater than an overlapping area between the first via hole in the second display area and the active structure in the second display area.

[0008] In the display panel, preparation method thereof, and display device of the embodiment of the present application, since the overlapping area between the first via hole and the active structure in the first display area is greater than the overlapping area between the first via hole and the active structure in the second display area, the amount of hydrogen ion volatilization on the active structure of the transistor in the first display area is greater than the amount of hydrogen ion volatilization on the active structure of the transistor in the second display area, so that the threshold offset of the transistor in the first display area is more negative than the threshold offset of the transistor in the second display area, that is, the transistor can be turned off more completely when turned off, thereby reducing the leakage current of the transistor in the first display area, ensuring that the first display area has a higher brightness, and improving the black cluster phenomenon in the first display area (i.e., the photosensitive component area). In addition, by changing the characteristics of the driving transistor in the photosensitive component area, the current flowing through the driving transistor in the photosensitive component area can be made larger, thereby also improving the brightness of the first display area and improving the black cluster phenomenon in the first display area (i.e., the photosensitive component area). BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0010] Figure 1 is a schematic cross-sectional view of the display device at the light sensing component area;

[0011] Figure 2 A schematic top view of a display panel provided in an embodiment of the present application;

[0012] Figure 3 A schematic cross-sectional view of a display panel provided in an embodiment of the present application;

[0013] Figure 4 A circuit diagram of a 7T1C pixel circuit;

[0014] Figure 5 Another schematic top view of a display panel provided in an embodiment of the present application;

[0015] Figure 6 Another schematic top view of a display panel provided in an embodiment of the present application;

[0016] Figure 7 Another cross-sectional schematic diagram of a display panel provided in an embodiment of the present application;

[0017] Figure 8 Another schematic top view of a display panel provided in an embodiment of the present application;

[0018] Figure 9 A schematic cross-sectional view of another embodiment of the display panel provided in the present application;

[0019] Figure 10 A schematic cross-sectional view of another embodiment of the display panel provided in the present application;

[0020] Figure 11 A schematic top view of a display device provided in an embodiment of the present application;

[0021] Figure 12 A schematic cross-sectional view of a display device provided in an embodiment of the present application;

[0022] Figure 13 Another cross-sectional schematic diagram of a display device provided in an embodiment of the present application;

[0023] Figure 14 A schematic flow chart of a method for manufacturing a display panel provided in an embodiment of the present application. DETAILED DESCRIPTION

[0024] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is merely to provide a better understanding of the present application by illustrating the examples of the present application.

[0025] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, the elements defined by the phrase "comprising..." do not exclude the presence of other identical elements in the process, method, article, or device comprising the elements.

[0026] It should be understood that the term "and / or" as used herein is merely a description of the relationship between associated objects, indicating that three possible relationships exist. For example, "A and / or B" can represent: A exists alone, A and B exist simultaneously, or B exists alone. Furthermore, the character " / " in this document generally indicates that the associated objects are in an "or" relationship.

[0027] It should be noted that the transistors in the embodiments of the present application are described using P-type transistors as an example, but are not limited to P-type transistors and can also be replaced by N-type transistors. For N-type transistors, the on-level is a high level and the off-level is a low level. That is, when the gate of the N-type transistor is at a high level, the first and second poles thereof are connected, and when the gate of the N-type transistor is at a low level, the first and second poles thereof are disconnected. For P-type transistors, the on-level is a low level and the off-level is a high level. That is, when the control terminal of the P-type transistor is at a low level, the first and second poles thereof are connected, and when the control terminal of the P-type transistor is at a high level, the first and second poles thereof are disconnected. In a specific implementation, the gate of each of the above-mentioned transistors serves as its control electrode, and, depending on the signal of the gate of each transistor and its type, its first electrode can be used as the source and the second electrode as the drain, or its first electrode can be used as the drain and the second electrode as the source, without making any distinction here. In addition, the on-level and off-level in the embodiments of the present invention are both general terms, the on-level refers to any level that can turn on the transistor, and the off-level refers to any level that can turn off / off the transistor.

[0028] In the embodiments of the present application, the term “electrically connected” may refer to a direct electrical connection between two components, or may refer to an electrical connection between two components via one or more other components.

[0029] In the embodiment of the present application, the first node and the second node are only defined for the convenience of describing the circuit structure, and the first node and the second node are not actual circuit units.

[0030] It will be apparent to those skilled in the art that various modifications and variations can be made in this application without departing from the spirit or scope of this application. Therefore, this application is intended to cover modifications and variations of this application that fall within the scope of the corresponding claims (technical solutions claimed for protection) and their equivalents. It should be noted that the embodiments provided in the examples of this application can be combined with each other without contradiction.

[0031] Before describing the technical solutions provided by the embodiments of the present application, in order to facilitate understanding of the embodiments of the present application, the present application first specifically describes the problems existing in the related art:

[0032] As mentioned above, the inventors of the present application have discovered that in the related art, after a reliability (RA) test, a dark mass phenomenon with dim brightness may appear in the light sensing component area of the display screen.

[0033] In order to solve the above technical problems, the inventors of this application first studied and analyzed the root causes of the above technical problems. The specific research and analysis process is as follows:

[0034] Figure 1 Schematic diagram of the cross section of the display device at the light sensing component area. Figure 1 As shown, the display device 10' may include a display panel 101', a backlight layer 102' and a light sensing component 103'. The backlight layer 102' is located on the backlight side of the display panel 101', and the backlight layer 102' includes, for example, but not limited to, components such as foam and / or a flexible printed circuit (FPC). In order to allow light to pass through smoothly, the display device has a through hole K that penetrates the backlight layer 102' in the light sensing component area. The light sensing component 103' is located in the light sensing component area, and the light sensing component 103' includes, for example, but not limited to functional components such as a camera or a fingerprint recognition sensor. Light passes through the through hole K into the light sensing component 103' located on the side of the backlight layer 102' away from the display panel 101', thereby realizing a photo taking function or a fingerprint recognition function.

[0035] The inventors of this application discovered that after the RA test, a dark mass phenomenon with dim brightness will appear in the light-sensing component area of the display screen. After the inventors of this application put in creative work, they finally discovered the cause of the above-mentioned black mass phenomenon. The main reason is that the RA test is carried out under high temperature, high humidity and light environment, and since the module structure of the light-sensing component area is different from the module structure of other areas (such as the normal display area), for example, the display device has a through hole K that penetrates the backlight layer 102' in the light-sensing component area (that is, the light-sensing component area is not covered with the backlight layer 102'), while other areas are covered with the backlight layer 102', so in a high temperature environment, the heating condition of the light-sensing component area will be different from the heating condition of other areas; in a light environment, the light intensity of the light-sensing component area will be different from the light intensity of other areas. This results in differences in the characteristics of the transistors in the photosensitive component area compared to those in other areas. For example, the threshold offset of the transistors in the photosensitive component area is more positive, meaning that the leakage current of the transistors in the photosensitive component area is more severe. Charges from other nodes or residual charges in the transistors are transferred through the transistors to the gate (i.e., the first node) of the driver transistor, significantly increasing the potential of the first node in the photosensitive component area. This results in the brightness of the photosensitive component area being lower than that of other areas, resulting in a black mass phenomenon. Furthermore, the characteristics of the driver transistors in the photosensitive component area differ from those in other areas. Under the same voltage, the current flowing through the driver transistors in the photosensitive component area is smaller than that in other areas, which in turn causes the brightness of the photosensitive component area to be lower than that of other areas.

[0036] In view of the above research findings of the inventors, the embodiments of the present application provide a display panel and a method for manufacturing the same, as well as a display device, which can solve the technical problem of the black mass phenomenon appearing in the photosensitive component area existing in the related art.

[0037] The technical concept of the embodiment of the present application is that: in both the first display area (light sensing component area) and the second display area, a first via hole penetrating the insulating layer is opened on the insulating layer covering the active structure of the transistor, and the first via hole and the active structure at least partially overlap in a direction perpendicular to the plane of the display panel. The overlapping area of the first via hole and the active structure in the first display area is greater than the overlapping area of the first via hole and the active structure in the second display area. Since the overlapping area of the first via hole and the active structure in the first display area is greater than the overlapping area of the first via hole and the active structure in the second display area, the amount of hydrogen ion volatilization on the active structure of the transistor in the first display area is greater than the amount of hydrogen ion volatilization on the active structure of the transistor in the second display area, so that the threshold offset of the transistor in the first display area is more negative than the threshold offset of the transistor in the second display area, that is, the transistor can be turned off more completely when it is turned off, thereby reducing the leakage current of the transistor in the first display area, ensuring that the first display area has a higher brightness, and improving the black cluster phenomenon in the first display area (i.e., the light sensing component area). In addition, by changing the characteristics of the driving transistor in the light sensing component area, the current flowing through the driving transistor in the light sensing component area can be increased, thereby also improving the brightness of the first display area and improving the black mass phenomenon in the first display area (i.e., the light sensing component area).

[0038] The following first introduces the display panel provided in the embodiment of the present application.

[0039] Figure 2 A schematic top view of a display panel provided in an embodiment of the present application. Figure 3 A cross-sectional schematic diagram of a display panel provided in an embodiment of the present application. Figure 2 and Figure 3 As shown, the display panel 20 provided in the embodiment of the present application may include a first display area A1 and a second display area A2. The first display area A1 may reuse the light sensing component area G. Exemplarily, the light sensing component area G may be provided with functional devices such as an under-screen camera and / or a fingerprint recognition sensor. Depending on the different functional devices provided, the light sensing component area G may be specifically divided into an under-screen camera (Camera under Panel, CUP) area and an under-screen fingerprint recognition technology (finger print on display, FOD) area. The CUP area may be provided with an under-screen camera, and the FOD area may be provided with a fingerprint recognition sensor.

[0040] according to Figure 2 In terms of the direction of the display panel shown, for example, the CUP area can be specifically the upper light sensing component area G, and the FOD area can be specifically the lower light sensing component area G. Of course, the positions and numbers of the CUP area, FOD area, and light sensing component area G can be flexibly adjusted according to actual conditions, and the embodiments of the present application are not limited thereto.

[0041] In an embodiment of the present application, the first display area A1 reuses the light-sensing component area G, that is, the first display area A1 can both display and set an under-screen camera or fingerprint recognition sensor, thereby realizing a "full screen" and increasing the screen-to-body ratio of the display panel.

[0042] It is easy to understand that the first display area A1 and the second display area A2 may include pixel circuits (not shown in the figure), such as a 2T1C pixel circuit, a 7T1C pixel circuit, a 7T2C pixel circuit, or an 8T1C pixel circuit. As the names suggest, a 2T1C pixel circuit is a pixel circuit including two thin film transistors (TFTs) and one capacitor, a 7T1C pixel circuit is a pixel circuit including seven thin film transistors (TFTs) and one capacitor, a 7T2C pixel circuit is a pixel circuit including seven thin film transistors (TFTs) and two capacitors, and so on.

[0043] Accordingly, both the first display area A1 and the second display area A2 may be provided with a light-emitting element electrically connected to a pixel circuit, and the pixel circuit is used to drive the light-emitting element to emit light, so that both the first display area A1 and the second display area A2 can realize a display function. Exemplarily, the light-emitting element includes but is not limited to an organic light-emitting diode (OLED).

[0044] The pixel circuit may include a plurality of transistors. Figure 3 As shown, the transistor 300 may include an active structure 301 and a plurality of electrodes 302. The active structure 301 may, for example, include a source region and a drain region formed by doping N-type impurity ions or P-type impurity ions, and a channel region formed between the source region and the drain region. The plurality of electrodes 302 may, for example, include a gate g, a source s, and a drain d. Along a direction Z perpendicular to the plane where the display panel is located, an insulating layer 303 is provided between the active structure 301 and the electrode 302, and a first via hole k1 penetrating the insulating layer 303 is provided on the insulating layer 303. As shown in FIG. Figure 3 As shown, in some examples, the insulating layer 303 can specifically be an insulating layer between the active structure 301 and the source electrode s (or drain electrode d). However, in other examples, the insulating layer 303 can also be simply an insulating layer between the active structure 301 and the gate electrode g. Along a direction Z perpendicular to the plane of the display panel, the first via hole k1 at least partially overlaps the active structure 301, that is, the first via hole k1 contacts the active structure 301.

[0045] The active structure 301 requires a hydrogenation process, so hydrogen ions will be present on the active structure 301. The number or concentration of hydrogen ions will affect the characteristics of the transistor where the active structure 301 is located, such as affecting the threshold shift or mobility of the transistor. For example, when the number or concentration of hydrogen ions is large, the threshold shift of the transistor will be more positive, and the mobility of the transistor will be greater. When the number or concentration of hydrogen ions is small, the threshold shift of the transistor will be more negative, and the mobility of the transistor will be smaller. Therefore, when the number or concentration of hydrogen ions on the active structure 301 is different, the characteristics of the transistor where the active structure 301 is located will be different.

[0046] In the embodiment of the present application, the overlapping area between the first via hole k1 in the first display area A1 and the active structure 301 in the first display area A1 is larger than the overlapping area between the first via hole k1 in the second display area A2 and the active structure 301 in the second display area A2.

[0047] Hydrogen ions on the active structure 301 volatilize through the first via k1 in the insulating layer 303. Because the overlapping area between the first via and the active structure in the first display area is greater than the overlapping area between the first via and the active structure in the second display area, the amount of hydrogen ions volatilized from the active structure of the transistor in the first display area is greater than that of the active structure of the transistor in the second display area. This results in the number or concentration of hydrogen ions on the active structure in the first display area being less than that in the second display area. The threshold shift of the transistor in the first display area is more negative than that of the transistor in the second display area, meaning that the transistor can be turned off more completely when turned off, thereby reducing the leakage current of the transistor in the first display area, ensuring higher brightness in the first display area, and improving the black spot phenomenon in the first display area (i.e., the light sensing component area). Furthermore, by changing the characteristics of the drive transistor in the light sensing component area, the current flowing through the drive transistor in the light sensing component area can be increased, thereby improving the brightness of the first display area and improving the black spot phenomenon in the first display area (i.e., the light sensing component area).

[0048] For ease of understanding, the following description is given in conjunction with a 7T1C pixel circuit.

[0049] Figure 4 Figure 1 is a circuit diagram of a 7T1C pixel circuit. Figure 4 As shown, the pixel circuit may include: a driving transistor M1, a data writing transistor M2, a threshold compensation transistor M3, a first reset transistor M4, a second reset transistor M5, a first light emission control transistor M6, a second light emission control transistor M7 and a storage capacitor Cst.

[0050] A gate of the driving transistor M1 is electrically connected to the first node N1 , a first electrode of the driving transistor M1 is electrically connected to the second node N2 , and the driving transistor M1 is configured to provide a driving current to the light emitting element D.

[0051] The gate of the data write transistor M2 is electrically connected to the second scan signal line S2, the first electrode of the data write transistor M2 is electrically connected to the data signal line data, and the second electrode of the data write transistor M2 is electrically connected to the second node N2, for writing the data signal of the data signal line data into the second node N2.

[0052] The threshold compensation transistor M3 can be a dual-gate transistor, the gate of the threshold compensation transistor M3 is electrically connected to the second scan signal line S2, the first electrode of the threshold compensation transistor M3 is electrically connected to the second electrode of the driving transistor M1, and the second electrode of the threshold compensation transistor M3 is electrically connected to the first node N1, and is used to cooperate with the data writing transistor M2 to realize threshold voltage compensation of the driving transistor M1.

[0053] The first reset transistor M4 can be a dual-gate transistor, the gate of the first reset transistor M4 is electrically connected to the first scan signal line S1, the first electrode of the first reset transistor M4 is electrically connected to the reference voltage signal line Vref, and the second electrode of the first reset transistor M4 is electrically connected to the first node N1. The first reset transistor M4 is used to transmit the reference voltage signal of the reference voltage signal line Vref to the first node N1 to reset the first node N1.

[0054] The gate of the second reset transistor M5 is electrically connected to the first scan signal line S1, the first electrode of the second reset transistor M5 is electrically connected to the reference voltage signal line Vref, and the second electrode of the second reset transistor M5 is electrically connected to the anode of the light-emitting element D. The second reset transistor M5 is used to transmit the reference voltage signal of the reference voltage signal line Vref to the anode of the light-emitting element D to reset the anode of the light-emitting element D.

[0055] A gate of the first emission control transistor M6 is electrically connected to the emission control signal line EM, a first electrode of the first emission control transistor M6 is electrically connected to the first power supply voltage signal line PVDD, and a second electrode of the first emission control transistor M6 is electrically connected to the second node N2.

[0056] The gate of the second light emitting control transistor M7 is electrically connected to the light emitting control signal line EM, the first electrode of the second light emitting control transistor M7 is electrically connected to the second electrode of the driving transistor M1, and the second electrode of the second light emitting control transistor M7 is electrically connected to the anode of the light emitting element D.

[0057] A first plate of the storage capacitor Cst is electrically connected to the first power voltage signal line PVDD, and a second plate of the storage capacitor Cst is electrically connected to the first node N1 for maintaining the potential of the first node N1.

[0058] The cathode of the light emitting element D is also electrically connected to the second power supply voltage signal line PVEE.

[0059] The inventors of this application discovered that due to the environmental differences between the photosensitive component area and other areas during the RA test, the characteristics of the transistors in the photosensitive component area differ from those in other areas. For example, the threshold offset of the transistors in the photosensitive component area is more positive, meaning that the leakage current of the transistors in the photosensitive component area is more severe. For example, during the light-emitting phase, the residual charge in the threshold compensation transistor M3 is transferred to the gate of the drive transistor M1 (i.e., the first node N1), which significantly increases the potential of the first node N1 in the photosensitive component area, causing the brightness of the photosensitive component area to be lower than that of other areas, resulting in a black spot phenomenon. In addition, the characteristics of the drive transistor M1 in the photosensitive component area differ from those of the drive transistor M1 in other areas. At the same voltage, the drive transistor M1 in the photosensitive component area flows less current than the drive transistor M1 in other areas, which in turn causes the brightness of the photosensitive component area to be lower than that of other areas.

[0060] In some specific embodiments, for example, in the first display area A1, the size of the first via k1 corresponding to the active structure of the threshold compensation transistor M3 and the active structure of the drive transistor M1 can be larger than the size of the first via k1 corresponding to the active structure of other transistors (such as the data write transistor M2, the first reset transistor M4, or the second reset transistor M5). In this way, the number or concentration of hydrogen ions on the active structures of the threshold compensation transistor M3 and the drive transistor M1 can be significantly reduced, thereby improving the black cluster phenomenon in the first display area (i.e., the light sensing component area).

[0061] In some specific embodiments, for example, in the first display area A1, the number of first vias k1 corresponding to the active structure of the threshold compensation transistor M3 and the active structure of the drive transistor M1 can be greater than the number of first vias k1 corresponding to the active structures of other transistors (such as the data write transistor M2, the first reset transistor M4, or the second reset transistor M5). In this way, the number or concentration of hydrogen ions on the active structures of the threshold compensation transistor M3 and the drive transistor M1 can be significantly reduced, thereby improving the black cluster phenomenon in the first display area (i.e., the light sensing component area).

[0062] In some specific embodiments, optionally, in the first display area A1 , the first via k1 may be opened only in the region corresponding to the active structure of the threshold compensation transistor M3 and the region corresponding to the active structure of the driving transistor M1 , but the embodiments of the present application are not limited thereto.

[0063] Figure 5 This is a schematic top view of a display panel provided in an embodiment of the present application. Figure 5 As shown, according to some embodiments of the present application, optionally, the size of the first via hole k1 in the first display area A1 may be larger than the size of the first via hole k1 in the second display area.

[0064] Because the size of the first via k1 in the first display area A1 is larger than the size of the first via k1 in the second display area, when the overlap ratio between the first via k1 in the first display area A1 and the active structure is the same as or similar to the overlap ratio between the first via k1 in the second display area A2 and the active structure, the overlap area between the first via k1 in the first display area A1 and the active structure will be larger than the overlap area between the first via k1 in the second display area A2. In this way, the transistors in the first display area can be turned off more completely when turned off, reducing the leakage current of the transistors in the first display area, ensuring a higher brightness in the first display area, and improving the black cluster phenomenon in the first display area (i.e., the light sensing component area). In addition, by changing the characteristics of the driving transistor in the light sensing component area, the current flowing through the driving transistor in the light sensing component area can be increased, thereby also improving the brightness of the first display area and improving the black cluster phenomenon in the first display area (i.e., the light sensing component area).

[0065] It should be noted that the shape of the first via hole k1 can be circular, elliptical, rectangular, triangular, or other polygonal, and this embodiment of the present application does not limit this. In addition, the shape of the first via hole k1 in the first display area A1 and the shape of the first via hole k1 in the second display area A2 can be the same or different, and this embodiment of the present application does not limit this.

[0066] Figure 6 A schematic top view of a display panel provided in an embodiment of the present application. Figure 7 A cross-sectional schematic diagram of a display panel provided in an embodiment of the present application. Figure 6 and Figure 7 As shown, Figure 5Unlike the illustrated embodiment, according to other embodiments of the present application, the size of the first via k1 in the first display area A1 and the size of the first via k1 in the second display area A2 can optionally be the same. Furthermore, the overlap ratio between the first via k1 in the first display area A1 and the active structure 301 can be greater than the overlap ratio between the first via k1 in the second display area A2 and the active structure 301. For example, along a direction Z perpendicular to the plane of the display panel, the first via k1 in the first display area A1 and the active structure 301 in the first display area A1 can completely overlap, while the first via k1 in the second display area A2 and the active structure 301 in the second display area A2 can only partially overlap, with the remaining portion not overlapping.

[0067] In this way, although the size of the first via k1 in the first display area A1 is the same as the size of the first via k1 in the second display area A2, because the overlap ratio between the first via k1 in the first display area A1 and the active structure 301 is greater than the overlap ratio between the first via k1 in the second display area A2 and the active structure 301, the overlap area between the first via k1 in the first display area A1 and the active structure is greater than the overlap area between the first via k1 in the second display area A2. In this way, the transistors in the first display area can be turned off more completely when turned off, reducing the leakage current of the transistors in the first display area, ensuring a higher brightness in the first display area, and improving the black cluster phenomenon in the first display area (i.e., the light sensing component area). In addition, by changing the characteristics of the driving transistor in the light sensing component area, the current flowing through the driving transistor in the light sensing component area can be increased, thereby also improving the brightness of the first display area and improving the black cluster phenomenon in the first display area (i.e., the light sensing component area).

[0068] Further research by the inventors of this application has revealed that if the overlapping area between the first via k1 and the active structure in the first display area A1 differs significantly from the overlapping area between the first via k1 and the active structure in the second display area A2, the characteristics of the transistors in the first display area A1 and the second display area A2 may differ significantly, and a sudden change in the characteristics of the transistors may occur at the junction of the first display area A1 and the second display area A2. In view of this discovery, and to avoid the problem of sudden changes in the characteristics of the transistors, the inventors of this application have considered making the overlapping area between the first via k1 and the active structure transition evenly from the first display area A1 to the edge of the display panel, thereby achieving a uniform transition in the characteristics of the transistors and avoiding the problem of sudden changes in the characteristics of the transistors.

[0069] Figure 8 This is another schematic top view of the display panel provided in the embodiment of the present application. Figure 8As shown, according to some embodiments of the present application, optionally, the second display area A2 may include N sub-display areas A21 to A2n, the first sub-display area A21 surrounds the first display area A1, the i+1th sub-display area A2 i+1 Around the i-th sub-display area A2 i , N is an integer greater than 1, and i is an integer greater than or equal to 1. For example, the second sub display area A22 surrounds the first sub display area A21, the third sub display area A23 surrounds the second sub display area A22, and so on.

[0070] The overlapping area between the first via hole k1 in the first sub-display area A21 and the active structure in the first sub-display area A21 is smaller than the overlapping area between the first via hole k1 in the first display area A1 and the active structure in the first display area A1. i+1 The first via hole k1 in the (i+1) sub-display area A2 i+1 The overlapping area of the active structure in the i-th sub-display area A2 is smaller than i The first via hole k1 in the ith sub-display area A2 i For example, the overlapping area between the first via k1 in the second sub-display area A22 and the active structure in the second sub-display area A22 is smaller than the overlapping area between the first via k1 in the first sub-display area A21 and the active structure in the first sub-display area A21, the overlapping area between the first via k1 in the third sub-display area A23 and the active structure in the third sub-display area A23 is smaller than the overlapping area between the first via k1 in the second sub-display area A22 and the active structure in the second sub-display area A22, and so on.

[0071] It should be noted that, in some specific examples, for example, N can be equal to 2, 3 or other values greater than 3, and the embodiments of the present application are not limited to this.

[0072] In this way, the first display area A1 points to the Nth sub-display area A2 n In the direction of the first via k1, the overlapping area of the active structure is uniformly transitioned, so that the characteristics of the transistors in each area are uniformly transitioned, avoiding the problem of sudden change in the characteristics of the transistors and ensuring the display quality of the display panel.

[0073] Continue to see Figure 8 In some specific examples, optionally, the size of the first via hole k1 in the 1st sub-display area A21 is smaller than the size of the first via hole k1 in the first display area A1, and the size of the first via hole k1 in the i+1th sub-display area A2 i+1 The size of the first via hole k1 in the i-th sub-display area A2 is smaller than that of the i-th sub-display area A2. iFor example, the size of the first via hole k1 in the second sub-display area A22 is smaller than the size of the first via hole k1 in the first sub-display area A21, and the size of the first via hole k1 in the third sub-display area A23 is smaller than the size of the first via hole k1 in the second sub-display area A22.

[0074] In this way, the first display area A1 points to the Nth sub-display area A2 n In the direction of the first through hole k1, the size of the first via hole k1 transitions evenly (gradually becomes smaller), so that the characteristics of the transistors in each area transition evenly, avoiding the problem of sudden change in the characteristics of the transistors and ensuring the display quality of the display panel.

[0075] According to some embodiments of the present application, optionally, the density of the first via holes k1 in the first display area A1 may be the same as the density of the first via holes k1 in the second display area A2.

[0076] That is, if the overlapping area between the first vias k1 and the active structure in the first display area A1 is greater than the overlapping area between the first vias k1 and the active structure in the second display area A2, the density of the first vias k1 in the first display area A1 can be the same as the density of the first vias k1 in the second display area A2, or even lower than the density of the first vias k1 in the first display area A1. This ensures that the amount of hydrogen ion volatilization from the active structure of the transistors in the first display area is greater than that from the active structure of the transistors in the second display area, thereby reducing the leakage current of the transistors in the first display area, ensuring higher brightness in the first display area, and improving the black cluster phenomenon in the first display area.

[0077] According to some other embodiments of the present application, optionally, the density of the first via holes k1 in the first display area A1 may be greater than the density of the first via holes k1 in the second display area A2.

[0078] That is, when the overlapping area between the first via k1 and the active structure in the first display area A1 is greater than the overlapping area between the first via k1 and the active structure in the second display area A2, the density of the first via k1 in the first display area A1 can be greater than the density of the first via k1 in the second display area A2, thereby further increasing the amount of hydrogen ion volatilization on the active structure of the transistor in the first display area, further reducing the leakage current of the transistor in the first display area, ensuring that the first display area has a higher brightness, and improving the black cluster phenomenon in the first display area.

[0079] Figure 9 This is another cross-sectional schematic diagram of a display panel provided in an embodiment of the present application. Figure 9As shown, according to some embodiments of the present application, optionally, the transistor 300 may include a gate g, a first electrode 901 and a second electrode 902. The first electrode 901 may be a source electrode, and the second electrode 902 may be a drain electrode. Alternatively, the first electrode 901 may be a drain electrode, and the second electrode 902 may be a source electrode. The pixel circuit may further include a capacitor C1, and the capacitor C1 may include a first plate 903 and a second plate 904. Along a direction Z perpendicular to the plane where the display panel is located, the first plate 903 and the second plate 904 are insulated and overlap with each other, thereby forming a capacitor C1. It should be noted that, in some specific embodiments, the first plate 903 may reuse the gate g of the transistor 300, such as the gate g of the driving transistor in the multiplexing pixel circuit, and the embodiments of the present application are not limited to this.

[0080] Optionally, along a direction Z perpendicular to the plane of the display panel, the insulating layer 303 may include a first insulating layer GI located between the active structure 301 and the gate g, a second insulating layer IMD located between the gate g and the second plate 904 of the capacitor C1, and a third insulating layer ILD located between the second plate 904 of the capacitor C1 and the first electrode 901. The first insulating layer GI may include an inorganic layer such as silicon oxide or silicon nitride, and may include a single layer or multiple layers. Similarly, the second insulating layer IMD may include an inorganic layer such as silicon oxide or silicon nitride, and may include a single layer or multiple layers. The third insulating layer ILD may include an inorganic material or an organic material. The inorganic material may include at least one selected from silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, tin oxide, cerium oxide, and silicon oxynitride. The organic material may include at least one selected from acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, urethane resin, cellulose resin, and perylene resin.

[0081] Accordingly, the first via k1 may include a first sub-via k11 located in the first insulating layer GI, a second sub-via k12 located in the second insulating layer IMD, and a third sub-via k13 located in the third insulating layer ILD. Along the direction Z perpendicular to the plane of the display panel, the first sub-via k11, the second sub-via k12, and the third sub-via k13 at least partially overlap. It is easy to understand that the first sub-via k11 can pass through the first insulating layer GI, the second sub-via k12 can pass through the second insulating layer IMD, and the third sub-via k13 can pass through the third insulating layer ILD. In some examples, the first sub-via k11, the second sub-via k12, and the third sub-via k13 at least partially overlap, and specifically, the first sub-via k11, the second sub-via k12, and the third sub-via k13 can completely overlap. In some other examples, the first sub-via k11 , the second sub-via k12 , and the third sub-via k13 at least partially overlap, or the first sub-via k11 , the second sub-via k12 , and the third sub-via k13 partially overlap.

[0082] In this way, since the first via hole k1 passes through the first insulating layer GI, the second insulating layer IMD and the third insulating layer ILD at the same time, shielding of the first via hole k1 by the insulating layer can be reduced, which is beneficial to the volatilization of hydrogen ions on the active structure.

[0083] It should be noted that, in some other embodiments, the first via hole k1 may include only the first sub-via hole k11 located in the first insulating layer GI, that is, the first via hole k1 is only opened on the first insulating layer GI. In some other embodiments, the first via hole k1 may also include only the first sub-via hole k11 located in the first insulating layer GI and the second sub-via hole k12 located in the second insulating layer IMD, that is, forming a first via hole k1 that penetrates the first insulating layer GI and the second insulating layer IMD.

[0084] Figure 10 This is another cross-sectional schematic diagram of a display panel provided in an embodiment of the present application. Figure 10 As shown, according to some embodiments of the present application, optionally, the display panel may further include a planarization layer PLN, and the planarization layer PLN is located on the side of the third insulating layer ILD away from the substrate 01. The first via k1 may include a first sub-via k11, a second sub-via k12, a third sub-via k13 and a fourth sub-via k14 located on the planarization layer PLN. In the case where the first via k1 simultaneously passes through the first insulating layer GI, the second insulating layer IMD, the third insulating layer ILD and the planarization layer PLN, the anode via of the light-emitting element may reuse the first via k1. Combined Figure 4 and Figure 10As shown, for example, the second electrode of the second emission control transistor M7 is electrically connected to the anode RE of the light-emitting element via an anode via. First, a first sub-via k11 can be formed in the first insulating layer GI and a second sub-via k12 can be formed in the second insulating layer IMD. Hydrogen ions on the active structure are volatilized through the first and second sub-vias k11 and k12. After a period of volatilization, the first and second sub-vias k11 and k12 are filled with metal to form the second electrode of the second emission control transistor M7. Next, a third sub-via k13 is formed in the third insulating layer ILD and a fourth sub-via k14 is formed in the planarization layer PLN. Metal is then filled in the third and fourth sub-vias k13 and k14 to connect the second electrode of the second emission control transistor M7 to the anode RE of the light-emitting element.

[0085] In this way, the first via hole k1 is reused by the anode via hole of the light-emitting element, which is beneficial to simplifying the production process and saving the opening or wiring space of the display panel.

[0086] It should be noted that, in some embodiments, the second electrode of the second light-emitting control transistor M7 and the anode of the light-emitting element can be electrically connected through multiple first vias k1, thereby improving the stability of the connection between the second electrode of the second light-emitting control transistor M7 and the anode of the light-emitting element. This embodiment of the present application is not limited to this.

[0087] Continue to see Figure 9 In some specific embodiments, the active structure 301 may optionally include a channel region 905, a source region 906, and a drain region 907. The source region 906 is the source region mentioned above, and the drain region 907 is the drain region mentioned above.

[0088] Along a direction Z perpendicular to the plane of the display panel, the gate g of the transistor at least partially overlaps with the channel region 905, and the first via k1 at least partially overlaps with at least one of the source region 906 and the drain region 907. That is, the first via k1 may specifically contact the source region 906 in the active structure, the drain region 907 in the active structure, or both the source region 906 and the drain region 907 in the active structure, thereby allowing hydrogen ions on the active structure to volatilize through the first via k1.

[0089] Based on the display panel provided in the above embodiment, the present application also provides a display device, including the display panel 20 provided in the present application. Figure 11 , Figure 11 A schematic top view of a display device provided in an embodiment of the present application. Figure 11 The provided display device 1000 includes the display panel 20 provided by any of the above embodiments of the present application. Figure 11In the embodiment, a mobile phone is used as an example to illustrate the display device 1000. It is understood that the display device provided in the embodiment of the present application can be a wearable product, a computer, a television, an in-vehicle display device, or other display device with a display function, and the present application does not impose specific limitations on this. The display device provided in the embodiment of the present application has the beneficial effects of the display panel provided in the embodiment of the present application. For details, please refer to the specific description of the display panel in the above embodiments, and this embodiment will not be repeated here.

[0090] In some specific embodiments, optionally, the display device 1000 includes but is not limited to an OLED display device.

[0091] Figure 12 This is a cross-sectional schematic diagram of a display device provided in an embodiment of the present application. Figure 12 As shown, according to some embodiments of the present application, optionally, the display device 1000 may further include a first protective film 1201, a foam 1202, and a light sensing component 1204. The first protective film 1201 may be located on the backlight surface of the display panel 20. The foam 1202 may be located on the side of the first protective film 1201 facing away from the display panel 20. The light sensing component 1204 is located in the first display area A1 and on the side of the foam 1202 facing away from the display panel 20. Exemplarily, the light sensing component 1204 includes but is not limited to functional devices such as an under-screen camera or a fingerprint recognition sensor. The display device 1000 has a through hole T in the first display area A1 that passes through the first protective film 1201 and the foam 1202. Along the direction Z perpendicular to the plane where the display panel is located, the through hole T at least partially overlaps with the light sensing component 1204, so that light can enter the light sensing component 1204 through the through hole T.

[0092] Figure 13 This is another cross-sectional schematic diagram of the display device provided in the embodiment of the present application. Figure 13 As shown, according to some embodiments of the present application, optionally, the display device 1000 may further include a flexible circuit board 1203, and along a direction Z perpendicular to the plane where the display panel is located, the flexible circuit board 1203 is located between the foam 1202 and the light sensing component 1204. The through hole T can penetrate the first protective film 1201, the foam 1202 and the flexible circuit board 1203 at the same time, so that light can enter the light sensing component 1204 through the through hole T. For example, when the light sensing component 1204 is a fingerprint recognition sensor, since the FOD area is usually set at the lower edge of the display panel 20, and the flexible circuit board 1203 needs to be folded to the back of the display panel 20 to overlap with the FOD area, the through hole T needs to penetrate the flexible circuit board 1203 to facilitate light to enter the light sensing component 1204 through the through hole T.

[0093] Based on the display panel provided in the above embodiment, the present application also provides a method for manufacturing the display panel, as shown in the following embodiment.

[0094] In the method for manufacturing a display panel provided in an embodiment of the present application, the display panel includes a first display area and a second display area, the first display area multiplexing a photosensitive component area, the first display area and the second display area including a pixel circuit, the pixel circuit including a plurality of transistors, and the transistor including an active structure and a plurality of electrodes. It should be noted that the structure of the display panel in the method for manufacturing a display panel provided in an embodiment of the present application is the same as the structure of the display panel 20 provided in the above embodiment, and for the sake of brevity, it will not be repeated here.

[0095] Figure 14 A schematic flow chart of a method for manufacturing a display panel provided in an embodiment of the present application. Figure 14 As shown, the method for manufacturing a display panel provided in an embodiment of the present application may include steps S101 to S103.

[0096] S101. Provide a substrate.

[0097] The substrate 01 may be a hard substrate such as a glass substrate, a plastic substrate, a quartz substrate or a sapphire substrate, or may be a flexible substrate such as a polyimide material or a polyethylene terephthalate material, which is not limited in the embodiment of the present application.

[0098] S102 , forming an active structure on one side of the substrate.

[0099] In S102, combined Figure 3 As shown, an active structure 301 is formed on one side of the substrate 01 through a patterning process.

[0100] S103 , forming an insulating layer on a side of the active structure facing away from the substrate, and opening a first via hole penetrating the insulating layer in the insulating layer, wherein the first via hole at least partially overlaps the active structure along a direction perpendicular to the plane of the display panel.

[0101] Combine Figure 3 As shown, an insulating layer 303 is formed on the side of the active structure 301 facing away from the substrate 01, and a first via hole k1 is opened on the insulating layer 303 and penetrates the insulating layer 303. Along the direction Z perpendicular to the plane where the display panel is located, the first via hole k1 at least partially overlaps with the active structure 301.

[0102] The overlapping area between the first via hole in the first display area and the active structure in the first display area is larger than the overlapping area between the first via hole in the second display area and the active structure in the second display area.

[0103] The method for manufacturing the display panel provided in the embodiment of the present application can achieve the same technical effect as the display panel 20 provided in the above embodiment. For the sake of brevity, it will not be described here in detail.

[0104] It should be understood that the specific structures of the pixel circuits and the display panel provided in the drawings of the embodiments of the present application are merely examples and are not intended to limit the present application. In addition, the above embodiments provided in the present application may be combined with each other unless there is any contradiction.

[0105] While the embodiments described above are not exhaustive, they do not limit the present application to the specific embodiments described. Clearly, numerous modifications and variations are possible based on the above description. These embodiments are selected and described in detail in this specification to better explain the principles and practical applications of the present application, thereby enabling those skilled in the art to better utilize the present application and its modifications. The present application is limited only by the claims and their full scope and equivalents.

Claims

1. A display panel, characterized in that: The display panel includes a first display area and a second display area, wherein the first display area multiplexes the light sensing component area; The first display area and the second display area each include a pixel circuit, the pixel circuit includes a plurality of transistors, the transistor includes an active structure and a plurality of electrodes; an insulating layer is provided between the active structure and the electrodes in a direction perpendicular to the plane of the display panel, and a first via hole is provided on the insulating layer and penetrates the insulating layer; Along a direction perpendicular to the plane where the display panel is located, the first via hole at least partially overlaps with the active structure; wherein an overlapping area between the first via hole in the first display area and the active structure in the first display area is greater than an overlapping area between the first via hole in the second display area and the active structure in the second display area; The pixel circuit includes a threshold compensation transistor, a driving transistor and other transistors. In the first display area, the overlapping area between the active structure of the driving transistor and the first via is larger than the overlapping area between the active structure of the other transistors and the first via.

2. The display panel according to claim 1, wherein: A size of the first via hole in the first display area is greater than a size of the first via hole in the second display area.

3. The display panel according to claim 1, wherein: The size of the first via hole in the first display area is the same as the size of the first via hole in the second display area; Along a direction perpendicular to the plane of the display panel, the first via in the first display area completely overlaps with the active structure in the first display area, and the first via in the second display area partially does not overlap with the active structure in the second display area.

4. The display panel according to claim 1, wherein: The second display area includes N sub-display areas, the first sub-display area surrounds the first display area, the (i+1)th sub-display area surrounds the (i)th sub-display area, N is an integer greater than 1, and i is an integer greater than or equal to 1; An overlapping area between the first via in the first sub-display area and the active structure in the first sub-display area is smaller than an overlapping area between the first via in the first display area and the active structure in the first display area, and an overlapping area between the first via in the i+1th sub-display area and the active structure in the i+1th sub-display area is smaller than an overlapping area between the first via in the i-th sub-display area and the active structure in the i-th sub-display area.

5. The display panel according to claim 4, wherein: The size of the first via hole in the first sub-display area is smaller than the size of the first via hole in the first display area; The size of the first via hole in the (i+1)th sub-display area is smaller than the size of the first via hole in the (i)th sub-display area.

6. The display panel according to claim 1, wherein: A density of the first via holes in the first display area is the same as a density of the first via holes in the second display area.

7. The display panel according to claim 1, wherein: A density of the first via holes in the first display area is greater than a density of the first via holes in the second display area.

8. The display panel according to claim 1, wherein: The transistor includes a gate, a first electrode and a second electrode, and the pixel circuit further includes a capacitor, and the capacitor includes a first plate and a second plate; Along a direction perpendicular to the plane of the display panel, the insulating layer includes a first insulating layer located between the active structure and the gate, a second insulating layer located between the gate and the second electrode plate, and a third insulating layer located between the second electrode plate and the first electrode; the first via includes a first sub-via located in the first insulating layer, a second sub-via located in the second insulating layer, and a third sub-via located in the third insulating layer; Along a direction perpendicular to the plane where the display panel is located, the first sub-via hole, the second sub-via hole, and the third sub-via hole at least partially overlap.

9. The display panel according to claim 8, wherein: The active structure includes a channel region, a source region and a drain region; Along a direction perpendicular to a plane where the display panel is located, the gate at least partially overlaps with the channel region, and the first via hole at least partially overlaps with at least one of the source region and the drain region.

10. A display device, characterized in that: The device comprises the display panel according to any one of claims 1 to 9.

11. The display device according to claim 10, wherein: The display device further includes: a first protective film, located on the backlight surface of the display panel; foam, located on a side of the first protective film facing away from the display panel; a flexible circuit board, located on a side of the foam facing away from the display panel; a light sensing component located in the first display area and on a side of the flexible circuit board facing away from the display panel; The display device has a through hole in the first display area that penetrates the first protective film, the foam and the flexible circuit board; Along a direction perpendicular to the plane where the display panel is located, the through hole and the light sensing component at least partially overlap.

12. A method for preparing a display panel, characterized in that: The display panel includes a first display area and a second display area, the first display area multiplexing a photosensitive component area, the first display area and the second display area include pixel circuits, the pixel circuits include multiple transistors, and the transistors include active structures and multiple electrodes. The preparation method includes: providing a substrate; forming the active structure on one side of the substrate; forming an insulating layer on a side of the active structure facing away from the substrate, and providing a first via hole penetrating the insulating layer in the insulating layer, wherein the first via hole at least partially overlaps the active structure along a direction perpendicular to the plane of the display panel; wherein an overlapping area between the first via hole in the first display area and the active structure in the first display area is greater than an overlapping area between the first via hole in the second display area and the active structure in the second display area; The pixel circuit includes a threshold compensation transistor, a driving transistor and other transistors. In the first display area, the overlapping area between the active structure of the driving transistor and the first via is larger than the overlapping area between the active structure of the other transistors and the first via.

Images