A method and apparatus for semiconductor device manufacturing

Abstract

The application discloses a semiconductor device manufacturing method and device. The semiconductor device manufacturing method comprises the following steps: providing a semiconductor device material to be etched, placing the semiconductor device material in a reaction cavity, and forming a pretreatment channel region in the semiconductor device material; performing a pre-etching treatment on the semiconductor device material to remove impurities in the pretreatment channel region, and obtaining a pre-etched semiconductor device; performing a main etching treatment on the pre-etched semiconductor device to obtain a main etched semiconductor device, and forming a main etching channel region in the main etched semiconductor device; and performing a post-etching treatment on the main etching channel region to remove impurities in the main etching channel region, and obtaining an etched semiconductor device. The semiconductor device is subjected to the pre-etching treatment, the main etching treatment and the post-etching treatment, impurities in a channel region of the semiconductor device can be removed through the three etching treatments, the etching selectivity is improved, the process cleanliness and the etching uniformity are improved, and finally the electrical performance of the semiconductor device is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a method and apparatus for manufacturing a semiconductor device. Background Art

[0002] Dry etching, a plasma-based thin-film etching technique, is widely used in the manufacturing of thin-film transistors (TFTs) for semiconductors and display panels. With the continuous advancement of display panel performance and product structure, higher requirements are being placed on the electrical performance of TFT devices.

[0003] In current semiconductor dry etching processes, to maintain the etch selectivity (the ratio of the etching rate of the etched material to the etching rate of the masking layer material), chlorine-based (Cl2) and bromine-based (Br2, HBr) gases are often added to the etching gas to improve the etch selectivity. However, this results in an impure process. If the process is to be clean, the defect of poor etch selectivity will exist. These problems will lead to poor etching process of TFT devices and affect the electrical performance. Summary of the Invention

[0004] In view of the above-mentioned deficiencies in the prior art, an object of the present invention is to provide a method and apparatus for manufacturing a semiconductor device, which can improve the electrical performance of the semiconductor device.

[0005] To achieve the above object, the present invention first provides a method for manufacturing a semiconductor device, comprising:

[0006] Providing a semiconductor device material to be etched, placing the semiconductor device material in a reaction chamber, wherein the semiconductor device material is formed with a pre-processed channel region;

[0007] Pre-etching the semiconductor device material to remove impurities in the pre-treated channel region to obtain a pre-etched semiconductor device;

[0008] Performing a main etching process on the pre-etched semiconductor device to obtain a main etched semiconductor device, wherein a main etched channel region is formed in the main etched semiconductor device;

[0009] The main etched channel region is subjected to post-etching treatment to remove impurities in the main etched channel region to obtain an etched semiconductor device.

[0010] Optionally, before the step of pre-etching the semiconductor device material, the method further includes:

[0011] Adjust the power of the source RF power supply and the bias RF power supply connected to the reaction chamber to 0;

[0012] According to the first set parameters, the first etching gas is introduced into the reaction chamber so that the gas pressure in the reaction chamber and the flow rate of the first etching gas both match the first set parameters.

[0013] Optionally, the first setting parameters include a first etching gas composition, a first pressure value and a first flow value, the first etching gas composition is fluorine-based gas and oxygen, the first pressure value is 40~90mTorr, the first flow value includes a fluorine-based gas flow value and an oxygen flow value, the fluorine-based gas flow value is 300~1000sccm, and the oxygen flow value is greater than or equal to 5000sccm.

[0014] Optionally, the step of pre-etching the semiconductor device material further includes:

[0015] Adjust the power of the source RF power supply and the bias RF power supply to 3000~8000W, and make the power of the source RF power supply and the bias RF power supply the same.

[0016] Optionally, before the step of subjecting the pre-etched semiconductor device to a main etching process, the method further includes:

[0017] Adjust the power of the source RF power supply and the bias RF power supply connected to the reaction chamber to 0;

[0018] According to the second set parameters, the second etching gas and the protective gas are introduced into the reaction chamber so that the gas pressure in the reaction chamber, the flow rate of the second etching gas and the flow rate of the protective gas all match the second set parameters.

[0019] Optionally, the second setting parameters include a second etching gas composition, a second pressure value and a second flow value, the second etching gas component is a fluorine-based gas, the second pressure value is 30~70mTorr, the second flow value includes a fluorine-based gas flow value and a protective gas flow value, the fluorine-based gas flow value is 500~2000sccm, and the protective gas flow value is 1000~2000sccm.

[0020] Optionally, the step of performing a main etching process on the pre-etched semiconductor device further includes:

[0021] Adjust the power of the source RF power supply and the bias RF power supply to 2000~7000W, and make the power of the source RF power supply smaller than the power of the bias RF power supply.

[0022] Optionally, before the step of performing post-etching treatment on the main etched channel region, the method further includes:

[0023] Adjust the power of the source RF power supply and the bias RF power supply connected to the reaction chamber to 0;

[0024] According to the third set parameter, the third etching gas is introduced into the reaction chamber so that the gas pressure in the reaction chamber and the flow rate of the third etching gas both match the third set parameter.

[0025] Optionally, the third setting parameter includes a third etching gas component, a third pressure value and a third flow value, the third etching gas component is oxygen, the third pressure value is greater than or equal to 70 mTorr, and the third flow value is greater than or equal to 6000 sccm.

[0026] Optionally, the step of performing a post-etching treatment on the main etched channel region further includes:

[0027] Adjust the power of the source RF power supply and the bias RF power supply to 5000~10000W, and make the power of the source RF power supply and the bias RF power supply the same.

[0028] The present invention also provides a semiconductor device manufacturing apparatus used in the above-mentioned semiconductor device manufacturing method, comprising:

[0029] A reaction chamber, used for containing etching gas;

[0030] a first electrode located at one end of the reaction chamber;

[0031] a second electrode, located at the other end of the reaction chamber and arranged opposite to the first electrode;

[0032] a source radio frequency power supply, electrically connected to the second electrode;

[0033] A bias radio frequency power supply is electrically connected to the second electrode; and the semiconductor device material to be etched is located on the second electrode.

[0034] Compared with the prior art, the beneficial effects of the present invention include: the present invention first provides a semiconductor device material to be etched, places the semiconductor device material in a reaction chamber, and forms a pre-treated channel region on the semiconductor device material; secondly, the semiconductor device material is subjected to a pre-etching treatment to remove impurities in the pre-treated channel region to obtain a pre-etched semiconductor device; then the pre-etched semiconductor device is subjected to a main etching treatment to obtain a main-etched semiconductor device, in which a main-etched channel region is formed; finally, the main-etched channel region is subjected to a post-etching treatment to remove impurities in the main-etched channel region to obtain an etched semiconductor device. The present invention performs a pre-etching treatment, a main etching treatment, and a post-etching treatment on the semiconductor device. Through these three etching treatments, the etching rate and etching uniformity of the semiconductor device are guaranteed, the etching selectivity is improved, and the impurities in the channel region of the semiconductor device can be effectively removed, thereby improving the process cleanliness. Ultimately, the electrical performance of the semiconductor device is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0036] Figure 1 is a flow chart of a method for manufacturing a semiconductor device according to an embodiment of the present invention;

[0037] Figure 2 is a flow chart of the stabilization steps of the pre-etching process according to an embodiment of the present invention;

[0038] Figure 3 is a flow chart of the main etching process stabilization step according to an embodiment of the present invention;

[0039] Figure 4 is a flow chart of a post-etching stabilization step according to an embodiment of the present invention;

[0040] Figure 5 is a microscope image of a TFT device according to an embodiment of the present invention;

[0041] Figure 6 It is a structural diagram of a semiconductor device manufacturing apparatus according to an embodiment of the present invention. DETAILED DESCRIPTION

[0042] The following descriptions of the various embodiments are with reference to the accompanying drawings to illustrate specific embodiments in which the present invention may be implemented. In the description of the present invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "back," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," and the like, indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended only to facilitate the description of the present invention and simplify the description. They do not indicate or imply that the modules or components referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as limiting the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "multiple" means two or more, unless otherwise specifically defined.

[0043] In the description of the present invention, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they may refer to fixed connections, detachable connections, or integral connections; mechanical connections, electrical connections, or mutual communication; direct connections or indirect connections through an intermediate medium; and internal communication between two components or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0044] An embodiment of the present invention provides a method for manufacturing a semiconductor device, such as Figure 1 As shown, it includes step 100, step 200, step 300 and step 400, which are specifically as follows:

[0045] Step 100, providing a semiconductor device material to be etched, placing the semiconductor device material in a reaction chamber, and forming a pre-processed channel region on the semiconductor device material;

[0046] Step 200 , pre-etching the semiconductor device material to remove impurities in the pre-treated channel region to obtain a pre-etched semiconductor device;

[0047] Step 300, performing a main etching process on the pre-etched semiconductor device to obtain a main etching semiconductor device, wherein a main etching channel region is formed in the main etching semiconductor device;

[0048] Step 400 , performing post-etching treatment on the main etched channel region to remove impurities in the main etched channel region to obtain an etched semiconductor device.

[0049] Through the above-described method steps, this embodiment performs a pre-etching process, a main etching process, and a post-etching process on the semiconductor device. These three etching processes ensure the etching rate and etching uniformity of the semiconductor device, improve the etching selectivity, and effectively remove impurities in the channel region of the semiconductor device, thereby improving the process cleanliness and ultimately enhancing the electrical performance of the semiconductor device. The TFT device manufactured using the semiconductor device of this embodiment has better electrical performance, which can improve the display effect of the display panel.

[0050] In one embodiment, before the step of pre-etching the semiconductor device material, a pre-etching stabilization step is also included, such as Figure 2 As shown, the details are as follows:

[0051] In step 201 , the power of the source RF power supply and the bias RF power supply connected to the reaction chamber are both adjusted to 0; at this time, there is no need to generate plasma.

[0052] Step 202 : introducing a first etching gas into the reaction chamber according to the first set parameters, so that the gas pressure in the reaction chamber and the flow rate of the first etching gas both match the first set parameters.

[0053] Among them, the first setting parameters include a first etching gas component, a first pressure value and a first flow value. The first etching gas component includes a fluorine-based gas (such as nitrogen trifluoride or sulfur hexafluoride) and oxygen. The first pressure value is 40~90mTorr. The first flow value includes a fluorine-based gas flow value and an oxygen flow value. The fluorine-based gas flow value is 300~1000sccm, and the oxygen flow value is greater than or equal to 5000sccm.

[0054] Specifically, the duration of the pre-etching treatment stabilization step is not less than 15 seconds, so that the process conditions required for the pre-etching treatment can be in a relatively ideal stable state.

[0055] In one embodiment, the step of pre-etching the semiconductor device material further includes adjusting the power of the source RF power supply and the bias RF power supply to 3000-8000W, and ensuring that the power of the source RF power supply and the bias RF power supply are equal. This generates a synchronized pulsed plasma to pre-etch the semiconductor device material.

[0056] During the pre-etching process, the process conditions required for the pre-etching process are maintained consistent with the first set parameters in the pre-etching process stabilization step. Specifically, the etching gases in the reaction chamber are fluorine-based gas and oxygen, the gas pressure in the reaction chamber is 40-90 mTorr, the fluorine-based gas flow rate is 300-1000 sccm, and the oxygen flow rate is greater than or equal to 5000 sccm.

[0057] In one embodiment, the duration of the pre-etching process is 9 to 15 seconds to ensure that impurities in the pre-treated channel region can be fully removed and the semiconductor device material can be partially etched.

[0058] The etching reaction conditions required in the pre-etching step are set in advance through the pre-treatment stabilization step, which can ensure the stable progress of the pre-etching step and enable the semiconductor device material to undergo a sufficient etching reaction.

[0059] In one embodiment, before the step of subjecting the pre-etched semiconductor device to the main etching process, a main etching process stabilization step is also included, such as Figure 3 As shown, the details are as follows:

[0060] In step 301 , the power of the source RF power supply and the bias RF power supply connected to the reaction chamber are both adjusted to 0; at this time, there is no need to generate plasma.

[0061] Step 302 : According to the second set parameters, a second etching gas and a shielding gas are introduced into the reaction chamber so that the gas pressure in the reaction chamber, the flow rate of the second etching gas, and the flow rate of the shielding gas all match the second set parameters.

[0062] Among them, the second setting parameters include a second etching gas composition, a second pressure value and a second flow value. The second etching gas composition includes a fluorine-based gas (such as nitrogen trifluoride or sulfur hexafluoride), the second pressure value is 30~70mTorr, and the second flow value includes a fluorine-based gas flow value and a protective gas flow value. The fluorine-based gas flow value is 500~2000sccm, and the protective gas flow value is 1000~2000sccm.

[0063] The shielding gas can be an inert gas, such as helium or argon, which does not participate in the etching reaction, ensuring that the plasma is evenly distributed within the reaction chamber. The fluorine-based gas in the second etching gas is the same as the fluorine-based gas in the first etching gas, for example, both can be nitrogen trifluoride or sulfur hexafluoride, to maintain process cleanliness.

[0064] Specifically, the duration of the main etching process stabilization step is set as a conditional judgment. For example, when the conditions such as the gas pressure in the reaction chamber, the flow rate of the second etching gas and the flow rate of the protective gas reach the second set parameters, it can be determined that the main etching process stabilization step is completed.

[0065] In one embodiment, the step of performing a main etching process on the pre-etched semiconductor device further includes:

[0066] Adjust the power of the source RF power supply and the bias RF power supply to 2000-7000W, with the source RF power supply being smaller than the bias RF power supply. The material to be etched is located on the electrode connected to the bias RF power supply. This allows the plasma to impact the pre-etched semiconductor device, facilitating the etching reaction.

[0067] In one embodiment, the main etching process lasts for 8 to 15 seconds to ensure sufficient etching reaction.

[0068] The etching reaction conditions required in the main etching process step are set in advance through the main etching process stabilization step, which can ensure the stable progress of the main etching process step and enable the pre-etched semiconductor device to undergo sufficient etching reaction.

[0069] In one embodiment, before the step of performing post-etching treatment on the main etched channel region, a post-etching treatment stabilization step is also included, such as Figure 4 As shown, the details are as follows:

[0070] Step 401: The power of the source RF power supply and the bias RF power supply connected to the reaction chamber are both adjusted to 0; at this time, there is no need to generate plasma.

[0071] Step 402 : introducing a third etching gas into the reaction chamber according to the third set parameter, so that the gas pressure in the reaction chamber and the flow rate of the third etching gas both match the third set parameter.

[0072] The third setting parameters include a third etching gas component, a third pressure value, and a third flow value. The third etching gas component includes oxygen, the third pressure value is greater than or equal to 70 mTorr, and the third flow value is greater than or equal to 6000 sccm.

[0073] Specifically, the duration of the post-etching stabilization step is set as a conditional judgment. For example, when the gas pressure in the reaction chamber and the flow rate of the third etching gas reach third set parameters, it can be determined that the post-etching stabilization step is completed.

[0074] In one embodiment, the step of performing a post-etching treatment on the main etched channel region further includes:

[0075] Adjust the power of the source RF power supply and the bias RF power supply to 5000-10000W, and make the power of the source RF power supply and the bias RF power supply the same. This can generate synchronized pulsed plasma for post-etching semiconductor device materials.

[0076] The post-etching treatment step mainly includes processing the residues in the main etching channel area, improving the angle of the edge of the semiconductor device film layer after the main etching treatment, and ashing the photoresist on the surface of the film layer.

[0077] Dry etching is a thin film etching technique using plasma. Based on the reaction mode, it can be categorized as physical etching, chemical etching, and reactive ion etching. Dry etching is characterized by anisotropy, with the longitudinal etching rate being much greater than the lateral etching rate. Therefore, the material beneath the photoresist is protected from etching by the photoresist. Depending on the film being etched, different etching gases can be selected, and additional gas components can be added to control the dry etching rate, uniformity, selectivity, and etching profile. As electronic components gradually develop toward chip-based, miniaturized, and highly integrated processes, the size of semiconductor devices continues to shrink and approach their ultimate size. Advanced devices require high-aspect-ratio patterns, which necessitate anisotropic etching. Consequently, dry etching is widely used in advanced semiconductor processes.

[0078] In the array manufacturing process of display panels, a dry etching process is also required. Through dry etching, different non-metallic layers on the glass substrate are etched. The etched film layers are usually n+ a-Si, a-Si, SiNx (silicon nitride), etc., which can be generally regarded as Si etching. Usually, SF6, NF3, Cl2 and CFx series can be used as etching gases. The F and Cl radicals ionized by them are used to etch the n+ a-Si / a-Si / SiNx film layers; however, the CFx series is prone to produce CH compounds during the reaction process; Cl2 is a highly toxic gas, and the by-products after the etching reaction can easily affect the performance of thin film transistors, and at the same time accumulate in the reaction chamber to cause pollution; the SF6 and NF3 processes are relatively clean, but the etching selectivity is poor, and chlorine-based (Cl2) and bromine-based (Br2, HBr) gases are usually added to improve the etching selectivity and uniformity.

[0079] In order to solve the above-mentioned defects of the prior art, the present invention provides a method for manufacturing a semiconductor device, which specifically includes the following steps:

[0080] (1) Pre-etching treatment stabilization step: The power of the source RF power supply and the bias RF power supply are both 0W, the reaction chamber pressure is 40~90mTorr, and a mixed gas of NF3 and O2 is introduced. The NF3 flow rate is 300~1000sccm, and the O2 flow rate is not less than 5000sccm. The time is not less than 15s to ensure that the pressure, gas flow rate and other parameters meet the conditions required for the pre-etching treatment step.

[0081] (2) Pre-etching treatment steps: The power of the source RF power supply and the bias RF power supply is the same, set to 3000~8000W, and the etching time is 9~15s. The a-Si / SiNx film layer in the semiconductor device material is partially etched to obtain a pre-etched semiconductor device.

[0082] (3) Main etching process stabilization step: The power of the source RF power supply and the bias RF power supply are both 0W, the reaction chamber pressure is set to 30~70mTorr, and a mixed gas of NF3 and He is introduced. The flow rate of NF3 is 500~2000sccm, and the flow rate of He is 1000~2000sccm. The conditions in the reaction chamber reach the set parameters before entering the main etching process step.

[0083] (4) Main etching process: The power of the source RF power supply and the bias RF power supply are different and are set to 2000~7000W, and the power of the source RF power supply is less than the power of the bias RF power supply. The a-Si / SiNx film layer in the pre-etched semiconductor device is mainly etched to obtain the main etched semiconductor device.

[0084] (5) Post-etching stabilization step: The power of the source RF power supply and the bias RF power supply are both 0W, the reaction chamber pressure is not less than 70mTorr, O2 is introduced, and the flow rate is not less than 6000sccm. When the conditions meet the set parameters, jump to the post-processing step to ensure that the by-products of the main etching are completely eliminated and the conditions in the reaction chamber meet the conditions required for post-processing;

[0085] (6) Post-etching treatment step: The power of the source RF power supply and the bias RF power supply is the same, set to 5000~10000W, and the etching time is not less than 12s, and the a-Si / SiNx film layer of the main etched semiconductor device is fully post-treated.

[0086] Through the above method, the present embodiment performs pre-etching, main etching and post-etching on the semiconductor device. In these three etching processes, a single fluorine-based gas is used, and chlorine-based and bromine-based gases are not used, thereby ensuring process cleanliness, improving the etching rate and etching uniformity of the semiconductor device, improving the etching selectivity, and effectively removing impurities in the channel region of the semiconductor device, improving the film edge angle, and ultimately improving the electrical performance of the semiconductor device. The TFT device manufactured by the semiconductor device of this embodiment is as follows: Figure 5 As shown, the channel is clean and free of impurities, with better electrical performance, which can improve the display effect of the display panel.

[0087] On the other hand, an embodiment of the present invention provides a semiconductor device manufacturing apparatus, which is used in the semiconductor device manufacturing method provided in the above embodiment, such as Figure 6 Shown, including:

[0088] Reaction chamber 1, used for receiving etching gas;

[0089] A first electrode 2 is located at one end of the reaction chamber 1;

[0090] The second electrode 3 is located at the other end of the reaction chamber 1 and is arranged opposite to the first electrode 2;

[0091] A source radio frequency power supply 4 is electrically connected to the second electrode 3;

[0092] The bias RF power supply 5 is electrically connected to the second electrode 3 ; wherein the semiconductor device material 6 to be etched is located on the second electrode 3 .

[0093] In the semiconductor device manufacturing apparatus of this embodiment, the first electrode 2 can be an upper electrode located at the upper end of the reaction chamber 1, the second electrode 3 can be a lower electrode located at the lower end of the reaction chamber 1, the etching mode can adopt ECCP (Enhanced Capacitive Coupled Plasma), and the source RF power supply 4 and the bias RF power supply 5 are both electrically connected to the lower electrode.

[0094] The semiconductor device manufacturing apparatus of this embodiment utilizes the semiconductor device manufacturing method provided in the above-described embodiment to perform pre-etching, main etching, and post-etching on the semiconductor device. These three etching processes ensure the etching rate and precision of the semiconductor device, improve the etching selectivity, and effectively remove impurities from the channel region of the semiconductor device, thereby enhancing process cleanliness and ultimately improving the electrical performance of the semiconductor device. TFT devices manufactured using the semiconductor device of this embodiment exhibit superior electrical performance, which can enhance the display quality of display panels.

[0095] The above description is merely a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A method for manufacturing a semiconductor device, characterized in that: include: Providing a semiconductor device material to be etched, placing the semiconductor device material in a reaction chamber, wherein the semiconductor device material is formed with a pre-processed channel region; Performing a pre-etching treatment on the semiconductor device material to remove impurities in the pre-treated channel region to obtain a pre-etched semiconductor device; Performing a main etching process on the pre-etched semiconductor device to obtain the main etched semiconductor device, wherein a main etched channel region is formed in the main etched semiconductor device; performing a post-etching process on the main etched channel region to remove impurities in the main etched channel region to obtain an etched semiconductor device; Before the step of pre-etching the semiconductor device material, the method further includes: Adjust the power of the source RF power supply and the bias RF power supply connected to the reaction chamber to 0; According to the first set parameters, a first etching gas is introduced into the reaction chamber so that the gas pressure in the reaction chamber and the flow rate of the first etching gas both match the first set parameters; The first setting parameters include a first etching gas component, a first pressure value, and a first flow value. The first etching gas component is a fluorine-based gas and oxygen. The first pressure value is 40~90mTorr. The first flow value includes a fluorine-based gas flow value and an oxygen flow value. The fluorine-based gas flow value is 300~1000sccm, and the oxygen flow value is greater than or equal to 5000sccm.

2. The method for manufacturing a semiconductor device according to claim 1, wherein: The step of pre-etching the semiconductor device material further includes: The power of the source RF power supply and the bias RF power supply is adjusted to 3000-8000W, and the power of the source RF power supply and the bias RF power supply are made the same.

3. The method for manufacturing a semiconductor device according to claim 1, wherein: Before the step of performing a main etching process on the pre-etched semiconductor device, the method further includes: Adjust the power of the source RF power supply and the bias RF power supply connected to the reaction chamber to 0; According to the second setting parameters, a second etching gas and a shielding gas are introduced into the reaction chamber so that the gas pressure in the reaction chamber, the flow rate of the second etching gas and the flow rate of the shielding gas all match the second setting parameters.

4. The method for manufacturing a semiconductor device according to claim 3, wherein: The second setting parameters include a second etching gas composition, a second pressure value and a second flow value. The second etching gas component is a fluorine-based gas. The second pressure value is 30~70mTorr. The second flow value includes a fluorine-based gas flow value and a protective gas flow value. The fluorine-based gas flow value is 500~2000sccm, and the protective gas flow value is 1000~2000sccm.

5. The method for manufacturing a semiconductor device according to claim 3, wherein: The step of performing a main etching process on the pre-etched semiconductor device further includes: The power of the source RF power supply and the bias RF power supply is adjusted to 2000-7000W, and the power of the source RF power supply is smaller than the power of the bias RF power supply.

6. The method for manufacturing a semiconductor device according to claim 1, wherein: Before the step of performing post-etching treatment on the main etched channel region, the method further includes: Adjust the power of the source RF power supply and the bias RF power supply connected to the reaction chamber to 0; According to the third set parameter, a third etching gas is introduced into the reaction chamber so that the gas pressure in the reaction chamber and the flow rate of the third etching gas both match the third set parameter.

7. The method for manufacturing a semiconductor device according to claim 6, wherein: The third setting parameters include a third etching gas component, a third pressure value, and a third flow value. The third etching gas component is oxygen, the third pressure value is greater than or equal to 70 mTorr, and the third flow value is greater than or equal to 6000 sccm.

8. The method for manufacturing a semiconductor device according to claim 6, wherein: The step of post-etching the main etched channel region further includes: The power of the source RF power supply and the bias RF power supply is adjusted to 5000-10000W, and the power of the source RF power supply and the bias RF power supply are made the same.

9. A semiconductor device manufacturing apparatus, characterized in that: The method for manufacturing a semiconductor device according to any one of claims 1 to 8, comprising: A reaction chamber, used for receiving etching gas; a first electrode, located at one end of the reaction chamber; a second electrode, located at the other end of the reaction chamber and arranged opposite to the first electrode; a source radio frequency power supply, electrically connected to the second electrode; A bias radio frequency power supply is electrically connected to the second electrode; and the semiconductor device material to be etched is located on the second electrode.

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