A novel high-reliability GaN HEMT device and a preparation method thereof

Abstract

The application discloses a novel high-reliability GaN HEMT device and a preparation method thereof, and belongs to the technical field of semiconductor devices. The novel high-reliability GaN HEMT device comprises the following steps: providing a substrate; sequentially forming a nucleation layer, a transition layer and a barrier layer on one side surface of the substrate, and preparing a source electrode and a drain electrode on the side of the barrier layer away from the substrate; etching the two ends of the barrier layer and the transition layer to form a mesa, and depositing an HfO2 film on the side of the source electrode, the drain electrode and the barrier layer away from the substrate to form an insulating dielectric layer; preparing a gate electrode on the side of the insulating dielectric layer away from the substrate; depositing a passivation layer on the side of the insulating dielectric layer and the gate electrode away from the substrate; after etching the side surface of the passivation layer away from the substrate, depositing oxygen-doped semi-insulating polycrystalline silicon to form a drain field plate; the orthographic projection of the drain field plate in the direction perpendicular to the plane where the substrate is located is approximately S-shaped; forming a protective layer on the side of the drain field plate away from the substrate to obtain the prepared GaN HEMT device. The application can make the electric field distribution between the drain and the source more uniform, thereby greatly improving the long-term reliability and breakdown efficiency of the device.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor power device technology, specifically relating to a novel high-reliability GaN HEMT device and its fabrication method. Background Technology

[0002] In recent years, research on traditional Si-based devices has gradually approached physical limits. In order to further reduce chip area, increase breakdown voltage, and reduce on-resistance, GaN materials have been widely used due to their advantages such as large bandgap, high breakdown electric field, radiation resistance, and high temperature resistance.

[0003] The breakdown voltage and reliability of GaN-based HEMT devices are often constrained by a variety of factors. The electric field strength near the drain of GaN-based HEMT devices reaches its peak, which can lead to device degradation or even breakdown under prolonged high field stress. To address this issue, various field plate structures are used in related technologies to homogenize the drain-source electric field and reduce the peak electric field, thereby improving the device's breakdown voltage.

[0004] However, existing field plate structures, such as connecting a metal field plate to the drain end and placing the field plate above the passivation layer, have certain limitations, especially for GaN, a material with high breakdown field strength, where their effect on surface electric field homogenization is very limited. Therefore, improving the long-term reliability of GaN HEMT devices remains a problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0005] To address the aforementioned problems in the existing technology, this invention provides a novel high-reliability GaN HEMT device and its fabrication method. The technical problem to be solved by this invention is achieved through the following technical solution:

[0006] In a first aspect, the present invention provides a method for fabricating a novel high-reliability GaN HEMT device, comprising:

[0007] Provide substrate;

[0008] AlN material is epitaxially grown on one side surface of the substrate to form a nucleation layer;

[0009] GaN material is epitaxially grown on the surface of the nucleation layer away from the substrate to form a transition layer;

[0010] AlGaN material is epitaxially grown on the side of the transition layer away from the substrate to form a barrier layer, and the source and drain electrodes are fabricated on the side of the barrier layer away from the substrate.

[0011] The two ends of the barrier layer and the transition layer are etched to form mesa, and an HfO2 thin film is deposited on the side of the source, drain and barrier layer away from the substrate to form an insulating dielectric layer;

[0012] A gate is fabricated on the side of the insulating dielectric layer away from the substrate;

[0013] A passivation layer is deposited on the insulating dielectric layer and the side of the gate away from the substrate; the orthogonal projection of the passivation layer coincides with the orthogonal projection of the barrier layer along a direction perpendicular to the plane of the substrate.

[0014] After etching the surface of the passivation layer away from the substrate, oxygen-doped semi-insulating polysilicon is deposited to form a drain field plate. The orthographic projection of the drain field plate is approximately S-shaped along the direction perpendicular to the plane of the substrate, and the orthographic projections of the first end and the second end of the drain field plate overlap with the orthographic projections of the source and drain electrodes, respectively.

[0015] A protective layer is formed on the side of the drain field plate away from the substrate to obtain the fabricated GaN HEMT device.

[0016] In one embodiment of the present invention, the step of depositing an HfO2 thin film on the side of the source, drain, and barrier layer away from the substrate to form an insulating dielectric layer includes:

[0017] Using tetradiethylaminohafnium and water as reaction precursors, HfO2 thin films were prepared on the side of the source, drain, and barrier layers away from the substrate using atomic layer deposition technology to form an insulating dielectric layer; the thickness of the HfO2 thin film was 20 nm in the direction perpendicular to the plane of the substrate.

[0018] In one embodiment of the present invention, the step of depositing oxygen-doped semi-insulating polysilicon to form a drain field plate after etching the passivation layer on the side away from the substrate includes:

[0019] After a mask is fabricated on the side of the passivation layer away from the substrate, a groove is formed by etching using reactive ion etching technology.

[0020] Oxygen-doped semi-insulating polycrystalline silicon is deposited in the groove using electron beam evaporation technology to form a drain field plate.

[0021] In one embodiment of the present invention, the second end of the drain field plate is electrically connected to the drain electrode.

[0022] In one embodiment of the present invention, the step of epitaxially growing AlN material on one side surface of the substrate to form a nucleation layer includes:

[0023] Using metal-organic chemical vapor deposition (MOCVD) technology, a low-temperature AlN nucleation layer is epitaxially grown on one side of the substrate, and a high-temperature AlN nucleation layer is epitaxially grown on the side of the low-temperature AlN nucleation layer away from the substrate.

[0024] Wherein, along the direction perpendicular to the plane where the substrate is located, the thickness of the low-temperature AlN nucleation layer is 30 nm, and the thickness of the high-temperature AlN nucleation layer is 170 nm.

[0025] In one embodiment of the present invention, the step of epitaxially growing AlGaN material on the surface of the transition layer away from the substrate to form a barrier layer includes:

[0026] Using MOCVD technology, undoped Al was deposited on the surface of the transition layer on the side away from the substrate. 0.2 Ga 0.8 N-type barrier layer; wherein the process conditions are: nitrogen source ammonia flow rate 4800 sccm, aluminum source flow rate 3 μmol / min, gallium source flow rate 8 μmol / min; the thickness of the barrier layer is 10 nm along the direction perpendicular to the plane of the substrate.

[0027] In a second aspect, the present invention provides a novel high-reliability GaN HEMT device, comprising:

[0028] Substrate;

[0029] Nucleation layer located on one side of the substrate;

[0030] A transition layer located on the side of the nucleation layer away from the substrate;

[0031] A barrier layer located on the side of the transition layer away from the substrate;

[0032] The source and drain are located on the side of the barrier layer away from the substrate, and the source and drain are located at both ends of the barrier layer;

[0033] An insulating dielectric layer located on the side of the barrier layer and the source and drain electrodes away from the substrate;

[0034] The gate is located on the side of the insulating dielectric layer away from the substrate; along the direction perpendicular to the plane where the substrate is located, the orthogonal projection of the gate does not overlap with the orthogonal projections of the source and drain.

[0035] A passivation layer located on the side of the insulating dielectric layer away from the substrate;

[0036] A drain field plate is located on the side of the passivation layer away from the substrate; along the direction perpendicular to the plane where the substrate is located, the orthographic projection of the passivation layer coincides with the orthographic projection of the barrier layer, the orthographic projection of the drain field plate is approximately S-shaped, and the orthographic projections of the first end and the second end of the drain field plate overlap with the orthographic projections of the source and the drain, respectively.

[0037] A protective layer located on the side of the passivation layer away from the substrate.

[0038] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0039] This invention provides a novel high-reliability GaN HEMT device and its fabrication method. By employing a resistive field plate to optimize the surface electric field, the resistive field plate can prevent contamination by harmful external impurity ions and mitigate the influence of ion-induced electric fields on the electric field distribution of the device.

[0040] Furthermore, in the direction perpendicular to the plane of the substrate, the orthographic projection of the drain field plate is approximately S-shaped. This approximately S-shaped field plate structure can make full use of the drift region area, thereby optimizing the electric field distribution of the entire channel, making the electric field distribution more uniform, and greatly improving the breakdown efficiency of the lateral device. On the other hand, the bending density of the S-shaped field plate can be adjusted according to the actual channel electric field distribution. For example, the bending density of the field plate is dense at the electric field peak and sparse at the electric field flat area. In this way, the effect of the uniform channel electric field distribution of the field plate can be maximized, and the breakdown characteristics of the device can be improved.

[0041] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0042] Figure 1 This is a flowchart of a novel high-reliability GaN HEMT device fabrication method provided in this embodiment of the invention;

[0043] Figure 2 This is a schematic diagram of a novel high-reliability GaN HEMT device fabrication method provided in an embodiment of the present invention;

[0044] Figure 3 This is a schematic diagram of a novel high-reliability GaN HEMT device fabrication method provided in an embodiment of the present invention;

[0045] Figure 4 This is a schematic diagram of a novel high-reliability GaN HEMT device fabrication method provided in an embodiment of the present invention;

[0046] Figure 5 This is a schematic diagram of a novel high-reliability GaN HEMT device fabrication method provided in an embodiment of the present invention;

[0047] Figure 6 This is a schematic diagram of a novel high-reliability GaN HEMT device fabrication method provided in an embodiment of the present invention;

[0048] Figure 7This is a schematic diagram of a novel high-reliability GaN HEMT device fabrication method provided in an embodiment of the present invention;

[0049] Figure 8 This is a schematic diagram of a novel high-reliability GaN HEMT device fabrication method provided in an embodiment of the present invention;

[0050] Figure 9 This is a schematic diagram of a novel high-reliability GaN HEMT device fabrication method provided in an embodiment of the present invention;

[0051] Figure 10 This is a schematic diagram of a novel high-reliability GaN HEMT device fabrication method provided in an embodiment of the present invention;

[0052] Figure 11 This is a schematic diagram of a novel high-reliability GaN HEMT device fabrication method provided in an embodiment of the present invention;

[0053] Figure 12 This is a schematic diagram of a novel high-reliability GaN HEMT device fabrication method provided in an embodiment of the present invention;

[0054] Figure 13 This is a schematic diagram of a novel high-reliability GaN HEMT device fabrication method provided in an embodiment of the present invention. Detailed Implementation

[0055] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0056] Figure 1 This is a flowchart illustrating a novel high-reliability GaN HEMT device and its fabrication method provided in this invention. Figure 2-13 This is a schematic diagram of a novel high-reliability GaN HEMT device fabrication method provided in an embodiment of the present invention. Figure 1-13 As shown, this embodiment provides a method for fabricating a novel high-reliability GaN HEMT device, including:

[0057] S1, Provide a substrate;

[0058] S2. Epitaxially grow AlN material on one side of the substrate to form a nucleation layer;

[0059] S3. Epitaxially grow GaN material on the surface of the nucleation layer away from the substrate to form a transition layer;

[0060] S4. Epitaxially grow AlGaN material on the side of the transition layer away from the substrate to form a barrier layer, and fabricate the source and drain on the side of the barrier layer away from the substrate.

[0061] S5. Etch the two ends of the barrier layer and the transition layer to form mesa, and deposit HfO2 thin film on the side of the source, drain and barrier layer away from the substrate to form an insulating dielectric layer.

[0062] S6. Fabricate a gate on the side of the insulating dielectric layer away from the substrate;

[0063] S7. A passivation layer is deposited on the side of the insulating dielectric layer and the gate away from the substrate; the orthogonal projection of the passivation layer coincides with the orthogonal projection of the barrier layer along the direction perpendicular to the plane of the substrate.

[0064] S8. After etching the passivation layer on the side away from the substrate, oxygen-doped semi-insulating polysilicon is deposited to form a drain field plate. Along the direction perpendicular to the plane of the substrate, the orthographic projection of the drain field plate is approximately S-shaped, and the orthographic projections of the first and second ends of the drain field plate overlap with the orthographic projections of the source and drain electrodes, respectively.

[0065] S9. A protective layer is formed on the side of the drain field plate away from the substrate to obtain the fabricated GaN HEMT device.

[0066] Specifically, in the fabrication of the aforementioned GaN HEMT device, a substrate is first provided, and an AlN nucleation layer, a GaN transition layer, and an AlGaN barrier layer are sequentially epitaxially grown on one side surface of the substrate. Next, a mask is fabricated on the barrier layer, and metal Ti / Al / Ni / Au is deposited on the barrier layer using electron beam evaporation. After rapid thermal annealing in N2, an ohmic contact is formed, thereby enabling the formation of the GaN HEMT device. Figure 2 The source and drain electrodes are formed at the left and right ends of the barrier layer shown. In this embodiment, Ti, Al, Ni, and Au metals are arranged from bottom to top, with thicknesses of 0.018 μm, 0.135 μm, 0.046 μm, and 0.052 μm, respectively.

[0067] Furthermore, such as Figure 7 As shown, a mask is fabricated on the barrier layer, and reactive ion etching is used to etch the barrier layer and transition layer on the left side of the source and the right side of the drain, respectively, to form mesas. It should be noted that the etching depth in step S5 should be at least greater than the thickness of the barrier layer. Figure 7 Although only the case where the mesa is formed on the nucleation layer is shown, in some other embodiments of this application, the mesa may also be formed on the transition layer, and this application does not limit this to the case.

[0068] In steps S5-S6, an insulating dielectric layer is formed by depositing an HfO2 thin film above the source and drain electrodes and above the barrier layer. Then, a mask is formed above the insulating dielectric layer, and Ni / Au metal is deposited using electron beam evaporation to fabricate the gate electrode. The orthogonal projection of the gate electrode lies between the orthogonal projections of the source and drain electrodes, perpendicular to the plane of the substrate. Optionally, the Ni metal is located on the side of the Au metal closest to the substrate, i.e., the Ni metal is on the lower layer and the Au metal is on the upper layer. This design not only ensures strong adhesion of the gate electrode but also reduces the gate resistance and improves the frequency characteristics of the device.

[0069] For example, the thickness of Ni metal is 0.026 μm and the thickness of Au metal is 0.11 μm along the direction perpendicular to the plane of the substrate.

[0070] In step S7, a 2μm thick SiN layer is deposited on the top of the gate and the remaining areas of the insulating dielectric layer using PECVD technology to form a passivation layer. It should be understood that the remaining areas of the insulating dielectric layer refer to the area within the insulating dielectric layer excluding the orthogonal projection of the gate onto the plane perpendicular to the substrate. Furthermore, to ensure that the device surface is not damaged during fabrication, this step can first use low power to deposit a thinner SiN passivation layer, and then increase the power to deposit a thicker SiN passivation layer.

[0071] In steps S8-S9, after etching the surface of the passivation layer away from the substrate, oxygen-doped semi-insulating polycrystalline silicon is deposited to form a drain field plate. The first end of the drain field plate is located above the source, and the second end is located above the drain and electrically connected to it. Further, to mitigate the influence of the ambient atmosphere on the electrical characteristics of the drain field plate, an insulating dielectric material is deposited above the passivation layer using PECVD technology to form a protective layer. The insulating dielectric material can optionally be SiO2, with a thickness of 3.0 μm. This completes the process. Figure 13 The novel high-reliability GaN HEMT power device is shown.

[0072] It should be noted that in this embodiment, oxygen-doped semi-insulating polycrystalline silicon is used to fabricate the drain field plate during the manufacturing process. Therefore, this field plate is a resistive field plate. The resistive field plate can prevent contamination by harmful external impurity ions and mitigate the influence of ion-induced electric fields on the electric field distribution of the device. In addition, since the drain field plate is approximately S-shaped, this approximately S-shaped field plate structure can make full use of the drift region area, thereby optimizing the electric field distribution of the entire channel, making the electric field distribution more uniform, and greatly improving the breakdown efficiency of the lateral device. On the other hand, the bending density of the S-shaped field plate can be adjusted according to the actual channel electric field distribution. For example, the bending density of the field plate is dense at the electric field peak and sparse at the electric field flat area. In this way, the effect of the field plate in uniformly distributing the electric field in the channel can be maximized, thereby improving the breakdown characteristics of the device.

[0073] like Figure 3 As shown, step S2 above, the step of epitaxially growing AlN material on one side surface of the substrate to form a nucleation layer, includes:

[0074] Using metal-organic chemical vapor deposition (MOCVD) technology, a low-temperature AlN nucleation layer is epitaxially grown on one side of the substrate surface, and a high-temperature AlN nucleation layer is epitaxially grown on the side of the low-temperature AlN nucleation layer away from the substrate.

[0075] Among them, along the direction perpendicular to the plane where the substrate is located, the thickness of the low-temperature AlN nucleation layer is 30nm, and the thickness of the high-temperature AlN nucleation layer is 170nm.

[0076] Optionally, in step S3, heteroepitaxial growth is performed in a high-temperature hydrogen environment as follows: Figure 4 The transition layer shown can achieve a low defect density GaN transition layer using lateral epitaxial overgrowth (ELOG) technology. For example, the thickness of the GaN transition layer is 1 μm in the direction perpendicular to the plane of the substrate.

[0077] Please see Figure 5 In step S4 above, the step of epitaxially growing AlGaN material on the side of the transition layer away from the substrate to form a barrier layer includes:

[0078] Using MOCVD technology, undoped Al is deposited on the surface of the transition layer on the side away from the substrate. 0.2 Ga 0.8 N-type barrier layer; wherein the process conditions are: nitrogen source ammonia flow rate 4800 sccm, aluminum source flow rate 3 μmol / min, gallium source flow rate 8 μmol / min; the thickness of the barrier layer is 10 nm along the direction perpendicular to the plane of the substrate.

[0079] like Figure 8 As shown, step S5 above, which involves depositing an HfO2 thin film on the side of the source, drain, and barrier layer away from the substrate to form an insulating dielectric layer, includes:

[0080] Using tetradiethylaminohafnium and water as reaction precursors, HfO2 thin films were prepared on the side of the source, drain, and barrier layers away from the substrate using atomic layer deposition technology to form an insulating dielectric layer; the thickness of the HfO2 thin film was 20 nm in the direction perpendicular to the plane of the substrate.

[0081] like Figure 11-12 As shown, in step S8 above, after etching the passivation layer on the side away from the substrate, the step of depositing oxygen-doped semi-insulating polysilicon to form a drain field plate includes:

[0082] After fabricating a mask on the side of the passivation layer away from the substrate, a groove is formed by etching using reactive ion etching technology.

[0083] Oxygen-doped semi-insulating polycrystalline silicon is deposited in the groove using electron beam evaporation technology to form a drain field plate.

[0084] In this embodiment, a mask is first fabricated on the surface of the passivation layer away from the substrate. Then, reactive ion etching is used to etch the passivation layer between the source and drain electrodes to create a groove. The groove has a depth of 0.14 μm, a width of 0.47 μm, and a length of 10.40 μm. The groove bends and extends from above the drain electrode to above the source electrode, approximately in an S-shape.

[0085] Next, an oxygen-doped semi-insulating polycrystalline silicon drain field plate is deposited within the groove. Specifically, oxygen-doped semi-insulating polycrystalline silicon is deposited within the groove using electron beam evaporation technology. The deposited semi-insulating polycrystalline silicon should completely fill the groove, and the first end of the drain field plate is positioned above the source, with the second end electrically connected to the drain. To ensure the drain field plate has a suitable resistance value, the oxygen doping level of the semi-insulating polycrystalline silicon is determined by the actual length of the device, and the oxygen content is generally between 0.3% and 20%, preferably 0.5%.

[0086] It should be noted that the actual bending shape of the field plate can be flexibly adjusted according to the electric field distribution. For example, the bending of the field plate is dense at the peak of the electric field and sparse at the flat part of the electric field.

[0087] like Figure 13 As shown, this embodiment of the invention also provides a novel high-reliability GaN HEMT device, comprising:

[0088] Substrate;

[0089] Nucleation layer located on one side of the substrate;

[0090] A transition layer located on the side of the nucleation layer furthest from the substrate;

[0091] A barrier layer located on the side of the transition layer away from the substrate;

[0092] The source and drain are located on the side of the barrier layer away from the substrate, and the source and drain are located at both ends of the barrier layer;

[0093] An insulating dielectric layer located on the side of the barrier layer and the source and drain electrodes away from the substrate;

[0094] The gate is located on the side of the insulating dielectric layer away from the substrate; along the direction perpendicular to the plane of the substrate, the orthogonal projection of the gate does not overlap with the orthogonal projections of the source and drain.

[0095] A passivation layer located on the side of the insulating dielectric layer away from the substrate;

[0096] The drain field plate is located on the side of the passivation layer away from the substrate. Along the direction perpendicular to the plane of the substrate, the orthographic projection of the passivation layer coincides with the orthographic projection of the barrier layer. The orthographic projection of the drain field plate is approximately S-shaped, and the orthographic projections of the first end and the second end of the drain field plate overlap with the orthographic projections of the source and the drain, respectively.

[0097] A protective layer located on the side of the passivation layer away from the substrate.

[0098] In this embodiment, the novel high-reliability GaN HEMT device includes a substrate, a nucleation layer, a transition layer, a barrier layer, an insulating dielectric layer, a passivation layer, a drain field plate, and a protective layer arranged sequentially from bottom to top. The source and drain are located at both ends of the barrier layer, i.e., on the left and right sides of the insulating dielectric layer. The gate is located on the side of the insulating dielectric layer away from the barrier layer. The source and drain are led out through contact holes. The first end of the drain field plate is located above the source, and the second end is located above the drain and electrically connected to the drain. The drain field plate is approximately S-shaped.

[0099] As can be seen from the above embodiments, the beneficial effects of the present invention are as follows:

[0100] This invention provides a novel high-reliability GaN HEMT device and its fabrication method. By employing a resistive field plate to optimize the surface electric field, the resistive field plate can prevent contamination by harmful external impurity ions and mitigate the influence of ion-induced electric fields on the electric field distribution of the device.

[0101] Furthermore, in the direction perpendicular to the plane of the substrate, the orthographic projection of the drain field plate is approximately S-shaped. This approximately S-shaped field plate structure can make full use of the drift region area, thereby optimizing the electric field distribution of the entire channel, making the electric field distribution more uniform, and greatly improving the breakdown efficiency of the lateral device. On the other hand, the bending density of the S-shaped field plate can be adjusted according to the actual channel electric field distribution. For example, the bending density of the field plate is dense at the electric field peak and sparse at the electric field flat area. In this way, the effect of the uniform channel electric field distribution of the field plate can be maximized, and the breakdown characteristics of the device can be improved.

[0102] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0103] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0104] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0105] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0106] Although this application has been described herein in conjunction with various embodiments, those skilled in the art, by reviewing the accompanying drawings, disclosure, and appended claims, will understand and implement other variations of the disclosed embodiments in carrying out the claimed application. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude a plurality. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.

[0107] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A method for fabricating a novel high-reliability GaN HEMT device, characterized in that, The application relates to a GaN HEMT device and a preparation method thereof. The application comprises the following steps: providing a substrate; epitaxially growing AlN material on one side surface of the substrate to form a nucleation layer; epitaxially growing GaN material on the side surface of the nucleation layer away from the substrate to form a transition layer; epitaxially growing AlGaN material on the side surface of the transition layer away from the substrate to form a barrier layer, and preparing a source electrode and a drain electrode on the side of the barrier layer away from the substrate; etching both ends of the barrier layer and the transition layer to form a mesa, and depositing an HfO2 film on the side of the source electrode, the drain electrode and the barrier layer away from the substrate to form an insulating medium layer; preparing a gate electrode on the side of the insulating medium layer away from the substrate; depositing a passivation layer on the side of the insulating medium layer and the gate electrode away from the substrate; the orthographic projection of the passivation layer in the direction perpendicular to the plane where the substrate is located is coincident with the orthographic projection of the barrier layer; after etching the side surface of the passivation layer away from the substrate, depositing oxygen-doped semi-insulating polycrystalline silicon to form a drain field plate; the orthographic projection of the drain field plate in the direction perpendicular to the plane where the substrate is located is approximately S-shaped, and the orthographic projections of the first end and the second end of the drain field plate are respectively overlapped with the orthographic projections of the source electrode and the drain electrode; 2. The method of fabricating a novel high reliability GaN HEMT device according to claim 1, wherein, forming a protective layer on the side of the drain field plate away from the substrate to obtain the prepared GaN HEMT device. The step of depositing an HfO2 film on the side of the source electrode, the drain electrode and the barrier layer away from the substrate to form an insulating medium layer comprises the following steps:

3. The method of fabricating a novel high reliability GaN HEMT device according to claim 1, wherein, using atomic layer deposition technology to prepare an HfO2 film on the side of the source electrode, the drain electrode and the barrier layer away from the substrate by taking hafnium diethylamide and water as reaction precursors, so as to form an insulating medium layer; the thickness of the HfO2 film in the direction perpendicular to the plane where the substrate is located is 20 nm. The step of depositing oxygen-doped semi-insulating polycrystalline silicon to form a drain field plate after etching the side surface of the passivation layer away from the substrate comprises the following steps: after making a mask on the side surface of the passivation layer away from the substrate, etching is carried out by using reactive ion etching technology to form a groove; 4. The method of fabricating a novel high reliability GaN HEMT device according to claim 3, wherein, oxygen-doped semi-insulating polycrystalline silicon is deposited in the groove by using electron beam evaporation technology to form a drain field plate.

5. The method of fabricating a novel high reliability GaN HEMT device according to claim 1, wherein, The second end of the drain field plate is electrically connected with the drain electrode. The step of epitaxially growing AlN material on one side surface of the substrate to form a nucleation layer comprises the following steps: low-temperature AlN nucleation layers are epitaxially grown on one side surface of the substrate by using metal organic chemical vapor deposition (MOCVD) technology, and high-temperature AlN nucleation layers are epitaxially grown on the side surface of the low-temperature AlN nucleation layers away from the substrate; 6. The method of fabricating a novel high reliability GaN HEMT device according to claim 1, wherein, wherein the thickness of the low-temperature AlN nucleation layer in the direction perpendicular to the plane where the substrate is located is 30 nm, and the thickness of the high-temperature AlN nucleation layer in the direction perpendicular to the plane where the substrate is located is 170 nm. A non-doped Al 0.2 Ga 0.8 N barrier layer is deposited on the side surface of the transition layer away from the substrate by using MOCVD technology; wherein, the process conditions are: nitrogen source ammonia flow 4800sccm, aluminum source flow 3μmol / min, and gallium source flow 8μmol / min; the thickness of the barrier layer is 10nm in the direction perpendicular to the plane where the substrate is located.

7. A novel high reliability GaN HEMT device characterized by, The step of epitaxially growing AlGaN material on the side surface of the transition layer away from the substrate to form a barrier layer comprises the following steps: The application relates to a GaN HEMT device and a preparation method thereof. The application comprises the following steps: a substrate; a nucleation layer on one side of the substrate; a transition layer on the side of the nucleation layer away from the substrate; a barrier layer on the side of the transition layer away from the substrate; a source electrode and a drain electrode on the side of the barrier layer away from the substrate, and the source electrode and the drain electrode are located at both ends of the barrier layer; an insulating medium layer on the side of the barrier layer and the source electrode and the drain electrode away from the substrate; a gate located on a side of the insulating medium layer away from the substrate; a projection of the gate in a direction perpendicular to a plane in which the substrate is located does not overlap with projections of the source and the drain; a passivation layer located on a side of the insulating medium layer away from the substrate; a drain field plate located on a side of the passivation layer away from the substrate; a projection of the passivation layer in a direction perpendicular to a plane in which the substrate is located coincides with a projection of the barrier layer, a projection of the drain field plate is approximately S-shaped, and projections of first and second ends of the drain field plate respectively overlap with projections of the source and the drain; a protective layer located on a side of the passivation layer away from the substrate.

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