Data transmission method, device, computer equipment and storage medium

Abstract

The present invention discloses a data transmission method, device, computer equipment and storage medium. The method comprises: receiving a data frame sent by a host computer through a single-chip microcomputer receiving module; wherein the data frame comprises a frame header, a function code, transmission data and a frame tail, the transmission data is in a hexadecimal American Standard for Information Interchange code format, and the frame header, function code and frame tail are in a non-hexadecimal American Standard for Information Interchange code format; generating response data matching the function code according to the function code in the data frame; sending the response data to the host computer through a single-chip microcomputer sending module, so that the host computer determines whether the data transmission is completed according to the response data. By using the technical solution of the present invention, stable data transmission between a single-chip microcomputer and a host computer can be achieved.

Description

Technical Field

[0001] The present invention relates to the field of data processing technology, and in particular to a data transmission method, device, computer equipment and storage medium. Background Art

[0002] The MCU is a typical embedded microcontroller, which is composed of an arithmetic unit, a controller, a memory, and input and output devices, and is equivalent to a microcomputer. The host computer is a computer that can directly send control instructions. The MCU and the host computer generally communicate through a serial port.

[0003] When the microcontroller communicates with the host computer, problems such as data transmission loss and errors often occur. Moreover, since data is usually transmitted in hexadecimal form, the data during transmission is prone to conflict with the data in the communication protocol, resulting in abnormal data transmission. Summary of the invention

[0004] The present invention provides a data transmission method, device, computer equipment and storage medium to improve the stability of data transmission between a single-chip microcomputer and a host computer.

[0005] In a first aspect, an embodiment of the present invention provides a data transmission method, the method comprising:

[0006] Receive the data frame sent by the host computer through the single-chip receiving module;

[0007] Wherein, the single-chip microcomputer receiving module includes a data receiving area and a receiving module data buffer area, which are used to avoid data frame damage during the receiving process;

[0008] The data frame includes a frame header, a function code, transmission data and a frame tail, the transmission data is in a hexadecimal American Standard Code for Information Interchange format, and the frame header, function code and frame tail are in a non-hexadecimal American Standard Code for Information Interchange format;

[0009] The common body in the single-chip microcomputer matches the common body in the host computer, and the data type of the transmission data matches the common body in the single-chip microcomputer and the common body in the host computer;

[0010] According to the function code in the data frame, generating response data matching the function code;

[0011] The response data is sent to the host computer through the single-chip microcomputer sending module, so that the host computer determines whether the data transmission is completed according to the response data.

[0012] In a second aspect, an embodiment of the present invention further provides a data transmission device, the device comprising:

[0013] The data frame receiving module is used to receive the data frame sent by the host computer through the single-chip receiving module;

[0014] Wherein, the single-chip microcomputer receiving module includes a data receiving area and a receiving module data buffer area, which are used to avoid data frame damage during the receiving process;

[0015] The data frame includes a frame header, a function code, transmission data and a frame tail, the transmission data is in a hexadecimal American Standard Code for Information Interchange format, and the frame header, function code and frame tail are in a non-hexadecimal American Standard Code for Information Interchange format;

[0016] The common body in the single-chip microcomputer matches the common body in the host computer, and the data type of the transmission data matches the common body in the single-chip microcomputer and the common body in the host computer;

[0017] A response data generating module, used for generating response data matching the function code according to the function code in the data frame;

[0018] The response data sending module is used to send the response data to the host computer through the single-chip microcomputer sending module, so that the host computer can judge whether the data transmission is completed according to the response data.

[0019] In a third aspect, an embodiment of the present invention further provides a computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the data transmission method as described in any one of the embodiments of the present invention is implemented.

[0020] In a fourth aspect, an embodiment of the present invention further provides a storage medium storing computer executable instructions, wherein the computer executable instructions, when executed by a computer processor, are used to execute the data transmission method as described in any one of the embodiments of the present invention.

[0021] The technical solution of the embodiment of the present invention is that in the data frame sent from the host computer to the single-chip computer, the format of the transmitted data is defined as the hexadecimal American Standard Code for Information Interchange, the format of the frame header, function code and frame tail is the non-hexadecimal American Standard Code for Information Interchange, the data type of the transmitted data is matched with the common body in the single-chip computer and the common body in the host computer, when the host computer sends the data frame to the single-chip computer, the single-chip computer generates corresponding response data according to the function code in the data frame and sends it to the host computer, and the data frame is received by the single-chip computer receiving module including the data receiving area and the receiving module data buffer area. The problem that the transmission data is easy to conflict with the communication protocol data when the single-chip computer communicates with the host computer in the prior art, thereby causing abnormal data transmission, is solved, and the stability of data transmission between the single-chip computer and the host computer is improved.

[0022] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0024] Figure 1 is a flow chart of a data transmission method provided by Embodiment 1 of the present invention;

[0025] Figure 2a is a flow chart of a data transmission method provided by Embodiment 2 of the present invention;

[0026] Figure 2b It is a schematic diagram of a data storage structure of a single-chip microcomputer and a host computer provided in the second embodiment of the present invention;

[0027] Figure 3 is a structural diagram of a data transmission device provided in Embodiment 3 of the present invention;

[0028] Figure 4 It is a structural diagram of a computer device provided in Embodiment 4 of the present invention. DETAILED DESCRIPTION

[0029] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0030] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0031] Embodiment 1

[0032] Figure 1 A flowchart of a data transmission method is provided for the first embodiment of the present invention. This embodiment is applicable to the situation where a single-chip microcomputer performs data transmission with a host computer. The method can be executed by a data transmission device. The data transmission device can be implemented in the form of hardware and / or software. The data transmission device can be configured in the single-chip microcomputer and used in conjunction with the data transmission device in the host computer.

[0033] like Figure 1 As shown, the method includes:

[0034] S110, receiving the data frame sent by the host computer through the single-chip microcomputer receiving module.

[0035] When the host computer communicates with the single-chip microcomputer, the host computer encapsulates the transmission data into a data frame and sends it to the single-chip microcomputer. The single-chip microcomputer includes a single-chip microcomputer receiving module, and the single-chip microcomputer receives the data frame sent by the host computer through the single-chip microcomputer receiving module. Specifically, the single-chip microcomputer receiving module can be a single-chip microcomputer receiving DMA (Direct Memory Access) module.

[0036] Optionally, the single-chip microcomputer receiving module includes a data receiving area and a receiving module data buffer area, which are used to avoid damage to data frames during the receiving process; wherein, the single-chip microcomputer receiving DMA module includes a data receiving area RXBUFF and a receiving module data buffer area RXFIFO, the receiving DMA module receives data frames and copies the data frames to the data receiving area RXBUFF, if a new data frame is transmitted during this process, the receiving DMA module will copy the new data frame to RXBUFF, causing damage to the original data frame, therefore, in addition to RXBUFF, this embodiment also establishes an RXFIFO for caching data, thereby avoiding the destruction of the original data frame caused by receiving a new data frame during the data frame reception process.

[0037] Specifically, the method of receiving the data frame sent by the host computer through the single-chip microcomputer receiving module includes: if it is determined that the single-chip microcomputer receiving module generates a data transmission half interrupt, the data in the first area of ​​the data receiving area is read into the data buffer area of ​​the receiving module; if it is determined that the single-chip microcomputer receiving module generates a data transmission completion interrupt, the data in the second area of ​​the data receiving area is read into the data buffer area of ​​the receiving module; if it is determined that the single-chip microcomputer generates a serial port idle interrupt, the data in the data receiving area is read into the data buffer area of ​​the receiving module.

[0038] Before receiving the data frame, the MCU will judge the working status of the receiving DMA module and the serial port. The data transmission half interrupt means that the data size in the RXBUFF has exceeded half of the RXBUFF capacity. When the receiving DMA module has a data transmission half interrupt, the data in the first area of ​​RXBUFF, that is, the first half of the RXBUFF, is read into the RXFIFO. The data transmission completion interrupt means that the data size in the RXBUFF has exceeded the RXBUFF capacity. When the receiving DMA module has a data transmission completion interrupt, the data in the second area of ​​RXBUFF, that is, the second half of the RXBUFF, is read into the RXFIFO. The serial port idle interrupt means that the serial port of the MCU is in an idle state without receiving data frames for more than a preset time interval. When the MCU has a serial port idle interrupt, all the data in the RXBUFF is read into the RXFIFO.

[0039] The data frame includes a frame header, a function code, transmission data and a frame tail, wherein the transmission data is in a hexadecimal American Standard Code for Information Interchange format, and the frame header, function code and frame tail are in a non-hexadecimal American Standard Code for Information Interchange format.

[0040] The function code is used to indicate the function that the data transmission is intended to achieve. For example, the function code may be a data read function code, a data write function code, or a data backup function code. The transmission data may also be different for different function codes. For example, when the function code is a data read function code, the transmission data may be the data address and data length of the data to be read; when the function code is a data write function code, the transmission data may be the data address, data length, and data to be written; when the function code is a data backup function code, the transmission data may be the data address and data length of the data to be backed up. This embodiment does not limit the specific content of the function code and the transmission data.

[0041] In order to avoid frame delimitation errors during data transmission, the transmitted data is transmitted in hexadecimal ASCII (American Standard Code for Information Interchange) format, and the frame header, frame trailer and function code are transmitted in non-hexadecimal ASCII code.

[0042] The common body in the single-chip microcomputer matches the common body in the host computer, and the data type of the transmitted data matches the common body in the single-chip microcomputer and the common body in the host computer.

[0043] In the embodiment of the present invention, a matching common body is constructed in the single-chip microcomputer and the host computer, the data type in the common body is used for the transmission data, and the transmission data is transmitted in a unified format. In this way, no matter what type of data is used, it can be transmitted between the host computer and the single-chip microcomputer in a unified form, and after the transmission, since the data type uses the data type of the common body, normal data analysis can be performed, thereby ensuring the stability and accuracy of data transmission.

[0044] S120. Generate response data matching the function code according to the function code in the data frame.

[0045] After receiving the data frame through the receiving DMA module, the single-chip microcomputer parses the data frame. Optionally, the parsed data frame can also be checked to determine whether the received data frame is erroneous data. If the received data frame is erroneous data, the error code is used as response data, and the error code is fed back to the upper computer through the single-chip microcomputer sending module. If it is determined that the received data frame is correct data, the response data is generated according to the function code. This embodiment does not limit the specific method of data verification.

[0046] S130, sending the response data to the host computer through the single-chip microcomputer sending module, so that the host computer determines whether the data transmission is completed according to the response data.

[0047] The single-chip microcomputer sending module may be specifically a single-chip microcomputer sending DMA module, and the sending of response data from the single-chip microcomputer to the host computer is realized through the sending DMA module.

[0048] Corresponding to the single-chip microcomputer receiving module, optionally, the single-chip microcomputer sending module may include a data sending area and a sending module data buffer area; sending the response data to the host computer through the single-chip microcomputer sending module includes: storing the response data in the sending module data buffer area; if polling the sending module data buffer area to determine that there is response data in the sending module data buffer area, then reading the response data into the data sending area to send the response data.

[0049] Among them, the single-chip microcomputer sending DMA module includes a data sending area TXBUFF and a sending module data buffer area TXFIFO. After generating the response data, the single-chip microcomputer stores the response data in the TXFIFO. The single-chip microcomputer polls the TXFIFO to determine whether there is data in the TXFIFO. Specifically, a sending processing function can be set in the single-chip microcomputer, and polling is performed through the sending processing function. When there is response data in the TXFIFO, the response data in the TXFIFO is copied to the TXBUFF, and the DMA transmission is started. Similarly, setting TXBUFF and TXFIFO in the sending DMA module can avoid the situation where new data to be sent appears when the sending DMA module is sending data, which causes data errors, thereby improving the stability and accuracy of data transmission.

[0050] Correspondingly, when the host computer is sending a data frame, if it has not received the response data from the single-chip microcomputer after a preset time interval has passed since the data frame was sent, or the received single-chip microcomputer response data is an error code, it is determined that the data frame has failed to be sent, and the data frame is sent again. If the data frame still fails to be sent after exceeding the preset number of times, it is determined that an error has occurred in the serial port, and the serial port error is reported so that the error can be corrected in time and normal data transmission can be restored. If the host computer receives the correct single-chip microcomputer response data, it is determined that the data transmission is completed.

[0051] The technical solution of the embodiment of the present invention is that in the data frame sent from the host computer to the single-chip computer, the format of the transmitted data is defined as the hexadecimal American Standard Code for Information Interchange, the format of the frame header, function code and frame tail is the non-hexadecimal American Standard Code for Information Interchange, the data type of the transmitted data is matched with the common body in the single-chip computer and the common body in the host computer, when the host computer sends the data frame to the single-chip computer, the single-chip computer generates corresponding response data according to the function code in the data frame and sends it to the host computer, and the data frame is received by the single-chip computer receiving module including the data receiving area and the receiving module data buffer area. The problem that the transmission data is easy to conflict with the communication protocol data when the single-chip computer communicates with the host computer in the prior art, thereby causing abnormal data transmission, is solved, and the stability of data transmission between the single-chip computer and the host computer is improved.

[0052] Embodiment 2

[0053] Figure 2aThis is a flow chart of a data transmission method provided in the second embodiment of the present invention. Based on the above embodiment, the present embodiment further specifies the process of the single-chip microcomputer receiving module receiving the data frame sent by the host computer, the process of the single-chip microcomputer sending module sending the response data to the host computer, and the process of generating the response data when the function code is a data backup function code. The process of single-chip microcomputer initialization, the establishment of connection between the single-chip microcomputer and the host computer, and the data recovery after the single-chip microcomputer is powered on are also added.

[0054] like Figure 2a As shown, the method includes:

[0055] S210, creating a union in the single-chip microcomputer, and defining a data type in the union.

[0056] Specifically, in the common body of the microcontroller, a one-dimensional character array chartype[4], a one-dimensional 16-bit integer array shortType[2], a one-dimensional 16-bit unsigned integer array ushortType[2], a 32-bit integer variable intType, an unsigned 32-bit integer variable uintType, and a single-precision type variable floatType are defined.

[0057] The common body in the single-chip microcomputer matches the common body in the host computer. Accordingly, when the host computer is initialized, the common body in the host computer is constructed in the same construction method.

[0058] When initializing the microcontroller, you also need to set the default baud rate, data bit, stop bit, parity bit and other parameters of the serial port. The baud rate refers to the number of bytes transmitted per second. The data bit is a parameter that measures the actual data bits in the communication, which can be 5, 6, 7 or 8 bits. The stop bit is the last bit of the data packet, which can typically be 1, 1.5 or 2 bits. The parity bit is used to check the error of the transmitted data. Accordingly, when initializing the host computer, you need to set the baud rate, data bit, stop bit, parity bit and other parameters that match the microcontroller in the host computer.

[0059] S220. Create a random access memory global array and a random access memory unsigned character array in the random access memory of the single-chip microcomputer.

[0060] In the random access memory of the microcontroller, that is, the RAM (Random Access Memory) of the microcontroller, a one-dimensional global array RamData[RamDataSize] and a one-dimensional unsigned character array RamBit[RamBitSize] are defined.

[0061] S230. Create a memory chip global array and a memory chip unsigned character array in the memory chip of the single-chip microcomputer.

[0062] The memory chip of the microcontroller, that is, the Flash of the microcontroller, defines a one-dimensional global array FlashData[FlashDataSize] and a one-dimensional unsigned character array FlashBit[FlashBitSize].

[0063] The data types of the random access memory global array and the storage chip global array match the common body. The random access memory global array and the storage chip global array are used to store data in the data domain. The random access memory unsigned character array and the storage chip unsigned character array are used to store data in the bit domain.

[0064] S240, allocating the random access memory global array to the memory data domain of the data saving area and the memory data domain of the data clearing area.

[0065] The memory in SRAM (Static Random-Access Memory) is divided into a data storage area and a data clearing area. When the microcontroller loses power, the data in the data storage area will be transferred to the Flash area for data backup, and the data in the data clearing area will be cleared. After the microcontroller is powered on and restored, the data in the Flash area will be transferred to the data storage area again.

[0066] The data saving area can be further divided into the memory data field RD0 and the memory bit field RB0. The data clearing area can be further divided into the memory data field RD1 and the memory bit field RB1.

[0067] The global array RamData is allocated to RD0 and RD1. Specifically, RD0 can store the first half of the data of the global array RamData, and RD1 can store the second half of the data of the global array RamData, but this embodiment is not limited to this. For example, if the base address of RD0 is RamData_BaseAddr, the base address of RD1 is RamData_BaseAddr+4*RamDataSize.

[0068] S250, allocating the random access memory unsigned character array to the memory bit field of the data storage area and the memory bit field of the data clearing area.

[0069] The unsigned character array RamBit is allocated to RB0 and RB1. Specifically, RB0 can store the first half of the data of the unsigned character array RamBit, and RB1 can store the second half of the data of the unsigned character array RamBit, but this embodiment is not limited to this. For example, if the base address of RB0 is RamBit_BaseAddr, the base address of RB1 is RamBit_BaseAddr+4*RamBitSize.

[0070] S260, allocating the global array of the storage chip to the data domain of the flash memory, and allocating the unsigned character array of the storage chip to the bit domain of the flash memory.

[0071] The Flash area can be further divided into data field FD and bit field FB. The global array FlashData is assigned to the data field FD, and the unsigned character array FlashBit is assigned to the bit field FB. Therefore, the base address of the data field FD is FlashData_BaseAddr, and the base address of the bit field FB is FlashBit_BaseAddr.

[0072] Corresponding to the single-chip microcomputer, a global array D and a global array B can be created in the host computer. The data type of the global array D adopts the data type of the common body in the host computer, and the global array B is an unsigned character type one-dimensional array. The global array D is used to store the data in the RD0 and RD1 of the RAM area of ​​the single-chip microcomputer, and the global array B is used to store the data in the RB0 and RB1 of the RAM area of ​​the single-chip microcomputer.

[0073] Figure 2b A schematic diagram of the data storage structure of the microcontroller and the host computer is provided, such as Figure 2b As shown in the figure, the RAM area of ​​the microcontroller is divided into a power-off saving area, that is, a data saving area, and a power-off clearing area, that is, a data clearing area. The power-off saving area includes data field RD0 and bit field RB0, and the power-off clearing area includes data field RD1 and bit field RB1. The Flash area of ​​the microcontroller includes data field FD and bit field FB. The microcontroller transmits data with the host computer through the serial port. The RAM area of ​​the host computer is divided into data field D and bit field B.

[0074] S270, receiving the connection request data sent by the host computer.

[0075] After the host computer and the single-chip microcomputer are initialized, a communication connection needs to be established between the host computer and the single-chip microcomputer. The host computer sends connection request data to the single-chip microcomputer.

[0076] S280, determine whether the connection request data matches the preset data, if so, execute S290, otherwise execute S2100.

[0077] When the connection request data matches the preset data, it indicates that the received connection request data is valid data; otherwise, it indicates that the received connection request data is erroneous data.

[0078] S290, generating connection response data, and sending the connection response data to the host computer according to a preset baud rate, so that the host computer establishes a connection with the single-chip microcomputer.

[0079] When the received connection request data is valid data, the connection response data is sent using the preset baud rate. After receiving the connection response data, the host computer judges the connection response data, and if the connection response data is valid data, a connection is established with the microcontroller.

[0080] S2100, switch the preset baud rate to the current baud rate.

[0081] S2110, generating connection response data, and sending the connection response data to the host computer according to the current baud rate, so that the host computer resends the connection request data to the single-chip microcomputer. Return to execute S270.

[0082] When the received connection request data is error data, the baud rate is switched, and the connection response data is sent according to the current baud rate after the switch. After the baud rate is switched, the connection response data received by the host computer is error data, and the host computer resends the connection request data to the single-chip microcomputer, and repeats S270 and S2110 until the single-chip microcomputer and the host computer successfully establish a connection.

[0083] S2120, determining whether the single-chip microcomputer receiving module generates a data transmission halfway interrupt, if so, executing S2130, otherwise executing S2140.

[0084] After the single-chip microcomputer and the host computer successfully establish a connection, the single-chip microcomputer receives the data frame sent by the host computer through the receiving DMA. The above embodiment has described the process of receiving the data frame through the receiving DMA, which will not be repeated in this embodiment.

[0085] S2130, reading the data in the first area of ​​the data receiving area into the data buffer area of ​​the receiving module.

[0086] S2140, determining whether the single-chip microcomputer receiving module generates a data transmission completion interrupt, if so, executing S2150, otherwise executing S2160.

[0087] S2150, reading the data in the second area in the data receiving area into the data buffer area of ​​the receiving module.

[0088] S2160, determining whether the single-chip microcomputer receiving module generates a serial port idle interrupt, if so, executing S2170, otherwise executing S2180.

[0089] S2170, reading the data in the data receiving area into the data buffer area of ​​the receiving module.

[0090] S2180. Generate response data matching the function code according to the function code in the data frame.

[0091] Optionally, the function code may include a data backup function code; based on the function code in the data frame, response data matching the function code is generated, including: if it is determined that the function code is a data backup function code, the data in the memory data domain of the data storage area is backed up to the flash memory data domain, and / or the data in the memory bit domain of the data storage area is backed up to the flash memory bit domain; and the data backup completion flag is used as the response data.

[0092] That is, when the function code is a data backup function code, the data field RD0 of the data storage area of ​​the RAM area is backed up to the data field FD of the Flash area, and / or the data in the bit field RB0 of the data storage area is backed up to the bit field FB of the Flash area.

[0093] Correspondingly, if it is determined that the microcontroller is powered on again after power failure, and there is data in the flash data field and / or the flash bit field, the data in the flash data field is transferred to the memory data field of the data storage area, and / or the data in the flash bit field is transferred to the memory bit field of the data storage area.

[0094] Specifically, to determine whether there is data in the flash data field and / or the flash bit field, it is possible to determine whether there are a number of consecutive 0XFFs in the flash data field and / or the flash bit field. If so, it means that there is no valid data in the flash data field and / or the flash bit field. When there is valid data in the flash data field FD, the data in FD is copied to the data storage area RD0. When there is valid data in the flash bit field FB, the data in FB is copied to the data storage area RB0.

[0095] Optionally, the function code can also be used to read data in the global array RamData. Specifically, the data offset address and data length can be parsed according to the transmission data, and the absolute address of the data to be read in the data domain RD0 can be determined according to the data offset address. Data is read according to the data offset address and data length, and the obtained data is encapsulated into response data. The response data is written to the sending module data buffer area TXFIFO.

[0096] Correspondingly, after receiving the response data, the host computer parses the read data from the response data and stores the read data in the data field D.

[0097] Optionally, the function code can also be used to read data in the unsigned character array RamBit. Specifically, the data offset and data length are parsed from the transmission data, the bit operation address is determined according to the data offset, the bit state of the data in RamBit is read according to the bit operation address and the data length, and the read bit state is encapsulated into response data. The response data is written to the data buffer area TXFIFO of the sending module.

[0098] Correspondingly, after receiving the response data, the host computer parses the read data from the response data and stores the read data in bit field B.

[0099] Optionally, the function code can also be used to write data into the global array RamData. The transmission data is parsed to obtain the data to be written, the data offset address and the data length, and the absolute address in the data field RD0 is calculated according to the data offset address. According to the absolute address, the data to be written is sequentially written into the global array RamData. The data write success flag is used as the response data, and the response data is written into the sending module data buffer area TXFIFO.

[0100] Optionally, the function code can also be used to write data into an unsigned character array RamBit. The transmission data is parsed to obtain the bit state, data offset and data length, the bit operation address is determined according to the data offset, and the bit state is sequentially written into RamBit according to the bit operation address. The data write success flag is used as response data, and the response data is written into the sending module data buffer TXFIFO.

[0101] S2190. Store the response data into the data buffer area of ​​the sending module.

[0102] S2200, determine whether polling the data buffer of the sending module determines whether there is response data in the data buffer of the sending module, if so, execute S2210, otherwise return to execute S2200.

[0103] S2210. Read the response data into the data sending area and send the response data.

[0104] The manner of responding to data transmission according to the data transmission area TXBUFF and the data buffer area TXFIFO of the single-chip microcomputer transmission DMA module has been described in the above embodiment, and will not be repeated in this embodiment.

[0105] Embodiment 3

[0106] Figure 3 This is a schematic diagram of the structure of a data transmission device provided in Embodiment 3 of the present invention. Figure 3As shown, the device includes: a data frame receiving module 310, a response data generating module 320 and a response data sending module 330. Among them:

[0107] The data frame receiving module 310 is used to receive the data frame sent by the host computer through the single-chip receiving module;

[0108] Wherein, the single-chip microcomputer receiving module includes a data receiving area and a receiving module data buffer area, which are used to avoid data frame damage during the receiving process;

[0109] The data frame includes a frame header, a function code, transmission data and a frame tail, the transmission data is in a hexadecimal American Standard Code for Information Interchange format, and the frame header, function code and frame tail are in a non-hexadecimal American Standard Code for Information Interchange format;

[0110] The common body in the single-chip microcomputer matches the common body in the host computer, and the data type of the transmission data matches the common body in the single-chip microcomputer and the common body in the host computer;

[0111] The response data generating module 320 is used to generate response data matching the function code according to the function code in the data frame;

[0112] The response data sending module 330 is used to send the response data to the host computer through the single-chip microcomputer sending module, so that the host computer determines whether the data transmission is completed according to the response data.

[0113] The technical solution of the embodiment of the present invention is that in the data frame sent from the host computer to the single-chip computer, the format of the transmitted data is defined as the hexadecimal American Standard Code for Information Interchange, the format of the frame header, function code and frame tail is the non-hexadecimal American Standard Code for Information Interchange, the data type of the transmitted data is matched with the common body in the single-chip computer and the common body in the host computer, when the host computer sends the data frame to the single-chip computer, the single-chip computer generates corresponding response data according to the function code in the data frame and sends it to the host computer, and the data frame is received by the single-chip computer receiving module including the data receiving area and the receiving module data buffer area. The problem that the transmission data is easy to conflict with the communication protocol data when the single-chip computer communicates with the host computer in the prior art, thereby causing abnormal data transmission, is solved, and the stability of data transmission between the single-chip computer and the host computer is improved.

[0114] Based on the above embodiments

[0115] The data frame receiving module 310 includes:

[0116] A data transmission half-over interrupt processing unit is used to read the data in the first area of ​​the data receiving area into the receiving module data buffer area if it is determined that the single-chip microcomputer receiving module generates a data transmission half-over interrupt;

[0117] A data transmission completion interrupt processing unit, configured to read the data in the second area of ​​the data receiving area into the receiving module data buffer area if it is determined that the single-chip microcomputer receiving module generates a data transmission completion interrupt;

[0118] The serial port idle interrupt processing unit is used to read the data in the data receiving area into the receiving module data buffer area if it is determined that the single chip microcomputer generates a serial port idle interrupt.

[0119] On the basis of the above embodiment, the single-chip microcomputer sending module includes a data sending area and a sending module data buffer area;

[0120] The response data sending module 330 includes:

[0121] A response data buffer unit, used for storing the response data in the data buffer area of ​​the sending module;

[0122] The response data sending unit is used to read the response data into the data sending area and send the response data if it is determined that there is response data in the data buffer area of ​​the sending module by polling the data buffer area of ​​the sending module.

[0123] Based on the above embodiment, the device further includes:

[0124] A union creation module, used to create a union in the single-chip microcomputer and define a data type in the union;

[0125] A random access memory array creation unit is used to create a random access memory global array and a random access memory unsigned character type array in the random access memory of the single chip computer;

[0126] A memory chip array creation unit is used to create a memory chip global array and a memory chip unsigned character array in the memory chip of the single chip microcomputer;

[0127] The data types of the random access memory global array and the storage chip global array match the common body, and the common body in the single-chip microcomputer matches the common body in the host computer;

[0128] A random access memory global array allocation unit, used for allocating the random access memory global array to the memory data domain of the data storage area and the memory data domain of the data clearing area;

[0129] A random access memory unsigned character type array allocation unit is used to allocate the random access memory unsigned character type array to the memory bit field of the data storage area and the memory bit field of the data clearing area;

[0130] The storage chip array allocation unit is used to allocate the storage chip global array to the flash memory data domain and allocate the storage chip unsigned character array to the flash memory bit domain.

[0131] Based on the above embodiment, the function code includes a data backup function code;

[0132] The response data generation module 320 includes:

[0133] A data backup unit, for backing up the data in the memory data domain of the data storage area to the flash memory data domain, and / or backing up the data in the memory bit domain of the data storage area to the flash memory bit domain if it is determined that the function code is a data backup function code;

[0134] The response data generating unit is used to use the data backup completion mark as the response data.

[0135] Based on the above embodiment, the device further includes:

[0136] A data recovery module is used to transfer the data in the flash data domain to the memory data domain of the data storage area, and / or to transfer the data in the flash bit domain to the memory bit domain of the data storage area if it is determined that the microcontroller is powered on again after power failure and there is data in the flash data domain and / or the flash bit domain.

[0137] Based on the above embodiment, the device further includes:

[0138] A connection request data receiving module is used to receive the connection request data sent by the host computer;

[0139] A first connection response data sending module, used for generating connection response data if it is determined that the connection request data matches the preset data, and sending the connection response data to the host computer according to the preset baud rate, so that the host computer establishes a connection with the single-chip microcomputer;

[0140] A baud rate switching module, configured to switch the preset baud rate to the current baud rate if it is determined that the connection request data does not match the preset data;

[0141] The second connection response data sending module is used to generate connection response data and send the connection response data to the host computer according to the current baud rate, so that the host computer re-sends the connection request data to the single-chip microcomputer.

[0142] The data transmission device provided in the embodiment of the present invention can execute the data transmission method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method.

[0143] Embodiment 4

[0144] Figure 4 A schematic diagram of the structure of a computer device provided in Embodiment 4 of the present invention is shown in FIG. Figure 4 As shown, the computer device includes a processor 70, a memory 71, an input device 72 and an output device 73; the number of processors 70 in the computer device can be one or more. Figure 4 A processor 70 is taken as an example; the processor 70, memory 71, input device 72 and output device 73 in the computer device can be connected by a bus or other means. Figure 4 The example of connecting through bus is taken in the following.

[0145] The memory 71 is a computer-readable storage medium that can be used to store software programs, computer executable programs and modules, such as the modules corresponding to the data transmission method in the embodiment of the present invention (for example, the data frame receiving module 310, the response data generating module 320 and the response data sending module 330 in the data transmission device). The processor 70 executes various functional applications and data processing of the computer device by running the software programs, instructions and modules stored in the memory 71, that is, implements the above-mentioned data transmission method. The method includes:

[0146] Receive the data frame sent by the host computer through the single-chip receiving module;

[0147] Wherein, the single-chip microcomputer receiving module includes a data receiving area and a receiving module data buffer area, which are used to avoid data frame damage during the receiving process;

[0148] The data frame includes a frame header, a function code, transmission data and a frame tail, the transmission data is in a hexadecimal American Standard Code for Information Interchange format, and the frame header, function code and frame tail are in a non-hexadecimal American Standard Code for Information Interchange format;

[0149] The common body in the single-chip microcomputer matches the common body in the host computer, and the data type of the transmission data matches the common body in the single-chip microcomputer and the common body in the host computer;

[0150] According to the function code in the data frame, generating response data matching the function code;

[0151] The response data is sent to the host computer through the single-chip microcomputer sending module, so that the host computer determines whether the data transmission is completed according to the response data.

[0152] The memory 71 may mainly include a program storage area and a data storage area, wherein the program storage area may store an operating system and at least one application required for a function; the data storage area may store data created according to the use of the terminal, etc. In addition, the memory 71 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other non-volatile solid-state storage device. In some instances, the memory 71 may further include a memory remotely arranged relative to the processor 70, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0153] The input device 72 may be used to receive input digital or character information and generate key signal input related to user settings and function control of the computer device. The output device 73 may include a display device such as a display screen.

[0154] Embodiment 5

[0155] Embodiment 5 of the present invention further provides a storage medium containing computer executable instructions, wherein the computer executable instructions are used to execute a data transmission method when executed by a computer processor, the method comprising:

[0156] Receive the data frame sent by the host computer through the single-chip receiving module;

[0157] Wherein, the single-chip microcomputer receiving module includes a data receiving area and a receiving module data buffer area, which are used to avoid data frame damage during the receiving process;

[0158] The data frame includes a frame header, a function code, transmission data and a frame tail, the transmission data is in a hexadecimal American Standard Code for Information Interchange format, and the frame header, function code and frame tail are in a non-hexadecimal American Standard Code for Information Interchange format;

[0159] The common body in the single-chip microcomputer matches the common body in the host computer, and the data type of the transmission data matches the common body in the single-chip microcomputer and the common body in the host computer;

[0160] According to the function code in the data frame, generating response data matching the function code;

[0161] The response data is sent to the host computer through the single-chip microcomputer sending module, so that the host computer determines whether the data transmission is completed according to the response data.

[0162] Of course, the computer executable instructions of a storage medium including computer executable instructions provided by an embodiment of the present invention are not limited to the operations of the method described above, but can also execute related operations in the data transmission method provided by any embodiment of the present invention.

[0163] Through the above description of the implementation methods, the technicians in the relevant field can clearly understand that the present invention can be implemented by means of software and necessary general hardware, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as a computer floppy disk, a read-only memory (ROM), a random access memory (RAM), a flash memory (FLASH), a hard disk or an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment of the present invention.

[0164] It is worth noting that in the embodiment of the above-mentioned data transmission device, the various units and modules included are only divided according to functional logic, but are not limited to the above-mentioned division, as long as the corresponding functions can be achieved; in addition, the specific names of the functional units are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of the present invention.

[0165] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A data transmission method, characterized in that: The method is performed by a single chip microcomputer, and the method comprises: Receive the data frame sent by the host computer through the single-chip receiving module; Wherein, the single-chip microcomputer receiving module includes a data receiving area and a receiving module data buffer area, which are used to avoid data frame damage during the receiving process; The data frame includes a frame header, a function code, transmission data and a frame tail, the transmission data is in a hexadecimal American Standard Code for Information Interchange format, and the frame header, function code and frame tail are in a non-hexadecimal American Standard Code for Information Interchange format; The common body in the single-chip microcomputer matches the common body in the host computer, the data type of the transmission data matches the common body in the single-chip microcomputer and the common body in the host computer, and the construction method of the common body in the single-chip microcomputer is the same as the construction method of the common body in the host computer; According to the function code in the data frame, generating response data matching the function code; The response data is sent to the host computer through the single-chip microcomputer sending module, so that the host computer determines whether the data transmission is completed according to the response data; The receiving of the data frame sent by the host computer through the single-chip microcomputer receiving module includes: If it is determined that the single-chip microcomputer receiving module generates a data transmission halfway interrupt, the data in the first area of ​​the data receiving area is read into the receiving module data buffer area; If it is determined that the single-chip microcomputer receiving module generates a data transmission completion interrupt, the data in the second area of ​​the data receiving area is read into the receiving module data buffer area; If it is determined that the single-chip microcomputer generates a serial port idle interrupt, the data in the data receiving area is read into the receiving module data buffer area; Before the single-chip microcomputer receiving module receives the data frame sent by the host computer, it also includes: Creating a union in the single-chip microcomputer and defining a data type in the union; Create a random access memory global array and a random access memory unsigned character array in the random access memory of the microcontroller; Create a memory chip global array and a memory chip unsigned character array in the memory chip of the microcontroller; Wherein, the data types of the random access memory global array and the storage chip global array match the common body; Allocate the random access memory global array to the memory data domain of the data saving area and the memory data domain of the data clearing area; Allocate the random access memory unsigned character type array to the memory bit field of the data saving area and the memory bit field of the data clearing area; Allocate the memory chip global array to the flash memory data domain, and allocate the memory chip unsigned character array to the flash memory bit domain.

2. The method according to claim 1, characterized in that The single-chip microcomputer sending module includes a data sending area and a sending module data buffer area; The step of sending the response data to the host computer through the single-chip microcomputer sending module includes: Store the response data in the data buffer of the sending module; If the data buffer area of ​​the sending module is polled to determine that there is response data in the data buffer area of ​​the sending module, the response data is read into the data sending area and the response data is sent.

3. The method according to claim 1, characterized in that The function code includes a data backup function code; According to the function code in the data frame, generate response data matching the function code, including: If it is determined that the function code is a data backup function code, the data in the memory data domain of the data storage area is backed up to the flash memory data domain, and / or the data in the memory bit domain of the data storage area is backed up to the flash memory bit domain; The data backup completion flag is used as response data.

4. The method according to claim 3, characterized in that The method further comprises: If it is determined that the microcontroller is powered on again after power failure, and there is data in the flash data field and / or the flash bit field, the data in the flash data field is transferred to the memory data field of the data storage area, and / or the data in the flash bit field is transferred to the memory bit field of the data storage area.

5. The method according to claim 1, characterized in that Before receiving the data frame sent by the host computer through the single-chip receiving module, it also includes: Receive the connection request data sent by the host computer; If it is determined that the connection request data matches the preset data, then generating connection response data, and sending the connection response data to the host computer according to the preset baud rate, so that the host computer establishes a connection with the single-chip microcomputer; If it is determined that the connection request data does not match the preset data, switching the preset baud rate to the current baud rate; Generate connection response data, and send the connection response data to the host computer according to the current baud rate, so that the host computer resends the connection request data to the single-chip microcomputer.

6. A data transmission device, characterized in that: The device is deployed in a single chip microcomputer, and the device comprises: The data frame receiving module is used to receive the data frame sent by the host computer through the single-chip receiving module; Wherein, the single-chip microcomputer receiving module includes a data receiving area and a receiving module data buffer area, which are used to avoid data frame damage during the receiving process; The data frame includes a frame header, a function code, transmission data and a frame tail, the transmission data is in a hexadecimal American Standard Code for Information Interchange format, and the frame header, function code and frame tail are in a non-hexadecimal American Standard Code for Information Interchange format; The common body in the single-chip microcomputer matches the common body in the host computer, the data type of the transmission data matches the common body in the single-chip microcomputer and the common body in the host computer, and the construction method of the common body in the single-chip microcomputer is the same as the construction method of the common body in the host computer; A response data generating module, used for generating response data matching the function code according to the function code in the data frame; A response data sending module, used to send the response data to the host computer through the single-chip sending module, so that the host computer determines whether the data transmission is completed according to the response data; The data frame receiving module comprises: A data transmission half-over interrupt processing unit, configured to read the data in the first area of ​​the data receiving area into the receiving module data buffer area if it is determined that the single-chip microcomputer receiving module generates a data transmission half-over interrupt; A data transmission completion interrupt processing unit, configured to read the data in the second area of ​​the data receiving area into the receiving module data buffer area if it is determined that the single-chip microcomputer receiving module generates a data transmission completion interrupt; The serial port idle interrupt processing unit is used to read the data in the data receiving area into the receiving module data buffer area if it is determined that the single chip microcomputer generates a serial port idle interrupt; A union creation module, used to create a union in the single-chip microcomputer and define a data type in the union; Create a random access memory global array and a random access memory unsigned character array in the random access memory of the microcontroller; Create a memory chip global array and a memory chip unsigned character array in the memory chip of the microcontroller; Wherein, the data types of the random access memory global array and the storage chip global array match the common body; Allocate the random access memory global array to the memory data domain of the data saving area and the memory data domain of the data clearing area; Allocate the random access memory unsigned character type array to the memory bit field of the data saving area and the memory bit field of the data clearing area; Allocate the memory chip global array to the flash memory data domain, and allocate the memory chip unsigned character array to the flash memory bit domain.

7. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the data transmission method according to any one of claims 1 to 5 is implemented.

8. A storage medium storing computer executable instructions, characterized in that: The computer executable instructions are used to perform the data transmission method according to any one of claims 1 to 5 when executed by a computer processor.

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