A server and related equipment

Abstract

The present application discloses a server and related equipment, which are applied to a fully immersed liquid cooling scenario. The server includes: a backplane, a computing node and a switching node. The backplane, the computing node and the switching node are all immersed in a working fluid, and the computing node is connected to the switching node through the backplane. The computing node includes a first chip and a first circuit board, and the first chip is located on the first circuit board. The switching node includes a second chip and a second circuit board, and the second chip is located on the second circuit board. The first chip and the second chip are connected through a link, and the impedance between at least two points in the link in the working fluid matches at least one of the impedances of the first chip in the working fluid or the impedance of the second chip in the working fluid. In the present application, the impedance between at least two points in the link in the working fluid matches at least one of the impedances of the first chip or the second chip in the working fluid, and the problem of signal integrity degradation can be solved without adding additional structural parts, thereby reducing costs.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of communications, and in particular to a server and related equipment. Background Art

[0002] Full immersion liquid cooling is a cooling method used in data centers for high-performance computing clusters and artificial intelligence applications. By completely immersing cluster servers in a working fluid, the circulating fluid removes heat from the system, achieving low energy consumption and high energy efficiency. However, full immersion liquid cooling can degrade signal integrity.

[0003] Currently, a sealed housing is usually added to the location of high-speed system components on the circuit board to prevent the high-speed system components from contacting the working fluid, thereby solving the problem of signal integrity degradation caused by immersion of high-speed system components in the working fluid.

[0004] However, adding a sealed housing to isolate the high-speed connector from the working fluid to solve the problem of signal integrity degradation caused by immersing the high-speed connector in the working fluid requires additional structural parts on the circuit board, thereby increasing the implementation cost. Summary of the Invention

[0005] Embodiments of the present application provide a server and related equipment for use in full immersion liquid cooling technology. The server maintains a consistent impedance when immersed in a working fluid, thereby addressing the issue of signal integrity degradation caused by immersion in the working fluid. This eliminates the need for additional structural components, thereby reducing costs and conserving resources.

[0006] In a first aspect, a server is provided, the server comprising:

[0007] The backplane, computing nodes and switching nodes are all immersed in the working fluid, and the computing nodes are connected to the switching nodes through the backplane.

[0008] Specifically, the computing node includes a first chip and a first circuit board, the first chip is located on the first circuit board, and the switching node includes a second chip and a second circuit board, the second chip is located on the second circuit board.

[0009] The first chip and the second chip are connected via a link, and the impedance between at least two points in the link in the working fluid matches at least one of the impedance of the first chip in the working fluid or the impedance of the second chip in the working fluid.

[0010] In an embodiment of the present application, the first chip and the second chip in the server are connected through a link, and the impedance between at least two points in the link in the working fluid matches at least one of the impedance of the first chip in the working fluid or the impedance of the second chip in the working fluid. This ensures that the impedance between at least two points in the link connecting the first chip and the second chip in the server in the working fluid matches the impedance of the second chip or the first chip in the working fluid, thereby reducing signal loss and thereby reducing degradation of signal integrity, without the need to add additional structural parts, reducing costs and saving resources.

[0011] In a possible implementation of the first aspect, the link includes at least one component, that is, the first chip and the second chip are connected through at least one component, and the impedance of at least one component among the multiple components in the working fluid matches at least one of the impedance of the first chip in the working fluid or the impedance of the second chip in the working fluid.

[0012] In an embodiment of the present application, the link includes at least one component, and the impedance of at least one of the multiple components in the working fluid matches at least one of the impedance of the first chip in the working fluid or the impedance of the second chip in the working fluid, thereby further ensuring that the impedance of at least one component of the link in the server in the working fluid matches the impedance of the second chip or the first chip in the working fluid, thereby improving the reliability and flexibility of the solution.

[0013] In a possible implementation manner of the first aspect, the multiple components include a first transmission line group, a first connector, at least one first via, a second transmission line group, a second connector, and at least one second via.

[0014] The first chip, the first transmission line group, the first connector and at least one first via are located on the first circuit board, and the first chip is connected to the backplane through the first transmission line group, the first connector and at least one first via.

[0015] The second chip, the second transmission line group, the second connector and at least one second via are located on the second circuit board, and the second chip is connected to the backplane through the second transmission line group, the second connector and at least one second via.

[0016] In the implementation of the present application, the specific implementation of the server is explained, which improves the reliability of the solution.

[0017] In a possible implementation of the first aspect, the multiple components further include a first capacitor and / or a second capacitor, wherein the first capacitor is located on the first circuit board and connected to the first chip, and / or the second capacitor is located on the second circuit board and connected to the second chip.

[0018] In an embodiment of the present application, the component further includes a first capacitor and / or a second capacitor, wherein the first capacitor is located on the first circuit board and connected to the first chip, and / or the second capacitor is located on the second circuit board and connected to the second chip. This increases the application scenarios of the solution and improves the flexibility of the solution.

[0019] In a possible implementation of the first aspect, the plurality of components further include a third transmission line group, a third connector, a fourth connector, and at least one third via. The third transmission line group, the third connector, the fourth connector, and the at least one third via are located on a backplane; the third connector and the fourth connector are connected via the third transmission line group and the at least one third via; the third connector is connected to the first connector, and the fourth connector is connected to the second connector.

[0020] In the embodiment of the present application, the third connector and the fourth connector are connected through a third transmission line group and at least one third via on the backplane, and the implementation method of connecting the computing node and the switching node on the backplane is specifically described, thereby improving the reliability of the solution.

[0021] In a possible implementation of the first aspect, the multiple components further include a third connector, a fourth connector, and a cable. The third connector and the fourth connector are located on the backplane, the third connector and the fourth connector are connected via a cable, and the third connector is connected to the first connector, and the fourth connector is connected to the second connector.

[0022] In the embodiment of the present application, the third connector and the fourth connector are connected via a cable on the backplane, which specifically describes the implementation method of connecting the computing node and the switching node on the backplane, increases the application scenarios of the solution, and improves the reliability and flexibility of the solution.

[0023] In a possible implementation of the first aspect, impedances of all of the multiple components in the working fluid match at least one of an impedance of the first chip in the working fluid or an impedance of the second chip in the working fluid.

[0024] In an embodiment of the present application, the impedances of all of the multiple components in the working fluid match the impedance of at least one of the second chip or the first chip in the working fluid, which can ensure that the impedance of the entire link of the entire server signal transmission is consistent, thereby further reducing the reduction of signal energy, avoiding signal loss as much as possible, and completely solving the problem of signal integrity degradation.

[0025] In a possible implementation of the first aspect, when the impedance of the first chip in the working fluid is equal to the impedance of the second chip in the working fluid, the impedance between at least two points in the link in the working fluid matches the impedance of the first chip in the working fluid, or the impedance between at least two points in the link in the working fluid matches the impedance of the second chip in the working fluid.

[0026] In the embodiments of the present application, the impedance of the second chip in the working fluid is equal to the impedance of the first chip in the working fluid. Therefore, the impedance in the working fluid between at least two points in the link matches the impedance of the second chip or the first chip in the working fluid. This can more accurately prevent the degradation of signal integrity caused by the server being immersed in the working fluid.

[0027] In a possible implementation of the first aspect, when the impedances of the first chip and the second chip in the working fluid are not equal, the impedance in the working fluid between at least two points in the link matches the average value of the impedance of the first chip in the working fluid and the impedance of the second chip in the working fluid.

[0028] In an embodiment of the present application, when the impedance of the second chip in the working fluid is not equal to the impedance of the first chip in the working fluid, the impedance between at least two points in the link in the working fluid is matched to the average of the impedances of the second chip and the first chip in the working fluid. This minimizes signal degradation while increasing the application scenarios of the solution.

[0029] In a possible implementation of the first aspect, the server further includes a power module, which is configured to provide power to at least one of the computing nodes or the switching nodes.

[0030] In an embodiment of the present application, the server further includes a power supply module, which increases the scope of application of the embodiment of the present application.

[0031] In a possible implementation of the first aspect, the server further includes a cabinet, and the cabinet is used to accommodate the working fluid.

[0032] The server in the embodiment of the present application further includes a cabinet for accommodating the working fluid, thereby improving the reliability of the solution.

[0033] In a second aspect, a server design method is provided, specifically comprising:

[0034] A model of at least one component included in the link is determined based on the impedance between at least two points in the link in the working fluid and at least one of the impedance of the first chip in the working fluid or the impedance of the second chip in the working fluid, and the link, the first chip and the second chip belong to the server.

[0035] In an embodiment of the present application, models of multiple components are determined based on matching the impedance between at least two points in the link in the working fluid with the target impedance, where the target impedance is at least one of the impedance of the first chip in the working fluid or the impedance of the second chip in the working fluid. This ensures that the server reduces signal loss as much as possible, thereby reducing degradation of signal integrity, without the need to add additional structural parts, reducing costs and saving resources.

[0036] In a possible implementation manner of the second aspect, the connector included in the link is determined by a target impedance and a dielectric constant (Dk) parameter and a dissipation factor (Df) parameter of the working fluid.

[0037] In an embodiment of the present application, the connector is determined by the target impedance and the Dk and Df parameters of the working fluid to ensure impedance consistency between the connector and the second chip and / or the first chip in a fully immersion liquid cooling scenario, thereby reducing the possibility of signal integrity degradation.

[0038] In a possible implementation manner of the second aspect, the transmission line group included in the link is determined by a target impedance and a Dk parameter of the working fluid.

[0039] In an embodiment of the present application, the transmission line group is determined by the target impedance and the Dk parameter of the working fluid, which can ensure impedance matching between the transmission line group and the second chip and / or the first chip in a full immersion liquid cooling scenario, thereby further reducing the possibility of signal integrity degradation.

[0040] In a possible implementation manner of the second aspect, the capacitance included in the link is determined by the target impedance and the Dk parameter and the Df parameter of the working fluid.

[0041] In the embodiment of the present application, the capacitance is determined by the target impedance and the Dk parameter of the working fluid, which can ensure that the impedance of each component in the server transmission signal is as consistent as possible, and can avoid the degradation of signal integrity to the greatest extent.

[0042] In a possible implementation manner of the second aspect, the vias included in the link are determined by the target impedance and the Dk parameter and the Df parameter of the working fluid.

[0043] In the embodiment of the present application, the via is determined by the fourth impedance and the DK parameter and Df parameter of the working fluid, which can ensure that the impedance of each component in the server signal transmission process is as consistent as possible, and can avoid the degradation of signal integrity to the greatest extent. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1A schematic diagram of a cluster server with a backplane provided in an embodiment of the present application;

[0045] Figure 2 A schematic diagram of the structure of a server provided in an embodiment of the present application;

[0046] Figure 3 Another structural diagram of the server provided in an embodiment of the present application;

[0047] Figure 4 A logical flow chart of a server design method provided in an embodiment of the present application;

[0048] Figure 5 Another structural diagram of the server provided in an embodiment of the present application;

[0049] Figure 6 Another structural diagram of the server provided in an embodiment of the present application. DETAILED DESCRIPTION

[0050] Embodiments of the present application provide a server and related equipment for use in full immersion liquid cooling technology. While immersed in a working fluid, the server ensures impedance matching between at least one of multiple components and a second chip or a first chip. This resolves the issue of signal integrity degradation caused by immersion of the server in the working fluid and avoids the need for additional structural components, thereby reducing costs and conserving resources.

[0051] The terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequential order. It should be understood that the terms used in this way can be interchangeable under appropriate circumstances, and this is merely a way of distinguishing the objects of the same attributes when describing them in the embodiments of the present application. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, so that the process, method, system, product or equipment comprising a series of units need not be limited to those units, but may include other units that are not clearly listed or inherent to these processes, methods, products or equipment.

[0052] Before introducing the embodiments of the present application, a brief description of the relevant contents of the full immersion liquid cooling technology is first given to facilitate subsequent understanding of the embodiments of the present application.

[0053] Full immersion liquid cooling technology is a key advancement in data center cooling for high-performance computing clusters (such as server clusters) and artificial intelligence (AI). By completely immersing the server cluster, including the switches, in a working fluid, the circulating working fluid removes heat from the system, achieving low energy consumption and high energy efficiency.

[0054] Using full immersion liquid cooling technology, the high-speed signal transmission paths in cluster servers, namely high-speed system components (high-speed system components include chips, printed circuit boards (PCBs) or cables, connectors, capacitors, and vias, etc.) are completely covered with working fluid. The working fluid can cause more serious degradation of the signal integrity of high-speed signals, especially for signals evolving to 112G and 200G. The signal integrity degradation caused by the immersion of high-speed system components in the working fluid cannot be ignored. Therefore, a sealed housing is added to the circuit board to isolate the high-speed system components from contact with the working fluid, thereby solving the problem of signal integrity degradation caused by the immersion of high-speed system components in the working fluid.

[0055] However, adding a sealed housing to the location of high-speed system components on the circuit board requires additional structural parts, thereby increasing implementation costs.

[0056] To address the above-mentioned issues, an embodiment of the present application first provides a server and related equipment for use in full immersion liquid cooling technology. The server includes: a backplane, a computing node, and a switching node, wherein the backplane, computing node, and switching node are all immersed in a working fluid, and the computing node is connected to the switching node via the backplane. Specifically, the computing node includes a first chip and a first circuit board, wherein the first chip is located on the first circuit board; the switching node includes a second chip and a second circuit board, wherein the second chip is located on the second circuit board. The first chip and the second chip are connected via a link, and the impedance between at least two points in the link in the working fluid matches at least one of the impedance of the first chip in the working fluid or the impedance of the second chip in the working fluid. The server can ensure that the impedance of the second chip, the first chip, and at least two points in the link immersed in the working fluid remain as consistent as possible, thereby resolving the problem of signal integrity degradation caused by the server being immersed in the working fluid, without the need to add additional structural components, thereby reducing costs and saving resources.

[0057] In order to better understand the embodiments of the present application, the server provided by the embodiments of the present application is first described in detail with reference to the accompanying drawings. It is known to those skilled in the art that with the development of technology and the emergence of new scenarios, the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems. Please refer to the embodiments provided by the present application below for details. The application scenario of the cluster server in the immersion liquid cooling scenario is explained as an example. For specific examples, please refer to Figure 1 , Figure 1A schematic diagram of a cluster server with a backplane provided in an embodiment of the present application, wherein the cluster server with a backplane is divided into computing nodes, switching nodes, and a backplane according to function, and the computing nodes and switching nodes are connected by the backplane. The computing nodes include a first chip and a first circuit board, the switching node board includes a second chip and a second circuit board, and the first chip and the second chip are connected via a link. The entire backplane can be immersed in the working fluid, or only the computing nodes and switching nodes on the backplane can be immersed in the working fluid.

[0058] Please refer to the following for details: Figure 2 For example, Figure 2 A schematic diagram of the structure of a server provided in an embodiment of the present application, wherein the computing nodes are mainly used for data processing, scientific computing, business processing and other data-related content, and the switching nodes are mainly used for data forwarding.

[0059] In one possible implementation, the link includes at least one component, that is, the first chip and the second chip are connected by at least one component, and the impedance of at least one of the multiple components in the working fluid matches at least one of the impedance of the first chip in the working fluid or the impedance of the second chip in the working fluid. Optionally, the multiple components include a first transmission line group, a first connector, at least one first via, a second transmission line group, a second connector, and at least one second via. The first chip, the first transmission line group, the first connector, and the at least one first via are located on a first circuit board, and the first chip is connected to the backplane via the first transmission line group, the first connector, and the at least one first via. In addition, the second chip, the second transmission line group, the second connector, and the at least one second via are located on a second circuit board, and the second chip is connected to the backplane via the second transmission line group, the second connector, and the at least one second via.

[0060] For example, the following Figure 2 The example of the server specifically explains the specific composition of the server. Figure 2 The server shown includes a first circuit board 201, a second circuit board 202, and a backplane 203. A high-speed integrated circuit (IC) chip, namely a first chip 2011, on the first circuit board 201 is connected to the backplane 203 via a first transmission line set 2012, a first connector 2013, and at least one first via 2014. Furthermore, a second IC chip, namely a second chip 2021, on the second circuit board 202 is connected to the backplane 203 via a second transmission line set 2022, a second connector 2023, and at least one second via 2024.

[0061] In the implementation of the present application, the specific implementation of the server is explained, which improves the reliability of the solution.

[0062] In addition, in a possible implementation, the multiple components further include a first capacitor and / or a second capacitor, wherein the first capacitor is located on the first circuit board and connected to the first chip, and / or the second capacitor is located on the second circuit board and connected to the second chip. Figure 2 In the embodiment, the first circuit board 201 further includes a first capacitor 2015, and the first capacitor 2015 is connected to the first chip 2011, and the second circuit board 202 further includes a second capacitor 2025, and the second capacitor 2025 is connected to the second chip 2021. In addition, in other examples, only the first circuit board 201 may include the first capacitor 2015, or the second circuit board 202 may include the second capacitor 2025. It is understood that in actual situations, this can be determined according to specific needs and is not specifically limited here.

[0063] In one possible implementation, the plurality of components further include a third transmission line group, a third connector, a fourth connector, and at least one third via. The third transmission line group, the third connector, the fourth connector, and the at least one third via are located on a backplane, and the third connector and the fourth connector are connected via the third transmission line group and the at least one third via. Furthermore, the third connector is connected to the first connector, and the fourth connector is connected to the second connector.

[0064] For example, let's continue with Figure 2 For example, a backplane 203 includes a third connector 2031, a fourth connector 2032, a third transmission line group 2033, and at least one third via 2034. The third connector 2031 and the fourth connector 2032 are connected via the third transmission line group 2033 and the at least one third via 2034. Specifically, the backplane 203 may be a PCB backplane. The first connector 2013 is connected to the third connector 2021, and the second connector 2023 is connected to the fourth connector 2032, thereby connecting the backplane 203 to the first circuit board 201 and the second circuit board 202. Specifically, the first connector 2013 and the third connector 2021 are male and female connectors, and the second connector 2023 and the fourth connector 2032 are also male and female connectors. It is understood that whether the first connector 2013, the third connector 2031, the second connector 2023, and the fourth connector 2032 are male or female connectors is determined by actual circumstances and is not specifically limited here.

[0065] In the embodiment of the present application, the third connector and the fourth connector are connected through the third transmission line group and at least one third via on the backplane, and the implementation method of connecting the backplane to the first circuit board and the second circuit board is specifically described to improve the reliability of the solution.

[0066] Optionally, the plurality of components further include a third connector, a fourth connector, and a cable, wherein the third connector and the fourth connector are located on the backplane, and the third connector and the fourth connector are connected via the cable, and the third connector is connected to the first connector, and the fourth connector is connected to the second connector.

[0067] For example, please refer to Figure 3 For example, Figure 3 Another structural diagram of the server provided in the embodiment of the present application. The third connector 3031 and the fourth connector 3032 are located on the backplane (ie, the backplane is the support structure of the third connector 3031 and the fourth connector 3032). Figure 2 Compared to the example, Figure 3 Lieutenant General Figure 2 The third transmission line group 2031 and at least one third via 2032 are replaced with cable 3033, that is, the third connector 3031 and the fourth connector 3032 are connected via cable 3033, and the first connector 3013 is connected to the third connector 3031, and the second connector 3023 is connected to the fourth connector 3032. It should be noted that the first connector 3013 and the third connector 3031 are male and female connectors, and the second connector 2023 and the fourth connector 2032 are also male and female connectors. Figure 2 The details are similar to those described in , and will not be repeated here.

[0068] In the embodiment of the present application, the third connector and the fourth connector are connected via a cable on the backplane, which specifically describes the implementation method of connecting the backplane to the first circuit board and the second circuit board, increases the application scenarios of the solution, and improves the reliability and flexibility of the solution.

[0069] It should be noted that the example of the aforementioned server being a cluster server with a backplane is only used to understand the embodiments of the present application. It is understandable that in actual situations, the server can also be other devices or boards for transmitting signals, which is not specifically limited here.

[0070] Specifically, in an immersion liquid cooling environment, the impedance of at least one of the aforementioned multiple components in the working fluid matches at least one of the impedance of the first chip in the working fluid or the impedance of the second chip in the working fluid, and the parameters of the working fluids are the same. Specifically, the parameters of the working fluids are the same, ensuring that the factors affecting the degradation of the components by the working fluid are consistent with the factors affecting the degradation of the second chip and the first chip by the working fluid. The determination of the components included in a specific server is illustrated by a server design method provided in an embodiment of the present application. For ease of understanding, please refer to the following for example. Figure 4 To illustrate, Figure 4A logical flow chart of a server design method provided in an embodiment of the present application can be used according to Figure 4 The method shown in Figure 1 or Figure 2 The server shown in the figure makes the impedance of at least one of the multiple components in the working fluid match the target impedance (the target impedance is the impedance to be matched by the component in the working fluid), thereby improving the performance of the server when immersed in the working fluid and reducing the possibility of degradation of signal integrity.

[0071] The target impedance is determined as shown in step S1:

[0072] S1. Determine the target impedance based on the high-speed port impedance of the chip.

[0073] For example, the high-speed port impedance of the IC (i.e., the second chip) and the first chip can be measured separately using a vector network analyzer or a time domain reflectometer. Alternatively, if the IC is sealed, the high-speed port impedance can be measured directly. If the IC is a bare chip, the high-speed port impedance can be measured by immersing it in a working fluid.

[0074] In one possible implementation, when the impedance of the first chip in the working fluid is equal to the impedance of the second chip in the working fluid, the impedance between at least two points in the link in the working fluid matches the impedance of the first chip in the working fluid, or the impedance between at least two points in the link in the working fluid matches the impedance of the second chip in the working fluid.

[0075] Exemplarily, when the high-speed port impedance of the second chip and the first chip in the working fluid is the same, the target impedance can be equal to the impedance of the high-speed port of either the second chip or the first chip, that is, the high-speed port impedance of the second chip or the first chip obtained by the test can be determined as the target impedance. Alternatively, optionally, the target impedance may include the impedance value within a certain error range of the high-speed port impedance of the second chip or the first chip in the working fluid, for example, the values ​​included in the error range of ±0.5 or ±0.05% of the high-speed port impedance all belong to the target impedance, which is not specifically limited here. It can be understood that the error range of ±0.5 or ±0.05% of the high-speed port impedance here is only used as an example to understand the embodiments of the present application. The specific value of the error range in actual conditions can be determined according to actual conditions, which is not specifically limited here.

[0076] Furthermore, the impedance between at least two points in the link in the working fluid matches the impedance of the first chip or the second chip in the working fluid, that is, matches the target impedance.

[0077] In the embodiments of the present application, the impedance of the second chip in the working fluid is equal to the impedance of the first chip in the working fluid, and the target impedance is the impedance of the second chip or the first chip in the working fluid. This can more accurately avoid the degradation of signal integrity caused by the server being immersed in the working fluid.

[0078] In addition, optionally, when the impedances of the first chip and the second chip in the working fluid are not equal, the impedance between at least two points in the link in the working fluid matches the average value of the impedance of the first chip in the working fluid and the impedance of the second chip in the working fluid.

[0079] Exemplarily, when the high-speed port impedances of the second chip and the first chip in the working fluid are not equal, the target impedance can be the average value of the high-speed port impedances of the first chip and the second chip in the working fluid, respectively, or can include impedance values ​​within a certain error range of the average value. For example, the values ​​within an error range of ±0.5 or ±0.05% of the average value of the impedance of the second chip and the first chip in the working fluid are all target impedances, and are not specifically limited here. It is understandable that the error range of ±0.5 or ±0.05% of the average value here is only used as an example to understand the embodiments of the present application. The specific value of the error range in actual situations can be determined according to actual conditions and is not specifically limited here.

[0080] At this time, the impedance of at least one component among the multiple components in the working fluid matches the target impedance.

[0081] In an embodiment of the present application, when the impedance of the second chip in the working fluid is not equal to the impedance of the first chip in the working fluid, the impedance of at least one of the multiple components in the working fluid is matched to the average of the impedances of the second chip and the first chip in the working fluid. This minimizes signal degradation while increasing the application scenarios of the solution.

[0082] The link may be designed according to the target impedance so that the impedance of at least one component among the multiple components on the link in the working fluid matches the target impedance, specifically including:

[0083] S2. Determine the connector according to the target impedance.

[0084] A connector whose impedance in the working fluid is equal to the target impedance can be selected, or a connector whose impedance in the working fluid is within the error range of the target impedance can be selected, specifically including the aforementioned first connector, second connector, third connector and fourth connector.

[0085] Exemplarily, the method for determining the connector may adopt any one of the following two implementations:

[0086] Method 1: Design a new connector based on the target impedance.

[0087] For example, a connector model in the working fluid can be constructed based on the dielectric constant (Dk) and loss factor (Df) parameters of the working fluid, so that the impedance of the connector in the working fluid matches the target impedance. It should be noted that the available working fluid parameters in general simulation software are limited, and there is no guarantee that the working fluid is included. Therefore, parameters that are the same as the working fluid parameters or within a certain error range of the working fluid parameters can be selected, and the specific parameters are not limited here.

[0088] Specifically, for a newly designed connector, the model of the connector can be imported into three-dimensional electromagnetic simulation software (such as high frequency structure simulator (HFSS) software), and the air contact medium material properties of the connector are modified from air to the Dk parameters and Df parameters of the working fluid. The frequency sweep range (0 Hz to 60 GHz) and the convergence standard (the minimum number of converged passes is set to 2) are set, and then the impedance of the connector in the working fluid in the full immersion liquid cooling scenario is obtained. By adjusting the model of the connector, its impedance is matched with the target impedance, thereby ensuring the impedance matching of the connector on the server with the second chip or the first chip in the full immersion liquid cooling scenario.

[0089] Method 2: Select a connector that meets the target impedance from existing connectors.

[0090] Specifically, for existing connectors, the connectors can be placed directly in the working fluid to simulate a full immersion liquid cooling scenario, and then the impedance of the connector can be obtained through a vector network analyzer test. Then, a connector with impedance matching the target impedance is selected to ensure that the impedance of the connector on the server matches the second chip or the first chip in the full immersion liquid cooling scenario.

[0091] In an embodiment of the present application, the impedance of the connector is determined by the Dk parameter and the Df parameter of the working fluid, which can ensure impedance matching between the connector and the second chip or the first chip in a full immersion liquid cooling scenario, thereby reducing the possibility of signal integrity degradation.

[0092] S3. Determine a model of the transmission line group according to the target impedance.

[0093] A model of a transmission line group with an impedance equal to the target impedance, or a model of a transmission line group with an impedance within the error range of the target impedance, can be selected, specifically including the aforementioned first transmission line group, second transmission line group, third transmission line group, or cable. For example, a transmission line impedance design tool can be used to construct a transmission line group model based on the Dk and Df parameters of the working fluid, so that the impedance of any one or more transmission line groups in the working fluid matches the target impedance.

[0094] For example, the impedance of the transmission line group can be simulated by using a PCB transmission line impedance design tool (such as impedance design software polar) according to the full immersion liquid cooling scenario. For example, in the microstrip line scenario, the dielectric constant in polar, that is, Er2, can be set as the Dk parameter of the working fluid, and ER1 can be set as the dielectric constant of the glass fiber. Then, combined with the parameters such as the line width W and the trace thickness T of the transmission module, the impedance of the transmission line group can be obtained by adjusting these parameters so that the transmission module with the target impedance is matched for use in the server, thereby ensuring the consistency of the impedance of the transmission line group on the server and the second chip or the first chip in the full immersion liquid cooling scenario. For example, the formula can be used Determine the line width and line spacing of the transmission line group, where Er is the Dk parameter of the working fluid, Z is the impedance of the transmission line group (i.e., Z matches the target impedance in this embodiment of the application), H is the distance from the transmission line group to the reference plane, W is the line width, and T is the copper thickness of the transmission line group. Based on the target impedance and the Dk parameter of the working fluid, the line width and line spacing of the transmission line group can be determined, thereby determining the model of the transmission line group. It is understood that in addition to determining the model of the transmission line group through the aforementioned simulation software, the model of the transmission module can also be obtained according to other methods, such as other similar formulas, other data models, or other simulation software, etc., which are not limited to the specific methods here.

[0095] In an embodiment of the present application, the model of the transmission line group is determined by the Dk parameter of the working fluid, which can ensure the impedance consistency of the transmission line group and the second chip or the first chip in a full immersion liquid cooling scenario, thereby further reducing the possibility of signal integrity degradation.

[0096] S4. Determine the layout of vias based on the target impedance.

[0097] You can choose a via layout with an impedance equal to the target impedance, or you can choose a via layout with an impedance within the error range of the target impedance. For example, you can use a via design tool to construct a via layout based on the working fluid Dk and Df parameters so that the via impedance matches the target impedance.

[0098] For example, the via layout can be performed using the aforementioned HFSS software. Specifically, based on a fully submerged liquid cooling scenario, the Dk and Df parameters of the working fluid are used to determine the via layout that matches the target impedance for the server. The specific implementation is similar to that described in step S1 above and will not be repeated here. This ensures that the impedance of the via in the working fluid is as consistent as possible with the impedance of the second chip or the first chip in the working fluid, thereby maximizing high-speed signal quality and minimizing signal integrity degradation.

[0099] In the embodiment of the present application, the layout of the vias is determined by the target impedance and the DK and Df parameters of the working fluid, which can ensure that the impedance of the server components is as consistent as possible and avoid the degradation of signal integrity to the greatest extent.

[0100] Optionally, when the server includes a capacitor, the server design method provided in this application may further include step S5:

[0101] S5. Determine a capacitor model based on the target impedance.

[0102] A model of a capacitor having an impedance equal to the target impedance may be selected, or a model of a capacitor having an impedance within an error range of the target impedance may be selected.

[0103] For example, the capacitor model can be constructed using the aforementioned HFSS software. Specifically, based on the full immersion liquid cooling scenario, a capacitor model matching the target impedance is obtained using the Dk and Df parameters of the working fluid. The specific implementation is similar to step S4 and will not be repeated here. The capacitor matching the target impedance is then used in the server to ensure consistent impedance across the components in the server, maximizing high-speed signal quality and minimizing signal integrity degradation.

[0104] Optionally, when the third connector and the fourth connector in the server are connected using a cable, the server design method provided in the present application may further include step S6:

[0105] S6. Determine the cable type based on the target impedance.

[0106] Step S6 is similar to step S3 and will not be described in detail here.

[0107] It should be noted that when the impedance of the first chip in the working fluid is equal to the impedance of the second chip in the working fluid, the impedance between at least two points in the link in the working fluid matches the impedance of the first chip in the working fluid, or the impedance between at least two points in the link in the working fluid matches the impedance of the second chip in the working fluid. That is, only one of steps S2-S6 can be performed, and the specific steps are not limited here. In the embodiments of the present application, the degradation of signal integrity caused by the server being immersed in the working fluid can be avoided with higher precision.

[0108] In addition, in a possible implementation, the impedance of all the components in the working fluid matches the impedance of the first chip in the working fluid or at least one of the impedances of the second chip in the working fluid. That is, the impedance of all the components in the working fluid matches the target impedance, and the exemplary steps S2 to S5 are all performed, or the steps S2, S4 to S6 are all performed, and the specific details are not limited here. In the embodiment of the present application, the impedance of all the components in the working fluid matches the impedance of at least one of the second chip or the first chip in the working fluid, which can ensure that the impedance of the entire link of the entire server transmission signal in the working fluid matches the impedance of the first chip or the second chip in the working fluid, thereby reducing the reduction of signal energy to a greater extent, avoiding signal loss as much as possible, and completely solving the problem of signal integrity degradation.

[0109] In an embodiment of the present application, at least one of the Dk parameters and the Df parameters of the working fluid is the same as that of the working fluid, thereby ensuring that even when the working fluids are different working fluids, the models of the various components can still be determined, thereby implementing a server to ensure impedance consistency of the components in the server, ensuring high-speed signal quality as much as possible, and avoiding degradation of signal integrity as much as possible.

[0110] It should also be noted that the aforementioned Figure 4 The HFSS software and polar software in the example are only used as examples for understanding the embodiments of the present application. It can be understood that in actual situations, connectors, transmission modules, capacitors or vias can be determined by other simulation software, mathematical formulas or mathematical models, etc., and the specific details are not limited here.

[0111] In this embodiment of the present application, the first chip and the second chip in the server are connected via a link, and the impedance between at least two points in the link in the working fluid matches at least one of the impedance of the first chip in the working fluid or the impedance of the second chip in the working fluid. In other words, only at least one of steps S2 to S6 needs to be performed to ensure that the impedance of the components matches the target impedance. This reduces signal loss and, therefore, signal integrity degradation. This eliminates the need for additional structural components, reducing costs and conserving resources.

[0112] In one possible embodiment, the impedance of all components in the server's multiple components in the working fluid can be matched to at least one of the impedance of the first chip in the working fluid or the impedance of the second chip in the working fluid. This can ensure that the impedance degradation of the components of the server's transmission signal link in a fully submerged liquid cooling scenario remains as consistent as possible. This can minimize signal loss during transmission, thereby resolving the issue of signal integrity degradation without adding additional structural components, reducing costs and saving resources. In other words, all of the above steps S2 to S6 can be performed to ensure that the impedance of all components matches the target impedance.

[0113] The above describes in detail the server provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is intended only to help understand the method and core concept of the present application. Furthermore, those skilled in the art will appreciate that variations in the specific implementation methods and scope of application may occur based on the concepts of the present application. In summary, the contents of this specification should not be construed as limiting the present application.

[0114] The server of the embodiment of the present application can be applied to equipment in a full immersion liquid cooling scenario, such as cluster servers, cabinets, data center equipment or other equipment that can be in a full immersion liquid cooling scenario, etc., and the specific details are not limited here.

[0115] The embodiment of the present application also provides a server, comprising the aforementioned server and a power supply module, so that the server has the functions of any one of the implementation methods shown in the aforementioned embodiment. Figure 5 , Figure 5 Another structural diagram of the server provided in the embodiment of the present application. In one possible implementation, the server may include modules or units corresponding to the servers in the above embodiments. In one possible implementation, the server 500 may include: a computing node 501, a switching node 502, a backplane 503, and a power supply module 504. The computing node 501 and the switching node 502 are connected via the backplane 503, and the backplane 503, the computing node 501 and the switching node 502 are all immersed in the working fluid. The computing node 501 includes a first chip and a first circuit board, the first chip is located on the first circuit board, the switching node 502 includes a second chip and a second circuit board, the second chip is located on the second circuit board, and the first chip and the second chip are connected by a link, and the impedance between at least two points in the link in the working fluid matches at least one of the impedance of the first chip in the working fluid or the impedance of the second chip in the working fluid.

[0116] The power module 504 is used to provide power to at least one of the computing nodes or the switching nodes. Whether the current and voltage provided by the power module are stable will directly affect the performance and service life of the server.

[0117] In other possible designs, the server 500 may correspond to the above Figure 1 、 Figure 2 or Figure 3 The modules or units in various possible implementation methods of the server embodiment correspond one to one.

[0118] In a possible design, the server further includes a cabinet for containing the working fluid. Figure 6 , Figure 6 Another structural diagram of a server provided in an embodiment of the present application is shown. The server includes a computing node 601, a switching node 602, a backplane 603, a power module 604, and a cabinet 605. It will be appreciated that the cabinet contains a working fluid and ensures that the computing node 601, the switching node 602, and the backplane 603 are all immersed in the working fluid. This server can ensure that the component impedance during signal transmission remains as consistent as possible, thereby minimizing the problem of signal integrity degradation without adding additional structural components, reducing costs and saving resources.

[0119] Please refer to the above for the beneficial effects of the various designs of the server mentioned above. Figure 1 、 Figure 2 as well as Figure 3 The beneficial effects of the various corresponding implementation methods in the embodiments will not be described in detail here.

[0120] It should be noted that Figure 5 and Figure 6 The information interaction, execution process, etc. between the modules / units in the server of the corresponding embodiment are the same as those in the present application. Figure 1 、 Figure 2 as well as Figure 3 The corresponding embodiments are based on the same concept. For specific contents, please refer to the description in the embodiments shown above in this application, which will not be repeated here.

[0121] It should also be noted that the device embodiments described above are merely illustrative, in which the units described as separate components may or may not be physically separate, and the components displayed as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the present embodiment. In addition, in the drawings of the device embodiments provided in this application, the connection relationship between the modules indicates that there is a communication connection between them, which can be specifically implemented as one or more communication buses or signal lines.

[0122] Through the description of the above embodiments, those skilled in the art can clearly understand that the present application can be implemented by means of software plus necessary general-purpose hardware, and of course can also be implemented by dedicated hardware including application-specific integrated circuits, dedicated CPUs, dedicated memories, dedicated components, etc. In general, all functions performed by computer programs can be easily implemented by corresponding hardware, and the specific hardware structures used to implement the same function can also be diverse, such as analog circuits, digital circuits, or dedicated circuits. However, for the present application, software program implementation is a better implementation method in most cases. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which is stored in a readable storage medium, such as a computer floppy disk, USB flash drive, mobile hard disk, read-only memory (ROM), random access memory (RAM), magnetic disk or optical disk, etc., and includes a number of instructions for causing a computer device (which can be a personal computer, training equipment, or network equipment, etc.) to execute the methods of each embodiment of the present application.

Claims

1. A server, characterized in that: The server includes a backplane, a computing node, and a switching node, wherein the backplane, the computing node, and the switching node are all immersed in a working fluid, and the computing node is connected to the switching node via the backplane; The computing node includes a first chip and a first circuit board, the first chip is located on the first circuit board, the switching node includes a second chip and a second circuit board, the second chip is located on the second circuit board; The first chip and the second chip are connected via a link, and an impedance between at least two points in the link in the working fluid matches at least one of an impedance of the first chip in the working fluid or an impedance of the second chip in the working fluid.

2. The server according to claim 1, wherein: The link includes at least one component, the first chip and the second chip are connected through the at least one component, and the impedance of at least one of the multiple components in the working fluid matches at least one of the impedance of the first chip in the working fluid or the impedance of the second chip in the working fluid.

3. The server according to claim 2, wherein: The plurality of components include a first transmission line set, a first connector, at least one first via, a second transmission line set, a second connector, and at least one second via; The first chip, the first transmission line group, the first connector, and the at least one first via are located on the first circuit board, and the first chip is connected to the backplane through the first transmission line group, the first connector, and the at least one first via; The second chip, the second transmission line group, the second connector and at least one second via are located on the second circuit board, and the second chip is connected to the backplane through the second transmission line group, the second connector and at least one second via.

4. The server according to claim 3, wherein: The multiple components further include a first capacitor and / or a second capacitor, the first capacitor is located on the first circuit board and connected to the first chip, and / or the second capacitor is located on the second circuit board and connected to the second chip.

5. The server according to claim 3 or 4, characterized in that: The plurality of components further include a third transmission line group, a third connector, a fourth connector, and at least one third via. The third transmission line group, the third connector, the fourth connector, and the at least one third via are located on the backplane. The third connector is connected to the fourth connector through the third transmission line group and the at least one third via. The third connector is connected to the first connector, and the fourth connector is connected to the second connector.

6. The server according to claim 3 or 4, characterized in that: The plurality of components further include a third connector, a fourth connector, and a cable; The third connector and the fourth connector are located on the backplane, the third connector is connected to the fourth connector through the cable, the third connector is connected to the first connector, and the fourth connector is connected to the second connector.

7. The server according to any one of claims 2 to 6, characterized in that: The impedances of all the components in the working fluid match at least one of the impedance of the first chip in the working fluid or the impedance of the second chip in the working fluid.

8. The server according to any one of claims 1 to 7, wherein: When the impedance of the first chip in the working fluid is equal to the impedance of the second chip in the working fluid, the impedance between at least two points in the link in the working fluid matches the impedance of the first chip in the working fluid, or the impedance between at least two points in the link in the working fluid matches the impedance of the second chip in the working fluid.

9. The server according to any one of claims 1 to 7, wherein: When the impedances of the first chip and the second chip in the working fluid are not equal, the impedance between at least two points in the link in the working fluid matches the average of the impedance of the first chip in the working fluid and the impedance of the second chip in the working fluid.

10. The server according to any one of claims 1 to 9, characterized in that: The server further includes a power supply module, which is configured to provide power to at least one of the computing node or the switching node.

11. The server according to any one of claims 1 to 10, characterized in that: The server further includes a cabinet, and the cabinet is used to accommodate the working fluid.

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