A multi-chip package integrated self-heat dissipation structure based on liquid phase change material

Abstract

The application discloses a multi-chip package integrated self-heat-dissipation structure based on liquid phase change material and belongs to the technical field of integrated circuit package heat dissipation. The application adopts a mode of combining in-chip micro flow channel and phase change material to realize three-dimensional laminated package heat dissipation structure design, and the micro flow channels between the chips are communicated through micro tube through holes, so that the heat of the internal chips of the laminated structure can be efficiently conducted to the upper heat sink or radiator, and the application is an effective solution for laminated chip package heat dissipation. The application is suitable for the design of the heat dissipation structure of three-dimensional laminated package of bump flip or wire bonding, and can also be popularized and applied to the design of the heat dissipation structure of high-power single-chip package.

Description

TECHNICAL FIELD

[0001] The application relates to a multi-chip package integrated self-heat dissipation structure based on a liquid phase change material. BACKGROUND

[0002] Three-dimensional laminated packaging technology is an effective solution for super-moore integration, which can greatly improve the packaging density and performance of integrated circuits, but the problems of high temperature and large temperature gradient caused by the increase of power density due to multi-layer stacking need to be solved. Fluid refrigeration is one of the most concerned technologies in three-dimensional integrated packaging thermal management, and the heat sink structure has micro channels and micro disturbance column structure, and the cooling liquid has liquid, gas and coexistence of the three. Traditional micro-channel liquid cooling heat dissipation packaging needs an external cooling pump to realize high-efficiency heat dissipation, which occupies packaging resources and increases the cost of heat dissipation. SUMMARY

[0003] The application solves the technical problems of overcoming the deficiencies of the prior art and providing a multi-chip package integrated self-heat dissipation structure based on a liquid phase change material. The micro-tube realizes the micro-channel communication between the chips, the entire three-dimensional micro-channel is sealed with low-temperature phase change liquid material, the heat absorption process based on the phase change process of the liquid material realizes efficient conduction of the heat of the laminated chips to the top heat sink, and efficient self-heat dissipation design of the laminated chip packaging is realized.

[0004] The technical solution of the application is a multi-chip package integrated self-heat dissipation structure based on a liquid phase change material, which comprises a substrate, a bump, a lower layer chip, an intermediate layer chip, an upper layer chip, a micro-tube, a bottom filling adhesive, a thermal interface material and a heat sink.

[0005] The chips are electrically interconnected by flip-chip bonding through the bumps arranged in a surface array, and the gap between the chips and the substrate after flip-chip bonding is filled with the bottom filling adhesive.

[0006] Rectangular cavities are arranged in the lower layer chip and the upper layer chip, and through holes are arranged above the rectangular cavity of the lower layer chip and below the rectangular cavity of the upper layer chip and are in communication with the rectangular cavities.

[0007] Through holes are arranged around the upper layer chip and are in communication with the rectangular cavities, and a rectangular slot is formed above the rectangular cavities.

[0008] A slot is arranged at the bottom of the heat sink and has the same shape and size as the rectangular slot at the top of the upper layer chip, and through holes are arranged around the heat sink and correspond to the through holes around the chip.

[0009] The through holes and blind holes of the upper layer chip, the intermediate layer chip, the lower layer chip and the heat sink are connected by micro-tube welding.

[0010] The lower surface of the heat sink is sealed and bonded to the upper surface of the upper chip through a thermal interface material.

[0011] Further, the middle layer chip is provided with an array of through holes, and the through hole array and the micro flow channel avoid the conductive silicon through holes inside the chip.

[0012] Further, an L-shaped micro flow channel is arranged inside the middle layer chip close to the bottom of the chip, and the inner side of the upper part of the L-shaped micro flow channel is connected to the through holes around it.

[0013] Further, the lower layer chip and the upper layer chip are provided with a rectangular cavity with a depth of 0.2mm-0.4mm and an area of 30%-50% of the chip.

[0014] Further, a through hole is arranged above the rectangular cavity and is connected to the through hole.

[0015] Further, a ring-shaped metalized area with the same inner diameter as the through hole and a width of 0.1-0.3mm is processed around the through hole.

[0016] Further, a rectangular slot with a depth of 0.3mm-0.5mm and an area of 30%-50% of the chip is opened at the top of the rectangular cavity of the upper layer chip.

[0017] Further, a dome-shaped slot with the same shape and size as the rectangular slot at the top of the upper layer chip is arranged at the bottom of the heat sink, and a through hole with the same position and size as the through hole around the chip is arranged around the through hole and connected to the slot at the bottom of the heat sink.

[0018] Further, the micro tube is a micro tube cylindrical metal tube or a high polymer polymer tube, with a length of 0.3mm-0.7mm, a height consistent with the height after the convex point welding collapse, an inner diameter of 0.2-0.4mm, an outer diameter of 0.4-0.6mm, a wall thickness of 0.1-0.3mm, and both ends are tinned for welding interconnection with the through hole and the through hole around the chip.

[0019] A preparation method of a multi-chip packaging integrated self-heat dissipation structure based on a liquid phase change material, comprising:

[0020] The embedded micro flow channel chip preparation includes a lower layer chip, a middle layer chip and an upper layer chip;

[0021] Soldering or electroplating convex points on the active surface pad surface of the lower layer chip, the middle layer chip and the upper layer chip;

[0022] Welding metal micro tubes at the through hole and blind hole positions around the middle layer chip and the upper layer chip;

[0023] Soldering the lower chip, the middle chip and the upper chip on the substrate surface in sequence and pre-soldering, and then reflow soldering;

[0024] Laminated chip integrated underfilling;

[0025] Injecting phase change liquid into the rectangular slot on the passive surface of the upper chip;

[0026] Using heat-conducting glue to bond the heat sink on the top of the chip.

[0027] Compared with the prior art, the present application has the following advantages:

[0028] (1) The present application uses micro tubes and through holes to realize the interconnection of micro flow channels between chips, avoiding the limitation of high interface thermal resistance of traditional heat dissipation structure.

[0029] (2) The present application designs a cavity in the bottom chip, the upper chip and the heat sink, and a slot in the center of the upper chip and the heat sink, which can realize the maximum area thermal contact of the cooling material in the micro flow channel system and reduce the thermal resistance of the heat dissipation channel to the maximum extent.

[0030] (3) The present application designs an L-shaped micro flow channel in the middle chip, which is connected to the through holes arranged on the chip, and can realize the storage of liquid phase change material and the efficient and timely flow and heat conduction after vaporization. At the same time, the L-shaped micro flow channel design can effectively avoid the electrical interconnection through holes in the chip, and is compatible with 3D laminated packaging chips and 2.5D packaging TSV adapter boards in flip-chip packaging form.

[0031] (4) The L-shaped micro flow channel design of the present application can effectively avoid the electrical interconnection through holes in the chip, and is compatible with 3D laminated packaging chips and 2.5D packaging TSV adapter boards in flip-chip packaging form.

[0032] (5) The present application designs a dome-shaped slot with an arc bottom surface at the bottom of the heat sink, and through holes around the slot which are the same size and position as the through holes around the chip and are connected to the slot cavity at the bottom of the heat sink, which can maximize the liquid cooling of the phase change material in the heat dissipation structure and simultaneously return the cooled phase change liquid to the micro flow channel in the chip, realizing the self-circulation of the heat dissipation system.

[0033] (6) The present application designs a three-dimensional integrated embedded micro flow channel heat dissipation structure for three-dimensional multi-chip laminated packaging, which realizes efficient heat conduction in the system based on the principle of liquid material phase change heat absorption and heat release. BRIEF DESCRIPTION OF DRAWINGS

[0034] Figure 1 Three-dimensional laminated packaging heat dissipation structure diagram;

[0035] Figure 2 Middle layer chip structure top view;

[0036] Figure 3 Micro-channel and through-hole communication structure diagram;

[0037] Figure 4 Bottom chip structure top view;

[0038] Figure 5 Upper chip structure top view;

[0039] Figure 6 Heat sink bottom view;

[0040] Figure 7 Through-hole structure top view;

[0041] Figure 8 Micro-tube structure side view;

[0042] Figure 9 Laminated structure packaging preparation flow chart. DETAILED DESCRIPTION

[0043] In order to better understand the above technical solutions, the technical solutions of the present application will be described in detail below through the accompanying drawings and specific embodiments. It should be understood that the embodiments of the present application and the specific features in the embodiments are detailed descriptions of the technical solutions of the present application, and are not limitations of the technical solutions of the present application. In the case of no conflict, the technical features in the embodiments of the present application and the embodiments can be combined with each other.

[0044] The present application provides a kind of multi-chip package integration self-heat dissipation structure based on liquid phase change material as shown in the following detailed description of the drawings, specific implementation mode can include (such as Figures 1-9 As shown): substrate 1, bump 2, lower layer chip 3, middle layer chip 4, upper layer chip 5, micro tube 6, bottom filling glue 7, thermal interface material 8, heat sink 9.

[0045] The electrical interconnection between the chips and between the chip and the substrate is realized by flip-chip bonding through the bumps 2 arranged in an array, and the gap after the flip-chip bonding between the chips and between the chip and the substrate is filled by the underfilling glue 7; the middle layer chip 4 is provided with the through holes 12 and the micro flow channels 11 arranged in an array; the lower layer chip 3 and the upper layer chip 5 are internally provided with the rectangular cavities 14, and the upper part of the rectangular cavity 14 of the lower layer chip 3 and the lower part of the rectangular cavity 14 of the upper layer chip 5 are provided with the through holes 12 communicated with the rectangular cavities 14; the upper layer chip 5 is provided with the through holes 12 communicated with the rectangular cavities 14 around the periphery, and the rectangular slot 15 is arranged above the rectangular cavity 14; the bottom of the heat sink 9 is provided with the slot 16 with the same shape and size as the rectangular slot 15 on the top of the upper layer chip 5, and the through holes 17 corresponding to the through holes 12 around the periphery of the chip are arranged around the periphery; the through holes and the blind holes of the upper layer chip 5, the middle layer chip 4, the lower layer chip 3 and the heat sink 9 are communicated by the micro tubes 6; the heat sink 9 is sealed and bonded with the flat surface of the rectangular slot 15 on the passive surface of the upper layer chip 5 through the thermal interface material 8.

[0046] As shown in Figure 2 , the middle layer chip 4 is provided with the through holes 12 arranged in an array, and the through hole 12 array and the micro flow channel 11 avoid the conductive silicon through hole 13 inside the chip;

[0047] As shown in Figure 3 , the L-shaped micro flow channel 11 is arranged inside the middle layer chip 4 close to the bottom of the chip, and the inner side upper part of the L-shaped micro flow channel 11 is communicated with the through holes 12 around the periphery;

[0048] As shown in Figure 4 , the lower layer chip 3 is internally provided with the rectangular cavity 14 with a depth of 0.2mm-0.4mm and occupying 30%-50% of the chip area, and the through holes 12 communicated with the rectangular cavity 14 are arranged above the rectangular cavity 14, and the position and diameter of the through holes 12 are the same as those of the through holes 12 on the middle layer chip 4

[0049] As shown in Figure 5 , the upper layer chip 5 is internally provided with the rectangular cavity 14 with a depth of 0.2mm-0.4mm and occupying 30%-50% of the chip area, and the through holes 12 communicated with the rectangular cavity 14 are arranged above the rectangular cavity 14, and the position and diameter of the through holes 12 are the same as those of the through holes 12 on the middle layer chip 4; the rectangular slot 15 with a depth of 0.3mm-0.5mm and occupying 30%-50% of the chip area is arranged on the top of the rectangular cavity 14;

[0050] As shown in Figure 6 , the bottom of the heat sink 9 is provided with the slot 16 with the same shape and size as the rectangular slot 15 on the top of the upper layer chip 5, the bottom surface of the slot 16 is a curved surface, and the through holes 17 with the same position and size as the through holes 12 around the periphery of the chip and communicated with the slot 16 on the bottom of the heat sink 9 are arranged around the periphery of the curved surface;

[0051] As shown in Figure 7As shown, the through hole 12 is surrounded by an annular metallization area with the same inner diameter as the through hole diameter and a width of 0.1-0.3mm.

[0052] As shown, Figure 8 As shown, the micro tube 6 is a cylindrical metal tube or a polymer tube with a length of 0.3-0.7mm (consistent with the height after the bumping collapse), an inner diameter of 0.2-0.4mm, an outer diameter of 0.4-0.6mm, and a wall thickness of 0.1-0.3mm. The two ends of the micro tube are tin-plated for the welding interconnection with the blind hole and the through hole around the through hole on the chip.

[0053] The application is based on the multi-chip packaging integrated self-heat dissipation structure of liquid phase change material, as shown in Figure 9 The steps are as follows:

[0054] 1) The lower chip 3, the middle layer chip 4 and the upper chip 5 are embedded with micro channel chips;

[0055] 2) The surface of the active pad of the lower chip 3, the middle layer chip 4 and the upper chip 5 is planted with balls or plated with bumps;

[0056] 3) The micro tube 6 is welded around the through hole and the blind hole of the middle layer chip 4 and the upper chip 5;

[0057] 4) The lower chip 3, the middle layer chip 4 and the upper chip 5 are respectively attached to the surface of the substrate in sequence and pre-welded, and then reflow soldered;

[0058] 5) The integrated bottom filling of the stacked chip

[0059] 6) The phase change liquid is injected into the rectangular slot on the passive surface of the upper chip 5;

[0060] 7) The heat sink is adhered to the top of the chip with the heat-conducting glue.

[0061] The application realizes the micro channel communication between the chips through the micro column interconnection, seals the low-temperature phase change liquid material in the whole three-dimensional micro channel, realizes the efficient conduction of the heat of the stacked chip to the top heat sink based on the heat absorption process of the liquid material phase change process, realizes the efficient self-heat dissipation design of the stacked chip packaging, and solves the problems of the high-density three-dimensional stacked packaging external cooling pump occupying the packaging resources and the high cost of heat dissipation. The application is suitable for the design of various packaging and heat dissipation structures of the 2.5D and 3D stacked multi-chip packaging of the flip-chip type and the wire bonding type.

[0062] Obviously, those skilled in the art can make various modifications and variations to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application belong to the scope of the claims of the present application and the equivalent technologies thereof, the present application also intends to include these modifications and variations.

[0063] That which is not described in detail in the specification of the present application is well known to those skilled in the art.

Claims

1. A multi-chip packaged integrated self-heating structure based on liquid phase change material, characterized in that: The application relates to a flip chip structure, which comprises a substrate (1), a bump (2), a lower layer chip (3), an intermediate layer chip (4), an upper layer chip (5), a micro tube (6), a bottom filling glue (7), a thermal interface material (8) and a heat sink (9). The flip chip structure is characterized in that the chips are electrically interconnected through the flip welding of the bumps (2) arranged in a surface array. The lower layer chip (3) and the upper layer chip (5) are internally provided with rectangular cavities (14). The upper layer chip (5) is provided with through holes (12) communicated with the rectangular cavities (14) around the upper layer chip (5). The heat sink (9) is provided with a groove (16) with the same shape and size as the rectangular groove (15) on the top of the upper layer chip (5) and through holes (17) corresponding to the through holes (12) around the chip. The through holes and blind holes of the upper layer chip (5), the intermediate layer chip (4), the lower layer chip (3) and the heat sink (9) are communicated through the welding of the micro tube (6). The lower surface of the heat sink (9) is sealed and adhered to the upper surface of the upper layer chip (5) through the thermal interface material (8).

2. The integrated self-heat-dissipation structure based on liquid phase-change material for multi-chip package according to claim 1, characterized in that: The intermediate layer chip (4) is provided with array-arranged through holes (12) which avoid the conductive silicon through holes (13) in the chip.

3. The integrated self-heat-dissipation structure of multi-chip package based on liquid phase-change material of claim 2, wherein: The intermediate layer chip (4) is internally provided with an L-shaped micro flow channel (11) close to the bottom of the chip.

4. The integrated self-heat-dissipation structure of multi-chip package based on liquid phase-change material of claim 2, wherein: The lower layer chip (3) and the upper layer chip (5) are internally provided with rectangular cavities (14) with a depth of 0.2mm-0.4mm and occupying 30%-50% of the chip area.

5. The integrated self-heat-dissipation structure of multi-chip package based on liquid phase-change material of claim 4, wherein: The upper layer chip (5) is provided with a rectangular groove (15) with a depth of 0.3mm-0.5mm and occupying 30%-50% of the chip area.

6. The integrated self-heat-dissipation structure based on liquid phase-change material for multi-chip package according to any one of claims 2-5, characterized in that: The heat sink (9) is provided with a dome-shaped groove (16) with the same shape and size as the rectangular groove (15) on the top of the upper layer chip (5) and through holes (12) with the same position and size as the through holes (12) around the chip and communicated with the groove (16) on the bottom of the heat sink (9).

7. The integrated self-thermal management structure for multi-chip package based on liquid phase change material of claim 1, wherein: The micro tube (6) is a micro tube cylindrical metal tube or a high polymer tube, has a length of 0.3mm-0.7mm, a height consistent with the collapsed height of the bump welding, an inner diameter of 0.2-0.4mm, an outer diameter of 0.4-0.6mm, a wall thickness of 0.1-0.3mm, and is subjected to tinning treatment at both ends to realize welding interconnection with the blind holes and the through holes around the chip.

8. The integrated self-thermal management structure for multi-chip package based on liquid phase change material of claim 1, wherein: The application further relates to a flip chip structure manufacturing method.

9. The integrated self-thermal management structure for multi-chip package based on liquid phase change material of claim 1, wherein: ​ 10. A method for preparing a multi-chip package integrated self-heat dissipation structure based on liquid phase change material according to any one of claims 1-9, characterized in that, ​ The preparation of the embedded micro-channel chip includes a lower chip (3), a middle chip (4) and an upper chip (5); The surface of the active face pad of the lower chip (3), the middle chip (4) and the upper chip (5) is planted with balls or plated with bumps; The metal micro-tube is welded at the through-hole and blind-hole position around the middle chip (4) and the upper chip (5); The lower chip (3), the middle chip (4) and the upper chip (5) are respectively surface-mounted on the substrate surface in sequence and pre-welded, and then reflow soldering is performed; The integrated bottom filling of the laminated chip; The phase change liquid is injected into the rectangular slot (15) of the passive face of the upper chip (5); The heat sink is adhered to the top of the chip by using the heat-conducting adhesive.

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