Multi-chip ceramic packaging structure with heat dissipation and electromagnetic shielding functions

Abstract

The utility model discloses a multi-chip ceramic packaging structure with heat dissipation and electromagnetic shielding functions, the front surface or the back surface of a ceramic shell is correspondingly divided into a plurality of chip areas, the area which is located on the front surface and is used for welding an IC integrated chip is provided with a corresponding bonding pad array, and the area which is used for welding a single-function chip is provided with a corresponding lead bonding area; a chip area for welding a power chip adopts a through cavity structure, and a heat sink is arranged at the bottom of the through cavity structure; a circle of metal shielding ring is arranged on the outer side of the chip area for welding the radio frequency chip, and the metal shielding ring is connected with a grounding layer in the ceramic shell through a metalized through hole; the IC integrated chip is interconnected with the corresponding bonding pad array through back-off welding, and the single-function chip is interconnected with the corresponding lead bonding area through lead bonding. According to the structure, chips with different types and different requirements can be integrated on one ceramic shell, and the working stability of each chip can be improved, so that the integration level of multi-chip packaging is improved.

Description

Technical Field

[0001] This utility model relates to a chip packaging structure, and more particularly to a multi-chip ceramic packaging structure. Background Technology

[0002] Multi-chip packaging (MCP) technology integrates multiple chips or functional units into a single package, optimizing space utilization and promoting interoperability between chips. Chip types include logic chips, memory chips, radio frequency (RF) chips, and power chips. This technology significantly improves device performance, bandwidth, and energy efficiency, thus becoming an indispensable foundational technology in cutting-edge fields such as high-performance computing, artificial intelligence, and communications.

[0003] Driven by the increasing demands for product performance, thinner and lighter designs, and lower power consumption, the further development of this technology still faces numerous challenges. Traditional ceramic packaging technology cannot be directly applied to multi-chip packaging structures. For example, high-power chips in multi-chip packaging structures require effective thermal management. Simply integrating multiple chips into a single package concentrates heat and significantly increases heat flux density. Traditional ceramic packaging technology offers relatively simple heat dissipation design for single-chip packaging, primarily relying on the ceramic substrate and package casing. However, in multi-chip packaging, due to the more compact chip layout and complex heat transfer paths, traditional heat dissipation methods are insufficient to quickly and effectively dissipate heat, easily leading to excessively high chip temperatures and impacting chip performance and reliability.

[0004] In addition, radio frequency chips also require effective electromagnetic shielding management. The wiring design of traditional ceramic packaging technology is usually based on a single chip or a small number of chips, and lacks effective electromagnetic shielding methods applicable to multi-chip packaging structures. Summary of the Invention

[0005] Purpose of the invention: To address the specific requirements of multi-chip packaging technology for multifunctionality, high heat dissipation, and electromagnetic shielding, this invention proposes a multi-chip ceramic packaging structure with heat dissipation and electromagnetic shielding. This structure provides effective heat dissipation and electromagnetic shielding for the power chip and RF chip in the multi-chip packaging structure, respectively, preventing mutual interference between chips and improving the operational stability of each chip.

[0006] Technical Solution: A multi-chip ceramic package structure with heat dissipation and electromagnetic shielding includes a ceramic shell. Depending on the number of chips, the front or back of the ceramic shell is divided into several chip areas. The area on the front for soldering IC integrated chips has a corresponding pad array, and the area for soldering single-function chips has a corresponding wire bonding area. The single-function chip includes a power chip or a radio frequency chip. The chip area for soldering power chips adopts a through-cavity structure, and a heat sink is located at the bottom of the through-cavity structure. A metal shielding ring is located on the outer side of the chip area for soldering radio frequency chips. The metal shielding ring is connected to the ground layer inside the ceramic shell through several metallized through-holes. The IC integrated chips are interconnected with the corresponding pad array via flip-chip bonding, and the single-function chips are interconnected with the corresponding wire bonding areas via wire bonding. The top of the front of the ceramic shell is connected to a top cover plate via a first sealing ring, and the back of the ceramic shell also has pins for the multi-chip ceramic package structure.

[0007] Furthermore, the top cover is a honeycomb cover.

[0008] Furthermore, when the single-function chip is located on the bottom surface of the ceramic shell, a boss cover plate is also provided at the bottom of the corresponding chip area.

[0009] Furthermore, the boss cover plate is welded and fixed to the bottom of the metal shielding ring, or welded and fixed to the reverse side of the ceramic shell through a second sealing ring.

[0010] Furthermore, the pins on the reverse side of the ceramic housing are pin-shaped pins.

[0011] Beneficial effects: This structure allows for the arrangement of multiple functional areas on different planes of the ceramic housing according to chip function, enabling the ceramic housing to simultaneously possess wire bonding interconnection, flip-chip interconnection, electromagnetic shielding, and heat dissipation, resulting in diverse combinations. This structure can integrate different types and requirements of chips onto a single ceramic housing, preventing mutual interference between chips, improving the operational stability of each chip, and thus increasing the integration of multi-chip packages. Attached Figure Description

[0012] Figure 1 This is a front view of the multi-chip ceramic packaging structure in Example 1;

[0013] Figure 2 This is a schematic diagram of the reverse side of the multi-chip ceramic packaging structure in Example 1;

[0014] Figure 3 This is a structural diagram showing the connection relationship between the metal shielding ring and the grounding layer in Example 1;

[0015] Figure 4This is a schematic cross-sectional view of the multi-chip ceramic packaging structure in Example 1. Detailed Implementation

[0016] The present invention will be further explained below with reference to the accompanying drawings. Example

[0017] like Figure 1 As shown, a multi-chip ceramic package structure with heat dissipation and electromagnetic shielding is provided. The front of the square ceramic shell 1 is divided into four chip areas. Two areas are used to arrange wire bonding interconnect structures, and the other two areas are used to arrange flip-chip interconnect structures. The four areas are arranged in a centrally symmetrical layout to balance the space. The same chips are arranged diagonally on the front.

[0018] Two integrated circuit (IC) chips are interconnected with pad arrays 2 on the surface of their corresponding chip areas via flip-chip bonding, thus fixing the two IC chips to the front of the square ceramic housing 1. The other two areas employ a through-cavity structure, with corresponding wire bonding areas 3 on the front of the ceramic housing 1. A heat sink 4 is located at the bottom of the through-cavity structure, and the heat sink 4 is welded to the through-cavity structure of the ceramic housing 1 via its edges. Two power single-function chips are interconnected with their corresponding wire bonding areas 3 via wire bonding 15, and the heat sink 4 is used for heat dissipation of the power single-function chips.

[0019] like Figure 2 As shown, on the reverse side of the square ceramic housing 1, opposite the two areas with arranged inverted overlay interconnect structures, wire bonding areas 3 are also provided. The two RF chips are connected to their corresponding wire bonding areas via wire bonding to achieve electromagnetic shielding. A metal shielding ring 5 is provided around the outer side of each RF chip. This metal shielding ring 5 is connected to the ground layer 7 inside the ceramic housing 1 through several metallized through-holes 6. Figure 3 As shown. The reverse side of the ceramic housing 1 is also provided with pins 10 of a multi-chip ceramic package structure, which are pin-shaped pins.

[0020] like Figure 4 As shown, the top front of the ceramic housing 1 is connected to a top honeycomb cover plate 9 via a sealing ring 8, allowing the front-side IC integrated chip to dissipate heat through the honeycomb cover plate 9. On the reverse side of the ceramic housing 1, a boss cover plate 11 for mechanical protection is welded to the bottom of the metal shielding ring 5. In this embodiment, the IC integrated chip 12 is interconnected with the ceramic housing 1 using flip-chip bonding; the power single-function chip 13 and the RF single-function chip 14 are both connected to the ceramic housing 1 using wire bonding 15. The RF single-function chip 14 is installed in an independent space isolated by the metal shielding ring 5 to ensure chip operation; the heat generated by the power single-function chip 13 is mainly dissipated through the heat sink 4.

[0021] It should be noted that, Figure 1 The top honeycomb cover plate 9 and each chip are not shown in the diagram. Figure 2 The boss cover plate 11 is not shown in the figure. Example

[0022] The difference from Embodiment 1 is that when the single-function chip located on the reverse side of the square ceramic shell 1 is a chip that does not require environmental shielding, the metal shielding ring 5 is no longer provided on the outside of the chip, but a sealing ring is directly provided. The sealing ring is welded to the reverse side of the ceramic shell 1 and connected to the boss cover plate 11.

[0023] The above description is only a preferred embodiment of the present utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present utility model, and these improvements and modifications should also be considered within the protection scope of the present utility model.

Claims

1. A multi-chip ceramic package structure with heat dissipation and electromagnetic shielding, characterized in that, The ceramic housing (1) includes a ceramic shell (1). Depending on the number of chips, the front or back of the ceramic shell (1) is divided into several chip areas. The area on the front for welding IC integrated chips is provided with a corresponding pad array (2), and the area for welding single-function chips is provided with a corresponding wire bonding area (3). The single-function chip includes a power chip or a radio frequency chip. Among them, the chip area used for welding power chips adopts a through cavity structure, and a heat sink (4) is provided at the bottom of the through cavity structure; a metal shielding ring (5) is provided on the outer side of the chip area used for welding radio frequency chips, and the metal shielding ring (5) is connected to the grounding layer (7) inside the ceramic shell (1) through several metallized through holes (6); The IC integrated chip is interconnected with the corresponding pad array (2) by reverse bonding, and the single-function chip is interconnected with the corresponding wire bonding area (3) by wire bonding; The top front of the ceramic housing (1) is connected to the top cover plate (9) via a first sealing ring (8), and the back of the ceramic housing (1) is also provided with the pins (10) of the multi-chip ceramic package structure.

2. The multi-chip ceramic packaging structure according to claim 1, characterized in that, The top cover (9) is a honeycomb cover.

3. The multi-chip ceramic packaging structure according to claim 1 or 2, characterized in that, When the single-function chip is located on the bottom surface of the ceramic housing (1), a boss cover plate (11) is also provided at the bottom of the corresponding chip area.

4. The multi-chip ceramic packaging structure according to claim 3, characterized in that, The boss cover plate (11) is welded and fixed to the bottom of the metal shielding ring (5), or welded and fixed to the reverse side of the ceramic shell (1) through the second sealing ring.

5. The multi-chip ceramic packaging structure according to claim 3, characterized in that, The pins (10) on the reverse side of the ceramic housing (1) are pin-shaped pins.

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