MEMS device and packaging method thereof

Abstract

The invention provides an MEMS device and a packaging method thereof. The packaging method comprises the following steps: providing an MEMS device; the MEMS device comprises a first wafer, a second wafer and a third wafer which are mutually stacked, the second wafer is provided with a micro-mechanical structure, and the micro-mechanical structure is located in a cavity between the first wafer and the third wafer; a bonding structure is connected between the first wafer and the second wafer; the bonding structure comprises a bonding ring structure and a bonding anchor point structure, and the bonding anchor point structure is located in the bonding ring structure; and manufacturing a protection structure on the outer surface of the bonding ring structure. The technical problem solved by the invention is that water vapor tends to preferentially permeate and diffuse along interfaces among different materials. Especially, a relatively weak and key lead bonding interface is a key part for forming a cavity in which a micro-mechanical structure is located, and once water vapor permeates, the performance and the service life of a product are seriously damaged.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and more specifically, to a MEMS device and its packaging method. Background Technology

[0002] MEMS devices typically contain movable micromechanical structures (such as beams, membranes, and mass blocks) and tiny cavities adjacent to these structures. These micromechanical structures are extremely sensitive to the surrounding environment, especially contaminants such as water vapor (H2O) and oxygen (O2), and their reliability is highly dependent on the protection provided by the packaging.

[0003] Specifically, moisture tends to preferentially penetrate and diffuse along the interfaces between different materials. In particular, the relatively weak and critical wire bond interfaces, which are key areas for forming the cavities of micromechanical structures, will severely damage product performance and lifespan if moisture seeps in. Summary of the Invention

[0004] The technical problem addressed by this application is that water vapor tends to preferentially penetrate and diffuse along the interfaces between different materials. In particular, the relatively weak and critical wire bonding interfaces, which are key areas for forming the cavities of micromechanical structures, will severely impair product performance and service life if water vapor penetrates them.

[0005] To address the above problems, this application provides a packaging method for MEMS devices, the packaging method comprising: The device provides a MEMS device; the MEMS device includes a first wafer, a second wafer and a third wafer stacked sequentially, the second wafer having a micromechanical structure located in a cavity between the first wafer and the third wafer; a bonding structure connects the first wafer and the second wafer; the bonding structure includes a bonding ring structure and a bonding anchor structure, the bonding anchor structure being located within the bonding ring structure; A protective structure is fabricated on the outer surface of the bonding ring structure.

[0006] Compared with existing technologies, the technical effects achieved by this solution are as follows: by creating a protective structure on the outer surface of the bonded ring structure, it prevents moisture from entering the cavity where the micromechanical structure is located. Compared with related technical solutions, it effectively avoids the risk of the outer surface of the bonded ring structure being exposed to the environment and coming into contact with moisture. By setting up the protective structure, the bonded ring structure is separated from the environment, so that moisture in the environment comes into contact with the protective structure first. Only when the protective structure is damaged to the point that the bonded ring structure is re-exposed to the environment will there be a potential risk of moisture infiltration.

[0007] In one example of this application, the packaging method further includes: forming a first opening through the first wafer at the location corresponding to the bonding anchor structure, fabricating a circuit layer within the first opening, and extending the circuit layer to the surface of the first wafer. The circuit layer includes a first seed layer and a conductive connection layer covering the surface of the first seed layer.

[0008] In one instance of this application, the encapsulation method further includes: A second seed layer is formed within the first opening so that the second seed layer covers the conductive connection layer located below it; Conductive bumps are formed on the surface of the second seed layer to form conductive bumps on the conductive interconnect layer located on the surface of the first wafer; An insulating layer with exposed conductive bumps is formed on the surface of the first wafer.

[0009] In one instance of this application, the encapsulation method further includes: At the corresponding position of the bonding anchor point structure, a second opening is formed that penetrates the third wafer and the second wafer. A circuit layer is fabricated in the second opening and extends to the surface of the third wafer. Conductive bumps are fabricated on the conductive interconnect layer located on the surface of the third wafer; An insulating layer with exposed conductive bumps is fabricated on the surface of the third wafer; The circuit layer includes a first seed layer and a conductive connection layer covering the surface of the first seed layer.

[0010] In one example of this application, the circuit layer extends to the outer surface of the bonding ring structure, and the outer surface of the circuit layer corresponding to the location of the bonding ring structure is covered with an insulating layer; the protective structure on the outer surface of the bonding ring structure includes isolating the circuit layer on the outer surface of the bonding ring structure from the circuit layer at the corresponding position of the bonding anchor structure, wherein the protective structure includes the circuit layer and the insulating layer on the outer surface of the bonding ring structure. or The protective structure includes at least one protective layer, which includes an insulating layer covering the outer surface of the location of the bonding ring structure.

[0011] In one example of this application, a MEMS device is provided, comprising: Provide the first chip and the second chip; The second wafer is etched to form bumps on its surface; A second bonding metal layer is disposed on the raised surface, and a first bonding metal layer is disposed on the surface of the first wafer; The first bonding metal layer is patterned to cover the protrusions; A bonding structure is formed by eutectic bonding of the first bonding metal layer and the second bonding metal layer.

[0012] On the other hand, this application also provides a MEMS device, which includes a first wafer, a second wafer and a third wafer stacked in sequence; the second wafer is provided with a micromechanical structure and the micromechanical structure is located in the cavity between the first wafer and the third wafer; A bonding structure connects the first wafer and the second wafer; the bonding structure includes a bonding ring structure and a bonding anchor structure, with the bonding anchor structure located within the bonding ring structure. MEMS devices also include a protective structure that covers the outer surface of the bonding ring structure.

[0013] In one embodiment of this application, a deep hole structure is formed on the surface of the first wafer, which is a conductive connection surface with an open bonding anchor structure; A circuit layer is provided inside the deep hole structure, and the circuit layer extends to the surface of the first wafer. The first wafer has conductive bumps on its surface outside the deep hole structure, and a second seed layer is connected between the conductive bumps and the circuit layer below them. The conductive bumps achieve electrical connection with the micromechanical structure through the second seed layer and the circuit layer; The circuit layer includes a first seed layer and a conductive connection layer covering the surface of the first seed layer.

[0014] In one embodiment of this application, the third wafer is provided with a clearance groove for the micromechanical structure; the surface of the third wafer is provided with a deep hole structure for the conductive connection surface of the open bonding anchor structure; A circuit layer is provided inside the deep hole structure, and the circuit layer extends to the surface of the third wafer. The third wafer has conductive bumps on its surface outside the deep hole structure, and a second seed layer is connected between the conductive bumps and the circuit layer below them. The conductive bumps achieve electrical connection with the micromechanical structure through the second seed layer and the circuit layer; The circuit layer includes a first seed layer and a conductive connection layer covering the surface of the first seed layer.

[0015] Compared with existing technologies, the technical effects achieved by this solution are: by forming a deep hole structure through silicon deep hole technology, the overall miniaturization of the device is effectively realized compared with wire bonding.

[0016] In one embodiment of this application, the protective structure includes an insulating layer covering the outer surface of the bonding ring structure, or the protective structure includes a circuit layer covering the outer surface of the bonding ring structure and an insulating layer covering the outside of the circuit layer, wherein the circuit layer covering the outer surface of the bonding ring structure is insulated from the circuit layer at the corresponding position of the bonding anchor structure.

[0017] In another aspect, this application also provides an electronic device, including: a MEMS device as in any of the above examples.

[0018] Compared with existing technologies, the technical effects achieved by adopting this technical solution are as follows: it can achieve the technical effects corresponding to any of the above examples, which will not be elaborated here.

[0019] By adopting the technical solution of this application, the following technical effects can be achieved: (1) By creating a protective structure on the outer surface of the bonding ring structure, it can prevent moisture from the environment from entering the cavity where the micromechanical structure is located; (2) By forming a deep hole structure through silicon deep hole technology, the overall miniaturization of the device is effectively achieved compared with wire bonding. (3) The fabrication of the protective layer was achieved simultaneously during the miniaturization process, saving manufacturing costs. Attached Figure Description

[0020] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Figure 1 This is a schematic diagram of the structure of a MEMS device in the prior art; Figure 2 This is a schematic diagram of the structure of a MEMS device provided in an embodiment of this application; Figure 3 A schematic flowchart illustrating a packaging method for a MEMS device provided in an embodiment of this application; Figure 4 For the corresponding Figure 3 A schematic diagram of a packaging process; Figure 5 For the corresponding Figure 3 A schematic diagram of another packaging process.

[0021] Explanation of reference numerals in the attached figures: 101. Cavity; 10. First wafer; 20. Second wafer; 21. Micromechanical structure; 22. Block bump; 23. Annular bump; 30. Third wafer; 31. Clearance groove; 40. Bonding structure; 41. Outer surface; 42. Bonding ring structure; 43. Bonding anchor point structure; 44. Conductive connection surface; 51. Deep hole structure; 60. Protective structure; 61. Circuit layer; 62. Insulating layer; 63. First seed layer; 64. Electrical connection layer; 65. Conductive bump; 66. Discontinuity position; 71. First opening; 72. Second seed layer. Detailed Implementation

[0022] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, specific embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0023] To reduce costs and meet miniaturization requirements, current MEMS devices generally employ non-hermetic plastic encapsulation. This technology uses epoxy molding compound (EMC) to encapsulate the MEMS chip, wire bonding points, and lead frame through a transfer molding process.

[0024] While plastic molding compounds offer advantages such as low cost, high efficiency, and suitability for mass production, their non-airtight nature means they cannot fundamentally prevent the intrusion of moisture from the external environment. Epoxy molding compounds themselves have a certain degree of hygroscopicity, allowing moisture from the environment to continuously and slowly penetrate the molding compound and diffuse into the encapsulation.

[0025] See Figure 1 Furthermore, in plastic packaging, the interfaces of wire bonding points, pads, and lead frames are potential penetration paths. Although the molding compound is tightly bonded to the chip, lead frames, and other structures, at the microscopic level, there may be extremely small gaps or areas of imperfect bonding at the interfaces.

[0026] Moisture first permeates through the molding compound, then preferentially accumulates along these material interfaces (such as the interface between the chip surface and the molding compound, and the interface between the lead and the molding compound), and finally reaches the most sensitive MEMS device area.

[0027] In short, the above technical solutions lack adequate protection for the device interface, allowing moisture from the environment to directly enter the functional areas of the MEMS device through the interface, severely damaging the performance of the MEMS device.

[0028] See Figure 3 This is a flowchart illustrating a packaging method for a MEMS device provided in an embodiment of this application. Specifically, in conjunction with... Figures 2-5 The encapsulation methods include: Step S1, providing a MEMS device; wherein the MEMS device includes a first wafer 10, a second wafer 20 and a third wafer 30 stacked sequentially, the second wafer 20 having a micromechanical structure 21; and the micromechanical structure 21 being located within a cavity 101 between the first wafer 10 and the third wafer 30; a bonding structure 40 connecting the first wafer 10 and the second wafer 20; the bonding structure 40 including a bonding ring structure 42 and a bonding anchor structure 43, the bonding anchor structure 43 being located within the bonding ring structure 42; Step S2: Fabricate a protective structure 60 on the outer surface 41 of the bonding ring structure 42.

[0029] Combined again Figure 1 In related technologies, the location for the external power supply is situated on the outer surface 41 of the bonding ring structure 42. Compared to the technical solution of this application, this increases the horizontal dimension of the MEMS device, thereby increasing the size of the packaging shell used for packaging it. Furthermore, based on the above analysis, the bonding ring structure 42 acts as a barrier separating the cavity 101 from external environmental moisture. However, since the related technologies use the outer surface 41 of the bonding ring structure 42 as the location for the external power supply, this increases the risk of moisture infiltration at this location.

[0030] Specifically, by creating a protective structure 60 on the outer surface 41 of the bonding ring structure 42, the moisture in the environment is prevented from entering the cavity 101 where the micromechanical structure 21 is located. Compared with related technical solutions, this effectively avoids the risk of the outer surface 41 of the bonding ring structure 42 being exposed to the environment and coming into contact with moisture. Instead, by setting up the protective structure 60, the bonding structure 42 is separated from the environment, so that the moisture in the environment comes into contact with the protective structure 60 first. Only when the protective structure 60 is damaged to the point that the bonding ring structure 42 is exposed to the environment again will there be a potential risk of moisture infiltration.

[0031] See Figure 4 Preferably, the packaging method further includes: At the corresponding position of the bonding anchor structure 43, a first opening 71 is formed on the first wafer 10, penetrating the first wafer 10, and a circuit layer 61 is fabricated in the first opening 71, extending to the surface of the first wafer 10. The circuit layer 61 includes a first seed layer 63 and a conductive connection layer 64 covering the surface of the first seed layer 63.

[0032] See Figure 4 Preferably, the packaging method further includes: A second seed layer 72 is formed within the first opening 71 so that the second seed layer 72 covers the conductive connection layer 64 located below it; Conductive bumps 65 are formed on the surface of the second seed layer 72 to form conductive bumps 65 on the conductive interconnect layer 64 located on the surface of the first wafer 10. An insulating layer 62 is formed on the surface of the first wafer 10, exposing conductive bumps 65.

[0033] Specifically, the wiring layer 61 and insulating layer 62 constituting the protective structure 60 are part of the process for fabricating MEMS devices and external equipment through conductive bumps 65 to achieve electrical connection. In this application, the coverage of the wiring layer 61 and insulating layer 62 is reasonably adjusted to extend to the outer surface 41 of the bonding ring structure 42 to act as a protective barrier against water. Thus, while ensuring the electrical connection effect of the conductive bumps 65, it also protects the bonding ring structure 42. In order to avoid the wiring layer 61 at the location of the bonding anchor structure 43 from connecting with the wiring layer 61 on the outer surface 41 of the bonding ring structure 42, causing an accidental short circuit to ground, the wiring layers 61 at the two locations are often isolated, and the insulating layer 62 also covers the corresponding interruption position 66 of the isolation treatment.

[0034] See Figure 5 Preferably, the packaging method further includes: At the corresponding position of the bonding anchor structure 43, a second opening is formed through the third wafer 30 and the second wafer 20, and a circuit layer 61 is fabricated in the second opening, extending to the surface of the third wafer 30. Conductive bumps 65 are formed on the conductive interconnect layer 64 located on the surface of the third wafer 30; An insulating layer 62 is formed on the surface of the third wafer 30, exposing conductive bumps 65. The circuit layer 61 includes a first seed layer 63 and a conductive connection layer 64 covering the surface of the first seed layer 63.

[0035] Specifically, due to the large depth of the deep hole structure 51, when the conductive bump 65 is to be fabricated inside the deep hole structure 51, on the one hand, the conductive bump 65 needs to be set to a large length. One end needs to contact the conductive connection surface 44 of the bonding anchor structure 43 at the bottom of the deep hole structure 51, and the other end needs to extend out of the deep hole structure 51 to facilitate electrical connection between external devices. It is understandable that since the deep hole structure 51 is used to open the conductive connection surface 44 of the bonding anchor structure 43, and considering the small size of the bonding anchor structure 43, the diameter of the deep hole structure 51 should not be too large to avoid affecting the sealing effect of the bonding anchor structure 43. In addition, a gap may easily appear between the conductive bump 65 and the deep hole structure 51, affecting the electrical connection stability of the conductive bump 65.

[0036] Therefore, in the technical solution of this application, by moving the conductive bump 65 outward, that is, moving it out of the deep hole structure 51 to the surface of the corresponding wafer (first wafer 10 or third wafer 30), on the one hand, it is not necessary to set a large length for the conductive bump 65 to adapt to the deep hole structure 51, thus saving manufacturing costs. In addition, it reduces the difficulty of ensuring a stable electrical connection between the conductive bump 65 and the conductive connection surface 44, that is, the technical difficulty of ensuring that the conductive bump 65 is tightly attached to the inner wall of the deep hole structure 51. On the other hand, the outward movement of the conductive bump 65 achieves a reasonable match with the circuit layer 61. On the basis of ensuring the electrical connection between the conductive bump 65 and the circuit layer 61, the coverage of the conductive connection surface 44 by the circuit layer 61 avoids the first opening 71 being set in the deep hole structure 51 at the same time, which would affect the sealing effect of the circuit layer 61 on the conductive connection surface 44.

[0037] Preferably, the circuit layer 61 further extends to the outer surface 41 of the bonding ring structure 42, and the outer surface 41 of the circuit layer 61 corresponding to the location of the bonding ring structure 42 is covered with an insulating layer 62; the protective structure 60 on the outer surface 41 of the bonding ring structure 42 includes isolating the circuit layer 61 on the outer surface of the bonding ring structure 42 from the circuit layer 61 at the corresponding position of the bonding anchor structure 43, wherein the protective structure 60 includes the circuit layer 61 and the insulating layer 62 on the outer surface of the bonding ring structure 42.

[0038] Combination Figure 2 It is important to note that the wiring layer 61 on the outer surface of the bonding ring structure 42 is separated from the wiring layer 61 at the corresponding position of the bonding anchor structure 43. This is to prevent the formation of a continuous wiring layer 61 between the two locations, which could lead to a short circuit to ground. Therefore, an interruption 66 is often formed between the two locations of the bonding ring structure 42 and the bonding anchor structure 43, and then covered by an insulating layer 62 to provide insulation and further insulation protection, preventing the two wiring layers 61 from connecting and causing a short circuit.

[0039] In another example, the protective structure 60 includes at least one protective layer, which includes an insulating layer 62 covering the outer surface 41 of the location of the bonding ring structure 42.

[0040] In a specific example, taking the deep hole structure 51 formed on the surface of the first wafer 10 as an example, before the perforation process, photoresist needs to be spin-coated on the surface of the first wafer 10, exposed and developed to form a photoresist pattern to be perforated, and then the surface of the first wafer 10 is etched according to the photoresist pattern to obtain the deep hole structure 51. Finally, the photoresist remaining on the surface of the first wafer 10 is removed.

[0041] Specifically, wire bonding requires a pad area of ​​approximately 50-100µm width at the chip edge, as well as a "ghost area" to prevent stress damage, resulting in a package size that is almost the same size as the chip. However, by combining the through-silicon via (TSV) process in this application with "vertical interconnects" instead of "horizontal flying wires," the additional lateral and dome space required for wire bonding is eliminated, thereby achieving miniaturization in both the XY plane (area) and Z axis (thickness) dimensions.

[0042] Furthermore, after the deep hole structure 51 is manufactured, a first seed layer 63 is formed on the surface of the deep hole structure 51 and the first wafer 10. To simplify the process, the first seed layer 63 can cover the outer surface 41 of the bonding ring structure 42, that is, the first seed layer 63 serves as part of the protective structure 60.

[0043] Furthermore, photoresist is spin-coated onto the surface of the first seed layer 63, and after exposure and development, a first opening 71 to be electroplated is formed. Then, an electrical connection layer 64 is fabricated on the surface of the first seed layer 63 exposed at the first opening 71. For example, the first seed layer 63 can be made of metals such as Ti, Cu, Al, Ni, or combinations thereof, and the electrical connection layer 64 can be made of Cu. After the electrical connection layer 64 is fabricated, the photoresist is removed, and then the first seed layer 63 exposed outside the electrical connection layer 64 is removed. The electrical connection layer 64 also extends to cover the portion of the outer surface 41 of the bonding ring structure 42 corresponding to the first seed layer 63.

[0044] Furthermore, the process of fabricating the insulating layer 62 on the surface of the circuit layer 61 specifically includes spin-coating photoresist onto the surface of the electrical connection layer 64, performing a soft baking process to allow the photoresist to initially cure and form the insulating layer 62, and then performing an exposure and development process on the initially cured insulating layer 62 to obtain the solder openings for opening the electrical connection layer 64. Finally, the insulating layer 62 is cured. The thickness of the spin-coated photoresist can be controlled between 10 and 20 μm, and the hard baking temperature for the final curing of the insulating layer 62 can be controlled between 150 and 300°C.

[0045] Similarly, the insulating layer 62 extends to cover the portion of the electrical connection layer 64 corresponding to the outer surface 41 of the bonding ring structure 42. Thus, the protective structure 60 can specifically be composed of a first seed layer 63, an electrical connection layer 64, and an insulating layer 62 sequentially covering the outer surface 41 of the bonding ring structure 42.

[0046] Combination Figure 5In contrast, the deep hole structure 51 can also be formed on the surface of the third wafer 30 and positioned directly opposite the location where the bonding anchor structure 43 is provided in the second wafer 20. The specific process of obtaining the deep hole structure 51 is the same as that of the deep hole structure 51 fabricated on the first wafer 10, and will not be repeated here.

[0047] In another embodiment, the circuit layer 61 does not extend to the outer surface 41 of the bonding ring structure 42, that is, there is no connection between the formation of the protective structure 60 and the laying of the circuit layer 61. Specifically, the protective structure 60 includes a single insulating layer covering the outer surface of the bonding ring structure 42; or the protective structure 60 includes an insulating layer and an oxide layer, with the oxide layer covering the outer surface 41 of the bonding ring structure 42, and then an insulating layer covering the surface of the oxide layer; or the protective structure 60 includes a metal layer and an insulating layer, with the metal layer covering the outer surface 41 of the bonding ring structure 42, and then an insulating layer forming the surface of the metal layer.

[0048] Of course, there are other combinations of protective structure 60, such as including a metal layer, a non-metal layer (oxide layer) and an insulating layer. Thus, the outer surface 41 of the bonding ring structure 42 is sequentially covered with a metal layer, a non-metal layer (oxide layer) and an insulating layer.

[0049] Preferably, a MEMS device is provided, including: Provide a first chip 10 and a second chip 20; The second wafer 20 is etched to form bumps on the surface of the second wafer 20; A second bonding metal layer is disposed on the raised surface, and a first bonding metal layer is disposed on the surface of the second wafer 20; The first bonding metal layer is patterned to cover the protrusions; A bonding structure is formed by eutectic bonding of the first bonding metal layer and the second bonding metal layer.

[0050] In one specific example, the protrusion includes an annular protrusion 23 and a block protrusion 22 located inside the annular protrusion 23, with the inner side of the annular protrusion 23 being a functional region. A bonding ring structure 42 is formed on the annular protrusion 23, and a bonding anchor structure 43 is formed on the block protrusion 22.

[0051] See Figure 2 On the other hand, this application also provides a MEMS device, which includes a first wafer 10, a second wafer 20 and a third wafer 30 stacked in sequence; the second wafer 20 is provided with a micromechanical structure 21 and the micromechanical structure 21 is located in the cavity 101 between the first wafer 10 and the third wafer 30. A bonding structure connects the first wafer 10 and the second wafer 20; the bonding structure includes a bonding ring structure 42 and a bonding anchor structure 43, with the bonding anchor structure 43 located within the bonding ring structure 42. The MEMS device also includes a protective structure 60, which covers the outer surface 41 of the bonding ring structure 42.

[0052] See Figure 4 Preferably, the surface of the first wafer 10 is provided with a deep hole structure 51 for the conductive connection surface 44 of the open bonding anchor point structure 43; A circuit layer 61 is disposed within the deep hole structure 51, and the circuit layer 61 extends to the surface of the first wafer 10. The first wafer 10 has conductive bumps 65 on its surface outside the deep hole structure 51, and a second seed layer 72 is connected between the conductive bumps 65 and the circuit layer 61 below them. The conductive bump 65 is electrically connected to the micromechanical structure 21 through the second seed layer 72 and the circuit layer 61; The circuit layer 61 includes a first seed layer 63 and a conductive connection layer 64 covering the surface of the first seed layer 63.

[0053] See Figure 5 Preferably, the third wafer 30 is provided with a clearance groove 31 for the clearance micromechanical structure 21; the surface of the third wafer 30 is provided with a deep hole structure 51 for the conductive connection surface 44 of the open bonding anchor structure 43. A circuit layer 61 is disposed within the deep hole structure 51, and the circuit layer 61 extends to the surface of the third wafer 30. The third wafer 30 has conductive bumps 65 on its surface outside the deep hole structure 51, and a second seed layer 72 is connected between the conductive bumps 65 and the circuit layer 61 below them. The conductive bump 65 is electrically connected to the micromechanical structure 21 through the second seed layer 72 and the circuit layer 61; The circuit layer 61 includes a first seed layer 63 and a conductive connection layer 64 covering the surface of the first seed layer 63.

[0054] Compared with existing technologies, the technical effects achieved by this solution are: by forming a deep hole structure through silicon deep hole technology, the overall miniaturization of the device is effectively realized compared with wire bonding.

[0055] Preferably, the protection structure 60 includes an insulating layer 62 covering the outer surface 41 of the bonding ring structure 42, or the protection structure 60 includes a circuit layer 61 covering the outer surface 41 of the bonding ring structure 42 and an insulating layer 62 covering the outside of the circuit layer 61. The circuit layer 61 covering the outer surface 41 of the bonding ring structure 42 is insulated from the circuit layer 61 at the corresponding position of the bonding anchor structure 43, so as to avoid the circuit layers 61 at the two locations of the bonding ring structure 42 and the bonding anchor structure 43 from being connected to each other, thus preventing the occurrence of a short circuit.

[0056] Furthermore, this application also provides an electronic device, specifically, the electronic device includes the MEMS device as described in the above embodiments. In this embodiment, the technical effects corresponding to any of the technical solutions described in the above embodiments can be achieved, and will not be elaborated further here.

[0057] While this application discloses the above information, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of this application; therefore, the scope of protection of this application shall be determined by the scope defined in the claims.

Claims

1. A packaging method for a MEMS device, characterized in that, The encapsulation method includes: A MEMS device is provided; the MEMS device includes a first wafer, a second wafer and a third wafer stacked sequentially, the second wafer having a micromechanical structure located in a cavity between the first wafer and the third wafer; A bonding structure connects the first wafer and the second wafer; the bonding structure includes a bonding ring structure and a bonding anchor structure, and the bonding anchor structure is located within the bonding ring structure. A protective structure is fabricated on the outer surface of the bonding ring structure.

2. The packaging method according to claim 1, characterized in that, The encapsulation method further includes: At the location corresponding to the bonding anchor structure, a first opening penetrating the first wafer is formed on the first wafer, and a circuit layer is fabricated within the first opening, the circuit layer extending to the surface of the first wafer. The circuit layer includes a first seed layer and a conductive connection layer covering the surface of the first seed layer.

3. The packaging method according to claim 2, characterized in that, The encapsulation method further includes: A second seed layer is formed within the first opening so that the second seed layer covers the conductive connection layer located below it; Conductive bumps are formed on the surface of the second seed layer to form the conductive bumps on the conductive interconnect layer located on the surface of the first wafer; An insulating layer is formed on the surface of the first wafer to expose the conductive bumps.

4. The packaging method according to claim 1, characterized in that, The encapsulation method further includes: At the corresponding position of the bonding anchor structure, a second opening is formed that penetrates the third wafer and the second wafer. A circuit layer is fabricated in the second opening and the circuit layer extends to the surface of the third wafer. Conductive bumps are fabricated on the conductive interconnect layer located on the surface of the third wafer; An insulating layer is formed on the surface of the third wafer to expose the conductive bumps; The circuit layer includes a first seed layer and a conductive connection layer covering the surface of the first seed layer.

5. The packaging method according to claim 2 or 4, characterized in that, The circuit layer extends to the outer surface of the bonding ring structure, and the outer surface of the circuit layer corresponding to the location of the bonding ring structure is covered with an insulating layer; the protective structure on the outer surface of the bonding ring structure includes isolating the circuit layer on the outer surface of the bonding ring structure from the circuit layer at the corresponding position of the bonding anchor structure, wherein the protective structure includes the circuit layer on the outer surface of the bonding ring structure and the insulating layer. or The protective structure includes at least one protective layer, which includes an insulating layer covering the outer surface of the location of the bonding ring structure.

6. The packaging method according to any one of claims 1-4, characterized in that, The provision of MEMS devices includes: The first wafer and the second wafer are provided; The second wafer is etched to form bumps on its surface; A second bonding metal layer is disposed on the protruding surface, and a first bonding metal layer is disposed on the surface of the first wafer; The first bonding metal layer is patterned to cover the protrusion; The bonding structure is formed by eutectic bonding of the first bonding metal layer and the second bonding metal layer.

7. A MEMS device, characterized in that, The MEMS device includes a first wafer, a second wafer, and a third wafer stacked sequentially; the second wafer has a micromechanical structure, and the micromechanical structure is located in the cavity between the first wafer and the third wafer; A bonding structure connects the first wafer and the second wafer; the bonding structure includes a bonding ring structure and a bonding anchor structure, and the bonding anchor structure is located within the bonding ring structure. The MEMS device also includes a protective structure that covers the outer surface of the bonding ring structure.

8. The MEMS device according to claim 7, characterized in that, The surface of the first wafer has a deep hole structure that opens the conductive connection surface of the bonding anchor point structure; A circuit layer is provided inside the deep hole structure, and the circuit layer extends to the surface of the first wafer. The first wafer has conductive bumps on its surface outside the deep hole structure, and a second seed layer is connected between the conductive bumps and the circuit layer below them. The conductive bumps are electrically connected to the micromechanical structure through the second seed layer and the circuit layer; The circuit layer includes a first seed layer and a conductive connection layer covering the surface of the first seed layer.

9. The MEMS device according to claim 7, characterized in that, The third wafer is provided with a clearance groove to allow the micromechanical structure to pass; the surface of the third wafer is provided with a deep hole structure to open the conductive connection surface of the bonding anchor point structure; A circuit layer is provided within the deep hole structure, and the circuit layer extends to the surface of the third wafer. The third wafer has conductive bumps on its surface outside the deep hole structure, and a second seed layer is connected between the conductive bumps and the circuit layer below them. The conductive bump is electrically connected to the micromechanical structure through the second seed layer and the circuit layer; The circuit layer includes a first seed layer and a conductive connection layer covering the surface of the first seed layer.

10. The MEMS device according to claim 8 or 9, characterized in that, The protective structure includes an insulating layer covering the outer surface of the bonding ring structure, or the protective structure includes a circuit layer covering the outer surface of the bonding ring structure and an insulating layer covering the outside of the circuit layer, wherein the circuit layer covering the outer surface of the bonding ring structure is insulated from the circuit layer at the corresponding position of the bonding anchor structure.

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