Method for improving wafer bow

Abstract

The application provides a method for improving wafer warping, a substrate with trenches and a deposition machine. The substrate is provided with a hard mask layer, and the substrate is placed in a process chamber of the deposition machine. The temperature in the process chamber is adjusted to a first temperature, and then a first thin film layer filling the trenches is deposited on the substrate. The temperature in the process chamber is increased to a second temperature, and then a second thin film layer is deposited on the first thin film layer. The application deposits a gate layer with a certain thickness at a low temperature to fill the trenches, and then the remaining thickness of the gate layer is deposited by increasing the temperature of the furnace tube. The application improves the warping of SGT products and improves the production capacity.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to a method for improving wafer warpage. BACKGROUND

[0002] Vertical furnace tube machine is one of the important process equipment in the front process of semiconductor production line, which is used for diffusion, oxidation, annealing and alloying processes in industries such as large-scale integrated circuits, discrete devices, power electronics, optoelectronic devices and optical fibers.

[0003] SGT (Shielded Gate Transistor, Shielded Gate Transistor) has the problem of stress due to deep groove, which is easy to trigger alarm and cause wafer damage during gate layer operation.

[0004] Currently, SGT gate (12KA) filling adopts three-step distributed deposition, which reduces the risk of fragmentation; but reduces the production capacity of FAB.

[0005] The above problems have not been solved, and a new method for improving wafer warpage is needed. SUMMARY

[0006] In view of the above-mentioned defects of the prior art, the purpose of the present application is to provide a method for improving wafer warpage, which is used to solve the problem that SGT devices have the problem of stress due to deep groove, which is easy to trigger alarm and cause wafer damage during gate layer operation. Currently, SGT gate filling adopts three-step distributed deposition, which reduces the risk of fragmentation; but reduces the production capacity of FAB.

[0007] To achieve the above-mentioned purpose and other related purposes, the present application provides a method for improving wafer warpage, comprising:

[0008] Step one, providing a substrate formed with a groove and a deposition machine, a hard mask layer is formed on the substrate, and the substrate is placed in the process chamber of the deposition machine;

[0009] Step two, adjusting the temperature in the process chamber to a first temperature, and then depositing a first thin film layer on the substrate to fill the groove;

[0010] Step three, increasing the temperature in the process chamber to a second temperature, and then depositing a second thin film layer on the first thin film layer.

[0011] Preferably, the substrate in step one is a silicon substrate.

[0012] Preferably, the material of the hard mask layer in step one is silicon dioxide.

[0013] Preferably, the material of the first thin film layer in step two is polysilicon.

[0014] Preferably, the first temperature in step two is 510 to 550 degrees Celsius.

[0015] Preferably, the thickness of the first thin film layer in step two is 3000 to 5000 angstroms.

[0016] Preferably, the material of the second thin film layer in step three is polysilicon.

[0017] Preferably, the second temperature in step three is 560 to 595 degrees Celsius.

[0018] Preferably, the thickness of the second thin film layer in step three is 7000 to 9000 angstroms.

[0019] Preferably, the deposition machine in step one is a chemical vapor deposition machine.

[0020] Preferably, the method is used for manufacturing a shield gate trench type device.

[0021] Preferably, the gate layer thickness of the shield gate trench type device is 12000 angstroms.

[0022] As mentioned above, the method for improving wafer warpage of the present application has the following beneficial effects:

[0023] The present application deposits a certain thickness of gate layer at low temperature to realize trench filling, and then raises the temperature of the furnace tube to deposit the remaining thickness of gate layer, which improves the warpage of SGT products and improves the production capacity. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 The figure shows the process flow diagram of the present application;

[0025] Figure 2 The figure shows the substrate diagram of the present application;

[0026] Figure 3 The figure shows the formation of the first thin film layer of the present application;

[0027] Figure 4 The figure shows the formation of the second thin film layer of the present application. DETAILED DESCRIPTION

[0028] The embodiments of the present application will be described in detail below with specific reference to the drawings. Those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in the specification. The present application can also be implemented or applied in other different embodiments, and the details in the specification can be modified or changed based on different views and applications without departing from the spirit of the present application.

[0029] Please refer to Figure 1The application provides a method for improving wafer warping, comprising the following steps:

[0030] In step one, a substrate 01 with trenches is provided and a deposition machine is provided, a hard mask layer 02 is formed on the substrate 01, and the substrate 01 is placed in a process chamber of the deposition machine for subsequent deposition.

[0031] In an embodiment of the application, the substrate 01 in step one is a silicon substrate 01.

[0032] In an embodiment of the application, the material of the hard mask layer 02 in step one is silicon dioxide, and the silicon substrate 01 is usually placed in a high-temperature furnace tube, and the silicon on the surface of the silicon substrate 01 is high-temperature oxidized into a layer of silicon dioxide.

[0033] In an embodiment of the application, the deposition machine in step one is a chemical vapor deposition machine.

[0034] In step two, the temperature in the process chamber is adjusted to a first temperature, and then a first thin film layer 03 filling the trenches is deposited on the substrate 01.

[0035] In an embodiment of the application, the material of the first thin film layer 03 in step two is polysilicon, and the first thin film layer 03 can be formed by a chemical vapor deposition machine.

[0036] In an embodiment of the application, the first temperature in step two is 510-550 degrees Celsius, and specifically, the first temperature can be 510 degrees Celsius, 520 degrees Celsius, 530 degrees Celsius, 540 degrees Celsius or 550 degrees Celsius, that is, the first thin film layer 03 is first deposited at a lower temperature to fill the trenches.

[0037] In an embodiment of the application, the thickness of the first thin film layer 03 in step two is 3000-5000 angstroms, and specifically, the thickness of the first thin film layer can be 3000 angstroms, 3500 angstroms, 4000 angstroms, 4500 angstroms or 5000 angstroms, and it should be noted that the thickness of the first thin film layer 03 is determined by the size of the trenches, and the first thin film layer 03 needs to fill the trenches in this step.

[0038] In step three, the temperature in the process chamber is increased to a second temperature, and by increasing the temperature, the stress around the trenches can be released, and then a second thin film layer 04 is deposited on the first thin film layer 03, and by the continuous deposition of two steps, compared with the continuous deposition of three times in the prior art, not only the warping of the substrate 01 is improved, but also the production capacity is improved.

[0039] In an embodiment of the application, the material of the second thin film layer 04 in step three is polysilicon.

[0040] In the embodiments of the present application, the second temperature in step three is 560 to 595 degrees Celsius, and specifically, the second temperature can be 560 degrees Celsius, 570 degrees Celsius, 580 degrees Celsius or 590 degrees Celsius.

[0041] In the embodiments of the present application, the thickness of the second thin film layer 04 in step three is 7000 to 9000 angstroms, and specifically, the thickness of the second thin film layer can be 7000 angstroms, 7500 angstroms, 8000 angstroms, 8500 angstroms or 9000 angstroms.

[0042] In the embodiments of the present application, the above-mentioned any method is used for manufacturing a shield gate trench type device, and the shield gate trench type device has a problem of stress due to a groove depth, and is easy to trigger an alarm and cause wafer damage during a gate layer operation.

[0043] In the embodiments of the present application, the thickness of the gate layer of the shield gate trench type device is 12000 angstroms, that is, the total thickness of the first and second polysilicon thin film layers is about 12000 angstroms, and through the continuous two-step deposition, the warpage is improved and the production capacity is improved.

[0044] It should be noted that the diagrams provided in the embodiments only illustrate the basic concept of the present application in a schematic manner, and only the components related to the present application are shown in the diagrams, not the number, shape and size of the components when actually implemented. The actual implementation of each component can be randomly changed in shape, number and proportion, and the layout pattern of the components can be more complex.

[0045] In summary, the present application deposits a certain thickness of the gate layer at low temperature to realize trench filling, and then raises the temperature of the furnace tube to deposit the remaining thickness of the gate layer, thereby improving the warpage of the SGT product and improving the production capacity. Therefore, the present application effectively overcomes the various shortcomings in the prior art and has high industrial utilization value.

[0046] The above embodiments only exemplarily illustrate the principles and effects of the present application, and are not used to limit the present application. Any person skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present application. Therefore, all equivalent modifications or changes made by those skilled in the art without departing from the spirit and technical idea disclosed by the present application should be covered by the claims of the present application.

Claims

1. A method for improving wafer warpage, characterized in that, At least including: Step 1: Provide a substrate with trenches and a deposition equipment, wherein a hard mask layer is formed on the substrate, and place the substrate in the process chamber of the deposition equipment; Step 2: The temperature in the process chamber is adjusted to a first temperature, which is 510 to 550 degrees Celsius. Then, a first thin film layer is deposited on the substrate to fill the trench. The material of the first thin film layer is polycrystalline silicon. The first temperature enables the first thin film layer to fill the trench. Step 3: The temperature in the process chamber is raised to a second temperature, which is higher than the first temperature. The second temperature is 560 to 595 degrees Celsius. Then, a second thin film layer is deposited on the first thin film layer. The material of the second thin film layer is polycrystalline silicon. Through two consecutive deposition steps, the shielded gate trench device is manufactured.

2. The method for improving wafer warpage according to claim 1, characterized in that: The substrate mentioned in step one is a silicon substrate.

3. The method for improving wafer warpage according to claim 1, characterized in that: The material of the hard mask layer mentioned in step one is silicon dioxide.

4. The method for improving wafer warpage according to claim 1, characterized in that: In step two, the thickness of the first thin film layer is 3000 to 5000 angstroms.

5. The method for improving wafer warpage according to claim 1, characterized in that: In step three, the thickness of the second thin film layer is 7,000 to 9,000 angstroms.

6. The method for improving wafer warpage according to claim 1, characterized in that: The deposition equipment mentioned in step one is a chemical vapor deposition equipment.

7. The method for improving wafer warpage according to claim 1, characterized in that: The gate layer thickness of the shielded trench device is 12,000 angstroms.

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