Display panel and manufacturing method thereof, and display device

Abstract

Provided are a display panel, a manufacturing method thereof, and a display device, belonging to the field of display technology. The display panel includes a substrate, a barrier dam and a crack detection circuit located in the edge area of ​​the substrate, and an encapsulation layer located in the display area and the edge area of ​​the substrate. The crack detection circuit includes a first conductive layer, a first light-emitting layer, and a second conductive layer stacked in sequence, and the first light-emitting layer can emit light based on a first power supply signal received by the first conductive layer and a second power supply signal received by the second conductive layer, that is, the crack detection circuit can be illuminated. In this way, whether a crack appears on the edge of the display substrate can be reliably determined based on whether the crack detection circuit can be illuminated normally, and the location of the crack can be determined based on the location where the crack detection circuit cannot be illuminated, thereby achieving reliable and rapid detection of the crack and the location of the crack.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof, and a display device. Background Art

[0002] Currently, to ensure the factory yield of display panels, a panel crack detection (PCD) circuit is often arranged at the edge of the display panel, and the resistance value on the PCD circuit is collected to detect whether there is a crack on the edge of the display panel.

[0003] However, this detection method can only detect whether a crack occurs on the display panel, but cannot determine the location of the crack, and the detection flexibility is poor. Summary of the Invention

[0004] Provided are a display panel, a manufacturing method thereof, and a display device, which can solve the problem in the related art of being unable to determine the location of cracks. The technical solution is as follows:

[0005] In one aspect, a display panel is provided, comprising:

[0006] a substrate having a display area and an edge area at least partially surrounding the display area;

[0007] a barrier dam, the barrier dam being located on one side of the substrate and in the edge region;

[0008] a crack detection circuit, the crack detection circuit being located on one side of the substrate and in the edge region; an orthographic projection of the crack detection circuit on the substrate not overlapping with an orthographic projection of the blocking dam on the substrate, and the crack detection circuit comprising: a first conductive layer, a first light-emitting layer, and a second conductive layer stacked sequentially in a direction away from the substrate, the first conductive layer being configured to receive a first power signal, the second conductive layer being configured to receive a second power signal, and the first light-emitting layer being configured to emit light in response to the first power signal and the second power signal;

[0009] and an encapsulation layer, wherein the encapsulation layer is located on a side of the blocking dam and the crack detection circuit away from the substrate, and is located in the display area and the edge area.

[0010] Optionally, the width of the second conductive layer is smaller than the width of the first conductive layer, and the orthographic projection of the second conductive layer on the substrate is located within the orthographic projection of the first conductive layer on the substrate.

[0011] Optionally, the display panel further includes:

[0012] At least one first connecting lead, at least one second connecting lead, at least one first lighting test pin, and at least one second lighting test pin located on one side of the substrate and in the edge region;

[0013] The first conductive layer is coupled to the first lighting test pin through the first connecting lead and is configured to receive a first power signal from the first lighting test pin;

[0014] The second conductive layer is coupled to the second lighting test pin through the second connecting lead and is configured to receive a second power signal from the second lighting test pin.

[0015] Optionally, the orthographic projection of the crack detection circuit on the substrate is a ring having an opening and surrounding the display area; the crack detection circuit is divided into a first portion and a second portion by the opening; the display panel includes: two first connecting leads, two second connecting leads, two first lighting test pins, and two second lighting test pins;

[0016] In the first part, the first conductive layer is coupled to one of the two first lighting test pins through one of the two first connecting leads, and the second conductive layer is coupled to one of the two second lighting test pins through one of the two second connecting leads;

[0017] In the second part, the first conductive layer is coupled to the other first lighting test pin of the two first lighting test pins through the other first connecting lead of the two first connecting leads, and the second conductive layer is coupled to the other second lighting test pin of the two second lighting test pins through the other second connecting lead of the two second connecting leads.

[0018] Optionally, the display panel further includes:

[0019] a pixel located on one side of the substrate and in the display area, the pixel comprising a source / drain metal layer, an anode layer, a second light-emitting layer, and a cathode layer stacked in sequence in a direction away from the substrate;

[0020] The first conductive layer and the anode layer are located in the same layer, the first light-emitting layer and the second light-emitting layer are located in the same layer, the second conductive layer and the cathode layer are located in the same layer, and the first connecting lead and the second connecting lead are both located in the same layer as the source / drain metal layer.

[0021] Optionally, the barrier dam comprises: at least two barrier portions spaced apart in a direction away from the display area;

[0022] Wherein, the crack detection circuit is located on a side of the at least two blocking parts away from the display area, or, the crack detection circuit is located on a side of the at least two blocking parts close to the display area, or, the crack detection circuit is located between any two adjacent blocking parts of the at least two blocking parts.

[0023] Optionally, the display panel further includes: an insulating layer located on one side of the substrate;

[0024] The blocking dam and the crack detection circuit are both located on a side of the insulating layer away from the substrate, and are spaced apart in a direction parallel to the display surface of the display panel.

[0025] Optionally, the display panel further includes: an insulating layer located on one side of the substrate and having a via hole, wherein the depth of the via hole is greater than or equal to the thickness of the crack detection circuit;

[0026] The blocking dam is located on a side of the insulating layer away from the substrate, and the crack detection circuit is located in the via hole.

[0027] In another aspect, a method for manufacturing a display panel is provided, for manufacturing the display panel according to the above aspect, the method comprising:

[0028] providing a substrate having a display area and an edge area at least partially surrounding the display area;

[0029] forming a barrier dam on one side of the substrate, wherein the barrier dam is located in the edge region;

[0030] A crack detection circuit is formed on one side of the substrate, and the crack detection circuit is located in the edge region. The orthographic projection of the crack detection circuit on the substrate does not overlap with the orthographic projection of the blocking dam on the substrate. The crack detection circuit includes: a first conductive layer, a first light-emitting layer, and a second conductive layer stacked in sequence in a direction away from the substrate, the first conductive layer being configured to receive a first power signal, the second conductive layer being configured to receive a second power signal, and the first light-emitting layer being configured to emit light in response to the first power signal and the second power signal.

[0031] Furthermore, an encapsulation layer is formed on a side of the blocking dam and the crack detection circuit away from the substrate, and the encapsulation layer is located in the display area and the edge area.

[0032] In another aspect, a display device is provided, comprising: a power supply circuit, and the display panel according to the above aspect;

[0033] The power circuit is coupled to a first conductive layer and a second conductive layer included in the crack detection circuit in the display panel, respectively. The power circuit is used to provide a first power signal to the first conductive layer and a second power signal to the second conductive layer.

[0034] In summary, the beneficial effects brought about by the technical solutions provided by the embodiments of the present disclosure may include at least:

[0035] Provided are a display panel, a manufacturing method thereof, and a display device. The display panel includes a substrate, a barrier dam and a crack detection circuit located in an edge region of the substrate, and an encapsulation layer located in the display region and the edge region of the substrate. The crack detection circuit includes a first conductive layer, a first light-emitting layer, and a second conductive layer stacked in sequence. The first light-emitting layer can emit light based on a first power supply signal received by the first conductive layer and a second power supply signal received by the second conductive layer, that is, the crack detection circuit can be illuminated. In this way, whether a crack appears at the edge of the display substrate can be reliably determined based on whether the crack detection circuit can be illuminated normally, and the location of the crack can be determined based on the location where the crack detection circuit cannot be illuminated, thereby achieving reliable and rapid detection of the crack and the location of the crack. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0037] Figure 1 is a structural schematic diagram of a display panel provided by an embodiment of the present disclosure;

[0038] Figure 2 is a cross-sectional view of a display panel provided by an embodiment of the present disclosure;

[0039] Figure 3 1 is a structural diagram of a crack detection circuit provided by an embodiment of the present disclosure;

[0040] Figure 4 is a schematic structural diagram of another display panel provided by an embodiment of the present disclosure;

[0041] Figure 5 is a structural schematic diagram of another crack detection circuit provided by an embodiment of the present disclosure;

[0042] Figure 6 is a structural diagram of another display panel provided by an embodiment of the present disclosure;

[0043] Figure 7is a cross-sectional view of another display panel provided by an embodiment of the present disclosure;

[0044] Figure 8 is a cross-sectional view of another display panel provided by an embodiment of the present disclosure;

[0045] Figure 9 is a flow chart of a method for manufacturing a display panel provided by an embodiment of the present disclosure;

[0046] Figure 10 It is a structural schematic diagram of a display device provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0047] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0048] Organic light emitting diode (OLED) display panels usually use OLED as a pixel matrix to achieve display, which has the advantages of bright colors, wide color gamut and high contrast. However, because organic materials easily absorb water, there is a problem of luminescence failure, and the screen of the OLED display panel cannot be partially or even completely lit. For this reason, it is necessary to use an encapsulation layer to effectively encapsulate the OLED light-emitting elements to achieve protection of the OLED light-emitting elements. However, tests have found that under the action of external force, cracks (cracks) are very likely to appear on the edge of the package. Once water vapor enters the screen along the crack, it will still cause the package to fail, and the water vapor will invade the OLED light-emitting elements, causing luminescence failure. It is generally more obvious that when the screen is lit, a large area of ​​​​the screen where the cracks appear will not light up.

[0049] Currently, to address this issue, a PCD circuit is often placed around the edge of the display panel. The presence of cracks is determined by measuring the resistance of the PCD circuit. For example, when a crack appears, it's equivalent to an open PCD circuit, and the resistance of the PCD circuit tends to infinity. If no crack is present, the resistance of the PCD circuit is generally low. Thus, cracks can be detected based on the resistance.

[0050] However, current crack detection methods can only confirm the presence of a crack, but not its exact location, resulting in poor detection effectiveness and low reliability. Furthermore, because cracks are typically small and can occur within the screen, their location is difficult to pinpoint even with a microscope. Therefore, failure to pinpoint the crack's exact location hinders subsequent analysis of the cause of the defect.

[0051] Based on this, the embodiment of the present disclosure provides a new display panel, in which the PCD circuit can not only detect whether cracks appear on the edge of the display panel, but also accurately locate the crack position, providing a fast channel for subsequent defect analysis, and ultimately ensuring a good factory yield of the display panel.

[0052] Figure 1 Schematic diagram of the structure of a display panel provided by an embodiment of the present disclosure. Figure 1 As shown, the display panel includes:

[0053] Substrate 01. The substrate 01 has a display area 01-1 and an edge area 01-2 at least partially surrounding the display area 01-1.

[0054] For example, reference Figure 1 In the display panel shown, the substrate 01 is rectangular, and the edge area 01-2 is located on the four sides of the display area 01-1, surrounding the display area 01-1. Of course, in some other embodiments, the edge area 01-2 can also be located on any side of the display area 01-1, adjacent to the display area 01-1. Or the edge area 01-2 can be located on multiple sides of the display area 01-1, partially surrounding the display area 01-1. The embodiments of the present disclosure are not limited to this. Of course, it should be noted that the area of ​​the display area 01-1 is usually much larger than the area of ​​the edge area 01-2.

[0055] exist Figure 1 On the basis of Figure 2 A cross-sectional view of a display panel is shown. Figure 1 and Figure 2 It can be seen that the display panel described in the embodiment of the present disclosure further includes: a barrier dam 02 , a crack detection PCD circuit 03 , and an encapsulation layer 04 .

[0056] The barrier dam 02 is located on one side of the substrate 01, in the edge region 01-2. The barrier dam 02 can be used to block cracks that appear at the edge of the display panel, preventing them from extending into the display region 01-1. This can reliably prevent moisture from entering the display region 01-1 through the cracks, thereby protecting the light-emitting elements in the display region 01-1. Specifically, the display region 01-1 of the substrate 01 can be provided with multiple light-emitting elements, such as OLEDs.

[0057] Optionally, the barrier dam 02 may be annular, surrounding the display area 01 - 1 , and the barrier dam 02 may be made of metal or other materials with high hardness to reliably achieve a barrier effect.

[0058] The crack detection circuit 03 is located on one side of the substrate 01 and is located in the edge area 01-2. The orthographic projection of the crack detection circuit 03 on the substrate 01 does not overlap with the orthographic projection of the barrier dam 02 on the substrate 01. Figure 1 and Figure 2 In the display panel shown, the barrier dam 02 is closer to the display area 01-1 than the crack detection circuit 03. That is, the barrier dam 02 and the crack detection circuit 03 are arranged in sequence in a direction away from the display area 01-1. This ensures that crack detection and crack blocking do not interfere with each other.

[0059] And, reference Figure 2 The crack detection circuit 03 includes: a first conductive layer 031, a first light-emitting layer 032, and a second conductive layer 033, which are stacked in sequence in a direction away from the substrate 01. The first conductive layer 031 is configured to receive a first power signal, the second conductive layer 033 is configured to receive a second power signal, and the first light-emitting layer 032 is configured to emit light in response to the first and second power signals.

[0060] For example, the first conductive layer 031 can be coupled (i.e., electrically connected) to a first power supply terminal in a power supply circuit peripheral to the display panel to receive a first power supply signal provided by the first power supply terminal. The second conductive layer 033 can be coupled to a second power supply terminal in the power supply circuit to receive a second power supply signal provided by the second power supply terminal. The first light-emitting layer 032 can emit light in response to a voltage difference between the first power supply signal and the second power supply signal.

[0061] Optionally, the potential of the first power signal may be greater than the potential of the second power signal. For example, the first power signal may be positive, and the second power signal may be negative. The first power terminal may be a power supply terminal VDD, and the second power terminal may be a pull-down power terminal VSS.

[0062] On this basis, if it is necessary to detect whether a crack appears on the edge of the display panel, the required power signal can be applied to the first conductive layer 031 and the second conductive layer 033 at the same time to light up the crack detection circuit 03. If it can light up normally, it can be determined that there is no crack on the edge of the display panel. If it cannot light up normally, it can be determined that a crack appears on the edge of the display panel, and a severe crack will cause the area around the crack to be unable to light up. In this way, the location of the crack can be quickly and reliably determined based on the location or area that cannot be lit. For example, if a black stripe appears at a certain point on the crack detection circuit 03 or a large area is not lit, it can be determined that the area where the black stripe or large area is located is the crack occurrence area. Figure 1 Crack 0 is also schematically shown.

[0063] The encapsulation layer 04 is located on the side of the barrier dam 02 and crack detection circuit 03 away from the substrate 01, and is located in the display area 01-1 and the edge area 01-2. That is, a portion of the encapsulation layer 04 can be located in the display area 01-1, while another portion B1 can be located in the edge area 01-2. This encapsulation layer 04 effectively encapsulates the light-emitting elements in the display area 01-1 and the barrier dam 02 and crack detection circuit 03 in the edge area 01-2, further preventing moisture intrusion.

[0064] Optionally, the encapsulation layer 04 described in the embodiment of the present disclosure may include: a plurality of encapsulation film layers stacked in sequence, and at least one of the encapsulation film layers may be formed by a chemical vapor deposition (CVD) film forming process, and the film layer material used in the CVD film forming process may be an inorganic material, and at least one of the encapsulation film layers may be formed by an ink jet printing (IJP) process, on this basis, the film layer material used in the ink jet printing process may be an organic material.

[0065] For example, still refer to Figure 2 It can be seen that the encapsulation layer 04 shown includes three encapsulation film layers 041, 042, and 043 stacked in sequence in a direction away from the substrate 01. Encapsulation film layers 041 and 043 may be inorganic encapsulation film layers formed using a CVD film formation process, and encapsulation film layer 043 may be an organic encapsulation film layer formed using an IJP process. Accordingly, encapsulation film layers 041 and 043 may be referred to as CVD1 and CVD2 layers, respectively, and encapsulation film layer 042 may be referred to as an IJP layer.

[0066] In summary, an embodiment of the present disclosure provides a display panel. The display panel includes a substrate, a barrier dam and a crack detection circuit located in the edge area of ​​the substrate, and an encapsulation layer located in the display area and the edge area of ​​the substrate. The crack detection circuit includes a first conductive layer, a first light-emitting layer, and a second conductive layer stacked in sequence, and the first light-emitting layer can emit light based on a first power signal received by the first conductive layer and a second power signal received by the second conductive layer, that is, the crack detection circuit can be illuminated. In this way, whether a crack appears at the edge of the display substrate can be reliably determined based on whether the crack detection circuit can be illuminated normally, and the location of the crack can be determined based on the location where the crack detection circuit cannot be illuminated, thereby achieving reliable and rapid detection of the crack and the location of the crack.

[0067] Optional, combined Figure 3As shown in the enlarged cross-sectional view of the crack detection circuit, in the disclosed embodiment, the width of the second conductive layer 033 can be smaller than the width of the first conductive layer 031, and the orthographic projection of the second conductive layer 033 on the substrate 01 can be located within the orthographic projection of the first conductive layer 031 on the substrate 01. This prevents short circuits between the first conductive layer 031 and the second conductive layer 033.

[0068] The width direction may be parallel to the display surface of the display panel, ie, the direction of the supporting surface of the substrate 01. Of course, in some other embodiments, the width of the second conductive layer 033 may be equal to or greater than the width of the first conductive layer 031.

[0069] Optional, Figure 4 2 is a schematic structural diagram of another display panel provided in an embodiment of the present disclosure. Figure 5 yes Figure 4 A cross-sectional view of a portion of the structure shown. Figure 4 and Figure 5 It can be seen that the display panel described in the embodiment of the present disclosure may further include:

[0070] At least one first connection lead 10 , at least one second connection lead 20 , at least one first emitting test (ET) pin 10 - 1 and at least one second emitting test pin 20 - 1 are located on one side of the substrate 01 and in the edge region 01 - 2 .

[0071] The first conductive layer 031 can be coupled to the first lighting test pin 10-1 via the first connecting lead 10 and can be configured to receive a first power signal from the first lighting test pin 10-1. The second conductive layer 033 can be coupled to the second lighting test pin 20-1 via the second connecting lead 20 and can be configured to receive a second power signal from the second lighting test pin 20-1.

[0072] That is, in combination with the above-described embodiments, the first conductive layer 031 can be indirectly coupled to the first power terminal of the peripheral power circuit via the first lighting test pin 10-1, and receive the first power signal transmitted from the first power terminal to the first lighting test pin 10-1. Similarly, the second conductive layer 033 can be indirectly coupled to the second power terminal of the peripheral power circuit via the second lighting test pin 20-1, and receive the second power signal transmitted from the second power terminal to the second lighting test pin 20-1.

[0073] Example, reference Figure 4The orthographic projection of the crack detection circuit 03 described in the embodiment of the present disclosure on the substrate 01 can be a ring with an opening 03-0, surrounding the display area 01-1. The orthographic projection of the opening 03-0 on the substrate 01 overlaps with the binding area (not shown) of the edge area 01-2. The binding area can refer to the area where the binding signal line is located. Thus, arranging the opening 03-0 in this area can avoid affecting the binding effect.

[0074] Given the opening 03-0, the crack detection circuit 03 can be divided into a first portion 03-1 and a second portion 03-2 by the opening 03-0 (in the figure, the first portion 03-1 and the second portion 03-2 are located on the left and right sides of the opening 03-0). The display panel may include: two first connecting leads 10, two second connecting leads 20, two first lighting test pins 10-1, and two second lighting test pins 20-1.

[0075] Among them, combined Figure 5 In the first portion 03-1, the first conductive layer 031 can be coupled to one of the two first lighting test pins 10-1 via one of the two first connecting leads 10, and the second conductive layer 033 can be coupled to one of the two second lighting test pins 20-1 via one of the two second connecting leads 20. In the second portion 03-2, the first conductive layer 031 can be coupled to the other of the two first lighting test pins 10-1 via the other of the two first connecting leads 10, and the second conductive layer 033 can be coupled to the other of the two second lighting test pins 20-1 via the other of the two second connecting leads 20.

[0076] That is, the first conductive layer 031 can be driven on both sides by the two first lighting test pins 10-1, and the second conductive layer 033 can be driven on both sides by the two second lighting test pins 20-1. In this way, crack conditions (including the presence and location of cracks) on both sides of the opening 03-0 can be reliably detected.

[0077] Of course, in some other embodiments, based on the crack detection circuit 03 being in a ring shape with an opening 03-0, it is also possible to set only one first lighting test pin 10-1 and one second lighting test pin 20-1 on one side of the opening 03-0, and accordingly, only one first connecting lead 10 and one second connecting lead 20 can be set. Alternatively, multiple first lighting test pins 10-1 and second lighting test pins 20-1 can be set on either side of the opening 03-0, and accordingly, multiple first connecting leads 10 and multiple second connecting leads 20 need to be set. In addition, the crack detection circuit 03 can also be in other shapes, such as a ring shape surrounding the display area 01-1 and without an opening 03-0, which can be referred to. Figure 1 The shape of the middle barrier dam 02. On the basis of the ring shape without the opening 03-0, one or more first lighting test pins 10-1, second lighting test pins 20-1, first connecting leads 10 and second connecting leads 20 may also be provided.

[0078] Optionally, the display panel described in the embodiment of the present disclosure may further include: pixels located on one side of the substrate 01 and located in the display area 01 - 1 .

[0079] The pixel may include a source and drain metal layer 11 , an anode layer 12 , a second light emitting layer 13 and a cathode layer 14 , which are sequentially stacked in a direction away from the substrate 01 .

[0080] Optionally, the pixel may actually include a light-emitting element and a pixel circuit as described in the above embodiment. The anode layer 12, the second light-emitting layer 13 and the cathode layer 14 belong to the film layers included in the light-emitting element, and the light-emitting element including the above film layers can be called an OLED. The source and drain metal layer 11 belongs to the film layers included in the pixel circuit. The pixel circuit may also include other film layers such as an active layer, a gate metal layer and a gate insulating layer. The pixel circuit can be used to transmit a drive signal (such as a drive current) to the anode layer 12, and the second light-emitting layer 13 can emit light under the action of the voltage difference between the drive signal and the power signal applied to the cathode layer 14.

[0081] Based on the above embodiment, continue to refer to Figure 5 It can be seen that the first conductive layer 031 included in the crack detection circuit 03 can be located on the same layer as the anode layer 12 included in the light-emitting element. The first light-emitting layer 032 included in the crack detection circuit 03 can be located on the same layer as the second light-emitting layer 13 included in the light-emitting element. The second conductive layer 033 included in the crack detection circuit 03 can be located on the same layer as the cathode layer 14 included in the light-emitting element. Furthermore, the first connecting lead 10 and the second connecting lead 20 coupled to the crack detection circuit 03 can be located on the same layer as the source-drain metal layer 11. Accordingly, the first conductive layer 031 can also be called the anode, and the second conductive layer 033 can also be called the cathode.

[0082] It should be noted that being located in the same layer may refer to a layer structure formed by using the same film-forming process to form a film layer for forming a specific pattern, and then using the same mask to pattern the film layer through a single patterning process. Depending on the specific pattern, a single patterning process may include multiple exposure, development, or etching processes, and the specific pattern in the formed layer structure may be continuous or discontinuous. That is, multiple elements, components, structures, and / or parts located in the "same layer" are made of the same material and are formed through the same patterning process. In this way, the manufacturing process and manufacturing costs can be saved, and the manufacturing efficiency can be accelerated.

[0083] It should be noted that the multiple light-emitting elements located in the display area 01-1 can have different colors, for example, generally including red, green, and blue light-emitting elements. Accordingly, the material of the second light-emitting layer 13 can include materials for forming red light-emitting elements, materials for forming green light-emitting elements, and materials for forming blue light-emitting elements. Since the crack detection circuit 03 is illuminated to detect cracks rather than to achieve display, the material of the first light-emitting layer 032 in the crack detection circuit 03 can be a material for forming a red light-emitting element, a material for forming a green light-emitting element, or a material for forming a blue light-emitting element. Of course, the color is not limited to red, green, and blue. For example, white can also be used.

[0084] Figure 6 This is a structural diagram of another display panel provided by an embodiment of the present disclosure. Figure 7 yes Figure 6 The cross-sectional view of the display panel is shown, and Figure 7 An enlarged view of a portion of the area is also shown (indicated by the double-headed arrow). Figure 6 and Figure 7 It can be seen that the barrier dam 02 described in the embodiment of the present disclosure may include: at least two barrier portions 021 spaced apart and arranged in a direction away from the display area 01-1. Figure 6 Only two blocking portions 021 are schematically shown. By providing multiple blocking portions 021, the cracks can be further blocked to prevent water vapor from invading the display area 01-1.

[0085] Among them, Figure 6 and Figure 7 As shown, the crack detection circuit 03 can be located on a side of the at least two blocking portions 021 away from the display area 01-1. Alternatively, the crack detection circuit 03 can be located on a side of the at least two blocking portions 021 close to the display area 01-1. Alternatively, the crack detection circuit 03 can be located between any two adjacent blocking portions 021 among the at least two blocking portions 021.

[0086] That is, assuming that the barrier portion 021 close to the display area 01-1 is called dam1 and the barrier portion 021 away from the display area 01-1 is called dam2, the crack detection circuit 03 can be located inside the dam1 close to the display area 01-1, or between dam1 and dam2, or Figure 6 and Figure 7 The dam 2 is shown as being away from the outside of the display area 01 - 1 . The embodiment of the present disclosure does not limit the position of the crack detection circuit 03 . In addition, the embodiment of the present disclosure does not limit the overall width of the crack detection circuit 03 .

[0087] Of course, in some other embodiments, the display panel may further include a plurality of crack detection circuits 03 as described in the above embodiment, together with the barrier dam 02, and the plurality of crack detection circuits 03 may be arranged at intervals in a direction away from the display area 01-1. Figure 6 and Figure 7 , the display panel may include three Figure 4 The crack detection circuit 03 is shown, and the three crack detection circuits 03 can be respectively located on the inner side of dam1, between dam1 and dam2, and outside of dam2.

[0088] Continue to refer Figure 7 The display panel may further include: an insulating layer 05 located on one side of the substrate 01 .

[0089] And, as an optional implementation, such as Figure 7 As shown, the barrier dam 02 and crack detection circuit 03 can both be located on the side of the insulating layer 05 away from the substrate 01, and spaced apart in a direction parallel to the display surface of the display panel. That is, the lower surface of the barrier dam 02 near the substrate 01 is flush with the lower surface of the crack detection circuit 03 near the substrate 01. This simplifies the manufacturing process and allows the crack detection circuit 03 to be reused as a single dam, further enhancing the barrier against external moisture.

[0090] Alternatively, as another alternative implementation, refer to Figure 8 The display panel may further include: an insulating layer 05 located on one side of the substrate 01 and having a via 05-1. The depth of the via 05-1 may be greater than or equal to the thickness of the crack detection circuit 03. Furthermore, the barrier dam 02 may be located on the side of the insulating layer 05 away from the substrate 01, and the crack detection circuit 03 may be located within the via 05-1. That is, the crack detection circuit 03 is closer to the substrate 01 than the barrier dam 02. The depth direction and the thickness direction may be perpendicular to the substrate 01.

[0091] Optionally, the material of the insulating layer 05 may include an inorganic material, that is, the insulating layer 05 may be an inorganic layer.

[0092] Example, reference Figure 7 and Figure 8 The insulating layer 05 may include: a first gate insulating layer (GI) 051 , a second gate insulating layer 052 , and an inter-layer dielectric layer (ILD) 053 , which are sequentially stacked in a direction away from the substrate 01 .

[0093] Optional, continue to refer to Figure 7 and Figure 8 It can be seen that the display panel described in the embodiment of the present disclosure may further include: a planarizing layer (PLN) 06 located between the insulating layer 05 and the encapsulation layer 04, for planarizing the film layer close to the substrate 01 side to facilitate coverage by the encapsulation layer 04.

[0094] In summary, an embodiment of the present disclosure provides a display panel. The display panel includes a substrate, a barrier dam and a crack detection circuit located in the edge area of ​​the substrate, and an encapsulation layer located in the display area and the edge area of ​​the substrate. The crack detection circuit includes a first conductive layer, a first light-emitting layer, and a second conductive layer stacked in sequence, and the first light-emitting layer can emit light based on a first power signal received by the first conductive layer and a second power signal received by the second conductive layer, that is, the crack detection circuit can be illuminated. In this way, whether a crack appears at the edge of the display substrate can be reliably determined based on whether the crack detection circuit can be illuminated normally, and the location of the crack can be determined based on the location where the crack detection circuit cannot be illuminated, thereby achieving reliable and rapid detection of the crack and the location of the crack.

[0095] Figure 9 This is a flow chart of a method for manufacturing a display panel provided by an embodiment of the present disclosure, which can be used to manufacture the display panel shown in the above figures. Figure 9 As shown, the method includes:

[0096] Step 901: Provide a substrate.

[0097] refer to Figure 1 The provided substrate 01 may include a display area 01-1 and an edge area 01-2 at least partially surrounding the display area 01-1. Optionally, the substrate 01 may be a glass substrate or a flexible substrate, and the material of the flexible substrate may include polyimide (PI). That is, the flexible substrate may be a PI substrate.

[0098] Step 902: forming a barrier dam on one side of the substrate.

[0099] Alternatively, a barrier dam may be formed by a single patterning process using a mask. A single patterning process may include multiple exposure, development, and etching processes. Figure 1 The formed barrier dam 02 may be located in the edge area 01 - 2 .

[0100] Step 903: forming a crack detection circuit on one side of the substrate.

[0101] Alternatively, a crack detection circuit can be formed by using a mask plate and a one-time patterning process. Figure 1 The crack detection circuit 03 formed may be located in the edge region 01 - 2 , and the orthographic projection of the crack detection circuit 03 formed on the substrate 01 does not overlap with the orthographic projection of the barrier dam 02 on the substrate 01 .

[0102] And, reference Figure 2 The crack detection circuit 03 may include: a first conductive layer 031, a first light-emitting layer 032, and a second conductive layer 033, which are sequentially stacked in a direction away from the substrate 01. The first conductive layer 031 may be configured to receive a first power signal, the second conductive layer 033 may be configured to receive a second power signal, and the first light-emitting layer 032 may be configured to emit light in response to the first and second power signals.

[0103] Step 904 : forming a packaging layer on a side of the barrier dam and the crack detection circuit away from the substrate.

[0104] Optionally, as described in the above embodiment, the encapsulation layer can be formed by CVD and / or IJP process. Figure 1 The formed encapsulation layer 04 may be located in the display area 01 - 1 and the edge area 01 - 2 .

[0105] Optional, continue to refer to Figure 2 The width of the formed second conductive layer 033 can be smaller than the width of the first conductive layer 031 , and the orthographic projection of the second conductive layer 033 on the substrate 01 can be located within the orthographic projection of the first conductive layer 031 on the substrate 01 .

[0106] Optional, combined Figure 4 and Figure 5 At least one first connecting lead 10, at least one second connecting lead 20, at least one first lighting test pin 10-1, and at least one second lighting test pin 20-1 may also be formed in the edge region. The first conductive layer 031 is coupled to the first lighting test pin 10-1 via the first connecting lead 10, and the second conductive layer 033 is coupled to the second lighting test pin 20-1 via the second connecting lead 20. Accordingly, the first conductive layer 031 can be configured to receive a first power signal from the first lighting test pin 10-1. The second conductive layer 033 can be configured to receive a second power signal from the second lighting test pin 20-1.

[0107] For example, reference Figure 4 The orthographic projection of the crack detection circuit 03 formed on the substrate 01 can be a ring with an opening 03-0, surrounding the display area 01-1. The orthographic projection of the opening 03-0 on the substrate 01 can also overlap with the bonding area of ​​the edge area 01-2. Accordingly, the crack detection circuit 03 can be divided into a first portion 03-1 and a second portion 03-2 by the opening.

[0108] On this basis, two first connecting leads 10 , two second connecting leads 20 , two first lighting test pins 10 - 1 and two second lighting test pins 20 - 1 may be formed on the display panel.

[0109] Furthermore, in the first portion 03-1, the first conductive layer 031 is coupled to one of the two first lighting test pins 10-1 via one of the two first connecting leads 10, and the second conductive layer 033 is coupled to one of the two second lighting test pins 20-1 via one of the two second connecting leads 20. In the second portion 03-2, the first conductive layer 031 is coupled to the other of the two first lighting test pins 10-1 via the other of the two first connecting leads 10, and the second conductive layer 033 is coupled to the other of the two second lighting test pins 20-1 via the other of the two second connecting leads 20.

[0110] Optionally, the display panel may further include: pixels located on one side of the substrate 01 and in the display area 01-1. The pixels may include a source / drain metal layer 11, an anode layer 12, a second light emitting layer 13, and a cathode layer 14 stacked in sequence away from the substrate 01.

[0111] In addition, the first conductive layer 031 can be located in the same layer as the anode layer 12, the first light-emitting layer 032 can be located in the same layer as the second light-emitting layer 13, the second conductive layer 033 can be located in the same layer as the cathode layer 14, and the first connecting lead 10 and the second connecting lead 20 can both be located in the same layer as the source-drain metal layer 11.

[0112] On this basis, it can be seen that when the process of forming the anode layer 12 is carried out in the display area 01-1, the anode layer material can be deposited simultaneously in the edge area 01-2 to form the first conductive layer 031. Then, when the second light-emitting layer 13 is further evaporated, the light-emitting material can be evaporated simultaneously in the edge area 01-2 to form the first light-emitting layer 032. Finally, when the cathode layer 14 is further formed, the cathode material can also be evaporated in the edge area 01-2 to form the second conductive layer 033, thereby obtaining the crack detection circuit 03. In order to form the above-mentioned film layers at the same time, a hole can be opened above the position of the mask plate corresponding to the edge area 01-2 where the crack detection circuit 03 is required to be formed. After forming the barrier dam 02 and the crack detection circuit 03, the packaging process can be further carried out to form the packaging layer 04 to protect the barrier dam 02 and the crack detection circuit 03.

[0113] Similarly, when the source / drain metal layer 11 deposition process is performed in the display area 01 - 1 , the source / drain metal layer 11 can be deposited in the edge area 01 - 2 at the same time to form connecting leads coupled to the lighting test pins.

[0114] Optional, continue to refer to Figures 6 to 8 As can be seen, the formed barrier dam 02 may include: at least two barrier portions 021 spaced apart and arranged in a direction away from the display area 01-1. Based on this, a crack detection circuit 03 may be formed on the side of the at least two barrier portions 021 away from or close to the display area 01-1, or between any two adjacent barrier portions 021.

[0115] Optional, continue to refer to Figure 7 and Figure 8 It can be seen that an insulating layer 05 may be further formed on one side of the substrate 01 .

[0116] Furthermore, a barrier dam 02 and a crack detection circuit 03 may be formed on a side of the insulating layer 05 away from the substrate 01 , that is, the formed barrier dam 02 and crack detection circuit 03 may be arranged at intervals in a direction parallel to the display surface of the display panel.

[0117] Alternatively, the insulating layer 05 may be first bored to form a via hole 05-1, and the depth of the formed via hole 05-1 may be greater than or equal to the thickness of the formed crack detection circuit 03. On this basis, a barrier dam 02 may be formed on the side of the insulating layer 05 away from the substrate 01, and the crack detection circuit 03 may be formed in the via hole 05-1.

[0118] Optionally, dry etching may be used to dig a hole in the insulating layer 05 to form the via hole 05 - 1 . Of course, in some other embodiments, wet etching may also be used to dig a hole in the insulating layer 05 .

[0119] Optional, continue to refer to Figure 7 and Figure 8 As can be seen, a planar layer PLN can also be formed between the insulating layer 05 and the encapsulation layer 04. Furthermore, the encapsulation layer 04 can include three layers, 041, 042, and 043, stacked sequentially in a direction away from the substrate 01. The insulating layer 05 can include three layers, 051, 052, and 053, stacked sequentially in a direction away from the substrate 01.

[0120] In summary, the embodiments of the present disclosure provide a method for manufacturing a display panel. In this method, a barrier dam and a crack detection circuit can be formed in the edge area of ​​the substrate, and the formed crack detection circuit can include a first conductive layer, a first light-emitting layer, and a second conductive layer stacked in sequence. The first light-emitting layer can emit light based on a first power signal received by the first conductive layer and a second power signal received by the second conductive layer, that is, the crack detection circuit can be illuminated. In this way, whether a crack appears at the edge of the display substrate can be reliably determined based on whether the crack detection circuit can be illuminated normally, and the location of the crack can be determined based on the location where the crack detection circuit cannot be illuminated, thereby achieving reliable and rapid detection of the crack and the location of the crack.

[0121] Figure 10 Schematic diagram of a display device provided by an embodiment of the present disclosure. Figure 10 As shown, the display device includes: a power supply circuit 100, and a display panel 00 as shown in the above figures.

[0122] Among them, combined Figure 2 The power supply circuit 100 can be coupled to the first conductive layer 031 and the second conductive layer 033 included in the crack detection circuit 03 in the display panel 00. The power supply circuit 100 can be used to provide a first power signal to the first conductive layer 031 and a second power signal to the second conductive layer 033, so that the first light-emitting layer 032 included in the crack detection circuit 03 emits light. In other words, the power supply circuit 100 can illuminate the crack detection circuit 03, thereby achieving reliable detection of cracks and crack locations based on the lighting conditions. It should be noted that Figure 10 The power supply circuit 100 is only schematically shown coupled to the display panel 00 .

[0123] Optionally, the display device described in the embodiments of the present disclosure may be any product or component with a display function, such as an OLED display device, a mobile phone, a tablet computer, a flexible display device, a television, and a monitor.

[0124] It should be noted that in the accompanying drawings, the sizes of layers and regions may be exaggerated for clarity of illustration. It will also be understood that when an element or layer is referred to as being "on" another element or layer, it may be directly on the other element, or there may be an intermediate layer. In addition, it will be understood that when an element or layer is referred to as being "under" another element or layer, it may be directly under the other element, or there may be more than one intermediate layer or element. In addition, it will also be understood that when a layer or element is referred to as being "between" two layers or elements, it may be the only layer between the two layers or elements, or there may also be more than one intermediate layer or element. Similar reference numerals throughout the text indicate similar elements.

[0125] Furthermore, the terms used in the embodiments of the present disclosure are only used to explain the embodiments of the present disclosure and are not intended to limit the present disclosure. Unless otherwise defined, the technical or scientific terms used in the embodiments of the present disclosure should have the common meanings understood by people with ordinary skills in the field to which the present disclosure belongs.

[0126] For example, in the embodiments of the present disclosure, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance. The term "plurality" refers to two or more than two, unless otherwise clearly defined.

[0127] Likewise, the words “a” or “an” and the like do not denote a limitation of quantity, but rather denote the presence of at least one.

[0128] Words such as “include” or “comprising” mean that the elements or objects preceding “include” or “comprising” include the elements or objects listed after “include” or “comprising” and their equivalents, and do not exclude other elements or objects.

[0129] "Up," "down," "left," or "right" are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly. "Connected" or "coupled" means coupled.

[0130] "And / or" indicates that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. The character " / " generally indicates that the related objects are in an "or" relationship.

[0131] The above description is merely an optional embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the scope of protection of the present disclosure.

Claims

1. A display panel, characterized in that: The display panel includes: a substrate having a display area and an edge area at least partially surrounding the display area; a barrier dam, the barrier dam being located on one side of the substrate and in the edge region; a crack detection circuit, the crack detection circuit being located on one side of the substrate and in the edge region; an orthographic projection of the crack detection circuit on the substrate not overlapping with an orthographic projection of the blocking dam on the substrate, and the crack detection circuit comprising: a first conductive layer, a first light-emitting layer, and a second conductive layer stacked sequentially in a direction away from the substrate, the first conductive layer being configured to receive a first power signal, the second conductive layer being configured to receive a second power signal, and the first light-emitting layer being configured to emit light in response to the first power signal and the second power signal; an encapsulation layer, the encapsulation layer being located on a side of the blocking dam and the crack detection circuit away from the substrate, and being located in the display area and the edge area; And, an insulating layer located on one side of the substrate and having a via hole, the depth of the via hole is greater than or equal to the thickness of the crack detection circuit; wherein the blocking dam is located on a side of the insulating layer away from the substrate, and the crack detection circuit is located in the via hole.

2. The display panel according to claim 1, wherein: The width of the second conductive layer is smaller than that of the first conductive layer, and an orthographic projection of the second conductive layer on the substrate is located within an orthographic projection of the first conductive layer on the substrate.

3. The display panel according to claim 1, wherein: The display panel further includes: At least one first connecting lead, at least one second connecting lead, at least one first lighting test pin, and at least one second lighting test pin located on one side of the substrate and in the edge region; The first conductive layer is coupled to the first lighting test pin through the first connecting lead and is configured to receive a first power signal from the first lighting test pin; The second conductive layer is coupled to the second lighting test pin through the second connecting lead and is configured to receive a second power signal from the second lighting test pin.

4. The display panel according to claim 3, wherein: The orthographic projection of the crack detection circuit on the substrate is a ring having an opening and surrounds the display area; the crack detection circuit is divided into a first portion and a second portion by the opening; the display panel includes: two first connecting leads, two second connecting leads, two first lighting test pins, and two second lighting test pins; In the first part, the first conductive layer is coupled to one of the two first lighting test pins through one of the two first connecting leads, and the second conductive layer is coupled to one of the two second lighting test pins through one of the two second connecting leads; In the second part, the first conductive layer is coupled to the other first lighting test pin of the two first lighting test pins through the other first connecting lead of the two first connecting leads, and the second conductive layer is coupled to the other second lighting test pin of the two second lighting test pins through the other second connecting lead of the two second connecting leads.

5. The display panel according to claim 4, wherein: The display panel further includes: a pixel located on one side of the substrate and in the display area, the pixel comprising a source / drain metal layer, an anode layer, a second light-emitting layer, and a cathode layer stacked in sequence in a direction away from the substrate; The first conductive layer and the anode layer are located in the same layer, the first light-emitting layer and the second light-emitting layer are located in the same layer, the second conductive layer and the cathode layer are located in the same layer, and the first connecting lead and the second connecting lead are both located in the same layer as the source / drain metal layer.

6. The display panel according to any one of claims 1 to 5, characterized in that: The barrier dam comprises: at least two barrier portions spaced apart in a direction away from the display area; Wherein, the crack detection circuit is located on a side of the at least two blocking parts away from the display area, or, the crack detection circuit is located on a side of the at least two blocking parts close to the display area, or, the crack detection circuit is located between any two adjacent blocking parts of the at least two blocking parts.

7. A method for manufacturing a display panel, characterized in that: For manufacturing the display panel according to any one of claims 1 to 6, the method comprises: providing a substrate having a display area and an edge area at least partially surrounding the display area; forming a barrier dam on one side of the substrate, wherein the barrier dam is located in the edge region; A crack detection circuit is formed on one side of the substrate, and the crack detection circuit is located in the edge region. The orthographic projection of the crack detection circuit on the substrate does not overlap with the orthographic projection of the blocking dam on the substrate. The crack detection circuit includes: a first conductive layer, a first light-emitting layer, and a second conductive layer stacked in sequence in a direction away from the substrate, the first conductive layer being configured to receive a first power signal, the second conductive layer being configured to receive a second power signal, and the first light-emitting layer being configured to emit light in response to the first power signal and the second power signal. Furthermore, an encapsulation layer is formed on a side of the blocking dam and the crack detection circuit away from the substrate, and the encapsulation layer is located in the display area and the edge area.

8. A display device, characterized in that: The display device comprises: a power supply circuit, and a display panel according to any one of claims 1 to 6; The power circuit is coupled to a first conductive layer and a second conductive layer included in the crack detection circuit in the display panel, respectively. The power circuit is used to provide a first power signal to the first conductive layer and a second power signal to the second conductive layer.

Images