Display panel and manufacturing method thereof, and display device

Abstract

Provided are a display panel and a manufacturing method thereof, and a display device, belonging to the field of display technology. Among them, in the display panel, a test element group located on one side of the substrate includes an insulating layer and a metal layer stacked in sequence, two vias that penetrate the insulating layer and the metal layer and are connected in sequence, and a flat layer located in the via. Because the metal layer has at least one slot exposing the flat layer in addition to the via, during the display panel manufacturing process, water vapor that invades the flat layer through the external environment can not only overflow through the opening of the hole, but can also effectively overflow through the at least one slot. In this way, the problem of separation between the film layers included in the test element group due to the inability of water vapor to overflow is avoided.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof, and a display device. Background Art

[0002] In the manufacturing process of a display panel, a test element group (Teg) is usually disposed in a non-display area to test whether there are defective pixels in the display area.

[0003] In the related art, Teg generally includes an insulating layer, a metal layer, a via that penetrates the metal layer and the insulating layer, and a flat layer located in the via. Based on the location of the flat layer, it can be seen that part of the flat layer will be directly in contact with the external environment at the opening of the via, and water vapor in the environment will invade the flat layer. In this way, if the water vapor cannot overflow effectively, it will cause separation between the film layers. Summary of the invention

[0004] Provided are a display panel and a manufacturing method thereof, and a display device, which can solve the problem of separation between film layers in a test element group caused by water vapor in the related art. The technical solution is as follows:

[0005] In one aspect, a display panel is provided, the display panel comprising:

[0006] substrate;

[0007] and, a test element group located on one side of the substrate;

[0008] The test element group includes: an insulating layer and a metal layer stacked in sequence in a direction away from the substrate, a first via hole penetrating the metal layer, a second via hole penetrating the insulating layer and connected to the first via hole, and a flat layer located in the first via hole and the second via hole, the top opening of the first via hole on a side away from the substrate being an orthographic projection on the substrate, and the top opening of the second via hole on a side away from the substrate being within the orthographic projection on the substrate;

[0009] Furthermore, the metal layer has at least one groove, and an orthographic projection of the at least one groove on the substrate overlaps with an orthographic projection of the planar layer on the substrate, and exposes the planar layer.

[0010] Optionally, the metal layer has a plurality of grooves, and the plurality of grooves are arranged at intervals in a direction parallel to a display surface of the display panel.

[0011] Optionally, among the multiple slots, each slot has the same shape and size, and the spacing between any two adjacent slots is the target spacing.

[0012] Optionally, among the multiple grooves, some of the grooves are located in a first portion of the metal layer on one side of the first via hole, and the remaining grooves except the some of the grooves are located in a second portion of the metal layer on the other side of the first via hole.

[0013] Optionally, the number of slots in the first part is the same as the number of slots in the second part.

[0014] Optionally, the orthographic projection of the groove on the substrate is a regular shape;

[0015] Wherein, the regular shape includes: rectangle, circle, ellipse or trapezoid.

[0016] Optionally, the metal layer includes: a first metal layer and a second metal layer stacked in sequence in a direction away from the substrate, the second metal layer has the at least one groove, the flat layer is located in a portion where the first via hole penetrates the first metal layer, and the display panel further includes: a pixel defining layer located in a portion where the first via hole penetrates the second metal layer and located on a side of the second metal layer away from the substrate;

[0017] The insulating layer comprises: a first insulating layer, a second insulating layer and a third insulating layer sequentially stacked in a direction away from the substrate;

[0018] The orthographic projection of the portion of the second via hole that passes through the first insulating layer on the substrate is located within the orthographic projection of the portion of the second via hole that passes through the second insulating layer on the substrate, and is located within the orthographic projection of the portion of the first via hole that passes through the second metal layer on the substrate;

[0019] The orthographic projection of a portion of the second via hole that passes through the second insulating layer on the substrate overlaps with the orthographic projection of a portion that passes through the third insulating layer on the substrate, and is located within the orthographic projection of a portion of the first via hole that passes through the first metal layer on the substrate;

[0020] Furthermore, the orthographic projection of the portion of the first via hole that passes through the second metal layer on the substrate is located within the orthographic projection of the portion of the first via hole that passes through the first metal layer on the substrate.

[0021] Optionally, the substrate has a display area and a test area at least partially surrounding the display area, and the test element group is located in the test area;

[0022] The display panel further comprises: a pixel located on one side of the substrate and located in the display area, the pixel comprising an inorganic material layer, a gate insulating layer, an interlayer dielectric layer, a first source-drain metal layer and a second source-drain metal layer sequentially stacked in a direction away from the substrate;

[0023] Among them, the first insulating layer and the inorganic material layer are located in the same layer, the second insulating layer and the gate insulating layer are located in the same layer, the third insulating layer and the interlayer dielectric layer are located in the same layer, the first metal layer and the first source and drain metal layer are located in the same layer, and the second metal layer and the second source and drain metal layer are located in the same layer.

[0024] On the other hand, a method for manufacturing a display panel is provided, for manufacturing the display panel as described in the above aspect, the method comprising:

[0025] providing a substrate;

[0026] forming a test element group on one side of the substrate;

[0027] The test element group includes: an insulating layer and a metal layer stacked in sequence in a direction away from the substrate, a first via hole penetrating the metal layer, a second via hole penetrating the insulating layer and connected to the first via hole, and a flat layer located in the first via hole and the second via hole, the top opening of the first via hole on a side away from the substrate being an orthographic projection on the substrate, and the top opening of the second via hole on a side away from the substrate being within the orthographic projection on the substrate;

[0028] Furthermore, the metal layer has at least one groove, and an orthographic projection of the at least one groove on the substrate overlaps with an orthographic projection of the planar layer on the substrate, and exposes the planar layer.

[0029] In yet another aspect, a display device is provided, the display device comprising: a power supply component, and the display panel as described in the above aspect;

[0030] Wherein, the power supply component is coupled to the display panel and is used to supply power to the display panel.

[0031] In summary, the beneficial effects brought about by the technical solution provided by the embodiments of the present disclosure may at least include:

[0032] A display panel and a manufacturing method thereof, and a display device are provided. In the display panel, a test element group located on one side of the substrate includes an insulating layer and a metal layer stacked in sequence, two vias that penetrate the insulating layer and the metal layer and are connected in sequence, and a flat layer located in the via. Since the metal layer has at least one slot exposing the flat layer in addition to the via, during the display panel manufacturing process, water vapor that invades the flat layer through the external environment can not only overflow through the opening of the hole, but also effectively overflow through the at least one slot. Thus, the problem of separation between the film layers included in the test element group due to the inability of water vapor to overflow is avoided. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0034] Figure 1 is a cross-sectional view of a film layer of a display panel provided by an embodiment of the present disclosure;

[0035] Figure 2 is a top view of a film layer of a display panel provided by an embodiment of the present disclosure;

[0036] Figure 3 is a cross-sectional view of a film layer of another display panel provided by an embodiment of the present disclosure;

[0037] Figure 4 is a schematic diagram of a substrate of a display panel provided by an embodiment of the present disclosure;

[0038] Figure 5 is a cross-sectional view of a film layer of a display panel and a schematic diagram of the direction of water vapor provided by an embodiment of the present disclosure;

[0039] Figure 6 is a top view of a film layer of another display panel provided by an embodiment of the present disclosure;

[0040] Figure 7 is a flow chart of a method for manufacturing a display panel provided by an embodiment of the present disclosure;

[0041] Figure 8 It is a structural schematic diagram of a display device provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0042] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0043] Figure 1 is a schematic diagram of the structure of a display panel provided by an embodiment of the present disclosure. Figure 1 As shown, the display panel includes: a substrate 01 and a test element group 02 located at one side of the substrate 01, namely, Teg 02.

[0044] In the embodiment of the present disclosure, the test element group 02 includes: an insulating layer 021 and a metal layer 022 stacked in sequence in a direction away from the substrate 01, a first via hole 022-1 penetrating the metal layer 022, a second via hole 021-1 penetrating the insulating layer 021 and communicating with the first via hole 022-1, and a planarization (PLN) layer 023 located within the first via hole 022-1 and the second via hole 021-1. The orthographic projection of the top opening of the first via hole 022-1 on the side away from the substrate 01 on the substrate 01 is located within the orthographic projection of the top opening of the second via hole 021-1 on the side away from the substrate 01 on the substrate 01.

[0045] Thus, combined with Figure 1 It can be seen that, on the side of the flat layer 023 away from the substrate 01, the portion located at the top opening of the first via 022-1 will be exposed to the external environment at the opening and will be in direct contact with the external environment; except for the portion located at the top opening of the first via 022-1, the remaining portion will be in contact with the metal layer 022 and will be covered by the metal layer 022.

[0046] After the back panel (BP) process of the display panel is completed, the back panel is generally subjected to an evaporation encapsulation (EVEN) process, and the EVEN process at least includes a water washing process and a baking process performed in sequence. Among them, a large amount of water vapor H2O present in the water washing process will fully invade the flat layer 023. During the baking process, the water vapor invading the flat layer 023 will inevitably overflow in large quantities after being heated. However, since the part of the flat layer 023 away from the side of the substrate 01 is covered by the metal layer 022, the water vapor in the flat layer 023 covered by the metal layer 022 cannot effectively overflow. In this way, it is easy to cause a large number of bubbles to appear in the area where the test element group 02 is set, and then cause the contact part (such as the corner) of the flat layer 023 and the metal layer 022 to bulge, and the flat layer 023 and the metal layer 022 at the bulge position will separate, and in severe cases, Teg Peeling (that is, the test element group 02 falls off from the substrate 01) will be directly caused. Furthermore, research has found that the incidence of the above problems is related to the time required between different process steps (referred to as "Q-time"). As Q-time increases, the incidence increases sharply. In addition, Q-time is affected by production scheduling and cannot be completely controlled.

[0047] Based on this, the embodiment of the present disclosure solves the above technical problems by flexibly designing the structure of the test element group 02. Specifically, Figure 1 Based on Figure 2It can be seen that in the display panel recorded in the embodiment of the present disclosure, the metal layer 022 has at least one groove 022-2, and the orthographic projection of the at least one groove 022-2 on the substrate 01 overlaps with the orthographic projection of the flat layer 023 on the substrate 01, and exposes the flat layer 023. In this way, during the baking process, the water vapor invading the flat layer 023 can effectively overflow through the top opening of the first via 022-1 and the at least one groove 022-2. That is, the at least one groove 022-2 provides an additional channel for the overflow of water vapor in the portion of the flat layer 023 covered by the metal layer 022. In this way, a large number of bubbles can be avoided in the area where the test element group 02 is set, and the contact portion of the flat layer 023 and the metal layer 022 can be prevented from bulging and further separation, thereby achieving the purpose of improving Teg Peeling.

[0048] It should be noted that Figure 2 The dotted-line frame portion on the right side is a top view of the metal layer 022 , and the metal layer 022 marked on the left side is an enlarged schematic diagram of the metal layer 022 shown in the dotted-line frame on the right side.

[0049] In summary, the embodiment of the present disclosure provides a display panel, in which the test element group located on one side of the substrate includes an insulating layer and a metal layer stacked in sequence, two vias that penetrate the insulating layer and the metal layer and are connected in sequence, and a flat layer located in the via. Since the metal layer has at least one slot exposing the flat layer in addition to the via, during the manufacturing process of the display panel, the water vapor that invades the flat layer through the external environment can not only overflow through the opening of the hole, but also effectively overflow through the at least one slot. In this way, the problem of separation between film layers due to the inability of water vapor to overflow is avoided.

[0050] Figure 3 is a schematic diagram of the structure of another display panel provided by an embodiment of the present disclosure. Figure 3 As shown, the metal layer 022 recorded in the embodiment of the present disclosure may include: a first metal layer 0221 and a second metal layer 0222 sequentially stacked in a direction away from the substrate 01 .

[0051] On this basis, it can be known that the second metal layer 0222 included in the metal layer 022 has at least one groove 022-2. In addition, the flat layer 023 can be located only in the portion where the first via hole 022-1 penetrates the first metal layer 0221. In addition, the display panel may further include: a pixel definition layer (PDL) 03 located in the portion where the first via hole 022-1 penetrates the second metal layer 0222 and located on the side of the second metal layer 0222 away from the substrate 01.

[0052] Of course, in some other embodiments, the planar layer 023 may be located in the portion of the first via hole 022-1 penetrating the first metal layer 0221 and the portion penetrating the second metal layer 0222. The pixel defining layer 03 may be located only on the side of the second metal layer 0222 away from the substrate 01.

[0053] Continue to refer Figure 3 It can also be seen that the insulating layer 021 recorded in the embodiment of the present disclosure may include: a first insulating layer 0211 , a second insulating layer 0212 , and a third insulating layer 0213 stacked in sequence in a direction away from the substrate 01 .

[0054] Among them, the orthographic projection of the part of the second via 021-1 that penetrates the first insulating layer 0211 on the substrate 01 can be located within the orthographic projection of the part of the second via 021-1 that penetrates the second insulating layer 0212 on the substrate 01, and can be located within the orthographic projection of the part of the first via 022-1 that penetrates the second metal layer 0222 on the substrate 01.

[0055] The orthographic projection of the portion of the second via 021-1 that passes through the second insulating layer 0212 on the substrate 01 may overlap with the orthographic projection of the portion that passes through the third insulating layer 0213 on the substrate 01, and may be located within the orthographic projection of the portion of the first via 022-1 that passes through the first metal layer 0221 on the substrate 01.

[0056] Furthermore, the orthographic projection of the portion of the first via hole 022 - 1 that passes through the second metal layer 0222 on the substrate 01 may be located within the orthographic projection of the portion of the first via hole 022 - 1 that passes through the first metal layer 0221 on the substrate 01 .

[0057] That is, among the first via hole 022-1 and the second via hole 021-1, the aperture of the portion penetrating the first insulating layer 0211 is the smallest, the aperture of the portion penetrating the first metal layer 0221 is the largest, the aperture of the portion penetrating the second metal layer 0222 is smaller than the aperture of the portion penetrating the second insulating layer 0212, and the aperture of the portion penetrating the second insulating layer 0212 is equal to the aperture of the portion penetrating the third insulating layer 0213. The aperture direction is parallel to the direction of the display surface of the display panel (i.e., the direction of the bearing surface of the substrate 01).

[0058] Of course, in some other embodiments, the positional relationship between the first via hole 022 - 1 and the second via hole 021 - 1 may also satisfy other implementations, provided that the second metal layer 0222 covers a portion of the flat layer 023 .

[0059] Figure 4 FIG. 1 is a schematic diagram of the structure of another display panel provided by an embodiment of the present disclosure. Figure 4As shown, in the display panel described in the embodiment of the present disclosure, the substrate 01 may have a display area 01 - 1 and a test area 01 - 2 at least partially surrounding the display area 01 - 1 .

[0060] For example, reference Figure 4 , the test area 01-2 shown is located at the lower side of the display area 01-1, adjacent to the display area 01-1, and partially surrounds the display area 01-1. Of course, in some other embodiments, the test area 01-2 may also be located on the left side, right side and / or upper side of the display area 01-1, or may also be located on all sides of the display area 01-1 to surround the display area 01-1. The embodiment of the present disclosure does not limit the position of the test area 01-2.

[0061] exist Figure 4 Based on this, it can be known that the test element group 02 recorded in the embodiment of the present disclosure can be located in the test area 01-2. And, the display panel can also include: a pixel 001 located on one side of the substrate 01 and located in the display area 01-1. And, the pixel 001 can include an inorganic material layer 11, a gate insulator (GI) layer 12, an inter-layer di-electric layer 13, a first source & drain (SD) metal layer 14 and a second source & drain metal layer 15 stacked in sequence in a direction away from the substrate 01.

[0062] Optionally, the inorganic material layer 11 may include multiple inorganic film layers stacked in sequence, such as three film layers stacked in sequence, and the materials of the three film layers may be silicon nitride, silicon oxide and A-silicon respectively. Accordingly, the inorganic material layer 11 may also be referred to as a stacked layer Multi.

[0063] Among them, combined with Figure 3 In the embodiment of the present disclosure, in the test element group 02 located in the test area 01-2, the first insulating layer 0211 can be located in the same layer as the inorganic material layer (i.e., the stack Multi) 11, the second insulating layer 0212 can be located in the same layer as the gate insulating layer 12, the third insulating layer 0213 can be located in the same layer as the interlayer dielectric layer 13, the first metal layer 0221 can be located in the same layer as the first source-drain metal layer 14, and the second metal layer 0222 can be located in the same layer as the second source-drain metal layer 15.

[0064] It should be noted that being located in the same layer may refer to a layer structure formed by using the same film-forming process to form a film layer for forming a specific pattern, and then using the same mask to pattern the film layer through a single composition process. Depending on the specific pattern, a single composition process may include multiple exposure, development or etching processes, and the specific pattern in the formed layer structure may be continuous or discontinuous. That is, multiple elements, components, structures and / or parts located in the "same layer" are made of the same material and are formed through the same composition process. In this way, the manufacturing process and manufacturing cost can be saved, and the manufacturing efficiency can be accelerated.

[0065] Optionally, as the flexible screen market gradually expands, in some flexible display panel embodiments, combined with Figure 4 , between the display area 01-1 and the test area 01-2, there may also be a bending area 01-3. The display panel can be bent in the bending area to enrich the application scenarios of the display panel. In addition, it should be noted that it is particularly important to perform stress measurement at the bending area before leaving the factory. Better stress measurement results can avoid cracks on the display panel screen, avoid subjective poor display problems on the screen, and improve the user experience.

[0066] It should be noted that, for a flexible display panel, the substrate 01 may be a flexible substrate, and the material of the flexible substrate may be polyimide (PI). Figure 3 As shown, the substrate 01 may include a first flexible substrate 011, a barrier layer 012, and a second substrate layer 013 stacked in sequence. Of course, in some other embodiments, only one flexible substrate may be included.

[0067] exist Figure 3 Based on the above embodiments and Figure 5 It can be seen that: First, during the water washing process, a large amount of water vapor H2O ( Figure 5 The pixel defining layer 03 will be invaded through the external environment, and further invade the flat layer 023 (see Figure 5 (as indicated by the arrow in Figure 5-1).

[0068] Afterwards, during the baking process, the water vapor that has penetrated the planar layer 023 will further overflow to the external environment. Currently, because the second metal layer 0222 covers part of the planar layer 023, part of the water vapor cannot overflow (see Figure 5 5-21 in the figure), resulting in a large number of bubbles in the test area 01-2, which in turn causes bulging at the corners of the flat layer 023 and the second metal layer 0222 (see Figure 5At the bulge position, the flat layer 023 is separated from the second metal layer 0222. In severe cases, Teg Peeling may also occur.

[0069] In the embodiment of the present disclosure, a groove 022-2 is formed on the second metal layer 0222 to expose the flat layer 023, providing a channel for the water vapor to overflow, thereby ensuring that the water vapor invading the flat layer 023 can overflow effectively (see Figure 5 5-22), thereby improving the Teg Peeling problem.

[0070] Optional, Figure 6 FIG. 1 is a schematic diagram of the structure of another test element group provided by an embodiment of the present disclosure. Figure 6 As shown, the metal layer 022 (i.e., the second source-drain metal layer 15) may have a plurality of grooves 022-2. In addition, in a direction parallel to the display surface of the display panel (i.e., the direction of the bearing surface of the substrate 01), the plurality of grooves 022-2 may be arranged at intervals. In this way, sufficient overflow channels may be further provided for water vapor, ensuring that the water vapor invading the flat layer 023 can effectively overflow during the manufacturing process of the display panel.

[0071] For example, Figure 6 The metal layer 022 shown has six slots 022-2 arranged in sequence. Figure 2 , Figure 6 The dotted-line frame portion on the right side is a top view of the metal layer 022 , and the metal layer 022 marked on the left side is an enlarged schematic diagram of the metal layer 022 shown in the dotted-line frame on the right side.

[0072] Optional, still reference Figure 6 , among the multiple slots 022-2 of the metal layer 022, the shapes of the slots 022-2 can be the same, the sizes can be equal, and the spacing between any two adjacent slots 022-2 can be the target spacing. That is, assuming that three adjacent slots 022-2 are taken as an example, the spacing between the slot 022-2 in the middle and the slot 022-2 adjacent to its left and the spacing between the other slot 022-2 adjacent to its right are equal. In this way, the effective overflow of the water vapor invading the flat layer 023 can be further ensured.

[0073] Optional, combined Figure 3 and Figure 6 Among the plurality of grooves 022-2, some grooves 022-2 may be located in a first portion of the metal layer 022 on one side of the first via hole 022-1, and the remaining grooves 022-2 except some grooves 022-2 may be located in a second portion of the metal layer 022 on the other side of the first via hole 022-1.

[0074] In combination with the above-mentioned embodiment, it can be known that the metal layer 022 here actually refers to the second metal layer 0222. Figure 3 and Figure 5 One or more slots 022-2 may be provided on each side (such as the left and right sides in the figure) of the second metal layer 0222 located on both sides of the first via hole 022-1. In this way, the water vapor invading the flat layer 023 can be effectively overflowed through each side, further improving the Teg Peeling problem.

[0075] For example, the number of slots 022-2 in the first part and the number of slots 022-2 in the second part can be the same, such as 6. In this way, water vapor can be uniformly overflowed from all sides. Of course, in some other embodiments, the number of slots 022-2 in the first part and the number of slots 022-2 in the second part can also be different. Alternatively, only the first part or the second part can have slots 022-2.

[0076] Optionally, in the embodiment of the present disclosure, the orthographic projection of each slot 022-2 on the substrate 01 may be a regular shape. In this way, effective overflow of water vapor can also be ensured. For example, the regular shape may include: Figure 5 and Figure 6 The rectangle shown may also include other shapes such as circle, ellipse or trapezoid.

[0077] In summary, the embodiment of the present disclosure provides a display panel, in which the test element group located on one side of the substrate includes an insulating layer and a metal layer stacked in sequence, two vias that penetrate the insulating layer and the metal layer and are connected in sequence, and a flat layer located in the via. Since the metal layer has at least one slot exposing the flat layer in addition to the via, during the manufacturing process of the display panel, the water vapor that invades the flat layer through the external environment can not only overflow through the opening of the hole, but also effectively overflow through the at least one slot. In this way, the problem of separation between film layers due to the inability of water vapor to overflow is avoided.

[0078] Figure 7 FIG. 1 is a flow chart of a method for manufacturing a display panel provided by an embodiment of the present disclosure, and is used to manufacture the display panel shown in the above-mentioned figure. Figure 7 As shown, the method includes:

[0079] Step 701: Provide a substrate.

[0080] Optionally, the substrate may be a glass substrate or a flexible substrate. As described in the above embodiment, the material of the flexible substrate may include polyimide PI.

[0081] Step 702: Form a test element group on one side of the substrate.

[0082] Among them, combined Figure 1 and Figure 2 The formed test element group 02 may include: an insulating layer 021, a metal layer 022, and a pixel defining layer 023 stacked in sequence in a direction away from the substrate 01, a first via hole 022-1 penetrating the metal layer 022, a second via hole 021-1 penetrating the insulating layer 021 and communicating with the first via hole 022-1, and a flat layer 023 located within the first via hole 022-1 and the second via hole 021-1. The orthographic projection of the top opening of the first via hole 022-1 on the side away from the substrate 01 on the substrate 01 is located within the orthographic projection of the top opening of the second via hole 021-1 on the side away from the substrate 01 on the substrate 01. In addition, the metal layer 022 has at least one slot 022-2, and the orthographic projection of the at least one slot 022-2 on the substrate 01 overlaps with the orthographic projection of the flat layer 023 on the substrate 01, and exposes the flat layer 023.

[0083] Optional, combined Figure 3 , Figure 5 and Figure 6 The metal layer 022 in the formed test element group 02 may have a plurality of slots 022-2, and the plurality of slots 022-2 may be arranged at intervals in a direction parallel to the display surface of the display panel. That is, a plurality of slots 022-2 may be provided on the metal layer 022 and arranged at intervals in a direction parallel to the display surface of the display panel.

[0084] Optional, combined Figure 6 Among the multiple slots 022 - 2 formed, the shapes and sizes of the slots 022 - 2 can be the same, and the spacing between any two adjacent slots 022 - 2 can be the target spacing.

[0085] Optional, combined Figure 3 Among the multiple grooves 022-2 formed, some of the grooves 022-2 can be located in the first part of the metal layer 022 on one side of the first via hole 022-1, and the remaining grooves 022-2 except the partial grooves 022-2 can be located in the second part of the metal layer 022 on the other side of the first via hole 022-1.

[0086] Optional, combined Figure 3 In the formed metal layer 022, the number of the slots 022-2 in the first portion and the number of the slots 022-2 in the second portion may be the same, for example, both are 6.

[0087] Optional, combined Figure 5 The orthographic projection of the formed slot 022-2 on the substrate 01 may be a regular shape. For example, the regular shape may include: Figure 5 Rectangle, circle, oval or trapezoid as shown.

[0088] Optional, combined Figure 3 and Figure 5 The formed metal layer 022 may include: a first metal layer 0221 and a second metal layer 0222 stacked in sequence in a direction away from the substrate 01. The second metal layer 0222 may have at least one groove 022-2. The flat layer 023 may be located in the portion where the first via hole 022-1 passes through the first metal layer 0221, and the display panel may further include: a pixel defining layer 03 located in the portion where the first via hole 022-1 passes through the second metal layer 0222 and located on the side of the second metal layer 0222 away from the substrate 01.

[0089] That is, a plurality of grooves 022-2 may be formed on the second metal layer 0222 included in the metal layer 022. The flat layer 023 may be formed only in the portion where the first via hole 022-1 passes through the first metal layer 0221. Furthermore, the pixel defining layer 03 may be formed in the portion where the first via hole 022-1 passes through the second metal layer 0222 and on the side of the second metal layer 0222 away from the substrate 01.

[0090] Optional, combined Figure 3 and Figure 5 The formed insulating layer 021 may include: a first insulating layer 0211, a second insulating layer 0212, and a third insulating layer 0213 sequentially stacked in a direction away from the substrate 01. That is, the first insulating layer 0211, the second insulating layer 0212, and the third insulating layer 0213 may be sequentially formed on one side of the substrate 01 to obtain the insulating layer 021.

[0091] On this basis, the orthographic projection of the portion of the second via 021-1 that passes through the first insulating layer 0211 on the substrate 01 is located within the orthographic projection of the portion of the second via 021-1 that passes through the second insulating layer 0212 on the substrate 01, and is located within the orthographic projection of the portion of the first via 022-1 that passes through the second metal layer 0222 on the substrate 01.

[0092] The orthographic projection of the portion of the second via 021-1 that passes through the second insulating layer 0212 on the substrate 01 overlaps with the orthographic projection of the portion that passes through the third insulating layer 0213 on the substrate 01, and is located within the orthographic projection of the portion of the first via 022-1 that passes through the first metal layer 0221 on the substrate 01.

[0093] Furthermore, the orthographic projection of the portion of the first via hole 022 - 1 that passes through the second metal layer 0222 on the substrate 01 is located within the orthographic projection of the portion of the first via hole 022 - 1 that passes through the first metal layer 0221 on the substrate 01 .

[0094] Optional, combined Figure 4The formed substrate 01 may have a display area 01-1 and a test area 01-2 at least partially surrounding the display area, and the test element group 02 may be located in the test area 01-2. That is, the test element group 02 shown in the figure may be formed in the test area 01-2.

[0095] And, continue to combine Figure 4 The display panel may further include: a pixel 001 located on one side of the substrate 01 and located in the display area. That is, the pixel 001 may also be formed in the display area 01-1. The pixel 001 may include an inorganic material layer 11 (i.e., a stacked layer Multi), a gate insulating layer 12, an interlayer dielectric layer 13, a first source-drain metal layer 14, and a second source-drain metal layer 15 stacked in sequence in a direction away from the substrate 01.

[0096] On this basis, combined with Figure 3 and Figure 5 It can be known that in the test element group 02 recorded in the embodiment of the present disclosure, the first insulating layer 0211 can be located in the same layer as the inorganic material layer 11, the second insulating layer 0212 can be located in the same layer as the gate insulating layer 12, the third insulating layer 0213 can be located in the same layer as the interlayer dielectric layer 13, the first metal layer 0221 can be located in the same layer as the first source-drain metal layer 14, and the second metal layer 0222 can be located in the same layer as the second source-drain metal layer 15.

[0097] Optionally, each film layer described in the above embodiment can be formed on the substrate by a single patterning process through a mask plate. Furthermore, the groove 022-2 of the metal layer 022 in the test element group 02 can be formed by an etching process (e.g., dry etching or wet etching). The single patterning process can include the following process steps: photoresist coating, exposure, development, etching, photoresist stripping, etc.

[0098] In summary, a method for manufacturing a display panel is provided in an embodiment of the present disclosure. In this method, a test element group can be formed on one side of a substrate, and the formed test element group includes an insulating layer and a metal layer stacked in sequence, two vias that penetrate the insulating layer and the metal layer and are connected in sequence, and a flat layer located in the via. Because the metal layer has at least one slot exposing the flat layer in addition to the via, during the manufacturing process of the display panel, water vapor that invades the flat layer through the external environment can not only overflow through the opening of the hole, but can also effectively overflow through the at least one slot. In this way, the problem of separation between film layers due to the inability of water vapor to overflow is avoided.

[0099] Figure 8 is a schematic diagram of the structure of a display device provided by an embodiment of the present disclosure. Figure 8 As shown, the display device includes: a power supply component 100, and a display panel 00 as shown in the above figures.

[0100] The power supply component 100 may be coupled to (ie, electrically connected to) the display panel 00 , and used to supply power to the display panel 00 .

[0101] Optionally, the display device described in the embodiments of the present disclosure may be any product or component having a display function, such as an organic light-emitting diode (OLED) display device, a mobile phone, a tablet computer, a flexible display device, a television set, and a monitor.

[0102] It should be noted that in the accompanying drawings, the sizes of layers and regions may be exaggerated for clarity of illustration. It is also understood that when an element or layer is referred to as being "on" another element or layer, it may be directly on the other element, or there may be an intermediate layer. In addition, it is understood that when an element or layer is referred to as being "under" another element or layer, it may be directly under the other element, or there may be more than one intermediate layer or element. In addition, it is also understood that when a layer or element is referred to as being "between" two layers or two elements, it may be the only layer between the two layers or two elements, or there may also be more than one intermediate layer or element. Similar reference numerals throughout the text indicate similar elements.

[0103] Furthermore, the terms used in the embodiments of the present disclosure are only used to explain the embodiments of the present disclosure and are not intended to limit the present disclosure. Unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should have the common meanings understood by people with ordinary skills in the field to which the present disclosure belongs.

[0104] For example, in the embodiments of the present disclosure, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance. The term "plurality" refers to two or more, unless otherwise clearly defined.

[0105] Likewise, the words “a” or “an” and the like do not denote a limitation of quantity, but rather denote the presence of at least one.

[0106] Words such as “include” or “comprising” and the like mean that the elements or objects preceding “include” or “comprising” include the elements or objects listed after “include” or “comprising” and their equivalents, and do not exclude other elements or objects.

[0107] “Up”, “down”, “left” or “right” etc. are only used to indicate relative position relationship. When the absolute position of the described object changes, the relative position relationship may also change accordingly.

[0108] "And / or" indicates that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects before and after are in an "or" relationship.

[0109] The above description is only an optional embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A display panel, characterized in that: The display panel comprises: substrate; and, a test element group located on one side of the substrate; The test element group includes: an insulating layer and a metal layer stacked in sequence in a direction away from the substrate, a first via hole penetrating the metal layer, a second via hole penetrating the insulating layer and connected to the first via hole, and a flat layer located in the first via hole and the second via hole, the top opening of the first via hole on a side away from the substrate being an orthographic projection on the substrate, and the top opening of the second via hole on a side away from the substrate being within the orthographic projection on the substrate; Furthermore, the metal layer has at least one groove, and an orthographic projection of the at least one groove on the substrate overlaps with an orthographic projection of the planar layer on the substrate, and exposes the planar layer.

2. The display panel according to claim 1, characterized in that: The metal layer has a plurality of grooves, and the plurality of grooves are arranged at intervals in a direction parallel to the display surface of the display panel.

3. The display panel according to claim 2, characterized in that: Among the plurality of slots, each slot has the same shape and size, and the spacing between any two adjacent slots is the target spacing.

4. The display panel according to claim 2, characterized in that: Among the plurality of grooves, some grooves are located in a first portion of the metal layer on one side of the first via hole, and the remaining grooves except the some grooves are located in a second portion of the metal layer on the other side of the first via hole.

5. The display panel according to claim 4, characterized in that: The first portion has the same number of slots as the second portion has.

6. The display panel according to any one of claims 1 to 5, characterized in that: The orthographic projection of the groove on the substrate is a regular shape; Wherein, the regular shape includes: rectangle, circle, ellipse or trapezoid.

7. The display panel according to any one of claims 1 to 5, characterized in that: The metal layer comprises: a first metal layer and a second metal layer stacked in sequence in a direction away from the substrate, the second metal layer having the at least one groove, the flat layer being located in a portion where the first via hole penetrates the first metal layer, and the display panel further comprises: a pixel defining layer located in a portion where the first via hole penetrates the second metal layer and located on a side of the second metal layer away from the substrate; The insulating layer comprises: a first insulating layer, a second insulating layer and a third insulating layer sequentially stacked in a direction away from the substrate; The orthographic projection of the portion of the second via hole that passes through the first insulating layer on the substrate is located within the orthographic projection of the portion of the second via hole that passes through the second insulating layer on the substrate, and is located within the orthographic projection of the portion of the first via hole that passes through the second metal layer on the substrate; The orthographic projection of a portion of the second via hole that passes through the second insulating layer on the substrate overlaps with the orthographic projection of a portion that passes through the third insulating layer on the substrate, and is located within the orthographic projection of a portion of the first via hole that passes through the first metal layer on the substrate; Furthermore, the orthographic projection of the portion of the first via hole that passes through the second metal layer on the substrate is located within the orthographic projection of the portion of the first via hole that passes through the first metal layer on the substrate.

8. The display panel according to claim 7, characterized in that: The substrate has a display area and a test area at least partially surrounding the display area, and the test element group is located in the test area; The display panel further comprises: a pixel located on one side of the substrate and located in the display area, the pixel comprising an inorganic material layer, a gate insulating layer, an interlayer dielectric layer, a first source-drain metal layer and a second source-drain metal layer sequentially stacked in a direction away from the substrate; Among them, the first insulating layer and the inorganic material layer are located in the same layer, the second insulating layer and the gate insulating layer are located in the same layer, the third insulating layer and the interlayer dielectric layer are located in the same layer, the first metal layer and the first source and drain metal layer are located in the same layer, and the second metal layer and the second source and drain metal layer are located in the same layer.

9. A method for manufacturing a display panel, characterized in that: For manufacturing a display panel according to any one of claims 1 to 8, the method comprises: providing a substrate; forming a test element group on one side of the substrate; The test element group includes: an insulating layer and a metal layer stacked in sequence in a direction away from the substrate, a first via hole penetrating the metal layer, a second via hole penetrating the insulating layer and connected to the first via hole, and a flat layer located in the first via hole and the second via hole, the top opening of the first via hole on a side away from the substrate being an orthographic projection on the substrate, and the top opening of the second via hole on a side away from the substrate being within the orthographic projection on the substrate; Furthermore, the metal layer has at least one groove, and an orthographic projection of the at least one groove on the substrate overlaps with an orthographic projection of the planar layer on the substrate, and exposes the planar layer.

10. A display device, characterized in that: The display device comprises: a power supply component, and a display panel according to any one of claims 1 to 8; Wherein, the power supply component is coupled to the display panel and is used to supply power to the display panel.

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