Light emitting diode epitaxial wafer and preparation method thereof

Abstract

The present invention provides a light-emitting diode epitaxial wafer and a preparation method thereof, wherein the light-emitting diode epitaxial wafer comprises a substrate, a first semiconductor layer, a multi-quantum well layer and a second semiconductor layer stacked in sequence, wherein the multi-quantum well layer comprises a quantum well layer and a quantum barrier layer stacked alternately in a periodic manner, wherein the quantum barrier layer adjacent to the second semiconductor layer in the multi-quantum well layer comprises a first sublayer, a second sublayer and a third sublayer stacked in sequence, wherein the first sublayer is a GaN layer, the second sublayer is a graphene film layer, and the third sublayer is an Mg-doped AlGaN layer. The light-emitting diode epitaxial wafer increases the expansion of holes and the hole mobility, increases the hole concentration and expansion capacity entering the quantum well, and plays a role of partial electron blocking, thereby increasing the recombination probability of electron-hole pairs in the multi-quantum well.

Description

Technical Field

[0001] The invention relates to the field of semiconductor technology, and in particular to a light emitting diode epitaxial wafer and a preparation method thereof. Background Art

[0002] At present, GaN-based light-emitting diodes have been widely used in the fields of solid-state lighting and display, attracting more and more attention. GaN-based light-emitting diodes have been industrialized and used in backlight sources, lighting, landscape lights, etc.

[0003] In a light-emitting diode, the P-type layer provides holes and the N-type layer provides electrons. Since the mass of holes is larger than that of electrons, the holes in the P-type layer move slowly, while the electrons in the N-type layer move quickly. In addition, the activation of P-type doped Mg is difficult, resulting in fewer holes injected into the multi-quantum well layer. Therefore, the main light-emitting area in the multi-quantum well layer is concentrated in the last few wells, while the light-emitting efficiency of the first few wells is low, thus affecting the light-emitting efficiency of the light-emitting diode. The last quantum barrier layer serves as a connecting structure between the P-type layer that provides holes and the multi-quantum well layer. Its ability to migrate and expand holes has a great influence on the electron-hole recombination efficiency of the multi-quantum well.

[0004] Nowadays, the multi-quantum well layer includes periodically alternating stacked quantum well layers and quantum barrier layers, and the quantum barrier layer uses pure GaN or AlGaN as the final quantum barrier layer material. Such a structure has no positive effect on increasing the mobility of holes and the expansion capacity of holes. There are still insufficient holes in the quantum wells, which affects the luminous efficiency of the light-emitting diode. Summary of the invention

[0005] Based on this, the purpose of the present invention is to provide a light-emitting diode epitaxial wafer and a preparation method thereof, so as to increase the expansion of holes and hole mobility, increase the concentration and expansion capacity of holes entering the quantum well, and play a role in partial electron blocking, thereby increasing the recombination probability of electron-hole pairs in the multiple quantum wells.

[0006] The present invention provides a light-emitting diode epitaxial wafer, comprising a substrate, a first semiconductor layer, a multi-quantum well layer and a second semiconductor layer stacked in sequence, wherein the multi-quantum well layer comprises quantum well layers and quantum barrier layers stacked alternately in a periodic manner, wherein the quantum barrier layer adjacent to the second semiconductor layer in the multi-quantum well layer comprises a first sublayer, a second sublayer and a third sublayer stacked in sequence, wherein the first sublayer is a GaN layer, the second sublayer is a graphene film layer, and the third sublayer is an AlGaN layer doped with Mg.

[0007] Furthermore, in the above-mentioned light-emitting diode epitaxial wafer, the growth temperature of the first sublayer is 800-900°C, and the growth temperature of the third sublayer is 900-1000°C.

[0008] Furthermore, in the above-mentioned light-emitting diode epitaxial wafer, the doping concentration of Mg in the third sublayer is 1×10 17 -1×10 18 cm -3 .

[0009] Furthermore, in the above-mentioned light-emitting diode epitaxial wafer, the third sublayer is Al a Ga 1-a For N layers, the value range of a is 0.1-0.2.

[0010] Furthermore, in the above-mentioned light-emitting diode epitaxial wafer, the thickness of the first sublayer is 3-10nm, the thickness of the second sublayer is 3-10nm, and the thickness of the third sublayer is 3-10nm.

[0011] Furthermore, in the above-mentioned light-emitting diode epitaxial wafer, the first semiconductor layer includes a buffer layer, an undoped U-GaN layer and an N-type GaN layer sequentially deposited on the substrate.

[0012] Furthermore, in the above-mentioned light-emitting diode epitaxial wafer, the second semiconductor layer comprises an electron blocking layer and a P-type GaN layer sequentially deposited on the multi-quantum well layer, and the electron blocking layer is Al c Ga 1-c N and In b Ga 1-b N alternately grows a periodic structure, where the value of c ranges from 0.05 to 0.2 and the value of b ranges from 0.1 to 0.5.

[0013] The present invention also discloses a method for preparing a light emitting diode epitaxial wafer, comprising:

[0014] providing a substrate;

[0015] depositing a buffer layer on the substrate;

[0016] Depositing an undoped U-GaN layer on the buffer layer;

[0017] Depositing an N-type GaN layer on the U-GaN layer;

[0018] Depositing a multi-quantum well layer on the N-type GaN layer;

[0019] depositing an electron blocking layer on the multi-quantum well layer;

[0020] Depositing a P-type GaN layer on the electron blocking layer;

[0021] The quantum barrier layer adjacent to the electron blocking layer in the multi-quantum well layer includes a first sublayer, a second sublayer and a third sublayer stacked in sequence, the first sublayer is a GaN layer, the second sublayer is a graphene film layer, and the third sublayer is an AlGaN layer doped with Mg.

[0022] Furthermore, in the method for preparing the light emitting diode epitaxial wafer, the growth temperature of the first sublayer is 800-900°C, and the growth temperature of the third sublayer is 900-1000°C.

[0023] Furthermore, in the method for preparing the light-emitting diode epitaxial wafer, the doping concentration of Mg in the third sublayer is 1×10 17 -1×10 18 cm -3 .

[0024] The present invention specially designs the last quantum barrier layer to increase the expansion and mobility of holes, increase the concentration and expansion capacity of holes entering the quantum well, and play a role in partial electron blocking, thereby increasing the recombination probability of electron-hole pairs in the multi-quantum well. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is a structural schematic diagram of a light emitting diode epitaxial wafer in Example 1 of the present invention;

[0026] Figure 2 This is a schematic diagram of the structure of the quantum barrier layer in the last growth cycle of the multi-quantum well layer in Example 1 of the present invention;

[0027] Figure 3 The figure is a flow chart of a method for preparing a light emitting diode epitaxial wafer in an embodiment of the present invention.

[0028] Description of main component symbols:

[0029] 10: substrate, 20: buffer layer, 30: undoped U-GaN layer, 40: N-type GaN layer, 50: multi-quantum well layer, 60: electron blocking layer, 70: P-type GaN layer, 501: first sublayer, 502: second sublayer, 503: third sublayer.

[0030] The following specific implementation manner will further illustrate the invention in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0031] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. Several embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.

[0032] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.

[0033] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0034] Example 1

[0035] See also Figure 1 , shown is a light emitting diode epitaxial wafer in the first embodiment of the present invention, comprising a substrate 10, a first semiconductor layer, a multi-quantum well layer 50 and a second semiconductor layer sequentially deposited on the substrate 10. The first semiconductor layer comprises a buffer layer 20, an undoped U-GaN layer 30 and an N-type GaN layer 40 sequentially deposited on the substrate 10, and the second semiconductor layer comprises an electron blocking layer 60 and a P-type GaN layer 70 sequentially deposited on the multi-quantum well layer 50.

[0036] The substrate 10 can be selected from one of a sapphire substrate, a SiO2 sapphire composite substrate, a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, and a zinc oxide substrate. Preferably, in this embodiment, the substrate 10 is selected from a sapphire substrate because sapphire has the same hexagonal symmetric wurtzite structure as GaN, and also has the advantages of good thermal and chemical stability, high mechanical strength, mature technology, and relatively low price.

[0037] The buffer layer 20 is deposited on the substrate 10, and its thickness can be 20-80nm. Specifically, in this embodiment, the buffer layer can be deposited in the applied material PVD, and its thickness is 30nm. The buffer layer is used to control crystal defects, improve the quality of subsequent growth crystals, and relieve the stress caused by lattice mismatch and thermal mismatch between the substrate and the epitaxial layer.

[0038] The thickness of the undoped U-GaN layer 30 may be in the range of 300-800 nm. Specifically, in this embodiment, the thickness of the U-GaN layer is 400 nm.

[0039] The thickness of the N-type GaN layer 40 is 1-3 μm, and the Si doping concentration is 5×10 18-1×10 19 cm -3 Specifically, in this embodiment, the thickness of the N-type GaN layer is 2 μm, and the Si doping concentration is 8×10 18 cm -3 .

[0040] The multi-quantum well layer 50 includes quantum well layers and quantum barrier layers that are periodically and alternately stacked. The quantum barrier layer adjacent to the second semiconductor layer in the multi-quantum well layer includes a first sublayer 501, a second sublayer 502, and a third sublayer 503 stacked in sequence, that is, in the multi-quantum well layer, the quantum barrier layer of the last growth cycle includes three sublayers grown in sequence, the first sublayer 501 is a GaN layer, the second sublayer 502 is a graphene film layer, and the third sublayer 503 is an AlGaN layer doped with Mg.

[0041] The growth temperature of the first sublayer 501 is 800-900°C. If the growth temperature is too high, the In component of the multi-quantum well layer is easily destroyed, and if the growth temperature is too low, the lattice quality is seriously affected. The growth temperature of the third sublayer 503 is 900-1000°C. A higher growth temperature of the third sublayer 503 is conducive to obtaining better lattice quality. Specifically, in this embodiment, the growth temperature of the first sublayer 501 is 850°C, and the growth temperature of the third sublayer 503 is 950°C.

[0042] The third sublayer 503 is doped with Mg and Al a Ga 1-a In the N layer, the value of a ranges from 0.1 to 0.2, and the Mg doping concentration is very low, only 1×10 17 -1×10 18 cm -3 Specifically, in this embodiment, the doping concentration of Mg in the third sub-layer 503 is 5×10 17 cm -3 , the value range of a is 0.5.

[0043] The thickness of the first sublayer 501, the second sublayer 502 and the third sublayer 503 are all 3-10 nm. Specifically, in this embodiment, the thickness of the first sublayer 501, the second sublayer 502 and the third sublayer 503 are 4 nm, 4 nm and 5 nm respectively.

[0044] The electron blocking layer 60 is mainly used to block electrons and prevent electron overflow. The electron blocking layer 60 is a periodic structure of AlGaN and InGaN materials alternately stacked and grown, and the number of periods can be 3-15, and 8 is selected in this embodiment.

[0045] In this embodiment, the thickness of the P-type GaN layer 70 is 4 nm. The P-type GaN layer 70 is doped with Mg, wherein the doping concentration of Mg is 1×10 17cm-3-1×10 19 cm -3 .

[0046] See also Figure 2 , is a method for preparing a light emitting diode epitaxial wafer in an embodiment of the present invention, comprising steps S01 to S07.

[0047] Step S01, providing a substrate.

[0048] This embodiment uses a sapphire substrate. First, the reaction chamber temperature is controlled to 1000°C to 1200°C, the reaction chamber pressure is controlled to 200-600 Torr, the graphite base speed is set to 500-1200 r / min, and the substrate is subjected to high temperature annealing for 5-8 minutes in a H2 atmosphere to clean particles and oxides on the substrate surface.

[0049] Step S02: depositing a buffer layer on the substrate.

[0050] In this embodiment, the buffer layer material is selected as AlGaN. This layer is mainly used to provide crystal seeds, alleviate the lattice mismatch between the substrate and the epitaxial layer, and improve the lattice quality of the epitaxial wafer.

[0051] Specifically, first, the reaction chamber temperature is controlled to be 500°C ~ 700°C, the reaction chamber pressure is 200 ~ 400Torr, the graphite base speed is set to 500-1200r / min, NH3 is introduced to provide N source, N2 and H2 are used as carrier gas, TMGa is introduced as Ga source, TMAl is introduced as Al source, and AlGaN with a thickness of 30nm is grown as a buffer layer in this embodiment.

[0052] Step S03, depositing a U-GaN layer on the buffer layer.

[0053] Specifically, the temperature of the reaction chamber is controlled at 1100°C ~ 1150°C, and the pressure is 100 ~ 500Torr; the rotation speed of the graphite base is controlled at 500-1200 rpm, NH3 is introduced as the N source, N2 and H2 are used as carrier gases, and TMGa is introduced as the Ga source. In this embodiment, a U-GaN layer with a thickness of 400nm is grown.

[0054] Step S04, depositing an N-type GaN layer on the U-GaN layer.

[0055] This layer mainly provides electrons, and the specific growth process is:

[0056] The temperature of the reaction chamber is controlled at 1100℃~1150℃, and the pressure is 100~500Torr; the rotation speed of the graphite base is controlled at 500-1200r / min, NH3 is introduced as the N source, N2 and H2 are used as carrier gases, and TMGa is used as the Ga source in this embodiment to grow a GaN layer with a thickness of 2μm, and SiH4 is introduced as N-type doping.

[0057] Step S05, depositing a multi-quantum well layer on the N-type GaN layer.

[0058] The multi-quantum well layer is a periodic structure of alternately stacked InGaN quantum well layers and GaN quantum barrier layers, and the number of periods of the multi-quantum well layer can be 3-15. Specifically, in this embodiment, the number of periods is selected as 10. During the growth of the multi-quantum well layer, the pressure of the reaction chamber is controlled to be 100-500 Torr, and the rotation speed of the graphite base supporting the substrate is set to 600-1000 revolutions / min.

[0059] First, grow the quantum well layer, control the temperature of the reaction chamber to 700-800°C, use N2 as the carrier gas, turn off H2, use NH3 as the N source, introduce TEGa as the Ga source, and introduce TMIn as the In source. In this embodiment, the thickness of the InGaN quantum well layer is 3nm.

[0060] Then grow the quantum barrier layer, control the temperature of the reaction chamber to 800-900°C, turn off the In source, use H2 and N2 as carrier gases, and introduce TEGa as the Ga source. In this embodiment, the thickness of the GaN quantum barrier layer can be controlled to be 10nm.

[0061] In this way, the quantum well layer and quantum barrier layer are repeatedly stacked and grow periodically until the quantum barrier layer of the last period, and its growth process is:

[0062] The temperature of the reaction chamber is controlled to be 800-900°C, the growth pressure is 100-500Torr, the rotation speed of the graphite base supporting the substrate is set to 600-1200r / min, the carrier gas is a N2 / H2 mixed gas, NH3 provides the N source, and a Ga source is introduced, the Ga source can be TEGa, and the first sublayer is grown;

[0063] Then, the epitaxial wafer template is transferred to a chemical vapor deposition (CVD) device for growth. The temperature of the CVD reaction chamber is controlled at 800-1000°C, the pressure of the reaction chamber is controlled at 10-500 mbar, 200-1000 sccm of CH4 is introduced, and H2 and Ar are used as carrier gases to obtain a graphene film layer of good quality;

[0064] The epitaxial wafer is then transferred back to the MOCVD equipment to grow an AlGaN layer doped with Mg; the reaction chamber temperature is controlled to be 900-1000°C, the growth pressure is 100-500Torr, and the rotation speed of the graphite base supporting the substrate is set to 600-1200r / min; N2 and H2 are used as carrier gases, NH3 is introduced as the N source, and a Ga source is introduced. In this embodiment, TEGa is selected as the Ga source, TMAl is introduced as the Al source, and CP2Mg is introduced as the Mg source.

[0065] Step S06, depositing an electron blocking layer on the multi-quantum well layer.

[0066] The electron blocking layer is a periodic structure in which AlGaN and InGaN materials are alternately stacked and grown, and the number of periods can be 3-15, and 8 is selected in this embodiment.

[0067] When growing the electron blocking layer, first control the temperature of the reaction chamber to 900-1000°C, the pressure to 100-500Torr, and set the rotation speed of the graphite base supporting the substrate to 600-1200r / min, wherein the N source can be NH3, the Ga source can be TMGa, and the Al source can be TMAL. In this embodiment, the AlGaN layer can be 6nm. After the AlGaN layer is grown, the Al source is turned off, the Ga source is continued to be introduced, and the InGaN layer is turned on to grow the InGaN layer. In this embodiment, a single InGaN layer is 6nm, and the AlGaN layer and the InGaN layer are repeatedly stacked and grown.

[0068] Step S07, depositing a P-type GaN layer on the electron blocking layer.

[0069] The P-type layer mainly provides holes. The growth temperature of the P-type GaN layer is about 800-1000°C, the growth pressure is 100-300Torr, the rotation speed of the graphite disk carrying the substrate is controlled at 800-1200r / min, NH3 is introduced as the N source, the Ga source can be TMGa, and CP2Mg is introduced as the P-type dopant, where the Mg doping concentration is 1×10 17 cm -3 -1×10 19 cm -3 , so that a Mg-doped GaN layer is grown.

[0070] In this embodiment, Veeco C4 MOCVD (Metal Organic Chemical Vapor Deposition) equipment is used to realize the growth method of epitaxial wafers. High-purity H2 (hydrogen) or high-purity N2 (nitrogen) or a mixed gas of high-purity H2 and high-purity N2 is used as a carrier gas, high-purity NH3 is used as an N source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) are used as gallium sources, trimethyl indium (TMIn) is used as an indium source, silane (SiH4) is used as an N-type dopant, trimethyl aluminum (TMAl) is used as an aluminum source, and bis(cyclopentadienyl) magnesium (CP2Mg) is used as a P-type dopant.

[0071] In this embodiment, in the last growth cycle of the multi-quantum well layer, after the growth of the last quantum well layer is completed, the first sublayer, the second sublayer and the third sublayer are grown in sequence. The temperature of the first sublayer is relatively lower than that of the third sublayer. Since the first sublayer is in direct contact with the quantum well layer, the high temperature will damage the In component in the quantum well. The higher growth temperature of the third sublayer is conducive to obtaining better lattice quality.

[0072] The third sublayer is a doped P-type AlGaN layer. On the one hand, the energy level of Al is relatively high, which can block electron overflow; on the other hand, P-type doping can provide a small number of holes, increase the amount of hole injection and increase hole expansion, and also consume the overflowing electrons.

[0073] The second sub-layer is the graphene film layer. The graphene material itself has strong conductivity, so the holes have a higher migration rate in graphene, and graphene can increase the expansion capacity of holes. Therefore, when the holes generated by the P-type GaN layer are partially expanded in the third sub-layer (low-doped P-type AlGaN layer), the migration capacity is improved in the graphene film layer, and the holes are further expanded, and the concentration of holes entering the quantum well layer is increased, which increases the recombination probability of electron holes in the multiple quantum wells, especially the recombination probability of electron holes in the first few quantum wells close to the N-type layer, and increases the luminous efficiency of the light-emitting diode. In addition, the graphene material has strong stability and can block dislocations extending from the quantum wells, increasing the surface flatness.

[0074] The embodiment of the present invention specially designs the last quantum barrier layer to increase the expansion and mobility of holes, increase the concentration and expansion capacity of holes entering the quantum well, and play a role in partial electron blocking, thereby increasing the recombination probability of electron-hole pairs in the multi-quantum well.

[0075] Example 2

[0076] The structure of the light emitting diode epitaxial wafer in this embodiment is basically the same as that of the light emitting diode epitaxial wafer in Embodiment 1, except that:

[0077] In this embodiment, the thicknesses of the first sublayer 501 , the second sublayer 502 and the third sublayer 503 are 8 nm, 8 nm and 10 nm respectively.

[0078] Comparative Example 1

[0079] The structure of the light emitting diode epitaxial wafer in this embodiment is basically the same as that of the light emitting diode epitaxial wafer in Embodiment 1, except that:

[0080] The material used for growing the quantum barrier layer in the last growth cycle of the multi-quantum well layer is pure GaN.

[0081] Comparative Example 2

[0082] The structure of the light emitting diode epitaxial wafer in this embodiment is basically the same as that of the light emitting diode epitaxial wafer in Embodiment 1, except that:

[0083] The material used for growing the quantum barrier layer in the last growth cycle of the multi-quantum well layer is ALGaN.

[0084]

[0085] The same chip process conditions were used to prepare 10mil*24mil chips in Examples 1 and 2, and Comparative Examples 1 to 2. 300 LED chips were extracted from the chips obtained in each Example, and tested at a current of 120mA / 60mA. The luminous brightness relative to the conventional chips was shown in Table 1. It can be clearly seen from the data in Table 1 that the last quantum barrier structure proposed in the embodiment of the present invention has better luminous intensity.

[0086] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0087] The above-mentioned embodiments only express several implementation methods of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the patent of the present invention. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A light emitting diode epitaxial wafer, characterized in that: The invention comprises a substrate, a first semiconductor layer, a multi-quantum well layer and a second semiconductor layer which are stacked in sequence, wherein the multi-quantum well layer comprises quantum well layers and quantum barrier layers which are periodically and alternately stacked, and the quantum barrier layer adjacent to the second semiconductor layer in the multi-quantum well layer comprises a first sublayer, a second sublayer and a third sublayer which are stacked in sequence, wherein the first sublayer is a GaN layer, the second sublayer is a graphene film layer, and the third sublayer is an AlGaN layer doped with Mg.

2. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The growth temperature of the first sub-layer is 800-900°C, and the growth temperature of the third sub-layer is 900-1000°C.

3. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The doping concentration of Mg in the third sublayer is 1×10 17 -1×10 18 cm -3 .

4. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The third sublayer is Al a Ga 1-a For N layers, the value range of a is 0.1-0.

2.

5. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The thickness of the first sub-layer is 3-10 nm, the thickness of the second sub-layer is 3-10 nm, and the thickness of the third sub-layer is 3-10 nm.

6. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The first semiconductor layer includes a buffer layer, an undoped U-GaN layer and an N-type GaN layer which are sequentially deposited on the substrate.

7. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The second semiconductor layer includes an electron blocking layer and a P-type GaN layer sequentially deposited on the multi-quantum well layer. The electron blocking layer is Al c Ga 1-c N and In b Ga 1-b N alternately grows a periodic structure, where the value of c ranges from 0.05 to 0.2 and the value of b ranges from 0.1 to 0.

5.

8. A method for preparing a light emitting diode epitaxial wafer, characterized in that: include: providing a substrate; depositing a buffer layer on the substrate; Depositing an undoped U-GaN layer on the buffer layer; Depositing an N-type GaN layer on the U-GaN layer; Depositing a multi-quantum well layer on the N-type GaN layer; depositing an electron blocking layer on the multi-quantum well layer; Depositing a P-type GaN layer on the electron blocking layer; The quantum barrier layer adjacent to the electron blocking layer in the multi-quantum well layer includes a first sublayer, a second sublayer and a third sublayer stacked in sequence, the first sublayer is a GaN layer, the second sublayer is a graphene film layer, and the third sublayer is an AlGaN layer doped with Mg.

9. The method for preparing a light emitting diode epitaxial wafer according to claim 8, characterized in that: The growth temperature of the first sub-layer is 800-900°C, and the growth temperature of the third sub-layer is 900-1000°C.

10. The method for preparing a light emitting diode epitaxial wafer according to claim 8, characterized in that: The doping concentration of Mg in the third sublayer is 1×10 17 -1×10 18 cm -3 .

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