A self-biased active transconductance boost amplifier circuit

Abstract

The application discloses a self-biased active transconductance enhancement amplification circuit, which comprises an input amplification module, an inter-stage matching and bias circuit, an output amplification module and a self-biased active transconductance enhancement amplifier.

Description

Technical Field

[0001] This invention relates to the field of radio frequency front-end integrated circuit technology, and in particular to a self-biased active transconductance enhancement amplifier circuit. Background Technology

[0002] As the first key module of the antenna receiving circuit, the low-noise amplifier circuit requires low power consumption, low noise, and high gain to ensure the signal-to-noise ratio and communication quality of the antenna signal reception.

[0003] like Figure 1 The diagram shows the circuit structure of a traditional two-stage cascaded single-ended amplifier circuit, where the RF input signal RFin is coupled through the input coupling capacitor C. in Input inductance L g The input is connected to the input terminal of the input stage. The interstage capacitor C1 is connected between the output terminal of the input stage and the input terminal of the output stage. The power supply Vdd is connected to the power input terminal of the first input bias circuit, the power input terminal of the second input bias circuit, and the first drain inductor L. d1 Second drain inductance L d2 One end of the first input bias circuit is connected to the output of the first input bias circuit, which is connected to one end of the first bias resistor R1. The other end of the first bias resistor R1 is connected to the input of the input stage. The output of the second input bias circuit is connected to one end of the second bias resistor R2. The other end of the second bias resistor R2 is connected to the input of the output stage and the interstage capacitor C1. The first drain inductor L... d1 The other end is connected to the output terminal of the input stage, and the second drain inductor L d2 The other end is connected to the output terminal of the output stage, and the output terminal of the output stage outputs the radio frequency output signal RFout through the output coupling capacitor C2.

[0004] To improve communication data transmission rates and increase the number of channels, bandwidth is often increased, frequencies are raised, or even millimeter-wave band communication is employed. However, as the frequency increases, transmission loss in high-frequency signal environments increases, and the intrinsic gain of a single stage in silicon-based devices decreases with increasing frequency. Therefore, high-frequency and millimeter-wave low-noise amplifier circuits often employ multi-stage structures, requiring design improvements in low power consumption and gain enhancement. Summary of the Invention

[0005] To overcome the shortcomings of the existing technology, the present invention aims to provide a self-biased active transconductance enhancement amplifier circuit. The self-biased active transconductance enhancement amplifier amplifies and couples the feedback signal of the input stage to the input stage, thereby achieving bootstrap active amplification of the input signal amplitude and equivalent transconductance enhancement. At the same time, the bias current of the input stage, the self-biased stage and the output stage are multiplexed to save power consumption, thus achieving low cost, low power consumption and high gain performance.

[0006] To achieve the above and other objectives, the present invention proposes a self-biased active transconductance enhancement amplifier circuit, comprising:

[0007] The input amplifier module is used to perform preliminary amplification of the radio frequency input signal;

[0008] Interstage matching and biasing circuit, used to complete the interstage matching between the input amplification module and the output amplification module, and to DC bias the output terminal of the input amplification module;

[0009] The output amplification module is used to further amplify the radio frequency input signal after it has been initially amplified by the input amplification module;

[0010] A self-biased active transconductance enhancement amplifier is used to amplify the radio frequency input signal via bootstrapping and then transmit it to the input terminal of the input amplification module.

[0011] Preferably, the amplifier circuit utilizes the self-biased active transconductance enhancement amplifier to amplify and couple the input signal of the input amplification module to the feedback terminal of the input amplification module, thereby increasing the equivalent effective input signal voltage amplitude and enhancing the equivalent transconductance, thus improving the gain.

[0012] Preferably, the self-biased active transconductance enhancement amplifier and the input amplification module share the same DC bias voltage through a third bias resistor (R0) to achieve self-biasing, and an impedance feedback adjustment path is provided between the input terminal and the feedback terminal to improve gain flatness.

[0013] Preferably, the input amplification module includes a first input bias circuit, an input stage, a first bias resistor (R1), and a feedback inductor (L). s ) and input coupling capacitor (C in The radio frequency input signal (RFin) is connected to the input coupling capacitor (C). in One end of the self-biased active transconductance enhancement amplifier, the input coupling capacitor (C) in The other end is connected to the feedback terminal of the input stage and the feedback inductor (L). s One end of the feedback inductor (L) s The other end of the circuit is grounded, the first output of the first input bias circuit is connected to one end of the first bias resistor (R1), and the other end of the first bias resistor (R1) is connected to the input of the input stage, the self-biased active transconductance enhancement amplifier.

[0014] Preferably, the self-biased active transconductance enhancement amplifier includes a third drain inductor (L... g ), third bias resistor (R0), bootstrap output coupling capacitor (C0), and bootstrap amplifier transistor (M). g The NMOS bootstrap amplifier transistor (M)g The drain of the third drain inductor (L) is connected to the drain inductor. g The first input bias circuit's second output terminal is connected to one end of the bootstrap output coupling capacitor (C0), the other end of the bootstrap output coupling capacitor (C0) is connected to the input stage, and one end of the third bias resistor (R0) is connected to the bootstrap amplifier transistor (M). g The source of the capacitor is grounded, and the gate is connected to the input coupling capacitor (C). in ) and the other end of the third bias resistor (R0).

[0015] Preferably, the interstage matching and biasing circuit includes a first drain inductor (L... d1 The input stage output is connected to the first drain inductor (L) and the interstage capacitor (C1). d1 One end of the first drain inductor (L) and one end of the interstage capacitor (C1), and the first drain inductor (L) d1 The other end of the capacitor is connected to the power supply, and the other end of the interstage capacitor (C1) is connected to the output amplifier module.

[0016] Preferably, the output amplification module includes a second input bias circuit, an output stage, a second bias resistor (R2), and a second drain inductor (L). d2 The second input bias circuit is connected to the output stage and the output coupling capacitor (C2). The output terminal of the second input bias circuit is connected to one end of the second bias resistor (R2), and the other end of the second bias resistor (R2) is connected to the input terminal of the output stage and the other end of the interstage capacitor (C1). The output terminal of the output stage is connected to the second drain inductor (L). d2 One end of the output stage is connected to one end of the output coupling capacitor (C2), the feedback terminal of the output stage is grounded, and the other end of the output coupling capacitor (C2) is the RF output signal RFout terminal.

[0017] Preferably, the interstage matching and biasing circuit includes a first drain inductor (L... d1 Interstage capacitance (C1) and bias decoupling capacitance (C) gnd The output of the input stage is connected to the first drain inductor (L). d1 One end of the capacitor (C1) and one end of the interstage capacitor (C1) are connected, the other end of the interstage capacitor (C1) is connected to the input terminal of the output stage of the output amplifier module, and the feedback terminal of the output stage is connected to the first drain inductor (L). d1 The other end of the bias decoupling capacitor (C) and the bias decoupling capacitor (C) gnd One end of the bias decoupling capacitor (C) gnd One end of the device is grounded.

[0018] Preferably, the interstage matching and biasing circuit includes a first drain inductor (L... d1) and interstage capacitance (C1) and bias decoupling capacitance (C gnd Disconnect the second output of the first input bias circuit from the third drain inductor (L). g The connection of the third drain inductor (L) will... g The disconnection point of the input stage is connected to the feedback terminal of the output stage of the output amplification module; the output terminal of the input stage is connected to the first drain inductor (L). d1 One end of the capacitor (C1) and one end of the interstage capacitor (C1) are connected to the input terminal of the output stage, and the feedback terminal of the output stage is connected to the first drain inductor (L). d1 The other end of the capacitor and the bias decoupling capacitor (C) gnd One end of the inductor and the third drain inductor (L) g One end of the bias decoupling capacitor (C) gnd One end of the device is grounded.

[0019] Compared with the prior art, the self-biased active transconductance enhancement amplifier circuit of the present invention realizes the amplification and coupling of the feedback signal of the input stage to the input stage by using a self-biased active transconductance enhancement amplifier, thereby realizing the equivalent transconductance enhancement of the input signal amplitude through bootstrap active amplification. At the same time, the multiplexing of the bias current of the input stage, the self-biased stage and the output stage can save power consumption, thus achieving low cost, low power consumption and high gain performance. Attached Figure Description

[0020] Figure 1 This is a circuit diagram of a traditional two-stage cascaded differential amplifier RF front-end circuit.

[0021] Figure 2 This is a schematic diagram of the circuit structure of a self-biased active transconductance enhancement amplifier circuit according to an exemplary embodiment of the present invention;

[0022] Figure 3 This is a schematic diagram of the circuit structure of a self-biased active transconductance enhancement amplifier circuit according to another exemplary embodiment of the present invention;

[0023] Figure 4 This is a schematic diagram of the circuit structure of a self-biased active transconductance enhancement amplifier circuit in another exemplary embodiment of the present invention;

[0024] Figure 5 This is a schematic diagram comparing the gains of the present invention with those of existing technologies. Detailed Implementation

[0025] The following describes the embodiments of the present invention through specific examples and in conjunction with the accompanying drawings. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific examples, and various details in this specification can also be modified and changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0026] Figure 2 This is a schematic diagram of the circuit structure of a self-biased active transconductance enhancement amplifier circuit according to an exemplary embodiment of the present invention. Figure 2 As shown, the present invention discloses a self-biased active transconductance enhancement amplifier circuit, including an input amplification module 10, an interstage matching and biasing circuit 20, an output amplification module 30, and a self-biased active transconductance enhancement amplifier 40.

[0027] The input amplifier module 10 consists of a first input bias circuit, an input stage, a first bias resistor R1, and a feedback inductor L. s and input coupling capacitor C in Composed of components used to achieve preliminary amplification of the RF input signal RFin; the inter-stage matching and bias circuit 20 consists of the first drain inductor L d1 The input amplifier module 10 and the output amplifier module 30 are composed of an interstage capacitor C1, which is used to complete the interstage matching between the two stages, namely the matching of the input impedance and the output impedance, and the DC bias of the output terminal of the input amplifier module 10; the output amplifier module 30 consists of a second input bias circuit, an output stage, a second bias resistor R2, and a second drain inductor L. d2 Together with the output coupling capacitor C2, it is used to further amplify the RF signal; the self-biased active transconductance enhancement amplifier 40 consists of a third drain inductor L g The third bias resistor R0, the bootstrap output coupling capacitor C0, and the bootstrap NMOS transistor M g It is composed of components used to amplify the radio frequency input signal RFin through bootstrapping and transmit it to the input terminal of the input amplification module 10.

[0028] The RF input signal RFin is connected to the input coupling capacitor C. in One end of the third bias resistor R0 and the NMOS bootstrap amplifier M g The gate, input coupling capacitor C in The other end is connected to the feedback terminal of the input stage and the feedback inductor L. s One end, feedback inductor L s The other end is grounded;

[0029] NMOS bootstrap amplifier transistor M g The drain is connected to the third drain inductor L. g At the other end, one end of the bootstrap output coupling capacitor C0, is the NMOS bootstrap amplifier transistor M.g The source is grounded;

[0030] The output of the input stage is connected to the first drain inductor L. d1 One end of the stage is connected to one end of the interstage capacitor C1, and the output terminal of the output stage is connected to the second drain inductor L. d2 One end of the output stage is connected to one end of the output coupling capacitor C2. The feedback terminal of the output stage is grounded, and the other end of the output coupling capacitor C2 is the RF output signal RFout terminal.

[0031] The power supply Vdd is connected to the power input terminal of the first input bias circuit, the power input terminal of the second input bias circuit, and the first drain inductor L. d1 The other end and the second drain inductance L d2 At the other end, the first output terminal of the first input bias circuit is connected to one end of the first bias resistor R1, the other end of the first bias resistor R1 is connected to the input terminal of the input stage, the other end of the third bias resistor R0, and the other end of the bootstrap output coupling capacitor C0, and the second output terminal of the first input bias circuit is connected to the third drain inductor L. g At the other end, the output of the second input bias circuit is connected to one end of the second bias resistor R2, and the other end of the second bias resistor R2 is connected to the input of the output stage and the other end of the interstage capacitor C1.

[0032] This invention utilizes a self-biased active transconductance enhancement amplifier with a gain of G to amplify and couple the feedback signal of the input stage to the input stage, thereby increasing the effective input signal voltage amplitude by (1+G) times and enhancing the equivalent transconductance by G times, thus improving the gain.

[0033] The self-biased active transconductance enhancement amplifier shares the same DC bias voltage with the input stage via R0 to achieve self-biasing, and provides an impedance feedback adjustment path between the input and feedback terminals to improve gain flatness.

[0034] The original input matching inductor of the shared input stage is used as the output load of the self-biased active transconductance enhancement amplifier. No additional inductor components are needed. The increase in active device area and power consumption is limited, but the gain can be significantly improved and the gain can be controlled by controlling the size of the active device.

[0035] Figure 3 This is a schematic diagram of the circuit structure of a passive transconductance-enhanced differential amplifier circuit according to another exemplary embodiment of the present invention. Figure 2 Based on the architecture shown, the inter-stage matching and bias circuit 20 fine-tunes the circuit composition and connection relationship to achieve DC current sharing between the output stage and the input stage.

[0036] Specifically, the interstage matching and biasing circuit 20 consists of the first drain inductor L d1Interstage capacitor C1 and bias decoupling capacitor C gnd It is composed of components used to complete the interstage matching between the input amplifier module 10 and the output amplifier module 30, namely the matching of input impedance and output impedance, and the sharing of DC current between the input stage and the output stage.

[0037] The output of the input stage is connected to the first drain inductor L. d1 One end of the capacitor is connected to one end of the interstage capacitor C1, and the other end of the interstage capacitor C1 is connected to the input terminal of the output stage. The feedback terminal of the output stage is connected to the first drain inductor L. d1 The other end and the bias decoupling capacitor C gnd One end, bias decoupling capacitor C gnd One end is grounded.

[0038] In this embodiment, the output terminals of the differential input stage and the differential output stage are coupled by capacitors to achieve multi-signal link output, which enhances the transconductance of the equivalent output stage to a certain extent and further improves the output gain. The differential input stage and the differential output stage share the DC bias current, and the power consumption current reuse can save power consumption.

[0039] Figure 4 This is a schematic diagram of the circuit structure of a passive transconductance-enhanced differential amplifier circuit in another exemplary embodiment of the present invention. Figure 4 As shown, in Figure 2 Based on the architecture shown, the interstage matching and bias circuit 20 fine-tunes the circuit composition and connection relationship to achieve DC current sharing between the output stage and the input stage, and the self-biased transconductance enhancement amplifier 40 fine-tunes the connection relationship to achieve DC current sharing with the output stage.

[0040] Specifically, the interstage matching and biasing circuit 20 consists of the first drain inductor L d1 Interstage capacitor C1 and bias decoupling capacitor C gnd It is composed of components used to complete the interstage matching between the input amplifier module 10 and the output amplifier module 30, namely the matching of input impedance and output impedance, and the sharing of DC current between the input stage and the output stage.

[0041] Disconnect the second output and the third drain inductor L of the first input bias circuit g The connection will connect the third drain inductor L. g The disconnect point is connected to the feedback terminal of the output stage; the output terminal of the input stage is connected to the first drain inductor L. d1 One end of the capacitor is connected to one end of the interstage capacitor C1, and the other end of the interstage capacitor C1 is connected to the input terminal of the output stage. The feedback terminal of the output stage is connected to the first drain inductor L. d1 The other end and the bias decoupling capacitor C gnd One end and the third drain inductor L g One end, bias decoupling capacitor C gndOne end is grounded.

[0042] As can be seen, in this embodiment, the input stage and the self-biased active transconductance enhancement amplifier share the DC bias current with the output stage, and the power consumption current reuse can save power consumption.

[0043] like Figure 5 As shown in the figure, the lower curve Typical is the gain-frequency curve of the prior art, and the upper curve Novel is the gain-frequency curve of the present invention. The comparison shows that the self-biased active transconductance enhancement amplifier circuit achieves transconductance enhancement over a wider bandwidth without increasing power consumption, and the gain improvement is greater than 6dB.

[0044] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can make modifications and changes to the above embodiments without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the claims.

Claims

1. A self-biased active transconductance enhancement amplifier circuit, comprising: The input amplifier module is used to perform preliminary amplification of the radio frequency input signal; Interstage matching and biasing circuit, used to complete the interstage matching between the input amplification module and the output amplification module, and to DC bias the output terminal of the input amplification module; The output amplification module is used to further amplify the radio frequency input signal after it has been initially amplified by the input amplification module; A self-biased active transconductance enhancement amplifier is used to amplify the radio frequency input signal via bootstrapping and then transmit it to the input terminal of the input amplification module. The input amplification module includes a first input bias circuit, an input stage, and an input coupling capacitor (C). in The self-biased active transconductance enhancement amplifier includes a third drain inductor (L). g ), third bias resistor (R0), bootstrap output coupling capacitor (C0), and NMOS bootstrap amplifier transistor (M). g The NMOS bootstrap amplifier (M) g The drain of the third drain inductor (L) is connected to the drain inductor of the third drain inductor. g The first input bias circuit's second output terminal is connected to one end of the bootstrap output coupling capacitor (C0), the other end of the bootstrap output coupling capacitor (C0) is connected to the input stage, and one end of the third bias resistor (R0) is connected to the NMOS bootstrap amplifier transistor (M). g The source of the capacitor is grounded, and the gate is connected to the input coupling capacitor (C). in ) and the other end of the third bias resistor (R0).

2. The self-biased active transconductance enhancement amplifier circuit as described in claim 1, characterized in that: The amplifier circuit utilizes the self-biased active transconductance enhancement amplifier to amplify and couple the feedback signal of the input amplification module to the input terminal of the input amplification module, thereby increasing the equivalent effective input signal voltage amplitude and enhancing the equivalent transconductance, thus improving the gain.

3. The self-biased active transconductance enhancement amplifier circuit as described in claim 2, characterized in that: The self-biased active transconductance enhancement amplifier and the input amplification module share the same DC bias voltage through the third bias resistor (R0) to achieve self-biasing, and provide an impedance feedback adjustment path between the input terminal and the feedback terminal to improve gain flatness.

4. The self-biased active transconductance enhancement amplifier circuit as described in claim 3, characterized in that: The input amplification module also includes a first bias resistor (R1) and a feedback inductor (L). s The radio frequency input signal (RFin) is connected to the input coupling capacitor (C). in One end of the self-biased active transconductance enhancement amplifier, the input coupling capacitor (C) in The other end is connected to the feedback terminal of the input stage and the feedback inductor (L). s One end of the feedback inductor (L) s The other end of the circuit is grounded, the first output of the first input bias circuit is connected to one end of the first bias resistor (R1), and the other end of the first bias resistor (R1) is connected to the input of the input stage, the self-biased active transconductance enhancement amplifier.

5. The self-biased active transconductance enhancement amplifier circuit as described in claim 4, characterized in that: The interstage matching and biasing circuit includes a first drain inductor (L d1 The input stage output is connected to the first drain inductor (L) and the interstage capacitor (C1). d1 One end of the first drain inductor (L) and one end of the interstage capacitor (C1), and the first drain inductor (L) d1 The other end of the capacitor is connected to the power supply, and the other end of the interstage capacitor (C1) is connected to the output amplifier module.

6. The self-biased active transconductance enhancement amplifier circuit as described in claim 5, characterized in that: The output amplification module includes a second input bias circuit, an output stage, a second bias resistor (R2), and a second drain inductor (L). d2 The second input bias circuit is connected to the output stage and the output coupling capacitor (C2). The output terminal of the second input bias circuit is connected to one end of the second bias resistor (R2), and the other end of the second bias resistor (R2) is connected to the input terminal of the output stage and the other end of the interstage capacitor (C1). The output terminal of the output stage is connected to the second drain inductor (L). d2 One end of the output stage is connected to one end of the output coupling capacitor (C2), the feedback terminal of the output stage is grounded, and the other end of the output coupling capacitor (C2) is the RF output signal RFout terminal.

7. The self-biased active transconductance enhancement amplifier circuit as described in claim 4, characterized in that: The interstage matching and biasing circuit includes a first drain inductor (L d1 Interstage capacitance (C1) and bias decoupling capacitance (C) gnd The output of the input stage is connected to the first drain inductor (L). d1 One end of the capacitor (C1) and one end of the interstage capacitor (C1) are connected, the other end of the interstage capacitor (C1) is connected to the input terminal of the output stage of the output amplifier module, and the feedback terminal of the output stage is connected to the first drain inductor (L). d1 The other end of the bias decoupling capacitor (C) and the bias decoupling capacitor (C) gnd One end of the bias decoupling capacitor (C) gnd One end of the device is grounded.

8. The self-biased active transconductance enhancement amplifier circuit as described in claim 4, characterized in that: The interstage matching and biasing circuit includes a first drain inductor (Ld1), an interstage capacitor (C1), and a bias decoupling capacitor (Cgnd). The connection between the second output of the first input biasing circuit and the third drain inductor (Lg) is disconnected, and the disconnection point of the third drain inductor (Lg) is connected to the feedback terminal of the output stage of the output amplifier module. The output terminal of the input stage is connected to one end of the first drain inductor (Ld1) and one end of the interstage capacitor (C1). The other end of the interstage capacitor (C1) is connected to the input terminal of the output stage. The feedback terminal of the output stage is connected to the other end of the first drain inductor (Ld1), one end of the bias decoupling capacitor (Cgnd), and one end of the third drain inductor (Lg). One end of the bias decoupling capacitor (Cgnd) is grounded.

Images