On-chip heater with locally varying heat generating elements and method
By designing the heating element of the heater with different cross-sectional areas and applying different voltages, the problem of local thermal tuning on the chip was solved, and a uniform temperature distribution with local thermal tuning was achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- GLOBALFOUNDRIES US INC
- Filing Date
- 2022-03-04
- Publication Date
- 2026-07-24
Smart Images
Figure CN115209580B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to on-chip heaters and chip structures incorporating them, particularly to embodiments of on-chip heaters configured to generate different amounts of heat locally (i.e., generate different amounts of heat at different locations), embodiments of chip structures incorporating such heaters, and related method embodiments. Background Technology
[0002] On-chip heaters are commonly used to achieve desired temperature distributions in other on-chip components. For example, in on-chip optoelectronic circuits, some photonic devices (including, but not limited to, optical resonators and phase shifters) require thermal tuning. For instance, heaters can be used to thermally tune optical resonators to avoid temperature-dependent changes in resonant wavelengths, thereby preventing frequency response variations. Heaters can be used to thermally tune optical phase shifters to ensure the desired phase shift is achieved. However, as chip sizes continue to shrink and device densities increase, providing sufficient heaters for such thermal tuning becomes increasingly difficult. Summary of the Invention
[0003] Generally, embodiments of the chip structure disclosed herein include heaters configured to locally generate different amounts of heat (i.e., generate different amounts of heat at different locations). Specifically, the heater includes a heating element having a first end and a second end, and different portions with different cross-sectional areas located between the first end and the second end. The heater may also include a first terminal located at the first end of the heating element and configured to receive a first voltage, and a second terminal located at the second end of the heating element and configured to receive a second voltage different from the first voltage, so that current flows through the heating element from end to end. The current flowing through the heating element causes the heating element to generate heat. However, due to the different cross-sectional areas of the different portions, the current density flowing through the different portions is different; therefore, the different portions of the heating element generate different amounts of heat per unit length.
[0004] Such heaters (especially their heating elements) can be designed and arranged on a chip to facilitate localized thermal tuning of adjacent regions of the chip (e.g., different regions of a single device or different devices) without arranging multiple different heaters within a small chip area. More specifically, in some embodiments, the chip structure may also include devices requiring thermal tuning. The heater may be adjacent to the device. In this case, the different portions of the heating element may be aligned with different regions of the device. Due to the arrangement of the heating element relative to the device, and especially due to the alignment of the different portions of the heating element with the different regions of the device, different amounts of heat can be applied to the different regions of the device, thereby raising the temperature of these different regions by different amounts. In other embodiments, the chip structure may include multiple devices requiring thermal tuning, and the heater may be adjacent to two or more of these devices. In this case, the different portions of the heating element may be aligned with different devices. Due to the arrangement of the heating element relative to the device, and especially due to the alignment of the different portions of the heating element with the different devices, different amounts of heat can be applied to the different devices, thereby raising the temperature of these different devices by different amounts.
[0005] This document also discloses method embodiments related to the above-described structure. These method embodiments may include providing a chip structure including a heater configured to locally generate different amounts of heat (i.e., generate different amounts of heat at different locations). Specifically, as described above, the heater may include a heating element having a first end and a second end, and different portions with different cross-sectional areas located between the first end and the second end. The heater may also include a first terminal located at the first end of the heating element and a second terminal located at the second end of the heating element. These method embodiments may further include generating heat using the heater. Generating heat using the heater may include applying a first voltage to the first terminal and applying a second voltage different from the first voltage to the second terminal, causing current to flow from end to end through the heating element. The current flowing through the heating element causes the heating element to generate heat. However, due to the different cross-sectional areas of the different portions, the current density flowing through these different portions is different; therefore, the different portions of the heating element generate different amounts of heat per unit length. Method embodiments may include designing such heaters (in particular their heating elements) and fabricating the heaters on a chip to facilitate local thermal tuning of adjacent regions of the chip (e.g., different regions of a single device or different devices) without having to arrange multiple different heaters over a smaller chip area. Attached Figure Description
[0006] The invention will be better understood from the following detailed description with reference to the accompanying drawings, which are not necessarily drawn to scale, and wherein:
[0007] Figure 1 and Figure 2 It is a 3D view showing a traditional on-chip heater;
[0008] Figure 3A and Figure 3B This is a perspective view showing an alternative structure of a heater according to an embodiment disclosed herein, wherein the heater has a substantially linear heating element;
[0009] Figure 4A and Figure 4B This is a perspective view showing an alternative structure of a heater according to an embodiment disclosed herein, wherein the heater has a generally annular on-chip heating element;
[0010] Figure 5 This is a top view showing the structure of a heater according to an embodiment disclosed herein, wherein the heater has a meandering or serpentine on-chip heating element;
[0011] Figure 6 This is a perspective view showing the structure of a heater according to an embodiment disclosed herein, wherein the heater has a heating element that is substantially L-shaped;
[0012] Figure 7 and Figure 8 This is a perspective view showing an example chip structure according to embodiments disclosed herein, wherein on-chip heaters are configured for local thermal tuning of different regions of the on-chip device;
[0013] Figure 9 This is a perspective view showing an example chip structure according to embodiments disclosed herein, wherein on-chip heaters are configured for local thermal tuning of different on-chip devices; and
[0014] Figure 10 This is a flowchart showing an embodiment of the disclosed method. Detailed Implementation
[0015] As mentioned above, on-chip heaters are typically used to achieve the desired temperature distribution in other on-chip components. For example, in on-chip optoelectronic circuits, some photonic devices (including but not limited to resonators and phase shifters) require thermal tuning. Figure 1 and Figure 2 This is a perspective view showing conventional on-chip heaters 110 and 210. Each heater 110 and 210 includes heating elements 125 and 225. As shown, the shapes of heating elements 125 and 225 can be varied. For example, Figure 1 The heating element 125 is basically a linear heating element, while Figure 2The heating element 225 is basically a ring-shaped heating element. Regardless of their general shape, heating elements 125 and 225 are elongated structures with first ends 126 and 226 and second ends 127 and 227. The cross-sectional area of heating elements 125 and 225 is basically the same along their entire length. That is, the cross-sectional area at any point M along the length of heating elements 125 and 225 is area. M (a M The heights of heating elements 125 and 225 are basically the same and equal to those of the heating elements. M (h M Multiply by the width of the heating element M (w M Heaters 110 and 210 may further include first terminals 111 and 211 located at first ends 126 and 226 of heating elements 125 and 225, and second terminals 112 and 212 located at second ends 127 and 227 of heating elements 125 and 225. Different voltages applied to these terminals cause current to flow through the heating elements, and the current flowing through the heating elements 125 and 225 causes the heating elements 125 and 225 to generate the same amount of heat per unit length along their entire length.
[0016] Unfortunately, as chip sizes continue to shrink and device densities increase, providing sufficient heaters for thermal tuning becomes increasingly difficult. Specifically, thermal tuning typically involves using heaters to raise the temperature of one or more devices to a predetermined temperature. For example, the thermal tuning objective of an optical resonator might be to raise the temperature of a ring waveguide to a predetermined temperature to obtain the desired frequency response. In this case, a heater with a ring heating element (e.g., in…) would be used… Figure 2 The heater 210 (shown as having a ring heating element 225) is aligned above and close to the ring waveguide. A predetermined voltage difference is applied between terminals 211-212 to allow a predetermined amount of current to flow through the heating element 225, thus generating a predetermined amount of heat per unit length along the entire length of the heating element. Given the arrangement of the heating element relative to the waveguide, the heat generated by the heating element is applied to the waveguide, and the temperature of the waveguide is uniformly increased (i.e., increased by the same amount along the waveguide). However, as device density increases, localized temperature variations may exist within the waveguide before thermal tuning (e.g., due to the arrangement adjacent to other on-chip devices, such as other ring waveguides within the optical resonator). For the heating element 225, such temperature variations will persist after thermal tuning. That is, given these localized temperature variations, increasing the temperature by the same amount along the waveguide will not result in a uniform temperature distribution along the waveguide.
[0017] In view of the foregoing, embodiments of a chip structure including a heater are disclosed herein. The heater includes a heating element having a first end and a second end, and different portions with different cross-sectional areas located between the first end and the second end. The heater also includes a first terminal located at the first end of the heating element and a second terminal located at the second end of the heating element. Applying different voltages to these terminals causes current to flow through the heating element. The current flowing through the heating element generates heat. However, due to the different cross-sectional areas of the different portions, the current density flowing through these different portions is different; therefore, the different portions of the heating element generate different amounts of heat per unit length. The heater (especially its heating element) can be designed and arranged on a chip to facilitate localized thermal tuning of adjacent regions of the chip (e.g., different regions of a single device or different devices) without arranging multiple different heaters within a small chip area. Related method embodiments are also disclosed herein.
[0018] In particular, embodiments of a chip structure disclosed herein include heaters configured to locally generate different amounts of heat (i.e., generate different amounts of heat at different locations). The heater may include a heating element. Specifically, the heating element may be a resistor made of any suitable conductive material through which current can flow and be converted into heat energy. For example, the heating element may be a resistor made of metal or metal alloy. For example, the heating element may be a patterned metal or metal alloy line located in one of the back end of the line (BEOL) metal layers. Alternatively, the heating element may be a resistor made of a doped semiconductor material. For example, the heating element may be patterned and doped polycrystalline silicon or a silicon shape. Figures 3A-6 This shows an example on-chip heater that can be included in the disclosed chip structure. Specifically, Figure 3A and Figure 3B These are perspective views showing alternative structures of heater 310 having a substantially linear heating element 325. Figure 4A and Figure 4B These are perspective views showing alternative structures of heaters 410 having on-chip heating elements 425 that are generally annular. Figure 5 This is a top view showing the structure of the heater 510 with a meandering or serpentine on-chip heating element 525. Figure 6 This is a perspective view showing the structure of a heater 610 having a heating element 625 that is basically L-shaped.
[0019] In all such heaters, heating elements 325, 425, 525, and 625 can be elongated structures having first ends 326, 426, 526, and 626 and second ends 327, 427, 527, and 627. Furthermore, between the first ends 326, 426, 526, and 626 and the second ends 327, 427, 527, and 627, heating elements 325, 425, 525, and 625 can have two or more different portions with two or more different cross-sectional areas. For example, as... Figures 3A-6 As shown, each heating element 325, 425, 525, 625 may have at least one first portion 3011, 4011, 5011, 6011 connected in series between the first end and the second end, and at least one second portion 3012, 4012, 5012, 6012. At point RR in each first portion, the first portion may have a first cross-sectional area (a R ), which is equal to the height of the first part at point RR. R (h R Multiply by the width of the first part. R (w R Furthermore, at point SS in this second part, the second part may have a second cross-sectional area (a S ), which is larger than the area of the first cross-section (a R ), and equal to the height of the second part at point SS. S (h S Multiply by the width of the second part. S (w S ).
[0020] It should be noted that, depending on the specific application and the need to generate more than two different types of heat locally, the heating element may include elements having different characteristics than a. R and a S The additional portion of the cross-sectional area, as described above. For example, the heating element may also include at least one third portion also connected in series between the first end and the second end (e.g., see...). Figure 3B The third part 3013 of the heating element 325 of the heater 310 shown in the image. Figure 4B The heater 410 shown in the image has a heating element 425 in a third portion 4013. At point TT in this third portion, the third portion may have a third cross-sectional area (a T ), which is larger than the area of the first cross-section (a R ), smaller than the area of the second cross-section (a S ), and equal to the height of the third part at point TT. T (h T Multiply by the width of the third part.T (w T ).
[0021] Optionally, the cross-sectional area of the heating element may gradually decrease at points in any transition region of the heating element between a larger portion and an adjacent smaller portion (e.g., between a second portion and an adjacent first portion, etc.). See also Figures 3A-3B The cone-shaped region 305 in the middle, Figures 4A-4B The cone-shaped region 405 in the middle, and Figure 5 The conical region 505 in the middle. Alternatively, the patterning of the heating element can be such that there is no transition region between the larger and smaller portions.
[0022] Heaters 310, 410, 510, and 610 may further include first terminals 311, 411, 511, and 611 located at first ends 326, 426, 526, and 626 of heating elements 325, 425, 525, and 625. Specifically, the first terminals 311, 411, 511, and 611 may be, for example, contacts or conductive vias, landing on the first ends 326, 426, 526, and 626 of heating elements 325, 425, 525, and 625 and further electrically connected to a first voltage source (not shown). Therefore, the first terminals 311, 411, 511, and 611 may be configured to receive a first voltage from the first voltage source and apply the first voltage to the first ends 326, 426, 526, and 626 of heating elements 325, 425, 525, and 625.
[0023] Heaters 310, 410, 510, and 610 may further include second terminals 312, 412, 512, and 612 located at the second ends 327, 427, 527, and 627 of heating elements 325, 425, 525, and 625. Specifically, the second terminals 312, 412, 512, and 612 may be, for example, contacts or conductive vias, landing on the second ends 327, 427, 527, and 627 of heating elements 325, 425, 525, and 625 and further electrically connected to a second voltage source (not shown). Therefore, the second terminals 312, 412, 512, and 612 may be configured to receive a second voltage from the second voltage source and apply the second voltage to the second ends 327, 427, 527, and 627 of heating elements 325, 425, 525, and 625.
[0024] The first and second voltage sources can be configured to apply different voltages to different terminals of heating elements 325, 425, 525, and 625, such that current flows from end to end through the heating elements 325, 425, 525, and 625. Those skilled in the art will recognize that the direction and flow rate of the current (e.g., from the first terminal to the second terminal or from the second terminal to the first terminal) will depend on the voltage difference. In any case, the current flowing through heating elements 325, 425, 525, and 625 will generate heat in the heating elements. However, due to the different cross-sectional areas of these different portions, the current density flowing through these different portions will be different, and therefore, these different portions of the heating element will generate different amounts of heat per unit length. More specifically, the current density flowing through the portion with the larger cross-sectional area will be less than the current density flowing through the portion with the smaller cross-sectional area. Therefore, the portion with the larger cross-sectional area will generate less heat per unit length compared to the portion with the smaller cross-sectional area.
[0025] In example heating elements 325, 425, 525, and 625, due to the first cross-sectional area (a) associated with each first portion 3011, 4011, 5011, and 6011, R The area of the second profile associated with each of the second parts 3012, 4012, 5012, and 6012 is less than (a S Therefore, the first current density flowing through each of the first portions 3011, 4011, 5011, and 6011 will be greater than the second current density flowing through each of the second portions 3012, 4012, 5012, and 6012. Consequently, each of the first portions 3011, 4011, 5011, and 6011 will generate a first heat per unit length, and each of the second portions 3012, 4012, 5012, and 6012 will generate a second heat per unit length less than the first heat. This includes the area between the cross-sectional area a. R With a S The third cross-sectional area between (a) T The relevant third part (for example, see the third part) Figure 3B Part 3013 or Figure 4B In the example heating element of the third part (4013), the third current density flowing through the third part will be less than the first current density flowing through each of the first parts, and greater than the second current density flowing through each of the second parts. Therefore, each third part will generate a third heat per unit length between the first and second amounts.
[0026] It should be noted that the above details and separate sections Figures 3A-3B , Figures 4A-4B , Figure 5 and Figure 6The heater structure shown illustrates key features of the invention (e.g., different portions of the heater's heating element have different cross-sectional areas to locally generate different amounts of heat) and shows that such heating elements can have any of a variety of different shapes to form different current paths. That is, the shape of the heating element defines the path of current flow between the terminals. For example, in Figure 3A or Figure 3B In the heating element 325 of the heater 310, the current path between terminals 311 and 312 is straight (that is, essentially linear). Figure 4A or Figure 4B In the heating element 425 of the heater 410, the current path between terminals 411 and 412 is approximately circular or annular. Figure 5 In the heating element 525 of the heater 510, the current path between terminals 511 and 512 is meandering. It should be understood that the heating element may have other shapes (e.g., spiral, U-shaped, etc.) to define other current paths (e.g., spiral current path, U-shaped current path, etc.).
[0027] The aforementioned heaters (especially their heating elements) can be designed and arranged on a chip to facilitate local thermal tuning of adjacent regions of the chip (e.g., local thermal tuning of different regions of a single device on the chip, or, alternatively, local thermal tuning of multiple devices) without arranging multiple different heaters within a small chip area. The one or more devices can be any type of on-chip device, wherein performance characteristics are enhanced or modulated through thermal tuning. The one or more devices can be photonic devices (e.g., waveguides, couplers, resonators, modulators, filters, etc.), optoelectronic devices (e.g., photodiodes, phototransistors, light-emitting diodes, etc.), or electronic devices (e.g., diodes, transistors, etc.). Such devices are well known in the art, and therefore, their details are omitted from this specification to allow the reader to focus on the salient features of the disclosed embodiments. The one or more devices can be active or passive devices. If / when multiple devices are to be heated by the same heater, these devices can be any combination of photonic, optoelectronic, electronic, active, or passive devices. The one or more devices may be semiconductor devices comprising any one of silicon (Si), germanium (Ge), gallium (Ga), arsenic (As), nitrogen (N), or alloys thereof, or any other suitable material for semiconductor devices. The design of the heating element will be determined by the specific chip design, particularly by the shape, arrangement, and thermal tuning requirements of the one or more devices to be heated by the heater. Furthermore, the heater will be arranged adjacent to each other so that different portions of the heater can apply different amounts of heat to different areas of the device or to different devices. For illustrative purposes, the figures show the heater aligned with and positioned above the one or more devices to be thermally tuned. However, it should be understood that these figures are not intended to be limiting; alternatively, the heater may be positioned to the side (i.e., on the same layer) or below the one or more devices to be thermally tuned. For example, the heating element may be a resistor embedded in a substrate beneath the one or more devices to be thermally tuned, a resistor located on the same device layer as the one or more devices to be tuned, or a resistor located in a metal layer surrounding the one or more devices to be tuned.
[0028] Figure 7 and Figure 8 These are perspective views showing example chip structures 700 and 800, respectively. Each chip structure includes a device 701 or 801 that requires thermal tuning, and a heater having a heating element adjacent to the device (e.g., above the device) and configured to facilitate local thermal tuning of different regions of the device 701 or 801.
[0029] More specifically, Figure 7Display chip structure 700 includes a substrate 799 and various manufacturing layers on the substrate 799, including but not limited to a front end of the line (FEOL) device layer, a middle of the line (MOL) contact layer, and a back end of the line (BEOL) metal layer. Transparent planes 721 and 722 represent two distinct manufacturing layers. These two distinct manufacturing layers may be, for example: a device layer 721, including one or more devices (discussed in more detail below); and a metal layer 722, located a distance above the device layer 721 and including heaters (discussed in more detail below). It should be noted that, to allow the reader to focus on the significant features of the disclosed embodiments (especially regarding the alignment of devices and heaters), all other manufacturing layers (e.g., any layers located above, below, or between layers 721-722) have been omitted from these figures.
[0030] The chip structure 700 may also include two or more devices located in device hierarchy 721, including device 701 and additional device 702. Device 701 may be a substantially linear optical waveguide or some other linear device that requires thermal tuning to obtain a predetermined temperature and a uniform temperature distribution (e.g., a predetermined temperature of the same length along device 701). Device 701 may also have two regions: a first region 7101 and a second region 7102. The additional device 702 (e.g., another optical waveguide or some other heat-generating device) may be positioned close to (e.g., within a distance (d)) the second region 7102 of device 701 such that the first pre-thermal tuning temperature of the first region 7101 of device 701 is less than the second pre-thermal tuning temperature of the second region 7102. That is, due to the arrangement of the additional device 702 relative to the second region 7102 of device 701, there is a temperature variation in the first and second regions of device 701 before any thermal tuning. It should be noted that, in order to allow the reader to focus on the significant features of the disclosed embodiments (especially regarding the alignment of the device with the heater), additional features of device level 721 have been omitted from these figures. For example, these additional device level features may include, but are not limited to, other devices, one or more cladding material layers (e.g., covering any waveguide), side gap walls, one or more dielectric material layers (e.g., covering all devices), etc.
[0031] The chip structure 700 may also include a heater located in the metal layer 722. For example, the chip structure 700 may include the components described in detail above and... Figure 3AAn example of heater 310 is shown. In this chip structure 700, the heating element 325 of heater 310 and device 701 may have approximately the same length, and heater 310 may be arranged such that heating element 325 is aligned with device 701. Furthermore, heating element 325 may include different portions with different cross-sectional areas, and these different portions may be aligned with different regions of device 701 having different temperature distributions. That is, heating element 325 may include a portion of a first region 7101 adjacent to device 701 having a first cross-sectional area (a R The first portion 3011, and the second region 7102 adjacent to the hotter operating device 701, have a larger cross-sectional area than the first section (a R The second cross-sectional area (a) S The second part 3012. In this case, the different portions 3011 and 3012 of the heating element 325 can be configured such that the different heat generated by the different portions of the heating element 325 and applied to different regions 7102-7102 of the device 701 is sufficient to achieve a predetermined temperature and a uniform temperature distribution (e.g., the same predetermined temperature along the length of the device 701). It should be noted that additional features of the metal layer 722 have been omitted from the figures to allow the reader to focus on the significant features of the disclosed embodiments (especially regarding the alignment of the device and the heater). For example, in the metal layer 722, the heating element 325 may be formed in trenches that have been patterned as one or more interlayer dielectric (ILD) material layers, and may also be covered by one or more ILD material layers. In any case, the chip structure 700 may be configured such that the material and the distance between the heating element and the device ensure that the device is thermally coupled but electrically isolated from the heating element.
[0032] Similarly, Figure 8 Display chip structure 800 includes a substrate 899 and various manufacturing layers on the substrate 899, including but not limited to a front-end process (FEOL) device layer, a middle process (MOL) contact layer, and a back-end process (BEOL) metal layer. Transparent planes 821 and 822 represent two distinct manufacturing layers. These two distinct manufacturing layers may be, for example: a device layer 821, including one or more devices (discussed in more detail below); and a metal layer 822, located a distance above the device layer 821 and including heaters (discussed in more detail below). It should be noted that, to allow the reader to focus on the significant features of the disclosed embodiments (especially regarding the alignment of devices and heaters), all other manufacturing layers (e.g., any layers located above, below, or between layers 821-822) have been omitted from these figures.
[0033] Chip structure 800 may include an optical resonator 880 located in device level 821. Optical resonator 880 may include two or more ring waveguides (e.g., see first, second, and third ring waveguides 801(1)-801(3)) and a linear waveguide 802 adjacent to the ring waveguides 801(1)-801(3). Each ring waveguide 801(1)-801(3) requires thermal tuning to a predetermined temperature and a uniform temperature distribution (e.g., a predetermined temperature at the same length along the ring waveguide). In this example, each ring waveguide 801(1)-801(3) has different pre-tune temperature variations in different regions due to its proximity to other ring waveguides (e.g., within a distance (d)). It should be noted that additional features of device level 821 have been omitted from these figures to allow the reader to focus on the significant features of the disclosed embodiments (particularly regarding device and heater alignment). For example, these additional device-level features may include, but are not limited to, other devices, one or more cladding material layers (e.g., covering the waveguide), side gap walls, one or more dielectric material layers (e.g., covering all devices), etc.
[0034] The chip structure 800 may also include two or more heaters located in the metal layer 822 for the two or more ring waveguides. For example, the chip structure 800 may include in Figure 4A or Figure 4B Several examples of heaters 410 shown and described above (e.g., see first, second, and third heaters 410(1)-410(3)). In this chip structure 800, each heater 410(1)-410(3) may be arranged such that heating elements 425 are aligned with corresponding ring waveguides 801(1)-810(3). Heating elements 425 may include different portions with different cross-sectional areas, and these different portions may be adjacent to different regions of the lower ring waveguide with different temperature distributions. That is, in the first heater 410(1), heating element 425 may include a first region adjacent to the first ring waveguide 801(1) with a first cross-sectional area (a R The first portion 4011, and the second region adjacent to the first ring waveguide 801(1) (which operates hotter due to its proximity to the second ring waveguide 801(2)) have a larger cross-sectional area than the first section area (a R The second cross-sectional area (a) S The second part 4012. In the second heater 410(2), the heating element 425 may include a first region adjacent to the second annular waveguide 801(2) having a first cross-sectional area (a R The first part 4011, and the second region adjacent to the second ring waveguide 801(2) (which operates hotter due to proximity to the first and third ring waveguides 801(1) and 801(3)) have a larger cross-sectional area than the first section (a RThe second cross-sectional area (a) S The second part 4012. In the third heater 410(3), the heating element 425 may include a first region adjacent to the third annular waveguide 801(3) having a first cross-sectional area (a R The first part 4011, and the second region adjacent to the third ring waveguide 801(3) (which operates hotter due to its proximity to the second ring waveguide 801(2)) have a larger cross-sectional area than the first section (a R The second cross-sectional area (a) S The second part 4012. In each heater 410(1)-410(3), due to the arrangement of the heating element relative to the lower annular waveguide, and especially due to the alignment of the different portions of the heating element with the different regions of the lower waveguide, different amounts of heat can be applied to the different regions of the lower waveguide, thereby raising the temperature of these regions by different amounts. Therefore, in each heater 410(1)-410(3), the different portions 4011 and 4012 of the heating element 425 can be configured such that the different amounts of heat generated by the different portions of the heating element 425 and applied to the different regions of the lower annular waveguide are sufficient to achieve a predetermined temperature and a uniform temperature distribution (e.g., a predetermined temperature of the same length along the annular waveguide). It should be noted that additional features of the metal layer 822 have been omitted from these figures to allow the reader to focus on the significant features of the disclosed embodiments (especially regarding the alignment of the device with the heater). For example, in metal layer 822, heating elements 425 of heaters 410(1)-410(3) may be formed in corresponding trenches that have been patterned as one or more interlayer dielectric (ILD) material layers, and may also be covered by one or more ILD material layers. In any case, chip structure 800 may be configured such that the material and the distance between the one or more ring waveguides and the one or more heating elements ensure that each ring waveguide is thermally coupled but electrically isolated from the heating element.
[0035] Figure 9This is a perspective view of an example chip structure 900, which includes multiple devices requiring thermal tuning, and heaters having heating elements adjacent to (e.g., above) the devices and configured to facilitate localized thermal tuning. Specifically, chip structure 900 may include a substrate 999, and various manufacturing levels on the substrate 999, including but not limited to a front end of the line (FEOL) device level, a middle of the line (MOL) contact level, and a back end of the line (BEOL) metal level. Transparent planes 921 and 922 represent two distinct manufacturing levels. These two distinct manufacturing levels may be, for example: a device level 921, including one or more devices (discussed in more detail below); and a metal level 922, located a distance above the device level 921 and including the heaters (discussed in more detail below). It should be noted that, in order to allow the reader to focus on the significant features of the disclosed embodiments (especially regarding the alignment of the device with the heater), all other manufacturing layers (e.g., any layers above, below, or in between layers 921-922) have been omitted from these figures.
[0036] Chip structure 900 may include two or more devices located within device hierarchy 921, including a first device 901 and a second device 902 adjacent to the first device 901. It should be noted that additional features of device hierarchy 921 have been omitted from these figures to allow the reader to focus on the significant features of the disclosed embodiments (particularly regarding device alignment with the heater). For example, these additional device hierarchy features may include, but are not limited to, other devices, one or more cladding material layers (e.g., covering any waveguide), sidewalls, one or more dielectric material layers (e.g., covering all devices), etc.
[0037] The chip structure 900 may also include a heater located within the metal layer 922. For example, the chip structure 900 may include the components detailed above and... Figure 3A An example of heater 310 is shown. In this chip structure 900, the heating element 325 of heater 310 can be arranged such that the heating element 325 extends above the first device 901 and the second device 902. Furthermore, the heating element 325 may include different portions with different cross-sectional areas, and these different portions may be aligned with the different devices 901 and 902. That is, the heating element 325 may include a portion adjacent to the first device 901 having a first cross-sectional area (a R The first part 3011, and the adjacent part of the second device 902 having a larger cross-sectional area than the first cross-section (a R The second cross-sectional area (a) SThe second part 3012. Due to the arrangement of the heating element relative to the different devices 901-902, and especially due to the alignment of the different portions of the heating element with the different devices, different heat can be applied to the different devices, thereby raising the temperature of the different devices 901-902 by different amounts. In this case, the different portions 3011 and 3012 of the heating element 325 can be configured to thermally tune to result in the same or different predetermined temperature distributions in the different devices 901-902. It should be noted that additional features of the metal layer 922 have been omitted from the figures to allow the reader to focus on the significant features of the disclosed embodiments (especially regarding the alignment of the device with the heater). For example, in the metal layer 922, the heating element 325 may be formed in trenches that have been patterned as one or more interlayer dielectric (ILD) material layers, and may also be covered by one or more ILD material layers. In any case, the chip structure 900 may be configured such that the material and the distance between the heating element and the device ensure that the device is thermally coupled but electrically isolated from the heating element.
[0038] Again, it should be understood that these figures are not intended to be limiting. Although Figures 7-9 One or more heaters are located in a metal layer and aligned above one or more devices in a device layer. Alternatively, the heater may be positioned to the side (i.e., in the same layer) or below the one or more devices to be thermally tuned. For example, the heating element may be a resistor embedded in a substrate beneath the one or more devices to be thermally tuned, a resistor in the same device layer as the one or more devices to be tuned, or a resistor in a metal layer surrounding the one or more devices to be tuned. In any case, those skilled in the art will appreciate that such chip structures may also include a temperature control system with one or more on-chip temperature sensors, a voltage source, and a controller communicating with the on-chip temperature sensors and the voltage source. In such systems, the actual temperature at the location requiring thermal tuning can be sensed periodically or continuously by the sensors, and based on this actual temperature, the controller can cause the voltage source to selectively adjust the voltage difference between the first and second terminals of the heater, thereby regulating the current and the heat generated by the different portions of the heating element to maintain a specific temperature distribution in the one or more devices thermally tuned using the heater.
[0039] Reference Figure 10The flowcharts and method embodiments related to the above structures are also disclosed herein. Method embodiments may include performing thermal modeling on a device requiring thermal tuning (or, alternatively, on multiple devices requiring thermal tuning) (see process step 1002). The one or more devices may be any type of on-chip device, wherein performance characteristics are enhanced or adjusted through thermal tuning. The one or more devices may be photonic devices (e.g., waveguides, couplers, resonators, modulators, filters, etc.), optoelectronic devices (e.g., photodiodes, phototransistors, light-emitting diodes, etc.), or electronic devices (e.g., diodes, transistors, etc.). The one or more devices may be active or passive devices. The one or more devices may be semiconductor devices comprising any one of silicon (Si), germanium (Ge), gallium (Ga), arsenic (As), nitrogen (N), or alloys thereof, or any other suitable material for semiconductor devices. Such devices are well known in the art, and therefore, details thereof are omitted from this specification to allow the reader to focus on the salient features of the disclosed embodiments. In any case, such thermal simulations can be performed, for example, to predict the operating temperature of individual devices and to predict any temperature changes that may occur within the device (e.g., due to proximity to other on-chip devices). Techniques for thermal simulation are well known in the art, and therefore, their details are omitted from this specification to allow the reader to focus on the salient features of the disclosed embodiments.
[0040] The method may further include, based on the results of the thermal simulation, designing an on-chip heater to perform local thermal tuning of adjacent regions of the chip (see process step 1004). For example, the on-chip heater may be designed to perform local thermal tuning of different regions of a single device (or, alternatively, to perform local thermal tuning of different devices). As detailed above regarding the chip structure embodiments, the on-chip heater may be specifically designed to include heating elements (e.g., resistors) configured to locally generate different amounts of heat (i.e., generate different amounts of heat at different locations). That is, as described above and in Figures 3A-3B Figure 4 Figure 5 or Figure 6 As shown, such a heater may include a heating element having a first end and a second end, and different portions with different cross-sectional areas located between the first end and the second end, such that the current density flowing through the different portions will be different, and therefore the heat per unit length generated by the different portions will be different. The heater may also include a first terminal located at the first end of the heating element and a second terminal located at the second end of the heating element. The design of the heating element will be determined by the specific chip design, particularly by the shape, arrangement, and thermal tuning requirements of the one or more devices to be heated by the heater.
[0041] The method may also include manufacturing a chip including the heater and adjacent devices to be thermally tuned using the heater (or, alternatively, multiple devices to be thermally tuned using the heater) (see process step 1006). Specifically, in process step 1006 during chip manufacturing, the heater may be manufactured such that different portions of the heating element having different cross-sectional areas are adjacent to different regions of the device that will require different amounts of heat during thermal tuning (or, alternatively, that different portions of the heating element having different cross-sectional areas are adjacent to different devices that will require different amounts of heat during thermal tuning). For illustrative purposes, the heater is shown in the figures aligned with and positioned above the one or more devices to be thermally tuned. However, it should be understood that these figures are not intended to be limiting; alternatively, the heater may be positioned to the side (i.e., at the same level) or below the one or more devices to be thermally tuned. For example, the heating element may be a resistor embedded in a substrate beneath the one or more devices to be tuned, a resistor located in the same device layer as the one or more devices to be tuned, or a resistor located in a metal layer surrounding the one or more devices to be tuned.
[0042] This method embodiment may also include using the heater to perform localized thermal tuning of the different portions of the device (or, alternatively, the different devices) (see process step 1008). Specifically, process step 1008 may include applying a first voltage to the first terminal and a second voltage different from the first voltage to the second terminal to allow current to flow through the heating element. The current flowing through the heating element causes the heating element to generate heat. However, due to the different cross-sectional areas of the different portions of the heating element, the current density flowing through the different portions is different, therefore, the different portions of the heating element generate different amounts of heat per unit length. Generating heat using the heater can be performed to raise the temperature of the different regions of the device (or, alternatively, the different devices) by different amounts due to the different amounts of heat generated per unit length by the different portions of the heating element. Raising the temperature of the different regions of the device (or, alternatively, the different devices) by different amounts can, for example, be performed to obtain a substantially uniform temperature distribution over the different regions of the device (or, alternatively, the different devices). Alternatively, the temperature of the different regions of the device (or, alternatively, the different devices) can be increased by different amounts to obtain different temperature distributions in the different regions of the device (or, alternatively, the different devices).
[0043] The method described above is used for the manufacture of integrated circuit chips. Manufacturers can distribute the resulting integrated circuit chips in raw wafer form (i.e., as a single wafer with multiple unpackaged chips), as a bare die, or in a packaged form. In the latter case, the chip is housed in a single-chip package (e.g., a plastic carrier with pins attached to a motherboard or other higher-level carrier) or a multi-chip package (e.g., a ceramic carrier with single-sided or double-sided interconnects or embedded interconnects). In either case, the chip is then integrated with other chips, discrete circuit elements, and / or other signal processing devices as part of (a) an intermediate product, such as a motherboard, or as part of (b) a final product. The final product can be any product including the integrated circuit chip, ranging from toys and other low-end applications to advanced computer products with displays, keyboards or other input devices, and central processing units.
[0044] It should be understood that the terminology used herein is for the purpose of describing the disclosed structures and methods and is not intended to be limiting. For example, unless the context clearly indicates otherwise, the singular forms "a" and "the" as used herein are also intended to include the plural forms. Furthermore, the term "comprising" as used herein indicates the presence of the stated feature, integral, step, operation, element, and / or component, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof. Moreover, terms used herein such as "right," "left," "vertical," "horizontal," "top," "bottom," "above," "below," "parallel," and "vertical" are intended to describe their relative positions when oriented and shown in the figures (unless otherwise indicated), and terms such as "contact," "direct contact," "adjacent," "directly adjacent," and "closely adjacent" are intended to indicate that at least one element is in physical contact with another element (without any other element separating the elements). The term "lateral" as used herein describes the relative positions of the elements when oriented and shown in the figures, particularly indicating that one element is located to the side of another element rather than above or below it. For example, an element laterally adjacent to another element will be next to that other element; an element laterally close to another element will be directly next to that other element; and an element laterally surrounding another element will be adjacent to and encircle the outer wall of that other element. All the manner or steps in the following claims, along with the corresponding structure, material, action, and equivalent diagram of the functional element, include any structure, material, or action that performs the function in combination with other claimed elements specifically claimed.
[0045] The descriptions of various embodiments of the invention are for illustrative purposes only and are not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the embodiments. The terminology used herein has been chosen to best explain the principles of the embodiments, their practical application, or improvements upon technical techniques known in the market, or to enable those skilled in the art to understand the embodiments disclosed herein.
Claims
1. An integrated circuit chip structure, characterized in that, include: An optical resonator, comprising multiple ring waveguides; At least one heater is located above the corresponding ring waveguide, and the at least one heater includes: A heating element has a first end and a second end, and different portions located between the first end and the second end having different cross-sectional areas aligned with different regions of a corresponding ring waveguide, wherein the different portions of the heating element are configured to raise the temperature of the different regions of the corresponding ring waveguide by different amounts, and wherein the different portions of the heating element are configured such that raising the temperature by the different amounts results in a substantially uniform temperature distribution in the different regions of the corresponding ring waveguide. A first terminal, located at the first terminal and configured to receive a first voltage; and A second terminal is located at the second end and configured to receive a second voltage different from the first voltage, so that current flows through the heating element, wherein the first terminal and the second terminal are located above the optical resonator.
2. The integrated circuit chip structure as described in claim 1, characterized in that, The different portions include at least: a first portion having a first cross-sectional area; and a second portion having a second cross-sectional area larger than the first cross-sectional area, such that a first current density flowing through the first portion is greater than a second current density flowing through the second portion, and Wherein, since the first current density is greater than the second current density, the first part generates a first heat per unit length and the second part generates a second heat per unit length that is less than the first heat per unit length.
3. The integrated circuit chip structure as described in claim 1, characterized in that, The heating element comprises any one of metal, metal alloy, and doped semiconductor.
4. The integrated circuit chip structure as described in claim 1, characterized in that, The heating element provides a linear current path between the first terminal and the second terminal.
5. The integrated circuit chip structure as described in claim 1, characterized in that, The heating element provides a nonlinear current path between the first terminal and the second terminal.
6. The integrated circuit chip structure as described in claim 1, characterized in that, It also includes multiple devices, including any one of semiconductor devices, photonic devices, optoelectronic devices, and electronic devices.
7. The integrated circuit chip structure as described in claim 1, characterized in that, The heating element has a serpentine shape.
8. The integrated circuit chip structure as described in claim 1, characterized in that, It also includes an additional heating element adjacent to the heating element, the additional heating element having a first end and a second end, and different portions with different cross-sectional areas located between the first end and the second end. The first and second portions of the additional heating element are configured to raise the temperature of the first and second regions of different devices or the different regions of a single device by different amounts, thereby achieving a substantially uniform temperature distribution in the first and second regions of different devices or the different regions of a single device.
9. An integrated circuit chip structure, characterized in that, include: An optical resonator, comprising multiple ring waveguides; as well as Multiple heaters, each located above a corresponding ring waveguide, and each heater includes: The heating element includes: a first end and a second end, and different portions with different cross-sectional areas located between the first end and the second end and aligned with different regions of the corresponding annular waveguide; A first terminal, located at the first terminal and configured to receive a first voltage; and A second terminal, located at the second end and configured to receive a second voltage different from the first voltage, to allow current to flow through the heating element, wherein the first terminal and the second terminal are located above the optical resonator. The different portions include at least a first portion having a first cross-sectional area; and a second portion having a second cross-sectional area larger than the first cross-sectional area, such that a first current density flowing through the first portion is greater than a second current density flowing through the second portion. Wherein, because the first current density is greater than the second current density, the first part generates a first amount of heat per unit length, and the second part generates a second amount of heat per unit length that is less than the first amount of heat per unit length. Each ring waveguide has a first region having a first pre-thermal tuning temperature aligned below the first portion of its corresponding heating element, and a second region having a second pre-thermal tuning temperature aligned below the second portion of the same heating element. Each waveguide has a neighboring waveguide that is closer to the second region than the first region, and therefore, the second pre-thermal tuning temperature of the second region is greater than the first pre-thermal tuning temperature of the first region. The first and second portions of each heating element are configured to raise the temperature of the first and second regions by different amounts, thereby achieving a substantially uniform temperature distribution in the first and second regions of the plurality of ring waveguides.
10. The integrated circuit chip structure as described in claim 9, characterized in that, The heating element can be any one of metal, metal alloy, or semiconductor.
11. The integrated circuit chip structure as described in claim 9, characterized in that, The heating element has a serpentine shape.
12. The integrated circuit chip structure as described in claim 9, characterized in that, It also includes linear waveguides that are laterally adjacent to the plurality of ring waveguides.
13. A method for thermal tuning of adjacent regions on an integrated circuit chip structure, the method comprising: A chip structure is provided, the chip structure including an optical resonator and at least one heater. The optical resonator includes a plurality of ring waveguides, the at least one heater being located above respective ring waveguides, and the at least one heater including: a heating element having a first end and a second end, and different portions having different cross-sectional areas aligned with different regions of the respective ring waveguides between the first end and the second end, wherein the different portions of the heating element are configured to raise the temperature of the different regions of the respective ring waveguides by different amounts, and wherein the different portions of the heating element are configured such that raising the temperature by the different amounts results in a substantially uniform temperature distribution in the different regions of the respective ring waveguides; a first terminal located at the first end; and a second terminal located at the second end, wherein the first terminal and the second terminal are located above the optical resonator; and The heater generates heat, wherein generating the heat includes: applying a first voltage to the first terminal and applying a second voltage different from the first voltage to the second terminal to allow current to flow through the heating element, wherein, due to the different cross-sectional areas, when the current flows through the different portions of the heating element, the different portions locally generate different amounts of heat per unit length.
14. The method as described in claim 13, characterized in that, The different portions include at least: a first portion having a first cross-sectional area; and a second portion having a second cross-sectional area larger than the first cross-sectional area, such that a first current density flowing through the first portion is greater than a second current density flowing through the second portion, and Wherein, since the first current density is greater than the second current density, the first part generates a first heat per unit length and the second part generates a second heat per unit length that is less than the first heat per unit length.
15. The method as described in claim 13, characterized in that, The chip structure also includes an additional heating element adjacent to the heating element, the additional heating element having a first end and a second end, and different portions with different cross-sectional areas located between the first end and the second end. The first and second portions of the additional heating element are configured to raise the temperature of the first and second regions of different devices or the different regions of a single device by different amounts, thereby achieving a substantially uniform temperature distribution in the first and second regions of different devices or the different regions of a single device.