Low frequency inseparable transform signaling notification in video codec
By introducing two-level control LMCS and explicit scaling lists, sub-picture height calculations are optimized and signaling notifications are simplified, and inefficiency problems in VVC sub-picture and LMCS design are solved, achieving more efficient codec performance.
Patent Information
- Application Number
- CN202180019067.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-03-03
- Filing Date
- 2021-03-03
- Publication Date
- 2025-02-18
- Estimated Expiration
- 2041-03-03
AI Technical Summary
There are inefficient problems in sub-picture and LMCS design in VVC, including complex sub-picture calculations, inefficient LMCS signaling notifications, incorrect semantics of SPS affine AMVR flags, useless striped-headed scaling list flags, and explicit scaling list signaling Inefficient and explicit scaling lists for LFNST codec blocks are misapplied.
By introducing two-level control LMCS and explicit scaling lists, using image-level and strip-level control, the presence of lower-level control information depends on the high-level control information. At the same time, the sub-picture height calculation is optimized, the sub-picture height judgment is simplified, and the LMCS signaling notification is removed in the SH to improve efficiency.
Improves the control efficiency of LMCS and explicit scaling lists, simplifies sub-picture height calculation, reduces the bit overhead of signaling notifications, and improves overall codec performance.
Smart Images

Figure CN115211125B_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application is based on International Patent Application No. PCT / US2021 / 020618 filed on March 3, 2021, which claims priority and benefits to U.S. Provisional Patent Application No. 62 / 984,658 filed on March 3, 2020. All of the above patent applications are hereby incorporated by reference in their entirety. Technical Field
[0003] This patent document relates to image and video encoding and decoding. Background Art
[0004] Digital video accounts for the largest use of bandwidth on the Internet and other digital communications networks. Bandwidth demand for digital video usage is expected to continue to grow as the number of connected user devices capable of receiving and displaying video increases. Summary of the invention
[0005] This document discloses techniques that can be used by video encoders and decoders to process a codec representation of a video using control information useful for decoding the codec representation.
[0006] In one example aspect, a video processing method is disclosed. The method includes performing conversion between a video block of a video and a bitstream of the video, wherein the bitstream conforms to a format rule, wherein the format rule provides that a first syntax element is included in the bitstream at a video region level, the first syntax element indicating whether a scaling process is applied to transform coefficients of the video block or to non-transform coefficients of the video block, and wherein the video region is smaller than a video picture of the video.
[0007] In another example aspect, a video processing method is disclosed. The method includes performing conversion between video units of a video region of a video and a bitstream of the video, wherein the bitstream complies with a format rule, wherein the format rule specifies that first control information of a first level of the video region in the bitstream indicates whether second control information is included in a second level of the video unit in the bitstream, and wherein the first control information and / or the second control information includes information about whether the scaling list is for converted transform coefficients or for converted non-transform coefficients.
[0008] In another example aspect, a video processing method is disclosed. The method includes performing conversion between a video block of a video and a bitstream of the video, wherein the video block is converted using a low frequency inseparable transform, wherein the bitstream complies with a format rule, the format rule provides that a syntax element is included at a syntax level of the bitstream, wherein the syntax element indicates whether to enable use of a scaling matrix derived from a reference scaling list for the video block, and wherein the syntax level is a sequence level, a picture level, or a slice level.
[0009] In another example aspect, a video processing method is disclosed. The method includes, for conversion between a video unit of a video and a bitstream of the video, determining to perform deblocking filtering on samples of the video unit along a boundary of the video unit using padding samples outside a boundary of the video unit; and performing the conversion according to the determination.
[0010] In another example aspect, a video processing method is disclosed. The method includes performing conversion between a video including one or more video pictures and a codec representation of the video, wherein each video picture includes one or more slices, wherein the codec representation conforms to a format rule; wherein the format rule specifies first information signaled in the codec representation and second information derived from the codec representation, wherein at least the first information or the second information is related to a row index or a column index of the one or more slices.
[0011] In another example aspect, a video processing method is disclosed. The method includes performing conversion between video units of a video region of a video and a codec representation of the video, wherein the codec representation complies with a format rule; wherein the format rule specifies that first control information at the video region controls whether second control information is included at the video unit level; wherein the first control information and / or the second control information includes information about lumamapping and chroma scaling (LMCS) or chroma residue scaling (CRS) or a reshaping process (RP) used for the conversion.
[0012] In yet another example, another video processing method is disclosed. The method includes performing conversion between a video including one or more video regions and a codec representation of the video, the one or more video regions including one or more video units; wherein the codec representation complies with a format rule; wherein the format rule stipulates that the codec representation includes a two-level signaling notification of a scaling list that can be used to convert at least some of the video units, wherein a high-level signaling notification in the two-level signaling notification at the video region level controls whether and where a low-level signaling notification in the two-level signaling notification at the video unit level is included in the codec representation; wherein the scaling list includes information about scaling for conversion of at least some of the video units.
[0013] In yet another example, another video processing method is disclosed. The method includes determining a scaling list of a low-frequency inseparable transform for conversion between a video unit of a video and a codec representation of the video; and performing the conversion based on the determination, wherein a syntax structure in the codec representation indicates whether the scaling list is enabled for the video unit.
[0014] In yet another example aspect, a video encoder apparatus is disclosed. The video encoder includes a processor configured to implement the above method.
[0015] In yet another example aspect, a video decoder apparatus is disclosed. The video decoder includes a processor configured to implement the above method.
[0016] In yet another example aspect, a computer readable medium having code stored thereon is disclosed. The code embodies one of the methods described herein in the form of processor executable code.
[0017] These and other features are described in this document. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 An example of raster scan stripe partitioning of a picture is shown, where the picture is divided into 12 slices and 3 raster scan stripes.
[0019] Figure 2 An example of rectangular strip partitioning of a picture is shown, where the picture is divided into 24 slices (6 slice columns and 4 slice rows) and 9 rectangular strips.
[0020] Figure 3 An example of a picture partitioned into slices and rectangular strips is shown, where the picture is divided into 4 slices (2 slice columns and 2 slice rows) and 4 rectangular strips.
[0021] Figure 4 A picture partitioned into 15 slices, 24 slices and 24 sub-pictures is shown.
[0022] Figure 5 is a block diagram of an example video processing system.
[0023] Figure 6 A block diagram of a video processing device.
[0024] Figure 7 A flow chart of an example method for video processing.
[0025] Figure 8 is a block diagram illustrating a video encoding and decoding system according to some embodiments of the present disclosure.
[0026] Fig. 9 is a block diagram illustrating an encoder according to some embodiments of the present disclosure.
[0027] Fig.10 is a block diagram illustrating a decoder according to some embodiments of the present disclosure.
[0028] Fig.11 An example of a padding process for deblocking filtering is shown.
[0029] Figures 12 to 15 is a flow chart of an example method of video processing. DETAILED DESCRIPTION
[0030] The section headings used in this document are for ease of understanding and do not limit the applicability of the techniques and embodiments disclosed in each section to only that section. In addition, the use of H.266 terminology in some descriptions is only for ease of understanding and is not intended to limit the scope of the disclosed technology. Therefore, the techniques described herein are also applicable to other video codec protocols and designs. In this document, editorial changes relative to the current draft of the VVC specification are shown as italic text indicating canceled text and bold italic text indicating added text.
[0031] 1. Summary
[0032] This document relates to video codec technology. Specifically, it is about support for sub-pictures, LMCS, AMVR, and scaling lists. Aspects about sub-pictures include deriving the number of slice rows and columns contained in a sub-picture, and deriving the raster scan CTU address list of the CTU contained in the slice when each sub-picture contains only one slice. The LMCS aspect is about signaling notifications for enabling LMCS at different levels. The AMVR aspect is about the semantics of the sps_affine_amvr_enabled_flag. The scaling list aspect is about enabling the use of explicit scaling lists at different levels. These ideas can be applied alone or in various combinations to any video codec standard or non-standard video codec that supports single-layer and / or multi-layer video codecs, such as the Versatile Video Coding (VVC) under development.
[0033] 2. Abbreviations
[0034] ALF (Adaptive Loop Filter) Adaptive Loop Filter
[0035] AMVR (Adaptive Motion Vector difference Resolution) Adaptive Motion Vector Difference Resolution
[0036] APS (Adaptation Parameter Set) Adaptive Parameter Set
[0037] AU (Access Unit) Access Unit
[0038] AUD (Access Unit Delimiter) Access Unit Delimiter
[0039] AVC (Advanced Video Coding) Advanced Video Codec
[0040] CLVS (Coded Layer Video Sequence) Coded Layer Video Sequence
[0041] CPB (Coded Picture Buffer) Coded Picture Buffer
[0042] CRA (Clean Random Access) Clean Random Access
[0043] CTU (Coding Tree Unit)
[0044] CVS (Coded Video Sequence) Coded Video Sequence
[0045] DPB (Decoded Picture Buffer) Decoded Picture Buffer
[0046] DPS (Decoding Parameter Set) Decoding Parameter Set
[0047] EOB (End Of Bitstream) bitstream end
[0048] EOS (End Of Sequence) sequence end
[0049] GDR (Gradual Decoding Refresh) Gradual Decoding Refresh
[0050] HEVC (High Efficiency Video Coding) High Efficiency Video Coding
[0051] HRD (Hypothetical Reference Decoder) Hypothetical Reference Decoder
[0052] IDR (Instantaneous Decoding Refresh)
[0053] JEM (Joint Exploration Model)
[0054] LFNST (Low Frequency Non-Separable Transform)
[0055] LMCS (Luma Mapping with Chroma Scaling) Luma Mapping and Chroma Scaling
[0056] MCTS (Motion-Constrained Tile Sets)
[0057] NAL (Network Abstraction Layer) Network Abstraction Layer
[0058] OLS (Output Layer Set) Output Layer Set
[0059] PH (Picture Header) Picture Header
[0060] PPS (Picture Parameter Set) Picture Parameter Set
[0061] PTL (Profile, Tier and Level) Profile, Tier and Level
[0062] PU (Picture Unit)
[0063] RBSP (Raw Byte Sequence Payload) Raw Byte Sequence Payload
[0064] SEI (Supplemental Enhancement Information)
[0065] SPS (Sequence Parameter Set) Sequence Parameter Set
[0066] SVC (Scalable Video Coding) Scalable Video Codec
[0067] VCL (Video Coding Layer) Video Coding Layer
[0068] VPS (Video Parameter Set) Video Parameter Set
[0069] VTM (VVC Test Model) VVC Test Model
[0070] VUI (Video Usability Information) Video Usability Information
[0071] VVC (Versatile Video Coding) Multi-functional video codec
[0072] 3. Preliminary Discussion
[0073] Video codec standards have evolved primarily through the development of the well-known ITU-T and ISO / IEC standards. ITU-T produced the H.261 and H.263 standards, ISO / IEC produced the MPEG-1 and MPEG-4 Visual standards, and the two organizations jointly produced the H.262 / MPEG-2 Video standard, the H.264 / MPEG-4 Advanced Video Codec (AVC) standard, and the H.265 / HEVC standard. Starting with H.262, video codec standards are based on a hybrid video codec structure, where temporal prediction plus transform codec is used. In order to explore future video codec technologies beyond HEVC, the Joint Video Exploration Team (JVET) was jointly established by VCEG and MPEG in 2015. Since then, JVET has adopted many new methods and incorporated them into reference software called the Joint Exploration Model (JEM). JVET meetings are held simultaneously every quarter, and the goal of the new codec standard is to reduce the bit rate by 50% compared to HEVC. The new video codec standard was officially named Versatile Video Coding (VVC) at the JVET meeting in April 2018, and the first version of the VVC Test Model (VTM) was also released at that time. With the continuous efforts of VVC standardization, new codec technologies are adopted into the VVC standard at each JVET meeting. The working draft of VVC and the test model VTM are updated after each meeting. The VVC project now aims to be technically completed (FDIS) at the meeting in July 2020. 3.1. Picture segmentation scheme in HEVC
[0074] HEVC includes four different picture segmentation schemes, namely, regular strips, dependent strips, slices, and wavefront parallel processing (WPP), which can be applied to maximum transfer unit (MTU) size matching, parallel processing, and reduced end-to-end delay.
[0075] Regular slices are similar to those in H.264 / AVC. Each regular slice is encapsulated in its own NAL unit, and intra-picture prediction (intra-sample prediction, motion information prediction, codec mode prediction) and entropy codec dependencies across slice boundaries are disabled. Therefore, regular slices can be reconstructed independently of other regular slices in the same picture (although there may still be interdependencies due to loop filtering operations).
[0076] Regular slices are the only tool available for parallelization, which is also available in H.264 / AVC in almost the same form. Regular slice-based parallelization does not require much inter-processor or inter-core communication (except for inter-processor or inter-core data sharing for motion compensation when decoding predictive codec pictures, which is usually much heavier than inter-processor or inter-core data sharing due to intra-picture prediction). However, for the same reason, the use of regular slices may incur a large codec overhead due to the bit cost of the slice header and the lack of prediction across slice boundaries. In addition, regular slices (in contrast to the other tools mentioned below) can also serve as a key mechanism for bitstream segmentation to match MTU size requirements due to their intra-picture independence and the fact that each regular slice is encapsulated in its own NAL. In many cases, the goals of parallelization and MTU size matching have conflicting requirements on the layout of slices in a picture. The realization of such situations led to the development of the parallelization tools mentioned below.
[0077] Dependent slices have short slice headers and allow the bitstream to be split at treeblock boundaries without breaking any intra-picture prediction. Basically, dependent slices split a regular slice into multiple NAL units, reducing end-to-end latency by allowing part of a regular slice to be sent before encoding of the entire regular slice is complete.
[0078] In WPP, a picture is partitioned into a single row of codec tree blocks (CTBs). Entropy decoding and prediction are allowed to use data from CTBs in other partitions. Parallel processing is possible through parallel decoding of CTB rows, where the start of decoding of CTB rows is delayed by two CTBs to ensure that data related to CTBs above and to the right of the main CTB can be obtained before the main CTB being decoded. Using this staggered start (which looks like a wavefront when represented graphically), as many processors / cores as pictures contain CTB rows can be parallelized. Because intra-picture prediction between adjacent treeblock rows within a picture is allowed, the inter-processor / inter-core communication required to implement intra-picture prediction can be extensive. WPP partitioning does not result in the generation of additional NAL units compared to not applying WPP partitioning, so WPP is not a tool for MTU size matching. However, if MTU size matching is required, regular slices can be used with WPP, but with some codec overhead.
[0079] Slices define the horizontal and vertical boundaries that divide the image into slice columns and slice rows. Slice columns extend from the top of the image to the bottom of the image. Similarly, slice rows extend from the left side of the image to the right side of the image. The number of slices in an image can be simply derived by multiplying the number of slice columns by the number of slice rows.
[0080] Before decoding the top left CTB of the next slice in the order of the slice raster scan of the picture, the scan order of the CTBs is changed to the local scan order within the slice (in the order of the CTB raster scan of the slice). Similar to regular slices, slices break intra-picture prediction dependencies and entropy decoding dependencies. However, they do not need to be contained in separate NAL units (same as WPP in this respect); therefore slices cannot be used for MTU size matching. Each slice can be processed by one processor / core, and in the case where a slice spans multiple slices, the inter-processor / inter-core communication required to decode intra-picture prediction between processing units of adjacent slices is limited to the transmission of a shared slice header and loop filtering related to the sharing of reconstruction samples and metadata. When more than one slice or WPP segment is contained in a slice, the entry point byte offset of each slice or WPP segment in the slice except the first is signaled in the slice header.
[0081] For simplicity, restrictions on the application of four different picture partitioning schemes are specified in HEVC. For most profiles specified in HEVC, a given codec video sequence cannot contain both slices and wavefronts. For each slice and slice, one or both of the following conditions must be met: 1) all codec tree blocks in a slice belong to the same slice; 2) all codec tree blocks in a slice belong to the same slice. Finally, a wavefront segment contains exactly one CTB row, and when WPP is used, if a slice starts within a CTB row, it must end in the same CTB row.
[0082] The most recent revision of HEVC is specified in the JCT-VC output document JCTVC-AC1005, J. Boyce, A. Ramasubramonian, R. Skupin, G. J. Sullivan, A. Tourapis, Y.-K. Wang (eds.), "HEVC Additional Supplemental Enhancement Information (Draft 4)", published on October 24, 2017 here: http: / / phenix.intevry.fr / jct / doc_end_user / documents- / 29_Macau / wg11 / JCTVC-AC1005-v2.zip. Contained within this revision, HEVC specifies three MCT-related SEI messages, namely the time-domain MCTS SEI message, the MCTS Extraction Information Set SEI message, and the MCTS Extraction Information Nesting SEI message.
[0083] The time domain MCTS SEI message indicates the presence of MCTS in the bitstream and signals MCTS. For each MCTS, the motion vector is restricted to point to the full sample point position within the MCTS and the fractional sample point position that only needs the full sample point position within the MCTS for interpolation, and the use of motion vector candidates predicted by the time domain motion vector derived from blocks outside the MCTS is not allowed. In this way, each MCTS can be independently decoded in the absence of slices not included in the MCTS.
[0084] The MCTS extraction information set SEI message provides supplementary information that can be used for MCTS sub-bitstream extraction (specified as part of the semantics of the SEI message) to generate a bitstream that conforms to the MCTS group. The information consists of multiple extraction information sets, each of which defines multiple MCTS groups and contains RBSP bytes that replace VPS, SPS, and PPS to be used during the MCTS sub-bitstream extraction process. When extracting a sub-bitstream according to the MCTS sub-bitstream extraction process, the parameter sets (VPS, SPS, and PPS) need to be rewritten or replaced, and the slice header needs to be slightly updated because one or all of the syntax elements related to the slice address (including first_slice_segment_in_pic_flag and slice_segment_address) usually need to have different values.
[0085] 3.2. Image Segmentation in VVC
[0086] In VVC, a picture is divided into one or more slice rows and one or more slice columns. A slice is a sequence of CTUs covering a rectangular area of a picture. The CTUs in a slice are scanned in raster scan order within the slice.
[0087] A slice consists of an integer number of complete slices or an integer number of consecutive complete CTU rows within a slice of a picture.
[0088] Two strip modes are supported, namely raster scan strip mode and rectangular strip mode. In raster scan strip mode, a strip contains a complete sequence of strips in a slice raster scan of a picture. In rectangular strip mode, a strip contains multiple complete slices that together form a rectangular area of a picture or multiple consecutive complete CTU rows that together form a slice of a rectangular area of a picture. The slices within a rectangular strip are scanned in a slice raster scan order within the rectangular area corresponding to the strip.
[0089] A sub-picture consists of one or more strips that together cover a rectangular area of the picture.
[0090] Figure 1 An example of raster scan stripe partitioning of a picture is shown, where the picture is partitioned into 12 slices and 3 raster scan stripes.
[0091] Figure 2 An example of rectangular strip partitioning of a picture is shown, where the picture is partitioned into 24 slices (6 slice columns and 4 slice rows) and 9 rectangular slices.
[0092] Figure 3 An example of a picture partitioned into slices and rectangular strips is shown, where the picture is partitioned into 4 slices (2 slice columns and 2 slice rows) and 4 rectangular strips.
[0093] Figure 4 An example of sub-picture partitioning of a picture is shown, where the picture is partitioned into 18 slices, 12 slices on the left (each covering a strip of 4x4 CTUs) and 6 slices on the right (each covering 2 vertically stacked strips of 2x2 CTUs), resulting in a total of 24 strips and 24 sub-pictures of different dimensions (each strip is a sub-picture).
[0094] 3.3.Signaling notification of SPS / PPS / picture header / slice header in VVC (such as JVET-Q2001-vC)
[0095] 7.3.2.3 Sequence parameter set RBSP syntax
[0096]
[0097]
[0098]
[0099]
[0100]
[0101]
[0102]
[0103]
[0104]
[0105] 7.3.2.4 Picture parameter set RBSP syntax
[0106]
[0107]
[0108]
[0109]
[0110]
[0111] 7.3.2.7 Picture Header Structure Syntax
[0112]
[0113]
[0114]
[0115]
[0116]
[0117]
[0118] 7.3.7.1 General Strip Header Syntax
[0119]
[0120]
[0121]
[0122]
[0123]
[0124] 3.4. Specification of slices, stripes and sub-pictures in JVET-Q2001-vC
[0125] 3 Definitions
[0126] Picture level slice index: The index of the slice list in the picture, in the order they are signaled in the PPS when rect_slice_flag is equal to 1.
[0127] Sub-picture level slice index: The index of the slice into the slice list in the sub-picture, in the order they are signaled in the PPS when rect_slice_flag is equal to 1.
[0128] 6.5.1CTB Raster Scanning, Slice Scanning and Sub-Picture Scanning Processing
[0129] The variable NumTileColumns specifies the number of tile columns, and the list colWidth[i], i ranging from 0 to NumTileColumn-1 (inclusive), specifies the width of the i-th tile column in CTBs, as derived below:
[0130]
[0131] The variable NumTileRows specifies the number of tile rows, and the list RowHeight[j] of j in the range from 0 to NumTileRows-1 (inclusive) specifies the height of the jth tile row in units of CTB, as derived below:
[0132]
[0133] The variable NumTilesInPic is set equal to NumTileColumns*NumTileRows.
[0134] The list tileColBd[i] of i ranging from 0 to NumTileColumns (inclusive) specifies the location of the i-th tile column boundary in units of CTB, derived as follows:
[0135] for(tileColBd[0]=0,i=0;i <NumTileColumns;i++)tileColBd[i+1]=tileColBd[i]+colWidth[i] (25)
[0136] NOTE 1 – The size of the array tileColBd[] is one greater than the actual number of tile columns in the derivation of CtbToTileColBd[].
[0137] The list tileRowBd[j] of j in the range 0 to NumTileRows (inclusive) specifies the location of the jth tile row boundary in CTB units, derived as follows:
[0138] for(tileRowBd[0]=0,j=0;j <NumTileRows;j++)tileRowBd[j+1]=tileRowBd[j]+RowHeight[j] (26)
[0139] NOTE 2 – The size of the array tileRowBd[] in the above derivation is one greater than the actual number of tile rows in the derivation of CtbToTileRowBd[].
[0140] The list CtbToTileColBd[ctbAddrX] of ctbAddrX ranging from 0 to PicWidthInCtbsY (inclusive) specifies the translation from the horizontal CTB address to the left tile column boundary in CTB units, as derived as follows:
[0141]
[0142] NOTE 3 - The size of the array CtbToTileColBd[] in the above derivation is one greater than the actual number of picture widths in the CTB signaled in the derivation by slice_data().
[0143] The list CtbToTileRowBd[ctbAddrY] of ctbAddrY in the range from 0 to PicHeightInCtbsY (inclusive) specifies the translation from the vertical CTB address to the upper tile row boundary in CTB units, as derived as follows:
[0144]
[0145]
[0146] NOTE 4 – The size of the array CtbToTileRowBd[] in the above derivation is one greater than the actual number of picture heights in the CTB signalled in slice_data().
[0147] For rectangular slices, the list NumCtusInSlice[i] for i ranging from 0 to num_slices_in_pic_minus1 (inclusive) specifies the number of CTUs in the i-th slice, the list SliceTopLeftTileIdx[i] for i ranging from 0 to num_slices_in_pic_minus1 (inclusive) specifies the index of the top left slice of the slice, and the matrix of i ranging from 0 to num_slices_in_pic_minus1 (inclusive) and j ranging from 0 to NumCtusInSlice[i]–1 (inclusive) specifies the picture raster scan address of the j-th CTB within the i-th slice, derived as follows:
[0148]
[0149]
[0150] Among them, the function AddCtbsToSlice(sliceIdx, startX, stopX, startY, stopY) is specified as follows: [Ed.(YK): Consider defining this function in a manner consistent with other functions defined in the specification.]
[0151]
[0152]
[0153] It is a bitstream conformance requirement that the value of NumCtusInSlice[i] for i in the range 0 to num_slices_in_pic_minus1 (inclusive) shall be greater than 0. Furthermore, it is a bitstream conformance requirement that the matrix CtbAddrInSlice[i][j] for i in the range 0 to num_slices_in_pic_minus1 (inclusive) and j in the range 0 to NumCtusInSlice[i]-1 (inclusive) shall include all CTB addresses in the range 0 to PicSizeInCtbsY-1 once and only once.
[0154] The list CtbToSubpicIdx[ctbAddrRs] of ctbAddrRs in the range 0 to PicSizeInCtbsY-1 (inclusive) specifies the conversion from CTB addresses in the picture raster scan to subpicture indices, as derived as follows: [Ed.(YK): Consider defining CtbToSubpicIdx[] as a local variable, since it is used only in this subclause.]
[0155]
[0156] The list NumSlicesInSubpic[i] specifies the number of rectangular strips in the i-th subpicture, derived as follows:
[0157]
[0158]
[0159] …
[0160] 7.3.4.3 Picture parameter set RBSP semantics
[0161] …
[0162] subpic_id_mapping_in_pps_flag equal to 1 specifies that sub-picture ID mapping is signaled in PPS. subpic_id_mapping_in_pps_flag equal to 0 specifies that sub-picture ID mapping is not signaled in PPS. If subpic_id_mapping_explicitly_signaled_flag is 0 or subpic_id_mapping_in_sps_flag is equal to 1, the value of subpic_id_mapping_in_pps_flag shall be equal to 0. Otherwise (sub pic_id_mapping_explicitly_signaled_flag is equal to 1 and subpic_id_mapping_in_sps_flag is equal to 0), the value of subpic_id_mapping_in_pps_flag shall be equal to 1.
[0163] pps_num_subpics_minus1 shall be equal to sps_num_subpics_minus1.
[0164] pps_subpic_id_len_minus1 shall be equal to sps_subpic_id_len_minus1.
[0165] pps_subpic_id[i] specifies the sub-picture ID of the i-th sub-picture. The length of the pps_subpic_id[i] syntax element is pps_subpic_id_len_minus1+1 bits.
[0166] For each value of i in the range from 0 to sps_num_subpics_minus1, the variable SubpicIdVal[i] is derived as follows:
[0167]
[0168]
[0169] The requirement for bitstream conformance is that the following two constraints apply:
[0170] --For any two different values of i and j in the range from 0 to sps_num_subpics_minus1 (inclusive), SubpicIdVal[i] shall not be equal to SubpicIdVal[j].
[0171] --When the current picture is not the first picture of the CLVS, for each value of i in the range of 0 to sps_num_subpics_minus1 (inclusive), if the value of SubpicIdVal[i] is not equal to the value of SubpicIdVal[i] of the previous picture in the same layer in decoding order, the nal_unit_type of all codec slice NAL units of the subpictures in the current picture with subpicture index i shall be equal to a specific value in the range of IDR_W_RADL to CRA_NUT (inclusive).
[0172] no_pic_partition_flag equal to 1 specifies that picture partitioning is not applied to each picture referencing the PPS. no_pic_partition_flag equal to 0 specifies that each picture referencing the PPS may be partitioned into more than one slice or slice.
[0173] The bitstream conformance requirement is that the value of no_pic_partition_flag shall be the same for all PPSs referenced by a coded picture within a CLVS.
[0174] It is a bitstream conformance requirement that when the value of sps_num_subpics_minus1+1 is greater than 1, the value of no_pic_partition_flag shall not be equal to 1.
[0175] pps_log2_ctu_size_minus5 plus 5 specifies the luma codec treeblock size for each CTU. pps_log2_ctu_size_minus5 shall be equal to sps_log2_ctu_size_minus5.
[0176] num_exp_tile_columns_minus1 plus 1 specifies the number of explicitly provided tile column widths. The value of num_exp_tile_columns_minus1 shall be in the range of 0 to PicWidthInCtbsY–1, inclusive. When no_pic_partition_flag is equal to 1, the value of num_exp_tile_columns_minus1 is inferred to be equal to 0.
[0177] num_exp_tile_rows_minus1 plus 1 specifies the number of explicitly provided tile row heights. The value of num_exp_tile_rows_minus1 shall be in the range of 0 to PicHeightInCtbsY–1, inclusive. When no_pic_partition_flag is equal to 1, the value of num_tile_rows_minus1 is inferred to be equal to 0.
[0178] tile_column_width_minus1[i] plus 1 specifies the width of the i-th tile column in units of CTB, and i ranges from 0 to num_exp_tile_columns_minus1-1 (including the end value).
[0179] tile_column_width_minus1[num_exp_tile_columns_minus1] is used to derive the width of tile columns with indices greater than or equal to num_exp_tile_columns_minus1, as specified in clause 6.5.1. The value of tile_column_width_minus1[i] shall be in the range of 0 to PicWidthInCtbsY–1, inclusive. When not present, the value of tile_column_width_minus1[0] is inferred to be equal to PicWidthInCtbsY-1.
[0180] tile_row_height_minus1[i] plus 1 specifies the height of the i-th tile row in CTB units, and i ranges from 0 to num_exp_tile_rows_minus1–1 (including the end value).
[0181] tile_row_height_minus1[num_exp_tile_rows_minus1] is used to derive the height of tile rows with indices greater than or equal to num_exp_tile_rows_minus1, as specified in clause 6.5.1. The value of tile_row_height_minus1[i] shall be in the range of 0 to PicHeightInCtbsY–1, inclusive. When not present, the value of tile_row_height_minus1[0] is inferred to be equal to PicHeightInCtbsY-1.
[0182] rect_slice_flag equal to 0 specifies that the slices within each slice are in raster scan order and that slice information is not signaled in the PPS. rect_slice_flag equal to 1 specifies that the slices within each slice cover a rectangular area of the picture and that slice information is signaled in the PPS. When not present, rect_slice_flag is inferred to be equal to 1. When subpic_info_present_flag is equal to 1, the value of rect_slice_flag shall be equal to 1.
[0183] single_slice_per_subpic_flag equal to 1 specifies that each sub-picture consists of one and only one rectangular slice. single_slice_per_subpic_flag equal to 0 specifies that each sub-picture may consist of one or more rectangular slices. When single_slice_per_subpic_flag is equal to 1, num_slices_in_pic_minus1 is inferred to be equal to sps_num_subpics_minus1. When not present, the value of single_slice_per_subpic_flag is inferred to be equal to 0. [Ed.(GJS): Consider renaming this flag or clarifying it in another way to avoid interpretation that the flag is only relevant when there is more than one sub-picture in each picture.]
[0184] num_slices_in_pic_minus1 plus 1 specifies the number of rectangular slices in each picture that references the PPS. The value of num_slices_in_pic_minus1 shall be in the range of 0 to MaxSlicesPerPicture–1, inclusive, where MaxSlicesPerPicture is specified in Annex A. When no_pic_partition_flag is equal to 1, the value of num_slices_in_pic_minus1 is inferred to be equal to 0.
[0185] tile_idx_delta_present_flag equal to 0 specifies that tile_idx_delta values are not present in the PPS and that all rectangular slices in the picture referencing the PPS are specified in raster order according to the procedure defined in clause 6.5.1. [Ed.(RS): Added reference to formula.]
[0186] tile_idx_delta_present_flag equal to 1 specifies that tile_idx_delta values may be present in the PPS, and all rectangular slices in pictures referencing the PPS are specified in the order indicated by the value of tile_idx_delta. When not present, the value of tile_idx_delta_present_flag is inferred to be equal to 0.
[0187] slice_width_in_tiles_minus1[i] plus 1 specifies the width of the i-th rectangular strip in units of tile columns. The value of slice_width_in_tiles_minus1[i] should be in the range of 0 to NumTileColumns–1 (inclusive).
[0188] When slice_width_in_tiles_minus1[i] is not present, the following applies:
[0189] --If NumTileColumns is equal to 1, the value of slice_width_in_tiles_minus1[i] is inferred to be equal to 0.
[0190] -- Otherwise, the value of slice_width_in_tiles_minus1[i] is inferred as specified in clause 6.5.1. [Ed.(YK): Add reference to formula.]
[0191] slice_height_in_tiles_minus1[i] plus 1 specifies the height of the i-th rectangular strip in units of tile rows. The value of slice_height_in_tiles_minus1[i] should be in the range of 0 to NumTileRows–1 (inclusive).
[0192] When slice_height_in_tiles_minus1[i] is not present, the following applies:
[0193] --If NumTileRows is equal to 1, or tile_idx_delta_present_flag is equal to 0, and tileIdx%NumTileColumns is greater than 0, then the value of slice_height_in_tiles_minus1[i] is inferred to be equal to 0.
[0194] --Otherwise (NumTileRows is not equal to 1, and tile_idx_delta_present_flag is equal to 1 or tileIdx%NumTileColumns is equal to 0), when tile_idx_delta_present_flag is equal to 1 or tileIdx%NumTileColumns is equal to 0, the value of slice_height_in_tiles_minus1[i] is inferred to be equal to slice_height_in_tiles_minus1[i-1].
[0195] num_exp_slices_in_tile[i] specifies the number of strip heights explicitly provided in the current tile containing multiple rectangular strips. The value of num_exp_slices_in_tile[i] shall be in the range of 0 to RowHeight[tileY]–1 (inclusive), where tileY is the index of the strip row containing the i-th strip. When not present, the value of num_exp_slices_in_tile[i] is inferred to be equal to 0. When num_exp_slices_in_tile[i] is equal to 0, the value of the variable NumSlicesInTile[i] is inferred to be equal to 1.
[0196] exp_slice_height_in_ctus_minus1[j] plus 1 specifies the height of the j-th rectangular slice in the current slice in CTU rows. The value of exp_slice_height_in_ctus_minus1[j] shall be in the range of 0 to RowHeight[tileY]–1 (inclusive), where tileY is the slice row index of the current slice.
[0197] When num_exp_slices_in_tile[i] is greater than 0, the variables NumSlicesInTile[i] and SliceHeightInCtusMinus1[i+k] for k in the range of 0 to NumSlicesInTile[i]–1 are derived as follows:
[0198]
[0199] tile_idx_delta[i] specifies the difference between the tile index of the first tile in the i-th rectangular strip and the tile index of the first tile in the (i+1)-th rectangular strip. The value of tile_idx_delta[i] should be in the range of -NumTilesInPic+1 to NumTilesInPic–1, inclusive. When not present, the value of tile_idx_delta[i] is inferred to be equal to 0. When present, the value of tile_idx_delta[i] should not be equal to 0.
[0200] …
[0201] 7.4.2.4.5 Order of VCL NAL units and their association with coded and decoded pictures
[0202] The order of VCL NAL units within a codec picture is constrained as follows:
[0203] --For any two codec slice NAL units A and B of a codec picture, let subpicIdxA and subpicIdxB be their sub-picture level index values, and sliceAddrA and sliceddrB be their slice_address values.
[0204] -- Codec slice NAL unit A shall precede codec slice NAL unit B when any of the following conditions is true:
[0205] –subpicIdxA is less than subpicIdxB.
[0206] --subpicidxa is equal to subpicIdxB, and sliceAddrA is less than sliceAddrB.
[0207] 7.4.8.1 General Stripe Header Semantics
[0208] The variable CuQpDeltaVal, which specifies the difference between the luma quantization parameter of the codec unit containing cu_qp_delta_abs and its prediction, is set equal to 0. When determining the Qp′ of the codec unit containing cu_chroma_qp_offset_flag Cb , Qp′ Cr and Qp′ CbCr The variable CuQpOffset specifies the value to use when determining the corresponding value of the quantization parameter Cb 、CuQpOffset Cr and CuQpOffset CbCr are all set equal to 0.
[0209] picture_header_in_slice_header_flag equal to 1 specifies that the PH syntax structure is present in the slice header. picture_header_in_slice_header_flag equal to 0 specifies that the PH syntax structure is not present in the slice header.
[0210] A bitstream conformance requirement is that the value of picture_header_in_slice_header_flag shall be the same in all codec slices in CLVS.
[0211] When picture_header_in_slice_header_flag is equal to 1 for a codec slice, the bitstream conformance requirement is that VCL NAL units with nal_unit_type equal to PH_NUT shall not appear in the CLVS.
[0212] When picture_header_in_slice_header_flag is equal to 0, all codec slices in the current picture shall have picture_header_in_slice_header_flag equal to 0, and the current PU shall have a PH NAL unit.
[0213] slice_subpic_id specifies the sub-picture ID of the sub-picture containing the slice. If slice_subpic_id exists, the value of the variable CurrSubpicIdx is derived so that SubpicIdVal[CurrSubpicIdx] is equal to slice_subpic_id. Otherwise (slice_subpic_id does not exist), CurrSubpicIdx is derived to be equal to 0. The length of slice_subpic_id is sps_subpic_id_len_minus1+1 bits.
[0214] slice_address specifies the slice address of the slice. When not present, the value of slice_address is inferred to be equal to 0. When rect_slice_flag is equal to 1 and NumSlicesInSubpic[CurrSubpicIdx] is equal to 1, the value of slice_address is inferred to be equal to 0.
[0215] If rect_slice_flag is equal to 0, the following applies:
[0216] -The strip address is the raster scan slice index.
[0217] - The length of slice_address is Ceil(Log2(NumTilesInPic)) bits.
[0218] -slice_address values should be in the range of 0 to NumTilesInPic–1 (inclusive).
[0219] Otherwise (rect_slice_flag is equal to 1), the following applies:
[0220] - The slice address is the sub-picture level slice index of the slice.
[0221] -The length of slice_address is Ceil(Log2(NumSlicesInSubpic[CurrSubpicIdx])) bits.
[0222] -slice_address values should be in the range of 0 to NumSlicesInSubpic[CurrSubpicIdx]–1 (inclusive).
[0223] The requirement for bitstream conformance is that the following constraints apply:
[0224] - If rect_slice_flag is equal to 0 or subpic_info_present_flag is equal to 0, the value of slice_address shall not be equal to the value of slice_address of any other codec slice NAL unit of the same codec picture.
[0225] - Otherwise, the pair of slice_subpic_id and slice_address values shall not be equal to the pair of slice_subpic_id and slice_address values of any other codec slice NAL unit of the same codec picture.
[0226] - The shape of the slices of a picture shall be such that each CTU, when decoded, has its entire left and upper borders consisting of picture boundaries or of boundaries of previously decoded CTU(s).
[0227] sh_extra_bit[i] may be equal to 1 or 0. Decoders conforming to this version of this specification shall ignore the value of sh_extra_bit[i]. Its value does not affect the conformance of the decoder to the profile specified in this version of this specification.
[0228] num_tiles_in_slice_minus1 plus 1, if present, specifies the number of tiles in a slice. The value of num_tiles_in_slice_minus1 should be in the range of 0 to NumTilesInPic–1, inclusive.
[0229] The variable NumCtusInCurrSlice specifies the number of CTUs in the current slice, and the list CtbAddrInCurrSlice[i], which ranges from 0 to NumCtusInCurrSlice–1 (inclusive), specifies the picture raster scan address of the i-th CTB in the slice, derived as follows:
[0230]
[0231]
[0232] The variables SubpicLeftBoundaryPos, SubpicTopBoundaryPos, SubpicRightBoundaryPos, and SubpicBotBoundaryPos are derived as follows:
[0233]
[0234] …
[0235] 3.5. Luminance Mapping and Chroma Scaling (LMCS)
[0236] LMCS includes two aspects: luma mapping (reshaping process, denoted by RP) and luma-dependent chroma residual scaling (CRS). For luma signaling, the LMCS mode operates based on two domains, including a first domain as the original domain and a second domain as the reshaping domain that maps luma samples to specific values according to the reshaping model. In addition, for chroma signaling, residual scaling can be applied, where the scaling factor is derived from the luma samples.
[0237] The relevant syntax elements and semantics in SPS, picture header (PH) and slice header (SH) are described as follows:
[0238] Syntax table
[0239] 7.3.2.3 Sequence parameter set RBSP syntax
[0240]
[0241] 7.3.2.7 Picture Header Structure Syntax
[0242]
[0243]
[0244] 7.3.7 Header Syntax
[0245] 7.3.7.1 General Strip Header Syntax
[0246]
[0247] Semantics
[0248] sps_lmcs_enabled_flag equal to 1 specifies that luma mapping and chroma scaling are used in CLVS. sps_lmcs_enabled_flag equal to 0 specifies that luma mapping and chroma scaling are not used in CLVS.
[0249] ph_lmcs_enabled_flag equal to 1 specifies that luma mapping and chroma scaling are enabled for all slices associated with PH, and ph_lmcs_enabled_flag equal to 0 specifies that luma mapping and chroma scaling may be disabled for one, multiple, or all slices associated with PH. When not present, the value of ph_lmcs_enabled_flag is inferred to be equal to 0.
[0250] ph_lmcs_aps_id specifies the adaptation_parameter_set_id of the LMCS APS referenced by the slice associated with the PH. The TemporalId of the APS NAL unit with aps_params_type equal to LMCS_APS and adaptation_parameter_set_id equal to ph_lmcs_aps_id shall be less than or equal to the TemporalId of the picture associated with the PH.
[0251] ph_chroma_residual_scale_flag equal to 1 specifies that chroma residual scaling is enabled for all slices associated with PH. ph_chroma_residual_scale_flag equal to 0 specifies that chroma residual scaling may be disabled for one, multiple, or all slices associated with PH. When ph_chroma_residual_scale_flag is not present, it is inferred to be equal to 0.
[0252] slice_lmcs_enabled_flag equal to 1 specifies that luma mapping and chroma scaling are enabled for the current slice. slice_lmcs_enabled_flag equal to 0 specifies that luma mapping and chroma scaling are not enabled for the current slice. When slice_lmcs_enabled_flag is not present, it is inferred to be equal to 0.
[0253] 3.6. Adaptive Motion Vector Difference Precision (AMVR) for Affine Codec Blocks
[0254] Affine AMVR is a codec tool that allows the affine inter-frame codec block to send MV differences with different precisions, such as 1 / 4 luma sample (default, amvr_flag is set to 0), 1 / 16 luma sample, and 1 luma sample.
[0255] The relevant syntax elements and semantics in SPS are described as follows:
[0256] Syntax table
[0257] 7.3.2.3 Sequence parameter set RBSP syntax
[0258]
[0259]
[0260] Semantics
[0261] sps_affine_amvr_enabled_flag equal to 1 specifies to use adaptive motion vector difference precision in motion vector coding and decoding for affine inter mode. sps_affine_amvr_enabled_flag equal to 0 specifies to not use adaptive motion vector difference precision in motion vector coding and decoding for affine inter mode. When not present, the value of sps_affine_amvr_enabled_flag is inferred to be equal to 0.
[0262] 3.7 Sub-picture level information SEI message
[0263] D.7.1 Sub-picture level information SEI message syntax
[0264]
[0265]
[0266] D.7.2 Sub-picture level information SEI message semantics
[0267] The sub-picture level information SEI message contains information about the level to which a sub-picture sequence in a bitstream conforms when testing the conformance of an extracted bitstream containing the sub-picture sequence according to Annex A.
[0268] When a sub-picture level information SEI message is present in any picture of a CLVS, the sub-picture level information SEI message shall be present in the first picture of the CLVS. Sub-picture level information SEI messages continue in decoding order from the current picture to the current layer until the end of the CLVS. All sub-picture level information SEI messages applicable to the same CLVS shall have the same content. A sub-picture sequence consists of all sub-pictures with the same sub-picture index value within the CLVS.
[0269] A bitstream conformance requirement is that, when the sub-picture level information SEI message of CLVS is present, the value of subpic_treated_as_pic_flag[i] shall be equal to 1 for each value of i in the range of 0 to sps_num_subpics_minus1, inclusive.
[0270] num_ref_levels_minus1 plus 1 specifies the number of reference levels signaled for each sps_num_subpics_minus1+1 sub-picture.
[0271] sli_cbr_constraint_flag equal to 0 specifies that the hypothetical stream scheduler (HSS) operates in intermittent bitrate mode for decoding the sub-bitstream produced by any sub-picture of the extracted bitstream according to clause C.7 by using the HRD of any CPB specification in the extracted sub-bitstream. sli_cbr_constraint_flag equal to 1 specifies that the HSS operates in constant bitrate (CBR) mode.
[0272] explicit_fraction_present_flag equal to 1 specifies that the syntax element ref_level_fraction_minus1[i] is present. explicit_fraction_present_flag equal to 0 specifies that the syntax element ref_level_fraction_minus1[i] is not present.
[0273] sli_num_subpics_minus1 plus 1 specifies the number of subpictures in the picture of the CLVS. When present, the value of sli_num_subpics_minus1 shall be equal to the value of sps_num_subpics_minus1 in the SPS referenced by the picture in the CLVS.
[0274] sli_alignment_zero_bit shall be equal to 0.
[0275] ref_level_idc[i] indicates the level to which each sub-picture conforms as specified in Annex A. The bitstream shall not contain values of ref_level_idc[i] other than those specified in Annex A. Other values of ref_level_idc[i] are reserved for future use by ITU-T | ISO / IEC. A requirement for bitstream conformance is that, for any value of k greater than i, the value of ref_level_idc[i] shall be less than or equal to ref_level_idc[k].
[0276] ref_level_fraction_minus1[i][j] plus 1 specifies the fraction of the level constraint associated with ref_level_idc[i] to which the j-th sub-picture complies, as specified in clause A.4.1.
[0277] The variable SubpicSizeY[j] is set equal to (subpic_width_minus1[j]+1)*CtbSizeY*(subpic_height_minus1[j]+1)*CtbSizeY.
[0278] When not present, the value of ref_level_fraction_minus1[i][j] is inferred to be equal to Ceil(256*SubpicSizeY[j] ÷ PicSizeInSamplesY*MaxLumaPs(general_level_idc) ÷ MaxLumaPs(ref_level_idc[i])-1. [Ed.(HD): Shouldn't PicSizeInSamplesY here be PicSizeMaxInSamplesY as specified in clause A.4.2?]
[0279] The variable RefLevelFraction[i][j] is set equal to ref_level_fraction_minus1[i][j]+1.
[0280] The variables SubpicNumTileCols[j] and SubpicNumTileRows[j] are derived as follows:
[0281]
[0282]
[0283] The variables SubpicCpbSizeVcl[i][j] and SubpicCpbSizeNal[i][j] are derived as follows:
[0284] SubpicCpbSizeVcl[i][j]=Floor(CpbVclFactor*MaxCPB*RefLevelFraction[i][j]÷256) (D.6)
[0285] SubpicCpbSizeNal[i][j]=Floor(CpbNalFactor*MaxCPB*RefLevelFraction[i][j]÷256) (D.7)
[0286] Wherein, MaxCPB is derived from ref_level_idc[i] according to clause A.4.2.
[0287] The variables SubpicBitRateVcl[i][j] and SubpicBitRateNal[i][j] are derived as follows:
[0288] SubpicBitRateVcl[i][j]=Floor(CpbVclFactor*MaxBR*RefLevelFraction[i][j]÷256) (D.8)
[0289] SubpicBitRateNal[i][j]=Floor(CpbNalFactor*MaxBR*RefLevelFraction[i][j]÷256) (D.9)
[0290] Wherein, MaxBR is derived from ref_level_idc[i] according to clause A.4.2.
[0291] NOTE 1 – When a sub-picture is extracted, the resulting bitstream has a CpbSize greater than or equal to SubpicCpbSizeVcl[i][j] and SubpicCpbSizeNal[i][j] (indicated in the SPS or inferred), and a bitrate greater than or equal to SubpicBitRateVcl[i][j] and SubpicBitRateNal[i][j] (indicated in the SPS or inferred).
[0292] The bitstream conformance requirement is that the bitstream resulting from extracting the j-th sub-picture in the range of sps_num_subpics_minus1 (inclusive) and conforming to the profile with general_tier_flag equal to 0 and level equal to ref_level_idc[i] for i in the range of 0 to num_ref_level_minus1 (inclusive) shall comply with the following constraints for each bitstream conformance test specified in Annex C:
[0293] - Ceil(256*SubpicSizeY[j]÷RefLevelFraction[i][j]) shall be less than or equal to MaxLumaPs, where MaxLumaPs is specified for level ref_level_idc[i] in Table A.1.
[0294] -The value of Ceil(256*(subpic_width_minus1[j]+1)*CtbSizeY÷RefLevelFraction[i][j]) should be less than or equal to Sqrt(MaxLumaPs*8).
[0295] -The value of Ceil(256*(subpic_height_minus1[j]+1)*CtbSizeY÷RefLevelFraction[i][j]) should be less than or equal to Sqrt(MaxLumaPs*8).
[0296] - The value of SubpicNumTileCols[j] shall be less than or equal to MaxTileCols, and the value of SubpicNumTileRows[j] shall be less than or equal to MaxTileRows, where MaxTileCols and MaxTileRows are specified for level ref_level_idc[i] in Table A.1.
[0297] - The value of SubpicNumTileCols[j]*SubpicNumTileRows[j] shall be less than or equal to MaxTileCols*MaxTileRows*RefLevelFraction[i][j], where MaxTileCols and MaxTileRows are specified for level ref_level_idc[i] in Table A.1.
[0298] - For the value of SubpicSizeInSamplesY of AU 0, the sum of the NumBytesInNalUnit variables of AU 0 corresponding to the j-th sub-picture shall be less than or equal to FormatCapabilityFactor*(Max(SubpicSizeY[j],fR*MaxLumaSr*RefLevelFraction[i][j]÷256)+MaxLumaSr*(AuCpbRemovalTime[0]-AuNominalRemovalTime[0])*RefLevelFraction[i][j])÷(256*MinCr), where MaxLumaSr and FormatCapabilityFactor are the values specified in Tables A.2 and A.3, respectively, for AU 0 of level ref_level_idc[i], and MinCr is derived as shown in A.4.2 [Ed.(RS): fR is a profile-specific variable defined in A.4.2.]
[0299] - The sum of the NumBytesInNalUnit variables corresponding to AU n (where n is greater than 0) of the j-th sub-picture shall be less than or equal to FormatCapabilityFactor*MaxLumaSr*(AuCpbRemovalTime[n]-AuCpbRemovalTime[n-1])*RefLevelFraction[i][j]÷(256*MinCr), where MaxLumaSr and FormatCapabilityFactor are the values specified in Table A.2 and Table A.3, respectively, applicable to AU n of level ref_level_idc[i], and MinCr is derived as shown in A.4.2.
[0300] For any sub-picture group containing one or more sub-pictures and consisting of a number of sub-pictures in the sub-picture index SubpicSetIndices list and the sub-picture group NumSubpicsInSet, derive the level information of the sub-picture group.
[0301] The variable SubpicSetAccLevelFraction[i] of the total level fraction relative to the reference level ref_level_idc[i], and the variables SubpicSetCpbSizeVcl[i], SubpicSetCpbSizeNal[i], SubpicSetBitRateVcl[i] and SubpicSetBitRateNal[i] of the sub-picture group are derived as follows:
[0302]
[0303]
[0304] The value of the sub-picture group sequence level indicator SubpicSetLevelIdc is derived as follows:
[0305]
[0306] Among them, MaxTileCols and MaxTileRows are specified for ref_level_idc[i] in Table A.1.
[0307] Sub-picture group bitstreams conforming to the profile with general_tier_flag equal to 0 and level equal to SubpicSetLevelIdc shall comply with the following constraints for each bitstream conformance test specified in Annex C:
[0308] - For VCL HRD parameters, SubpicSetCpbSizeVcl[i] shall be less than or equal to CpbVclFactor*MaxCPB, where CpbVclFactor is specified in Table A.3 and MaxCPB is specified in Table A.1 in units of CpbVclFactor bits.
[0309] - For NAL HRD parameters, SubpicSetCpbSizeNal[i] shall be less than or equal to CpbNalFactor*MaxCPB, where CpbNalFactor is specified in Table A.3 and MaxCPB is specified in Table A.1 in units of CpbNalFactor bits.
[0310] - For VCL HRD parameters, SubpicSetBitRateVcl[i] shall be less than or equal to CpbVclFactor*MaxBR, where CpbVclFactor is specified in Table A.3 and MaxBR is specified in Table A.1 in units of CpbVclFactor bits.
[0311] - For NAL HRD parameters, SubpicSetBitRateNal[i] shall be less than or equal to CpbNalFactor*MaxCR, where CpbNalFactor is specified in Table A.3 and MaxBR is specified in Table A.1 in units of CpbNalFactor bits.
[0312] NOTE 2 – When a sub-picture group is extracted, the resulting bitstream has a CpbSize greater than or equal to SubpicSetCpbSizeVcl[i][j] and SubpicSetCpbSizeNal[i][j] (indicated in the SPS or inferred), and a bitrate greater than or equal to SubpicSetBitRateVcl[i][j] and SubpicSetBitRateNal[i][j] (indicated in the SPS or inferred).
[0313] 3.8. Zoom List
[0314] The most relevant text in the current VVC draft text regarding scaling lists is as follows:
[0315] Sequence Parameter Set RBSP Syntax and Semantics
[0316] ....
[0318] sps_scaling_list_enabled_flag equal to 1 specifies that the scaling list is used for the scaling process of transform coefficients. sps_scaling_list_enabled_flag equal to 0 specifies that the scaling list is not used for the scaling process of transform coefficients. ...
[0320] Image header structure syntax and semantics
[0321]
[0322] ...
[0324] ph_scaling_list_present_flag equal to 1 specifies that the scaling list data for the slices associated with the PH are derived based on the scaling list data contained in the reference scaling list APS. ph_scaling_list_present_flag equal to 0 specifies that the scaling list data for the slices associated with the PH are set equal to 16. When not present, the value of ph_scaling_list_present_flag is inferred to be equal to 0. When not present, the value of ph_scaling_list_present_flag is inferred to be equal to 0.
[0325] ph_scaling_list_aps_id specifies the adaptation_parameter_set_id of the scaling list APS. The TemporalId of the APS NAL units with aps_params_type equal to SCALING_APS and adaptation_parameter_set_id equal to ph_scaling_list_aps_id shall be less than or equal to the TemporalId of the picture associated with the PH. ...
[0327] General Strip Header Syntax and Semantics
[0328] ...
[0330] slice_scaling_list_present_flag equal to 1 specifies that the scaling list data for the current slice is derived based on the scaling list data contained in the reference scaling list APS, where aps_params_type is equal to SCALING_APS and adaptation_parameter_set_id is equal to ph_scaling_list_aps_id. slice_scaling_list_present_flag equal to 0 specifies that the scaling list data for the current picture is the derived default scaling list data specified in clause 7.4.3.21. When not present, the value of slice_scaling_list_present_flag is inferred to be equal to 0. ...
[0332] Scaling of transform coefficients ...
[0334] For the derivation of the scaled transform coefficients d[x][y] for x=0..nTbW-1, y=0..nTbH-1, the following applies:
[0335] --The intermediate scaling factor m[x][y] is derived as follows:
[0336] -- m[x][y] is set equal to 16 if one or more of the following conditions are true:
[0337] --sps_scaling_list_enabled_flag is equal to 0.
[0338] --ph_scaling_list_present_flag is equal to 0.
[0339] --transform_skip_flag[xTbY][yTbY][cIdx] is equal to 1.
[0340] --scaling_matrix_for_lfnst_disabled_flag is equal to 1, and ApplyLfnstFlag is equal to 1.
[0341] --... ...
[0343] 7.3.2.5 Adaptation Parameter Set RBSP Syntax
[0344]
[0345]
[0346] 7.3.2.21 Scaling List Data Syntax
[0347]
[0348]
[0349] scaling_matrix_for_lfnst_disabled_flag equal to 1 specifies that the scaling matrix should not be applied to blocks coded with LFNST. scaling_matrix_for_lfnst_disabled_flag equal to 0 specifies that the scaling matrix can be applied to blocks coded with LFNST.
[0350] 4. Technical problems solved by the disclosed technical solutions
[0351] The existing designs of sub-pictures and LMCS in VVC have the following problems:
[0352] 1) The derivation of the list SubpicNumTileRows[] (specifying the number of tile rows included in the sub-picture) is that formula D.5 is incorrect because the index value idx in CtbToTileRowBd[idx] in the formula may be greater than the maximum allowed value. In addition, the deviation between SubpicNumTileRows[] and SubpicNumTileCols[] (specifying the number of tile columns included in the sub-picture) uses CTU-based operations, which is unnecessary complication.
[0353] 2) When single_slice_per_subpic_flag is equal to 1, the derivation of the array CtbAddrInSlice in Formula 29 is incorrect because the values of the raster scan CTB addresses in the array for each slice need to be in the decoding order of the CTU, rather than the raster scan order of the CTU.
[0354] 3) LMCS signaling is inefficient. When ph_lmcs_enabled_flag is equal to 1, lmcs will be enabled for all slices of the picture in most cases. However, in the current VVC design, for the case when LMCS is enabled for all slices of the picture, not only ph_lmcs_enabled_flag is equal to 1, but also slice_lmcs_enabled_flag with a value of 1 needs to be signaled for each slice.
[0355] a. When ph_lmcs_enabled_flag is true, the semantics of ph_lmcs_enabled_flag conflicts with the motivation of signaling the slice level LMCS flag. In the current VVC, when ph_lmcs_enabled_flag is true, it means that all slices should enable LMCS. Therefore, there is no need to further signal the LMCS enabled flag in the slice header.
[0356] b. In addition, when the picture header signals that LMCS is enabled, usually, LMCS is enabled for all slices. The control of LCMS in the slice header is mainly to handle extreme cases. Therefore, if the PH LMCS flag is true and the SH LMCS flag is always signaled, this may result in unnecessary bits being signaled for normal user cases.
[0357] 4) The semantics of the SPS affine AMVR flag is incorrect because for each affine inter-coded CU, affine AMVR can be enabled or disabled.
[0358] 5) The scaling list flag in the slice header, namely slice_scaling_list_present_flag, is not used to control the scaling process of transform coefficients and is actually useless.
[0359] 6) Even when slice_scaling_list_present_flag is used to control the scaling process of transform coefficients, scaling list signaling is inefficient. When ph_scaling_list_present_flag is equal to 1, in most cases, the explicit scaling list will be used for all slices of the picture. However, in the current VVC design, for the case when explicit scaling lists are enabled for all slices of the picture, not only does ph_scaling_list_present_flag need to be equal to 1, but also the slice flag slice_scaling_list_present_flag with a value of 1 needs to be signaled for each slice.
[0360] 7) For LFNST codec blocks, the residual distribution may be different from when only the main transform is applied. The explicitly signaled scaling list is more likely not to be applied to those LFNST codec blocks. However, whether the explicitly signaled scaling list is allowed to be signaled in the APS may waste unnecessary bits.
[0361] 5. Examples of Techniques and Embodiments
[0362] To solve the above problems and some other problems not mentioned, the following summarized methods are disclosed. These items should be considered as examples to explain general concepts and should not be interpreted in a narrow way. In addition, these items can be applied alone or in combination in any way.
[0363] Related to the sub-pictures that solve the first and second problems
[0364] 1. One or more of the following methods are disclosed:
[0365] a. Derive the slice column index for each CTU column of the picture.
[0366] b. The number of slice columns included in a sub-picture is derived based on the slice column index of the leftmost and / or rightmost CTU included in the sub-picture.
[0367] c. Derive the slice row index for each CTU row of the picture.
[0368] d. The number of slice rows included in the sub-picture is derived based on the slice row indices of the upper and / or lower CTUs included in the sub-picture.
[0369] e. The term picture level slice index is defined as follows: the index of the slice list in the picture (the index is defined when rect_slice_flag is equal to 1), in the order in which the slices are signaled in the PPS when single_slice_per_subpic_flag is equal to 0, or in the order of increasing sub-picture index of the sub-pictures corresponding to the slice when single_slice_per_subpic_flag is equal to 1.
[0370] f. In one example, when a sub-picture contains a slice split from a slice, the height of the sub-picture cannot be calculated from the slice.
[0371] g. In one example, the height of the sub-picture can be calculated based on CTU instead of slice.
[0372] h. Determine whether the height of the sub-image is less than one slice row.
[0373] i. In one example, when a sub-picture includes only CTUs from one slice row and when an upper CTU in the sub-picture is not an upper CTU of a slice row or a lower CTU in the sub-picture is not a lower CTU of a slice row, whether the height of the sub-picture is less than one slice row is derived as true.
[0374] ii. When it is indicated that each sub-picture contains only one slice and the height of the sub-picture is less than one slice row, for each slice of the picture with picture-level slice index i, the value of CtbAddrInSlice[i][j] for j in the range of 0 to the number of CTUs in the slice minus 1 (inclusive) is derived as the picture raster scan CTU address of the j-th CTU in the CTU raster scan of the sub-picture.
[0375] iii. In one example, when the distance between an upper CTU in a sub-picture and a lower CTU in the sub-picture is less than a height of a slice according to CTUs, whether the height of the sub-picture is less than one slice row is derived as true.
[0376] iv. When it is indicated that each sub-picture contains only one slice and the height of the sub-picture is greater than or equal to one slice row, for each slice of the picture with picture-level slice index i, CtbAddrInSlice[i][j] for j in the range of 0 to the number of CTUs in the slice minus 1 (inclusive) is derived as the picture raster scan CTU address of the j-th CTU, with the order of the CTUs being as follows:
[0377] 1) CTUs in different slices in a sub-picture are ordered such that a first CTU in a first slice with a smaller slice index value precedes a second CTU in a second slice with a larger slice index value.
[0378] 2) CTUs within a slice in a sub-image are sorted in the slice's CTU raster scan. Related to LMCS for solving the third problem (including sub-problems)
[0379] 2. Two-level control of LMCS is introduced (which includes two aspects: luma mapping (reshaping process, represented by RP) and luma-dependent chroma residual scaling (CRS)), where higher-level (e.g., picture level) and lower-level (e.g., slice level) control are used, and the existence of lower-level control information depends on the high-level control information. In addition, the following also applies:
[0380] a. In the first example, one or more of the following sub-bullets are applied:
[0381] i. A first indicator (eg, ph_lmcs_enabled_type) may be signaled at a higher level (eg, in a picture header (PH)) to specify how to enable LMCS at a lower level of a non-binary value.
[0382] 1) In one example, when the first indicator is equal to X (e.g., X=2), it specifies that LMCS is enabled for all stripes associated with the PH; when the first indicator is equal to Y (Y!=X) (e.g., Y=1), it specifies that LMCS is enabled for one or more but not all stripes associated with the PH; when the first indicator is equal to Z (Z!=X and Z!=Y) (e.g., Z=0), it specifies that LMCS is disabled for all stripes associated with the PH
[0383] a) Alternatively, or in addition, when the first indicator is not present, the value of the indicator is inferred to be equal to a default value, such as Z.
[0384] 2) In one example, when the first indicator is equal to X (e.g., X=2), it specifies that LMCS is disabled for all stripes associated with the PH; when the first indicator is equal to Y (Y!=X) (e.g., Y=1), it specifies that LMCS is disabled for one or more but not all stripes associated with the PH; when the first indicator is equal to Z (Z!=X and Z!=Y) (e.g., Z=0), it specifies that LMCS is enabled for all stripes associated with the PH
[0385] a) Alternatively, or in addition, when the first indicator is not present, the value of the indicator is inferred to be equal to a default value, such as X.
[0386] 3) Alternatively, and in addition, the first indicator may be conditionally signaled depending on the value of a LMCS enabled flag (eg, sps_lmcs_enabled_flag) in the sequence level.
[0387] 4) Alternatively, in addition, the first indicator may be encoded and decoded using u(v), or u(2) or ue(v).
[0388] 5) Alternatively, or in addition, the first indicator may be encoded or decoded using a truncated unary code.
[0389] 6) Alternatively, in addition, LMCS APS information (eg, ph_lmcs_aps_id) used by the slice and / or CS enablement flag (eg, ph_chroma_residual_scale_flag) may be signaled under conditional checking of the value of the first indicator.
[0390] ii. A second indicator (eg, slice_lmcs_enabled_flag) to enable / disable LMCS for a lower level may be signaled at a lower level (eg, in a slice header) and may be conditionally signaled by checking the value of the first indicator.
[0391] 1) In one example, the second indicator may be signaled under a conditional check of "first indicator equals Y".
[0392] a) Alternatively, under a conditional check of "value of first indicator >> 1" or "value of first indicator / 2" or "value of first indicator & 0x01", the second indicator may be signaled.
[0393] b) Alternatively, or in addition, when the first indicator is equal to X, it can be inferred that it is enabled; or when the first indicator is equal to z, it can be inferred that it is disabled.
[0394] b. In the second example, one or more of the following sub-bullets are applied:
[0395] i. More than one indicator may be signaled at a higher level (eg, in a picture header (PH)) to specify how to enable LMCS at a lower level.
[0396] 1) In one example, two indicators (eg, two 1-bit flags) may be signaled in the PH.
[0397] a) In one example, the first indicator specifies whether there is at least one slice associated with the PH that has LMCS enabled, and the second indicator specifies whether all slices associated with the PH have LMCS enabled.
[0398] i. Alternatively, or in addition, the second indicator may be conditionally signaled based on the value of the first indicator, for example, when the first indicator specifies that there is at least one slice with LMCS enabled.
[0399] i. Alternatively, and additionally, when the second indicator is not present, it is inferred that all stripes have LMCS enabled.
[0400] ii. Alternatively, and in addition, the third indicator may be conditionally signaled in the SH according to the value of the second indicator, for example when the second indicator specifies that not all slices have LMCS enabled.
[0401] i. Alternatively, or in addition, when the third indicator is not present, it may be inferred from the value of the first and / or second indicator (eg, inferred to be equal to the value of the first indicator).
[0402] b) Alternatively, the first indicator specifies whether there is at least one slice associated with the PH with LMCS disabled, and the second indicator specifies whether all slices associated with the PH have LMCS disabled.
[0403] i. Alternatively, or in addition, the second indicator may be conditionally signaled based on the value of the first indicator, for example, when the first indicator specifies that there is at least one stripe with disabled LMCS.
[0404] i. Alternatively, and in addition, when the second indicator is not present, it is inferred that LMCS is disabled for all stripes associated with the PH.
[0405] ii. Alternatively, and in addition, the third indicator may be conditionally signaled in the SH depending on the value of the second indicator, for example, when the second indicator specifies that not all slices have LMCS disabled.
[0406] i. Alternatively, or in addition, when the third indicator is not present, it may be inferred from the values of the first and / or second indicators (eg, inferred to be equal to the value of the first indicator).
[0407] 2) Alternatively, and in addition, the first indicator may be conditionally signaled according to the value of a LMCS enabled flag (eg, sps_lmcs_enabled_flag) in the sequence level.
[0408] ii. A third indicator (eg, slice_lmcs_enabled_flag) to enable / disable LMCS for a lower level may be signaled at a lower level (eg, in a slice header) and may be conditionally signaled by checking the values of the first indicator and / or the second indicator.
[0409] 1) In one example, under the conditional check of "not all slices have LMCS enabled" or "not all slices have LMCS disabled", the third indicator may be signaled.
[0410] c. In yet another example, the first and / or second and / or third indicators mentioned in the first / second example may be used to control the use of RP or CRS instead of LMCS.
[0411] 3. The semantics of the three LMCS flags in SPS / PH / SH are updated as follows:
[0412] sps_lmcs_enabled_flag is equal to 1, specified in CLVS use sps_lmcs_enabled_flag equal to 0 specifies that luma mapping and chroma scaling are not used in CLVS.
[0413] ph_lmcs_enabled_flag equal to 1 specifies all stripes associated with PH Enables luma mapping and chroma scaling. ph_lmcs_enabled_flag equal to 0 specifies that one, more, or Disables luma mapping and chroma scaling for all slices. When not present, the value of ph_lmcs_enabled_flag is inferred to be equal to 0.
[0414] slice_lmcs_enabled_flag is equal to 1 to specify the current slice Enables brightness mapping and chroma scaling. slice_lmcs_enabled_flag equal to 0 specifies the current slice Luma mapping and chroma scaling are not enabled. When slice_lmcs_enabled_flag is not present, it is inferred to be equal to 0.
[0415] a. Change the PH and / or SH LMCS signaling so that when LMCS is used for all slices of a picture, there is no LMCS signaling in the SH.
[0416] i. Alternatively, additionally, how to infer LMCS depends on PH LMCS signaling.
[0417] 1) In one example, when LMCS is used for all slices of a picture, it is inferred to be enabled; and when LMCS is not used for all slices of a picture, it is inferred to be disabled.
[0418] Related to affine AMVR
[0419] 4. The semantics of the affine AMVR flag in SPS is updated as follows:
[0420] sps_affine_amvr_enabled_flag equal to 1 specifies that adaptive motion vector difference precision may be used in motion vector coding and decoding in affine inter mode. sps_affine_amvr_enabled_flag equal to 0 specifies that adaptive motion vector difference precision may not be used in motion vector coding and decoding in affine inter mode. When not present, the value of sps_affine_amvr_enabled_flag is inferred to be equal to 0.
[0421] Related to the scaling list that solves the fifth and sixth problems
[0422] 5. For blocks, scaling of transform coefficients and / or non-transform coefficients is controlled according to syntax elements associated with video regions (eg, slices) that are smaller than a picture.
[0423] a. In one example, a scaling list flag in a slice header, such as slice_scaling_list_present_flag, is used, for example, as in Embodiment 3, instead of using the SPS flag sps_scaling_list_enabled_flag and the PH flag ph_scaling_list_present_flag to control the scaling process of transform coefficients.
[0424] 6. Two-level control of explicit scaling lists is introduced, where a higher level control (e.g., picture level) and a lower level control (e.g., slice level) are used, and the presence of the lower level control information depends on the higher level control information. Explicit scaling lists can be used for scaling of transform coefficients and / or non-transform coefficients. In addition, the following also applies:
[0425] a. In the first example, one or more of the following sub-bullets are applied:
[0426] i. A first non-binary value indicator (eg, ph_explicit_scaling_list_enabled_type) may be signaled at a higher level (eg, in a picture header (PH)) to specify how to enable the explicit scaling list at a lower level.
[0427] 1) In one example, when the first indicator is equal to X (e.g., X=2), it specifies that explicit scaling lists are enabled for all slices associated with the PH; when the first indicator is equal to Y (Y!=X) (e.g., Y=1), it specifies that explicit scaling lists are enabled for one or more but not all slices associated with the PH; when the first indicator is equal to Z (Z!=X and Z!=Y) (e.g., Z=0), it specifies that explicit scaling lists are disabled for all slices associated with the PH.
[0428] a) Alternatively, or in addition, when the first indicator is not present, the value of the indicator is inferred to be equal to a default value, such as Z.
[0429] b) Alternatively, when the first indicator is equal to Y (Y!=X) (eg, Y=1), it specifies that the use of explicit scaling lists in the scaling process of transform and / or non-transform coefficients is enabled for the picture when decoding slices.
[0430] c) Alternatively, when the first indicator is equal to Y (Y!=X) (eg, Y=1), it specifies that the use of explicit scaling lists in the scaling process of transform and / or non-transform coefficients may be enabled for the picture when decoding a slice.
[0431] 2) In one example, when the first indicator is equal to X (e.g., X=2), it specifies that the explicit scaling list is disabled for all strips associated with the PH; when the first indicator is equal to Y (Y!=X) (e.g., Y=1), it specifies that the explicit scaling list is disabled for one or more but not all strips associated with the PH; when the first indicator is equal to Z (Z!=X and Z!=Y) (e.g., Z=0), it specifies that the explicit scaling list is enabled for all strips associated with the PH.
[0432] a) Alternatively, or in addition, when the first indicator is not present, the value of the indicator is inferred to be equal to a default value, such as X.
[0433] b) Alternatively, when the first indicator is equal to Y (Y!=X) (eg, Y=1), it specifies that the use of explicit scaling lists in the scaling process of transform and / or non-transform coefficients may be disabled for the picture when decoding a slice.
[0434] c) Alternatively, when the first indicator is equal to Y (Y!=X) (eg, Y=1), it specifies that the use of explicit scaling lists in the scaling process of transform and / or non-transform coefficients is disabled for the picture when decoding a slice.
[0435] 3) Alternatively, and in addition, the first indicator may be conditionally signaled according to the value of an explicit scaling list enabled flag (eg, sps_explicit_scaling_list_enabled_flag) in the sequence level.
[0436] 4) Alternatively, in addition, the first indicator may be encoded or decoded using u(v), or u(2), or ue(v).
[0437] 5) Alternatively, or in addition, the first indicator may be encoded or decoded using a truncated unary code.
[0438] 6) Alternatively, in addition, scaling list APS information used by the slice (eg, ph_explicit_scaling_list_aps_id) may be signaled under a conditional check of the value of the first indicator.
[0439] ii. A second indicator (eg, slice_scaling_list_present_flag) to enable / disable the lower level explicit scaling list may be signaled at a lower level (eg, in the slice header) and may be conditionally signaled by checking the value of the first indicator.
[0440] 1) In one example, the second indicator may be signaled under a conditional check of "first indicator equals Y".
[0441] a) Alternatively, the second indicator may be signaled under a conditional check of "value of first indicator >> 1" or "value of first indicator / 2" or "value of first indicator & 0x01".
[0442] b) Alternatively, or in addition, when the first indicator is equal to X, the second indicator may be absent and inferred to be enabled; or when the first indicator is equal to Z, the second indicator may be inferred to be disabled.
[0443] b. In the second example, one or more of the following sub-bullets are applied:
[0444] iii. Multiple indicators may be signaled at a higher level (eg, in a picture header (PH)) to specify how to enable explicit scaling lists at a lower level.
[0445] 1) In one example, two indicators (e.g., two 1-bit flags) may be signaled in the PH
[0446] a) In one example, the first indicator specifies whether there is at least one slice associated with the PH that has the explicit scaling list enabled. And the second indicator specifies whether all slices associated with the PH have the explicit scaling list enabled.
[0447] i. Alternatively, or in addition, the second indicator may be signaled conditionally based on the value of the first indicator, for example, when the first indicator specifies that there is at least one slice for which an explicit scaling list is enabled.
[0448] i. Alternatively, and additionally, when the second indicator is not present, it is inferred that all slices have explicit scaling lists enabled.
[0449] ii. Alternatively, if the first indicator in the conforming bitstream is false, then the second indicator is required to be false.
[0450] ii. Alternatively, in addition, the third indicator can be conditionally signaled in the SH based on at least one of the values of the first indicator and the second indicator, for example, when the first indicator specifies that at least one slice enables the explicit scaling list and the second indicator specifies that not all slices enable the explicit scaling list.
[0451] i. Alternatively, or in addition, when the third indicator is not present, it may be inferred from the values of the first and / or second indicators (eg, inferred to be equal to the value of the first indicator).
[0452] b) Alternatively, the first indicator specifies whether there is at least one slice associated with the PH for which the explicit scaling list is disabled, and the second indicator specifies whether all slices associated with the PH have the explicit scaling list disabled.
[0453] i. Alternatively, or in addition, the second indicator may be signaled conditionally according to the value of the first indicator, for example, when the first indicator specifies that there is at least one slice for which the explicit scaling list is disabled.
[0454] i. Alternatively, in addition, when the second indicator is absent, inferring
[0455] Disables explicit scaling for all associated strips in the list.
[0456] ii. Alternatively, in addition, the third indicator can be conditionally signaled in the SH based on at least one of the values of the first indicator and the second indicator, for example, when the first indicator specifies that at least one slice enables the explicit scaling list and the second indicator specifies that not all slices disable the explicit scaling list.
[0457] i. Alternatively, or in addition, when the third indicator is not present, it may be inferred from the values of the first and / or second indicators (eg, inferred to be equal to the value of the first indicator).
[0458] 2) Alternatively, and in addition, the first indicator may be conditionally signaled according to the value of an explicit scaling list enabled flag (eg, sps_explicit_scaling_list_enabled_flag) in the sequence level.
[0459] iv. A third indicator (eg, slice_explicit_scaling_list_enabled_flag) to enable / disable the lower level explicit scaling list may be signaled at a lower level (eg, in a slice header) and may be conditionally signaled by checking the values of the first indicator and / or the second indicator.
[0460] 1) In one example, under the conditional check of "not all slices have explicit scaling lists enabled" or "not all slices have explicit scaling lists disabled", the third indicator may be signaled.
[0461] c. In a third example, two 1-bit flags may be signaled at a higher level (eg, in a picture header (PH)) to specify how to enable explicit scaling lists at a lower level (eg, in a slice header (SH)).
[0462] i. The first PH flag (eg named ph_all_slices_use_explicit_scaling_list_flag) equal to 1 specifies that all slices of the picture use explicit scaling lists. The first PH flag equal to 0 specifies that each slice of the picture may or may not use explicit scaling lists.
[0463] ii. A second PH flag (eg, named ph_no_slice_uses_explicit_scaling_list_flag) equal to 1 specifies that no slice of the picture uses an explicit scaling list. A second PH flag equal to 0 specifies that each slice of the picture may or may not use an explicit scaling list.
[0464] iii. Only when the first PH flag is equal to 0, the second PH flag is signaled.
[0465] iv. When the first PH flag is equal to 1 or when (the first PH flag is equal to 0 and the second PH flag is equal to 0), the scaling list APS ID is signaled in the PH.
[0466] v. When the first PH flag is equal to 0 and the second flag is equal to 0, a SH flag (eg named slice_use_explicit_scaling_list_flag) is signaled in the SH.
[0467] vi. When the first PH flag is equal to 1, the value of the SH flag is inferred to be equal to 0.
[0468] vii. When the first PH flag is equal to 0 and the second PH flag is equal to 0, the value of the SH flag is inferred to be equal to 0.
[0469] viii. If the value of the SH flag is equal to 1, the slice is decoded using an explicit scaling list.
[0470] Otherwise, the strips are decoded using an explicit scaling list.
[0471] d. In a fourth example, one or more indicators of the presence or absence of one or more or each zoom list related aspect (eg, enabled / disabled, APS ID) in the PH or SH may be signaled.
[0472] i. Alternatively, an indicator is used, and further, the indicator is a 1-bit flag.
[0473] 1) In one example, when the indicator specifies that the relevant aspects are present in the PH, all slices infer the values present in the PH, and the signaling of those relevant aspects is skipped in the SH.
[0474] 2) In one example, when the indicator specifies that relevant aspects are present in the SH and signaling of those relevant aspects is skipped in the PH.
[0475] ii. In one example, one or more indicators are signaled in the PH.
[0476] iii. In another example, one or more indicators are signaled in the PPS.
[0477] iv. In another example, one or more indicators are signaled in the SPS.
[0478] 7. Whether to enable explicit scaling lists of LFNST codec blocks can be indicated in the sequence / picture / slice level instead of in the APS.
[0479] a. In one example, syntax elements (eg, flags) may be signaled in SPS / PPS / PH / SH.
[0480] i. Alternatively, or in addition, the syntax element may be signaled under a conditional check of whether LFNST is enabled (eg, sps_lfnst_enabled_flag equal to 1).
[0481] ii. Alternatively, and in addition, for a video block, whether to apply an explicit scaling list or a default scaling list may depend on the value of a syntax element and whether LFNST is enabled for the video block.
[0482] 8. It is proposed that a deblocking filtering process can be performed on samples of a video unit along the boundary of the video unit based on padding samples. Fig.11 An example is shown in which samples p0, p1, and p2 are samples of a video unit along a boundary of the video unit, and samples q0, q1, and q2 are padding samples to be used in the filtering process.
[0483] a. In one example, a video unit may be a picture.
[0484] b. In one example, the video unit may be a sub-picture.
[0485] c. In one example, the video unit may be a slice.
[0486] d. In one example, a video unit may be a slice.
[0487] e. In one example, the video unit may be a refresh area in a progressive decoding refresh (GDR), and the boundary may be a boundary between a refresh area and a non-refresh area in a picture, and further, such a boundary may be signaled as a virtual boundary.
[0488] f. In one example, padding can be performed in a replication manner. For example, the values of q0, q1, and q2 can all be set equal to the value of p0.
[0489] In one example, padding may be performed in a symmetrical manner. For example, the values of q0, q1, and q2 may be set equal to the values of p0, p1, and p2, respectively.
[0490] 6. Examples
[0491] In the embodiments, some text is bold and italic to highlight the changes to the current version of the specification. The italic text will be deleted from the description of the current VVC specification of the corresponding embodiment.
[0492] 6.1. Example 1: Sub-picture support
[0493] This embodiment is directed to Project 1 and its subprojects.
[0494] 3 Definitions
[0495]
[0496] Picture level slice index: The index of the slice list in the picture, in the order they are signaled in the PPS when rect_slice_flag is equal to 1.
[0497] 6.5.1CTB Raster Scanning, Slice Scanning and Sub-Picture Scanning Processing
[0498] …
[0499] ctbAddrX ranges from 0 to PicWidthInCtbsY (inclusive) CtbToTileColBd[ctbAddrX] Specifies the range from the horizontal CTB address to the left column boundary in CTB units. The conversion is derived as follows:
[0500]
[0501] Note 3 – The array CtbToTileColBd[] in the above derivation The size is 1 larger than the actual picture width in the CTB.
[0502] ctbAddrY ranges from 0 to PicHeightInCtbsY (inclusive) CtbToTileRowBd[ctbAddrY] Specifies the vertical CTB address to the upper slice column boundary in CTB units. The conversion is derived as follows:
[0503]
[0504]
[0505] Note 4 – In the above derivation The size of CtbToTileRowBd[] and ctbToTileRowIdx[] is 1 larger than the actual image height in the CTB.
[0506]
[0507]
[0508]
[0509]
[0510]
[0511]
[0512]
[0513] When rect_slice_flag is equal to 1, the list NumCtusInSlice[i] for i ranging from 0 to num_slices_in_pic_minus1 (inclusive) specifies the number of CTUs in the i-th slice, the list SliceTopLeftTileIdx[i] for i ranging from 0 to num_slices_in_pic_minus1 (inclusive) specifies the slice index of the slice containing the first CTU in the slice, and the matrix CtbAddrInSlice[i][j] for i ranging from 0 to num_slices_in_pic_minus1 (inclusive) and j ranging from 0 to j to NumCtusInSlice[i]–1 (inclusive) specifies the picture raster scan address of the j-th CTB within the i-th slice, and the variable NumSlicesInTile[i] specifies the number of slices in the slice containing the i-th slice, as derived as follows:
[0514]
[0515]
[0516] ....
[0518] D.7.2 Sub-picture level information SEI message semantics
[0519] …
[0520] ref_level_fraction_minus1[i][j] plus 1 specifies the fraction of the level constraint associated with ref_level_idc[i] to which the j-th sub-picture complies, as specified in clause A.4.1.
[0521] The variable SubpicSizeY[j] is set equal to (subpic_width_minus1[j]+1)*CtbSizeY*(subpic_height_minus1[j]+1)*CtbSizeY.
[0522] When not present, the value of ref_level_fraction_minus1[i][j] is inferred to be equal to Ceil(256*SubpicSizeY[j]÷PicSizeInSamplesY*MaxLumaPs(general_level_idc)÷MaxLumaPs(ref_level_idc[i])-1.
[0523] The variable RefLevelFraction[i][j] is set equal to ref_level_fraction_minus1[i][j]+1.
[0524] The variables SubpicNumTileCols[j] and SubpicNumTileRows[j] are derived as follows:
[0525] ...
[0527] - The value of should be less than or equal to MaxTileCols, and The value of shall be less than or equal to MaxTileRows, where MaxTileCols and MaxTileRows are specified for level ref_level_idc[i] in Table A.1.
[0528] - The value of shall be less than or equal to MaxTileCols*MaxTileRows*RefLevelFraction[i][j], where MaxTileCols and MaxTileRows are specified for level ref_level_idc[i] in Table A.1. ...
[0530] The variable SubpicSetAccLevelFraction[i] of the total level fraction relative to the reference level ref_level_idc[i], and the variables SubpicSetCpbSizeVcl[i], SubpicSetCpbSizeNal[i], SubpicSetBitRateVcl[i] and SubpicSetBitRateNal[i] of the sub-picture group are derived as follows:
[0531] ...
[0533] 6.2. Example 2: LMCS support
[0534] In this embodiment, the syntax and semantics of the LMCS related syntax elements in the picture header are modified so that when LMCS is used for all slices of a picture, there is no LMCS signaling in the SH.
[0535] 7.3.2.7 Picture Header Structure Syntax
[0536]
[0537]
[0538] 7.3.7.1 General Strip Header Syntax
[0539]
[0540] ph_lmcs_enabled_ Equal to M (eg, M=1) 1 specifies that luma mapping and chroma scaling are enabled for all slices associated with PH. ph_lmcs_enabled_ Equal to 0 specifies that Disable one, multiple or all PH-related strips Luma mapping and chroma scaling. When not present, ph_lmcs_enabled_ The value of is inferred to be equal to 0.
[0541] slice_lmcs_enabled_flag equal to 1 specifies that luma mapping and chroma scaling are enabled for the current slice. slice_lmcs_enabled_flag equal to 0 specifies that luma mapping and chroma scaling are not enabled for the current slice. When slice_lmcs_enabled_flag is not present, it is inferred to be equal to 0 Alternatively, when slice_lmcs_enabled_flag is not present, it is inferred to be equal to 0
[0542] In the above example, the values of M and N can be set to 1 and 2, respectively. Alternatively, the values of M and N can be set to 2 and 1, respectively.
[0543] 6.3. Example 3: Method #1 to support zooming list
[0544] In this embodiment, the text related to the scaling list is modified so that the scaling process of the transform coefficients is controlled using the scaling list flag in the slice header instead of the SPS flag of the scaling list and the PH flag of the scaling list.
[0545] Sequence Parameter Set RBSP Syntax and Semantics
[0546] ....
[0548]
[0549] ...
[0551] Image header structure syntax and semantics
[0552] ...
[0554]
[0555]
[0556] ph_ _scaling_list_aps_id specifies the adaptation_parameter_set_id of the scaling list APS. With aps_params_type equal to SCALING_APS and adaptation_parameter_set_id equal to ph_ The TemporalId of the APS NAL unit of _scaling_list_aps_id shall be less than or equal to the TemporalId of the picture associated with the PH. ...
[0558] General Strip Header Syntax and Semantics
[0559] ...
[0561]
[0562] ...
[0564] Scaling of transform coefficients ...
[0566] For the derivation of the scaling transform coefficients d[x][y] for x=0..nTbW-1, y=0..nTbH–1, the following applies:
[0567] --The intermediate scaling factor m[x][y] is derived as follows:
[0568] -- m[x][y] is set equal to 16 if one or more of the following conditions are true:
[0569] --sps_scaling_list_enabled_flag is equal to 0.
[0570] --ph_scaling_list_present_flag is equal to 0.
[0571]
[0572] --transform_skip_flag[xTbY][yTbY][cIdx] is equal to 1.
[0573] --scaling_matrix_for_lfnst_disabled_flag is equal to 1, and ApplyLfnstFlag is equal to 1.
[0574] --... ...
[0576] 6.4. Example 4: Method #2 to support zooming list
[0577] In this embodiment, the text associated with the zoom list is modified so that the following applies:
[0578] 1) Use the scaling list flag in the slice header instead of using the SPS flag for scaling list and the PH flag for scaling list to control the scaling process of the transform coefficients.
[0579] 2) When an explicit scaling list is used for all slices of a picture, there is no scaling list signaling in the SH.
[0580] In the following, the values of M and N may be set to 1 and 2, respectively.
[0581] Alternatively, the values of M and N can be set to 2 and 1, respectively.
[0582] Alternatively, the following applies:
[0583] 1) The syntax element ph_explicit_scaling_list_enabled_type is renamed to ph_explicit_scaling_list_mode.
[0584] 2) The values of ph_explicit_scaling_list_enabled_type equal to M, N, and 0 are replaced with ph_explicit_scaling_list_mode equal to A, B, and C (eg, 0, 1, and 2), respectively.
[0585] 3) The syntax condition “if(ph_explicit_scaling_list_enabled_type>0” of ph_explicit_scaling_list_aps_id is replaced with “if(ph_explicit_scaling_list_mode!=C)”.
[0586] Sequence Parameter Set RBSP Syntax and Semantics
[0587] ....
[0589]
[0590] ...
[0592] Image header structure syntax and semantics
[0593]
[0594] ...
[0596]
[0597]
[0598] ph_ _scaling_list_aps_id specifies the adaptation_parameter_set_id of the scaling list APS. With aps_params_type equal to SCALING_APS and adaptation_parameter_set_id equal to ph_ The TemporalId of the APS NAL unit of scaling_list_aps_id shall be less than or equal to the TemporalId of the picture associated with the PH. ...
[0600] General Strip Header Syntax and Semantics
[0601]
[0602] ...
[0604]
[0605] ...
[0607] Scaling of transform coefficients ...
[0609] For the derivation of the scaling transform coefficients d[x][y] for x=0..nTbW-1, y=0..nTbH–1, the following applies:
[0610] --The intermediate scaling factor m[x][y] is derived as follows:
[0611] -- m[x][y] is set equal to 16 if one or more of the following conditions are true:
[0612] --sps_scaling_list_enabled_flag is equal to 0.
[0613] --ph_scaling_list_present_flag is equal to 0.
[0614]
[0615] --transform_skip_flag[xTbY][yTbY][cIdx] is equal to 1.
[0616] --scaling_matrix_for_lfnst_disabled_flag is equal to 1, and ApplyLfnstFlag is equal to 1.
[0617] -... ...
[0619] Figure 5 1 is a block diagram of an example video processing system 1900 that may implement various techniques disclosed herein. Various implementations may include some or all of the components of system 1900. System 1900 may include an input 1902 for receiving video content. The video content may be received in a raw or uncompressed format (e.g., 8 or 10 bit multi-component pixel values), or may be received in a compressed or encoded format. Input 1902 may represent a network interface, a peripheral bus interface, or a storage interface. Examples of network interfaces include wired interfaces (such as Ethernet, passive optical networks (PONs), etc.) and wireless interfaces (such as Wi-Fi or cellular interfaces).
[0620] System 1900 may include a codec component 1904 that can implement various codecs or encoding methods described in this document. Codec component 1904 can reduce the average bit rate of the video from input 1902 to the output of codec component 1904 to generate a codec representation of the video. Therefore, codec technology is sometimes referred to as video compression or video transcoding technology. The output of codec component 1904 can be stored or sent via the connected communication, as represented by component 1906. The bitstream (or codec) representation of the storage or communication of the video received at input 1902 can be used by component 1908 to generate pixel values or displayable video sent to display interface 1910. The process of generating user-visible video from the bitstream representation is sometimes referred to as video decompression. In addition, although some video processing operations are referred to as "codec" operations or tools, it should be understood that codec tools or operations are used at the encoder, and corresponding decoding tools or operations of the results of the inverse codec will be performed by the decoder.
[0621] Examples of peripheral bus interfaces or display interfaces may include universal serial bus (USB) or high definition multimedia interface (HDMI) or Displayport, etc. Examples of storage interfaces include SATA (Serial Advanced Technology Attachment), PCI, IDE interface, etc. The technology described in this document can be implemented in various electronic devices, such as mobile phones, laptop computers, smart phones, or other devices capable of digital data processing and / or video display.
[0622] Figure 6 3600. The apparatus 3600 may be used to implement one or more of the methods described herein. The apparatus 3600 may be implemented in a smartphone, a tablet, a computer, an Internet of Things (IoT) receiver, etc. The apparatus 3600 may include one or more processors 3602, one or more memories 3604, and video processing hardware 3606. The processor(s) 3602 may be configured to implement one or more of the methods described in this document. The memory(s) 3604 may be used to store data and code that is used to implement the methods and techniques described herein. The video processing hardware 3606 may be used to implement some of the techniques described in this document in hardware circuits.
[0623] Figure 8 is a block diagram illustrating an example video coding system 100 that may utilize the techniques of this disclosure.
[0624] like Figure 8As shown, the video coding system 100 may include a source device 110 and a target device 120. The source device 110 generates encoded video data, which may be referred to as a video encoding device. The target device 120 may decode the encoded video data generated by the source device 110, which may be referred to as a video decoding device.
[0625] Source device 110 may include a video source 112 , a video encoder 114 , and an input / output (I / O) interface 116 .
[0626] The video source 112 may include a source such as a video capture device, an interface for receiving video data from a video content provider, and / or a computer graphics system that generates video data, or a combination of these sources. The video data may include one or more pictures. The video encoder 114 encodes the video data from the video source 112 to generate a bit stream. The bit stream may include a bit sequence that forms a codec representation of the video data. The bit stream may include a codec picture and associated data. The codec picture is a codec representation of the picture. The associated data may include a sequence parameter set, a picture parameter set, and other syntax elements. The I / O interface 116 includes a modulator / demodulator (modem) and / or a transmitter. The encoded video data may be directly sent to the target device 120 via the I / O interface 116 through the network 130a. The encoded video data may also be stored on a storage medium / server 130b for access by the target device 120.
[0627] Target device 120 may include an I / O interface 126 , a video decoder 124 , and a display device 122 .
[0628] The I / O interface 126 may include a receiver and / or a modem. The I / O interface 126 may obtain encoded video data from the source device 110 or the storage medium / server 130b. The video decoder 124 may decode the encoded video data. The display device 122 may display the decoded video data to the user. The display device 122 may be integrated with the target device 120, or may be outside the target device 120 configured to be connected to an external display device.
[0629] The video encoder 114 and the video decoder 124 may operate according to a video compression standard, such as the High Efficiency Video Codec (HEVC) standard, the Versatile Video Codec (VVC) standard, and other current and / or other standards.
[0630] Fig. 9 is a block diagram illustrating an example of a video encoder 200, which may be Figure 8 1. The video encoder 114 in the system 100 is shown in FIG.
[0631] Video encoder 200 may be configured to perform any or all of the techniques of this disclosure. Fig. 9 In the example of , video encoder 200 includes multiple functional components. The techniques described in this disclosure can be shared between various components of video encoder 200. In some examples, a processor can be configured to perform any or all of the techniques described in this disclosure.
[0632] The functional components of the video encoder 200 may include a segmentation unit 201, a prediction unit 202 (which may include a mode selection unit 203, a motion estimation unit 204, a motion compensation unit 205 and an intra-frame prediction unit 206), a residual generation unit 207, a transform unit 208, a quantization unit 209, an inverse quantization unit 210, an inverse transform unit 211, a reconstruction unit 212, a buffer 213 and an entropy coding unit 214.
[0633] In other examples, the video encoder 200 may include more, fewer, or different functional components. In one example, the prediction unit 202 may include an intra block copy (IBC) unit. The IBC unit may perform prediction in an IBC mode, wherein at least one reference picture is a picture in which the current video block is located.
[0634] Furthermore, some components such as the motion estimation unit 204 and the motion compensation unit 205 may be highly integrated, but are not shown for the purpose of explanation. Fig. 9 In the example, they are shown separately.
[0635] The partitioning unit 201 may partition a picture into one or more video blocks. The video encoder 200 and the video decoder 300 may support various video block sizes.
[0636] The mode selection unit 203 may select one of the intra or inter coding modes, for example, based on the error result, and provide the resulting intra or inter coding block to the residual generation unit 207 to generate residual block data and to the reconstruction unit 212 to reconstruct the coding block for use as a reference picture. In some examples, the mode selection unit 203 may select a combination of intra and inter prediction (CIIP) mode, wherein the prediction is based on an inter prediction signal and an intra prediction signal. The mode selection unit 203 may also select the accuracy of the motion vector (e.g., sub-pixel or whole pixel accuracy) for the block in the case of inter prediction.
[0637] To perform inter-frame prediction on the current video block, the motion estimation unit 204 may generate motion information for the current video block by comparing the current video block with one or more reference frames from the buffer 213. The motion compensation unit 205 may determine a predicted video block for the current video block based on the motion information and decoded samples of a picture from the buffer 213 (rather than a picture associated with the current video block).
[0638] Motion estimation unit 204 and motion compensation unit 205 may perform different operations for the current video block, for example, performing different operations depending on whether the current video block is in an I slice, a P slice, or a B slice.
[0639] In some examples, the motion estimation unit 204 may perform unidirectional prediction of the current video block, and the motion estimation unit 204 may search for a reference video block of the current video block in the reference picture of list 0 or list 1. The motion estimation unit 204 may then generate a reference index indicating a reference video block in the reference picture of list 0 or list 1 and a motion vector indicating a spatial displacement between the current video block and the reference video block. The motion estimation unit 204 may output the reference index, the prediction direction indicator, and the motion vector as motion information of the current video block. The motion compensation unit 205 may generate a predicted video block of the current block based on the reference video block indicated by the motion information of the current video block.
[0640] In other examples, the motion estimation unit 204 may perform bidirectional prediction of the current video block, and the motion estimation unit 204 may search for a reference video block of the current video block in the reference picture of list 0 and may also search for another reference video block of the current video block in the reference picture of list 1. The motion estimation unit 204 may then generate a reference index indicating a reference video block in the reference picture of list 0 or list 1 and a motion vector indicating a spatial displacement between the reference video block and the current video block. The motion estimation unit 204 may output the reference index and the motion vector of the current video block as motion information of the current video block. The motion compensation unit 205 may generate a predicted video block of the current video block based on the reference video block indicated by the motion information of the current video block.
[0641] In some examples, motion estimation unit 204 may output the entire set of motion information for use in a decoding process by a decoder.
[0642] In some examples, motion estimation unit 204 may not output a full set of motion information for the current video. Instead, motion estimation unit 204 may reference motion information of another video block to signal the motion information of the current video block. For example, motion estimation unit 204 may determine that the motion information of the current video block is sufficiently similar to the motion information of an adjacent video block.
[0643] In one example, motion estimation unit 204 may indicate in a syntax structure associated with the current video block a value that indicates to video decoder 300 that the current video block has the same motion information as another video block.
[0644] In another example, the motion estimation unit 204 may identify another video block and a motion vector difference (MVD) in a syntax structure associated with the current video block. The motion vector difference indicates the difference between the motion vector of the current video block and the motion vector of the indicated video block. The video decoder 300 may use the motion vector of the indicated video block and the motion vector difference to determine the motion vector of the current video block.
[0645] As discussed above, the video encoder 200 may predictively signal motion vectors. Two examples of predictive signaling techniques that may be implemented by the video encoder 200 include advanced motion vector prediction (AMVP) and merge mode signaling.
[0646] The intra prediction unit 206 may perform intra prediction on the current video block. When the intra prediction unit 206 performs intra prediction on the current video block, the intra prediction unit 206 may generate prediction data for the current video block based on decoded samples of other video blocks in the same picture. The prediction data for the current video block may include a predicted video block and various syntax elements.
[0647] The residual generation unit 207 can generate residual data for the current video block by subtracting (e.g., indicated by a minus sign) the predicted video block(s) of the current video block from the current video block. The residual data for the current video block may include residual video blocks corresponding to different sample components of samples in the current video block.
[0648] In other examples, such as in skip mode, there may be no residual data for the current video block, and the residual generation unit 207 may not perform a subtraction operation.
[0649] Transform processing unit 208 may generate one or more transform coefficient video blocks for the current video block by applying one or more transforms to the residual video block associated with the current video block.
[0650] After the transform processing unit 208 generates the transform coefficient video block associated with the current video block, the quantization unit 209 may quantize the transform coefficient video block associated with the current video block based on one or more quantization parameter (QP) values associated with the current video block.
[0651] The inverse quantization unit 210 and the inverse transform unit 211 may apply inverse quantization and inverse transform, respectively, to the transform coefficient video block to reconstruct the residual video block from the transform coefficient video block. The reconstruction unit 212 may add the reconstructed residual video block to the corresponding samples from one or more prediction video blocks generated by the prediction unit 202 to generate a reconstructed video block associated with the current block for storage in the buffer 213.
[0652] After the reconstruction unit 212 reconstructs the video block, a loop filtering operation may be performed to reduce video blocking artifacts in the video block.
[0653] The entropy coding unit 214 may receive data from other functional components of the video encoder 200. When the entropy coding unit 214 receives data, the entropy coding unit 214 may perform one or more entropy coding operations to generate entropy-coded data and output a bitstream including the entropy-coded data.
[0654] Some embodiments of the technology of the present disclosure include deciding or determining to enable a video processing tool or mode. In an example, when a video processing tool or mode is enabled, the encoder will use or implement the tool or mode in the processing of the video block, but it is not necessary to modify the resulting bitstream based on the use of the tool or mode. In other words, when a video processing tool or mode is enabled based on a decision or determination, the conversion of the bitstream (or bitstream representation) from the video block to the video will use the video processing tool or mode. In another example, when a video processing tool or mode is enabled, the decoder will process the bitstream using the knowledge that the bitstream has been modified based on the video processing tool or mode. In other words, using the video processing tool or mode enabled based on a decision or determination, the conversion from the bitstream of the video to the video block will be performed.
[0655] Fig.10 is a block diagram illustrating an example of a video decoder 300, which may be Figure 8 1. The video decoder 114 in the system 100 is shown in FIG.
[0656] Video decoder 300 may be configured to perform any or all of the techniques of this disclosure. Fig.10 In the example of , video decoder 300 includes multiple functional components. The techniques described in this disclosure can be shared between various components of video decoder 300. In some examples, a processor can be configured to perform any or all of the techniques described in this disclosure.
[0657] exist Fig.10In the example of , the video decoder 300 includes an entropy decoding unit 301, a motion compensation unit 302, an intra-frame prediction unit 303, an inverse quantization unit 304, an inverse transform unit 305, a reconstruction unit 306 and a buffer 307. In some examples, the video decoder 300 can be performed with respect to the video encoder 200 ( Fig. 9 ) is a decoding process that is the overall inverse of the encoding process described.
[0658] The entropy decoding unit 301 may retrieve an encoded bitstream. The encoded bitstream may include entropy coded video data (e.g., coded blocks of video data). The entropy decoding unit 301 may decode the entropy coded video, and based on the entropy decoded video data, the motion compensation unit 302 may determine motion information including motion vectors, motion vector precision, reference picture list index, and other motion information. The motion compensation unit 302 may determine such information, for example, by performing AMVP and merge modes.
[0659] The motion compensation unit 302 may generate a motion compensated block, possibly interpolated based on an interpolation filter. An identifier of the interpolation filter to be used with sub-pixel precision may be included in the syntax element.
[0660] The motion compensation unit 302 may calculate interpolated values of a sub-integer number of pixels of the reference block using an interpolation filter used by the video encoder 200 during encoding of the video block. The motion compensation unit 302 may determine the interpolation filter used by the video encoder 200 based on received syntax information and use the interpolation filter to generate a prediction block.
[0661] The motion compensation unit 302 can use some syntax information to determine: the size of the blocks used to encode (multiple) frames and / or (multiple) slices of the coded video sequence, the partitioning information describing how each macroblock of the pictures of the coded video sequence is partitioned, the mode indicating how to encode each partition, one or more reference frames (and reference frame lists) for each inter-frame coded block, and other information for decoding the coded video sequence.
[0662] The intra prediction unit 303 may form a prediction block from spatially neighboring blocks using, for example, an intra prediction mode received in the bitstream. The inverse quantization unit 303 inversely quantizes (i.e., dequantizes) the quantized video block coefficients provided in the bitstream and decoded by the entropy decoding unit 301. The inverse transform unit 303 applies an inverse transform.
[0663] The reconstruction unit 306 may sum the residual block with the corresponding prediction block generated by the motion compensation unit 202 or the intra prediction unit 303 to form a decoded block. As desired, a deblocking filter may also be applied to filter the decoded block to remove blocking artifacts. The decoded video block is then stored in a buffer 307, which provides reference blocks for subsequent motion compensation / intra prediction and also produces decoded video for presentation on a display device.
[0664] A list of some preferred solutions for some embodiments is provided next.
[0665] The following solution illustrates an example implementation of the technique discussed in the previous section (eg, item 1).
[0666] 1. A video processing method (eg, Figure 7 ), comprising: performing (902) a conversion between a video comprising one or more video pictures and a codec representation of the video, wherein each video picture comprises one or more slices, wherein the codec representation complies with a format rule; wherein the format rule specifies first information signaled in the codec representation and second information derived from the codec representation, wherein at least the first information or the second information is related to a row index or a column index of the one or more slices.
[0667] 2. The method according to solution 1, wherein the format rule specifies that a slice column index is derived for each codec tree unit column of each video picture.
[0668] 3. The method according to solution 1, wherein the format rule specifies that a slice row index is derived for each codec tree unit row of each video picture.
[0669] The following solutions illustrate example embodiments of the techniques discussed in the previous section (eg, item 2). In these solutions, the video region may be a video picture, and the video unit may be a video block or a codec tree unit or a video slice.
[0670] 4. A video processing method, comprising: performing conversion between video units of a video area of a video and a codec representation of the video, wherein the codec representation complies with a format rule; wherein the format rule stipulates that first control information at the video area controls whether second control information is included at the video unit level; wherein the first control information and / or the second control information includes information about luminance mapping and chroma scaling (LMCS) or chroma residual scaling (CRS) or reshaping processing (RP) used for the conversion.
[0671] 5. The method according to solution 4, wherein the first control information comprises an indicator indicating whether the second control information is included in the codec representation.
[0672] 6. The method according to solution 4-5, wherein a specific value of the first control information indicates that LMCS is disabled for all video units in the video area.
[0673] 7. A method according to any one of solutions 4-6, wherein the second control information controls the enabling of the LMCS at the video unit.
[0674] 8. The method according to solution 4, wherein the first control information comprises a plurality of indicators.
[0675] The following solutions illustrate example embodiments of the techniques discussed in the previous section (eg, items 5-8).
[0676] 9. A video processing method, comprising: performing conversion between a video including one or more video areas and a codec representation of the video, the one or more video areas including one or more video units; wherein the codec representation complies with format rules; wherein the format rules stipulate that the codec representation includes a two-level signaling notification of a scaling list that can be used for conversion of at least some video units, wherein a high-level signaling notification in the two-level signaling notification at the video area level controls whether and where a low-level signaling notification in the two-level signaling notification at the video unit level is included in the codec representation; wherein the scaling list includes information about scaling for conversion of at least some video units.
[0677] 10. The method of solution 9, wherein a binary value field in the high-level signaling controls the occurrence of the low-level signaling.
[0678] 11. The method according to any of solutions 9-10, wherein a binary value field in the low level signaling notification controls disabling of a zoom list included in the low level signaling notification.
[0679] 12. A method according to any of solutions 9-11, wherein one or more video regions correspond to video pictures.
[0680] 13. The method according to any of solutions 9-12, wherein one or more video units include video slices or video codec units.
[0681] The following solutions illustrate example embodiments of the techniques discussed in the previous section (eg, items 5-8).
[0682] 14. A method of video processing, comprising: determining a scaling list of a low-frequency inseparable transform for conversion between a video unit of a video and a codec representation of the video; and performing the conversion based on the determination, wherein a syntax structure in the codec representation indicates whether the scaling list is enabled for the video unit.
[0683] 15. The method according to solution 14, wherein the syntax structure is included in a sequence header or a picture header or a slice header.
[0684] 16. The method according to any of solutions 14-15, wherein the video unit comprises a video block.
[0685] 17. A method according to any of solutions 1 to 16, wherein converting comprises encoding the video into a codec representation.
[0686] 18. A method according to any of solutions 1 to 16, wherein converting comprises decoding a codec representation to generate pixel values of the video.
[0687] 19. A video decoding device, comprising a processor configured to implement the method in one or more of solutions 1 to 18.
[0688] 20. A video coding and decoding device, comprising a processor configured to implement the method in one or more of solutions 1 to 18.
[0689] 21. A computer program product having computer code stored thereon, which, when executed by a processor, causes the processor to implement the method of any one of solutions 1 to 18.
[0690] 22. The methods, apparatus, or systems described in this document.
[0691] In the solution described herein, an encoder can comply with the format rules by generating a codec representation according to the format rules. In the solution described herein, a decoder can parse syntax elements in the codec representation using the format rules, wherein the presence and absence of syntax elements are understood according to the format rules to produce decoded video.
[0692] Fig.12 12 is a flow diagram of an example method 1200 of video processing. Operation 1202 includes performing conversion between a video block of a video and a bitstream of the video, wherein the bitstream conforms to a format rule, wherein the format rule provides that a first syntax element is included in the bitstream at a video region level, the first syntax element indicating whether a scaling process is applied to transform coefficients of the video block or to non-transform coefficients of the video block, and wherein the video region is smaller than a video picture of the video.
[0693] In some embodiments of the method 1200, the format rules provide that the first syntax element is in a slice header of a slice, and the format rules provide that the scaling process is not controlled by a second syntax element, the second syntax element indicating whether a scaling list is enabled in a sequence parameter set in the bitstream. In some embodiments of the method 1200, the second syntax element specifies whether a scaling list is enabled, the scaling list being included in a scaling list adaptation parameter set in the scaling process of transform coefficients during slice conversion. In some embodiments of the method 1200, the format rules provide that the first syntax element is in a slice header of a slice, and the format rules provide that the scaling process is not controlled by a third syntax element, the third syntax element indicating whether the scaling list is present in a picture header in the bitstream. In some embodiments of the method 1200, the first syntax element specifies whether a scaling list is enabled, the scaling list being included in a scaling list adaptation parameter set in the scaling process of transform coefficients during slice conversion.
[0694] Fig.13 13 is a flow chart of an example method 1300 of video processing. Operation 1302 includes performing conversion between video units of a video region of a video and a bitstream of the video, wherein the bitstream complies with a format rule, wherein the format rule provides that first control information of a first level of the video region in the bitstream indicates whether second control information is included in a second level of the video unit in the bitstream, and wherein the first control information and / or the second control information includes information about whether the scaling list is for a transformed coefficient for conversion or a non-transformed coefficient for conversion.
[0695] In some embodiments of the method 1300, the first control information selectively includes a first indicator, the first indicator indicating whether the scaling list is enabled for one or more slices of the first level of the video area to specify whether the scaling list is enabled at the second level of the video unit, and the first indicator is a non-binary value. In some embodiments of the method 1300, the first level of the video area includes a picture header. In some embodiments of the method 1300, the first level of the video area includes a picture header, the first control information includes a first indicator, when the first indicator is equal to a first value, the scaling list is enabled for all slices of the picture header, when the first indicator is equal to a second value, the scaling list is enabled for all slices less than the picture header, when the first indicator is equal to a third value, the scaling list is disabled for all slices of the picture header, and the first value, the second value, and the third value are different from each other. In some embodiments of the method 1300, when the first control information does not include the first indicator, the value of the first indicator is inferred to be a default value.
[0696] In some embodiments of the method 1300, the first level of the video region includes a picture header, the first control information includes a first indicator, when the first indicator is equal to a first value, the scaling list is enabled for all slices of the picture header, when the first indicator is equal to a second value, when decoding a slice of the video region including the video picture, the scaling list is enabled, when the first indicator is equal to a third value, the scaling list is disabled for all slices of the picture header, and the first value, the second value, and the third value are different from each other. In some embodiments of the method 1300, the first level of the video region includes a picture header, the first control information includes a first indicator, when the first indicator is equal to a first value, the scaling list is enabled for all slices of the picture header, when the first indicator is equal to a second value, when decoding a slice of the video region including the video picture, the scaling list is selectively enabled, when the first indicator is equal to a third value, the scaling list is disabled for all slices of the picture header, and the first value, the second value, and the third value are different from each other.
[0697] In some embodiments of the method 1300, the first level of the video region includes a picture header, the first control information includes a first indicator, when the first indicator is equal to a first value, the scaling list is disabled for all slices of the picture header, when the first indicator is equal to a second value, the scaling list is disabled for all slices less than the picture header, when the first indicator is equal to a third value, the scaling list is enabled for all slices of the picture header, and the first value, the second value, and the third value are different from each other. In some embodiments of the method 1300, the first level of the video region includes a picture header, the first control information includes a first indicator, when the first indicator is equal to a first value, the scaling list is enabled for all slices of the picture header, when the first indicator is equal to a second value, when decoding a slice of the video region including a video picture, the scaling list is selectively disabled, when the first indicator is equal to a third value, the scaling list is disabled for all slices of the picture header, and the first value, the second value, and the third value are different from each other. In some embodiments of method 1300, the first level of the video area includes a picture header, the first control information includes a first indicator, when the first indicator is equal to a first value, the scaling list is enabled for all slices of the picture header, when the first indicator is equal to a second value, the scaling list is disabled when decoding a slice of the video area including a video picture, when the first indicator is equal to a third value, the scaling list is disabled for all slices of the picture header, and the first value, the second value and the third value are different from each other.
[0698] In some embodiments of the method 1300, whether the first indicator is selectively included in the first control information is based on the value of a syntax element in the bitstream indicating whether the scaling list is enabled at the sequence level. In some embodiments of the method 1300, the first indicator is encoded and decoded with u(v) or u(2) or ue(v). In some embodiments of the method 1300, the first indicator is encoded and decoded with a truncated unary code. In some embodiments of the method 1300, based on the value of the first indicator indicating whether the scaling list is enabled for one or more slices of the first level of the video area, adaptive parameter set (APS) information of the scaling list used by the one or more slices is included in the bitstream. In some embodiments of the method 1300, the second control information selectively includes a second indicator, the second indicator indicating whether the scaling list is enabled or disabled for one or more slices of the second level of the video unit, based on the value of the first indicator included in the first control information, the second indicator is included in the bitstream, and the first indicator indicates whether the scaling list is enabled or disabled for one or more slices of the second level of the video unit. In some embodiments of the method 1300, the second control information includes a slice header. In some embodiments of the method 1300, in response to the first indicator being equal to the first value, the second indicator is included in the second control information. In some embodiments of the method 1300, in response to performing the following conditional check, the second indicator is included in the second control information: the first indicator >>1, or the first indicator / 2, or the first indicator &0x01, where >> describes a right shift operation, and where & describes a bitwise logical AND operation.
[0699] In some embodiments of the method 1300, in response to the second indicator not being present in the second control information: in response to the first indicator being equal to the first value, inferring that the value of the second indicator is enabled, or in response to the first indicator being equal to the third value, inferring that the value of the second indicator is disabled, and the first value, the second value of the first indicator, and the third value are different from each other. In some embodiments of the method 1300, the first control information includes a plurality of indicators indicating whether the scaling list is enabled for one or more slices of the first level of the video area to specify whether the scaling list is enabled at the second level of the video unit, and the plurality of indicators have non-binary values. In some embodiments of the method 1300, the plurality of indicators include at least two indicators included in a picture header. In some embodiments of the method 1300, the at least two indicators include a first indicator specifying whether the scaling list is enabled for at least one slice associated with the picture header, and the at least two indicators selectively include a second indicator specifying whether the scaling list is enabled for all slices associated with the picture header. In some embodiments of the method 1300, the second indicator is selectively signaled in the plurality of indicators based on the value of the first indicator.
[0700] In some embodiments of the method 1300, the value of the first indicator specifies at least one slice enable scaling list. In some embodiments of the method 1300, in response to the second indicator not being present in the bitstream, it is inferred that all slices associated with the picture header are enabled scaling lists. In some embodiments of the method 1300, in response to the first indicator being false in the consistency bitstream, the second indicator is false. In some embodiments of the method 1300, at least two indicators include a third indicator, and the third indicator is selectively signaled in the slice header based on the first value of the first indicator or the second value of the second indicator. In some embodiments of the method 1300, the first value of the first indicator specifies at least one slice enable scaling list, and the second value of the second indicator specifies all slice disable scaling lists. In some embodiments of the method 1300, in response to the third indicator not being present in the bitstream, the value of the third indicator is inferred based on the first value of the first indicator and / or the second value of the second indicator. In some embodiments of the method 1300, the at least two indicators include a first indicator that specifies whether the scaling list is disabled for at least one slice associated with the picture header, and the at least two indicators selectively include a second indicator that specifies whether the scaling list is disabled for all slices associated with the picture header.
[0701] In some embodiments of the method 1300, based on a first value of the first indicator, a second indicator is signaled in a plurality of indicators. In some embodiments of the method 1300, the first value of the first indicator specifies at least one slice disabled scaling list. In some embodiments of the method 1300, in response to the second indicator not being present in the bitstream, it is inferred that all slices associated with the picture header are disabled scaling lists. In some embodiments of the method 1300, at least two indicators selectively include a third indicator in the slice header based on a second value of the second indicator. In some embodiments of the method 1300, the first value of the first indicator specifies at least one slice enabled scaling list, and wherein the second value of the second indicator specifies all slice enabled scaling lists. In some embodiments of the method 1300, in response to the third indicator not being present in the bitstream, the value of the third indicator is inferred based on the first value of the first indicator and / or the second value of the second indicator. In some embodiments of the method 1300, the plurality of indicators selectively include the first indicator based on a value of a syntax element indicating whether the scaling list is enabled at a sequence level.
[0702] In some embodiments of the method 1300, the plurality of indicators selectively include a third indicator indicating whether the scaling list is enabled or disabled at a second level of the video unit, and the third indicator is selectively signaled based on a first value of the first indicator and / or a second value of the second indicator. In some embodiments of the method 1300, the third indicator is selectively signaled based on a second indicator indicating that the scaling list is not enabled for all slices or that the scaling list is not disabled for all slices. In some embodiments of the method 1300, two 1-bit syntax elements are selectively signaled in first control information at a first level of a video region to specify whether the scaling list is enabled at a second level of the video unit, the video region comprising a video picture, and the video unit comprising one or more slices. In some embodiments of the method 1300, the first control information comprises a picture header of a video picture, and wherein the second control information comprises a slice header of a slice from the one or more slices.
[0703] In some embodiments of the method 1300, the two 1-bit syntax elements include a first picture header syntax element, in response to the first picture header syntax element being equal to 1, all slices of the video picture use the scaling list, and in response to the first picture header syntax element being equal to 0, each slice of the video picture selectively uses the scaling list. In some embodiments of the method 1300, the two 1-bit syntax elements include a second picture header syntax element, in response to the second picture header syntax element being equal to 1, none of the slices of the video picture use the scaling list, and in response to the second picture header syntax element being equal to 0, each slice of the video picture selectively uses the scaling list. In some embodiments of the method 1300, when the first picture header syntax element is equal to 0, the second picture header syntax element is signaled in the bitstream. In some embodiments of the method 1300, an adaptation parameter set (APS) identifier of the scaling list is signaled in the picture header, in response to: the first picture header syntax element being equal to 1, or the first picture header syntax element being equal to 0, and the second picture header syntax element being equal to 0. In some embodiments of the method 1300 , the slice header syntax element is signaled in a slice header in response to: the first picture header syntax element being equal to zero, and the second picture header syntax element being equal to zero.
[0704] In some embodiments of the method 1300, in response to the first picture header syntax element being equal to 1, a value of a slice header syntax element in a slice header is inferred to be 0. In some embodiments of the method 1300, in response to the first picture header syntax element being equal to 0 and the second picture header syntax element being equal to 0, a value of a slice header syntax element in a slice header is inferred to be 0. In some embodiments of the method 1300, in response to the value of the slice header syntax element in the slice header being equal to 1, the scaling list is used for decoding the slice. In some embodiments of the method 1300, the bitstream selectively includes one or more indicators, the one or more indicators indicating whether information related to the scaling list is indicated in a picture header or in a slice header. In some embodiments of the method 1300, the one or more indicators include a one-bit indicator.
[0705] In some embodiments of the method 1300, in response to a one-bit indicator indicating that a picture header in the first control information includes information related to a scaling list, all slices of the video unit infer values from the picture header and exclude signaling of information related to the scaling list from the slice header. In some embodiments of the method 1300, in response to a one-bit indicator indicating that information related to a scaling list is indicated in a slice header, information related to the scaling list is excluded from the picture header. In some embodiments of the method 1300, one or more indicators are signaled in a picture header. In some embodiments of the method 1300, one or more indicators are signaled in a picture parameter set (PPS). In some embodiments of the method 1300, one or more indicators are signaled in a sequence parameter set (SPS).
[0706] Fig.14 Flowchart of an example method 1400 for video processing. Operation 1402 includes performing conversion between a video block of a video and a bitstream of the video, wherein the video block is converted using a low frequency inseparable transform, wherein the bitstream complies with a format rule, the format rule providing that a syntax element is included at a syntax level of the bitstream, wherein the syntax element indicates whether use of a scaling matrix derived from a reference scaling list is enabled for the video block, and wherein the syntax level is a sequence level, a picture level, or a slice level.
[0707] In some embodiments of the method 1400, the syntax element is included in a sequence parameter set (SPS), a picture parameter set (PPS), a picture header, or a slice header. In some embodiments of the method 1400, the syntax element is included in the SPS, the PPS, the picture header, or the slice header based on whether a low frequency inseparable transform is enabled for the video block. In some embodiments of the method 1400, the syntax element is included in the SPS based on whether a value of sps_lfnst_enabled_flag is equal to 1. In some embodiments of the method 1400, the method further includes determining whether to apply a scaling matrix derived from an explicit scaling list or a default scaling list to the video block and whether a low frequency inseparable transform is enabled for the video block based on the syntax element.
[0708] Fig.15 1 is a flow chart of an example method 1500 for video processing. Operation 1502 includes: for a conversion between a video unit of a video and a bitstream of the video, determining to perform deblocking filtering on samples of the video unit along a boundary of the video unit using padding samples outside a boundary of the video unit. Operation 1504 includes performing the conversion according to the determination.
[0709] In some embodiments of the method 1500, the video unit comprises a video picture. In some embodiments of the method 1500, the video unit comprises a sub-picture of the video picture. In some embodiments of the method 1500, the video unit comprises a strip. In some embodiments of the method 1500, the video unit comprises a slice. In some embodiments of the method 1500, the video unit is a refresh area obtained from a gradual decoding refresh (GDR), and wherein the boundary is located between a refresh area and an unrefreshed area of the video picture. In some embodiments of the method 1500, the boundary is indicated as a virtual boundary in the bitstream. In some embodiments of the method 1500, the padding process is performed in a repeated manner so that the values of two or more of the padding samples are equal to the values of the samples in the samples along the boundary of the video unit. In some embodiments of the method 1500, the padding process is performed in a symmetrical manner so that the values of at least a first padding sample and a second padding sample from the padding samples are equal to the values of the first sample and the second sample from the samples along the boundary of the video unit, respectively.
[0710] In some embodiments, performing the conversion includes encoding the video into a bitstream. In some embodiments, performing the conversion includes generating a bitstream from the video, and the method further includes storing the bitstream in a non-transitory computer-readable recording medium. In some embodiments, performing the conversion includes decoding the video from the bitstream. In some embodiments, a video decoding device includes a processor configured to implement one or more operations described in this patent document. In some embodiments, a video encoding and decoding device includes a processor configured to implement one or more operations described in this patent document. In some embodiments, a computer program product having computer instructions stored thereon, the instructions causing the processor to implement one or more operations described in this patent document when executed by the processor. In some embodiments, a non-transitory computer-readable storage medium storing a bitstream generated according to one or more operations described in this patent document. In some embodiments, a non-transitory computer-readable storage medium storing instructions causing the processor to perform one or more operations described in this patent document. In some embodiments, a method of generating a bitstream includes: generating a bitstream of a video according to one or more operations described in this patent document, and storing the bitstream on a computer-readable program medium. In some embodiments, a method, an apparatus, a bitstream generated according to a disclosed method or system described in this document.
[0711] In this document, the term "video processing" may refer to video encoding, video decoding, video compression, or video decompression. For example, during the conversion from a pixel representation of a video to a corresponding bitstream representation, a video compression algorithm may be applied, and vice versa. As defined by the syntax, the bitstream representation of the current video block may correspond to bits that are co-located or scattered at different positions within the bitstream, for example. For example, a macroblock may be encoded based on the error residual values of the transform and the codec and also using bits in the header and other fields in the bitstream. In addition, during the conversion, the decoder may parse the bitstream based on this determination, knowing that some fields may or may not be present, as described in the above solution. Similarly, the encoder may determine whether to include or not include certain syntax fields, and generate the codec representation accordingly by including or excluding the syntax fields from the codec representation.
[0712] The disclosure and other schemes, examples, embodiments, modules and functional operations described in this document may be implemented in digital electronic circuits or in computer software, firmware or hardware, containing the structures disclosed in this document and the equivalents of their structures, or a combination of one or more of them. The disclosed and other embodiments may be implemented as one or more computer program products encoded on a computer-readable medium, such as one or more computer program instruction modules, for execution by a data processing device or for controlling the operation of a data processing device. The computer-readable medium may be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composite that affects a machine-readable propagable signal, or a combination of one or more thereof. The term "data processing device" encompasses all devices, equipment and machines for processing data, including, for example, a programmable processor, a computer or multiple processors or computers. In addition to hardware, the device may also include code that creates an execution environment for the computer program in question, for example, code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them. A propagation signal is an artificially generated signal, for example, a machine-generated electrical, optical or electromagnetic signal, which is generated to encode information for transmission to a suitable receiver device.
[0713] A computer program (also referred to as a program, software, software application, script or code) can be written in any form of programming language, including compiled or interpreted languages, and can be deployed in any form, including stand-alone programs or modules, components, subroutines or other units suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program can be stored in a portion of a file that stores other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple collaborative files (e.g., files storing one or more modules, subroutines or code portions). A computer program can be deployed to execute on one computer or on multiple computers, which are located at one site or distributed across multiple sites and interconnected by a communication network.
[0714] The processes and logic flows described in this document may be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows may also be performed by special purpose logic circuits (e.g., field programmable gate arrays (FPGAs) or application specific integrated circuits (ASICs)), and the apparatus may be implemented as special purpose logic circuits (e.g., FPGAs or ASICs).
[0715] Processors suitable for the execution of computer programs include, for example, both general-purpose and special-purpose microprocessors, and any one or more processors of any type of digital computer. Typically, the processor will receive instructions and data from a read-only memory or a random access memory or both. The basic elements of a computer are a processor for performing instructions and one or more memory devices for storing instructions and data. Typically, a computer will also include one or more mass storage devices (such as magnetic, magneto-optical disks or optical disks) for storing data, or be operably coupled to receive data from a mass storage device (such as magnetic, magneto-optical disks or optical disks) or transfer data to a mass storage device (such as magnetic, magneto-optical disks or optical disks), or both. However, a computer does not have to have such devices. Computer-readable media suitable for storing computer program instructions and data contain all forms of non-volatile memory, media and memory devices, including, for example, semiconductor memory devices (such as EPROM, EEPROM and flash memory devices); disks (such as internal hard disks or removable disks); magneto-optical disks; and CD ROM and DVD-ROM disks. The processor and memory can be supplemented by special-purpose logic circuits, or incorporated in special-purpose logic circuits.
[0716] Although this patent document contains many details, these details should not be interpreted as limitations on any subject matter or the scope of protection that can be claimed, but as descriptions of features of specific embodiments specified in specific technologies. In this patent document, certain features described in the context of separate embodiments may also be implemented in combination in a single embodiment. On the contrary, the various features described in the context of a single embodiment may also be implemented in multiple embodiments, respectively, or in various suitable sub-combinations. In addition, although features may be described as working in certain combinations and even initially required in the same manner as described above, one or more features from the claimed combination may be removed from the combination in some cases, and the claimed combination may be directed to a sub-combination or a variation of the sub-combination.
[0717] Similarly, although operations are depicted in a particular order in the drawings, this should not be understood as requiring that such operations be performed in the particular order shown or in the sequential order shown, or that all illustrated operations be performed, in order to achieve the desired results. Furthermore, the separation of various system components in the embodiments described in this patent document should not be understood as requiring such separation in all embodiments.
[0718] Only a few implementations and examples are described, and other implementations, enhancements, and variations may be made based on what is described and illustrated in this patent document.
Claims
1. A video processing method, comprising: performing a first conversion between a video chunk of a video and a bitstream of said video, The video block is converted using a low-frequency inseparable transform. wherein the bitstream complies with a format rule, the format rule stipulates that a first syntax element is included at a sequence level of the bitstream, and The first syntax element indicates whether to enable the use of an explicit scaling matrix for a block coded and decoded using the low-frequency inseparable transform, The format rule further provides that a third syntax element is included in a slice header in the bitstream to control a scaling process applied to transform coefficients or non-transform coefficients, and Whether the first syntax element is included in the sequence parameter set SPS depends on the value of a second syntax element included in the SPS, wherein the first syntax element is sps_scaling_matrix_for_lfnst_disabled_flag and the second syntax element is sps_lfnst_enabled_flag.
2. The method according to claim 1, wherein: The first syntax element is included in the SPS based on whether the low-frequency inseparable transform is enabled.
3. The method according to claim 1, wherein: When the value of the second syntax element included in the SPS is equal to 1, the first syntax element is included in the SPS, and The value of the second syntax element being equal to 1 indicates that the low-frequency inseparable transform is enabled.
4. The method according to claim 1, further comprising: Based on a value of the first syntax element and whether the low-frequency inseparable transform is enabled for the video block, it is determined whether to apply an explicit scaling matrix from the explicit scaling matrix or a default scaling matrix to the video block.
5. The method according to claim 4, wherein: When the value of the first syntax element is equal to 1, it indicates that the explicit scaling matrix is disabled for the block encoded and decoded with the low-frequency inseparable transform, and the low-frequency inseparable transform is enabled for the video block, and the default scaling matrix is applied to the video block.
6. The method according to claim 5, wherein: The scaling factor of the default scaling matrix is equal to 16.
7. The method according to claim 1, wherein: Performing the first conversion includes encoding the video into the bitstream.
8. The method according to claim 1, wherein: Performing the first conversion includes decoding the video from the bitstream.
9. The video processing method according to claim 1, further comprising: performing a second conversion between a current video block of a video and a bitstream of the video, The current video block is subjected to the second conversion using a low-frequency inseparable transform, The bitstream complies with a format rule, wherein the format rule stipulates that a syntax element is included at a syntax level of the bitstream. wherein the syntax element indicates whether use of a scaling matrix derived from a reference scaling list is enabled for the current video block, and The syntax level is a sequence level, a picture level or a slice level.
10. The method according to claim 9, wherein: The syntax element is included in a sequence parameter set SPS, a picture parameter set PPS, a picture header, or a slice header.
11. The method according to claim 10, wherein: The syntax element is included in the SPS, the PPS, the picture header, or the slice header based on whether the low-frequency inseparable transform is enabled for the current video block.
12. The method according to claim 11, wherein: Based on whether the value of sps_lfnst_enabled_flag is equal to 1, the syntax element is included in the SPS.
13. The method according to claim 10, further comprising: Determining whether to apply the scaling matrix derived from an explicit scaling list or a default scaling list to the current video block and whether to enable the low-frequency non-separable transform for the current video block is determined based on the syntax element.
14. The video processing method according to claim 1, further comprising: For a third conversion between a video unit of a video and a bitstream of the video, determining to perform deblock filtering on samples of the video unit along the boundary of the video unit using padding samples outside the boundary of the video unit; and The third conversion is performed according to the determination.
15. The method according to claim 14, wherein: The video unit includes a video picture.
16. The method according to claim 14, wherein: The video unit includes a sub-picture of a video picture.
17. The method according to claim 14, wherein: The video unit includes slices.
18. The method according to claim 14, wherein: The video unit includes a slice.
19. The method according to claim 14, wherein: The video unit is a refresh area obtained from a gradual decoding refresh (GDR), and wherein the boundary is located between the refresh area and a non-refreshed area of the video picture.
20. The method according to claim 19, wherein: The boundaries are indicated in the bitstream as virtual boundaries.
21. The method according to claim 14, wherein: A padding process is performed in a repeated manner such that values of two or more of the padding samples are equal to values of samples of the samples along the boundary of the video unit.
22. The method according to claim 14, wherein: The padding process is performed in a symmetrical manner such that values of at least a first padding sample and a second padding sample from the padding samples are equal to values of a first sample and a second sample from the samples along the boundary of the video unit, respectively.
23. The method according to any one of claims 9 to 13, wherein: Performing the second conversion includes encoding the video into the bitstream.
24. The method according to any one of claims 9 to 13, wherein: Performing the second conversion includes generating the bitstream from the video, and the method further includes storing the bitstream in a non-transitory computer-readable recording medium.
25. The method according to any one of claims 9 to 13, wherein: Performing the second conversion includes decoding the video from the bitstream.
26. An apparatus for processing video data, comprising a processor and a non-transitory memory having instructions thereon, wherein: The instructions, when executed by the processor, cause the processor to: performing a first conversion between a video chunk of a video and a bitstream of said video, The video block is converted using a low-frequency inseparable transform. The bitstream complies with a format rule, wherein the format rule stipulates that a first syntax element is included at a sequence level of the bitstream, The first syntax element indicates whether to enable the use of an explicit scaling matrix for a block coded and decoded using the low-frequency inseparable transform, The format rule further provides that a third syntax element is included in a slice header in the bitstream to control a scaling process applied to transform coefficients or non-transform coefficients, and Whether the first syntax element is included in the sequence parameter set SPS depends on the value of a second syntax element included in the SPS, wherein the first syntax element is sps_scaling_matrix_for_lfnst_disabled_flag and the second syntax element is sps_lfnst_enabled_flag.
27. The device according to claim 26, wherein: The first syntax element is included in the SPS based on whether the low-frequency inseparable transform is enabled.
28. The device according to claim 26, wherein When the value of the second syntax element included in the SPS is equal to 1, the first syntax element is included in the SPS, and The value of the second syntax element being equal to 1 indicates that the low-frequency inseparable transform is enabled.
29. The device according to claim 26, wherein: The instructions further cause the processor to: determining whether to apply an explicit scaling matrix from the explicit scaling matrix or a default scaling matrix to the video block based on a value of the first syntax element and whether the low-frequency inseparable transform is enabled for the video block, When the value of the first syntax element is equal to 1, it indicates disabling the use of the explicit scaling matrix for the block encoded and decoded using the low-frequency inseparable transform, enabling the low-frequency inseparable transform for the video block, and applying the default scaling matrix to the video block.
30. A non-transitory computer-readable storage medium storing instructions that cause a processor to: performing a first conversion between a video chunk of a video and a bitstream of said video, in, The video block is subjected to the first conversion using a low frequency inseparable transform, The bitstream complies with a format rule, wherein the format rule stipulates that a first syntax element is included at a sequence level of the bitstream, The first syntax element indicates whether to enable the use of an explicit scaling matrix for a block coded and decoded using the low-frequency inseparable transform, The format rule further provides that a third syntax element is included in a slice header in the bitstream to control a scaling process applied to transform coefficients or non-transform coefficients, and Whether the first syntax element is included in the sequence parameter set SPS depends on the value of a second syntax element included in the SPS, wherein the first syntax element is sps_scaling_matrix_for_lfnst_disabled_flag and the second syntax element is sps_lfnst_enabled_flag.
31. The non-transitory computer-readable storage medium of claim 30, wherein: The instructions also cause the processor to: determining whether to apply an explicit scaling matrix from the explicit scaling matrix or a default scaling matrix to the video block based on a value of the first syntax element and whether the low-frequency inseparable transform is enabled for the video block, When the value of the first syntax element is equal to 1, it indicates disabling the use of the explicit scaling matrix for the block encoded and decoded using the low-frequency inseparable transform, enabling the low-frequency inseparable transform for the video block, and applying the default scaling matrix to the video block.
32. A non-transitory computer-readable recording medium storing a bit stream of a video generated by a method performed by a video processing device, wherein: The method comprises: generating a bitstream of the video from video chunks of the video, wherein the video block generates the bitstream using a low frequency inseparable transform, The bitstream complies with a format rule, wherein the format rule stipulates that a first syntax element is included at a sequence level of the bitstream, The first syntax element indicates whether to enable the use of an explicit scaling matrix for a block coded and decoded using the low-frequency inseparable transform, The format rule further provides that a third syntax element is included in a slice header in the bitstream to control a scaling process applied to transform coefficients or non-transform coefficients, and Whether the first syntax element is included in the sequence parameter set SPS depends on the value of a second syntax element included in the SPS, wherein the first syntax element is sps_scaling_matrix_for_lfnst_disabled_flag and the second syntax element is sps_lfnst_enabled_flag.
33. The non-transitory computer-readable recording medium according to claim 32, wherein: The method further comprises: determining whether to apply an explicit scaling matrix from the explicit scaling matrix or a default scaling matrix to the video block based on a value of the first syntax element and whether the low-frequency inseparable transform is enabled for the video block, When the value of the first syntax element is equal to 1, it indicates disabling the use of the explicit scaling matrix for a block coded with the low-frequency inseparable transform, enabling the low-frequency inseparable transform for the video block, and applying the default scaling matrix to the video block.
34. A method for storing a bitstream of a video, comprising: generating a bitstream of the video from video blocks of the video; and storing the bitstream in a non-transitory computer-readable recording medium, in, The video block generates the bitstream using a low frequency inseparable transform, wherein the bitstream complies with a format rule, the format rule stipulates that a first syntax element is included at a sequence level of the bitstream, and The first syntax element indicates whether to enable the use of an explicit scaling matrix for a block coded and decoded using the low-frequency inseparable transform, The format rule further provides that a third syntax element is included in a slice header in the bitstream to control a scaling process applied to transform coefficients or non-transform coefficients, and Whether the first syntax element is included in the sequence parameter set SPS depends on the value of a second syntax element included in the SPS, wherein the first syntax element is sps_scaling_matrix_for_lfnst_disabled_flag and the second syntax element is sps_lfnst_enabled_flag.
35. A video decoding apparatus comprising a processor configured to implement the method of any one of claims 9 to 25.
36. A video encoding apparatus comprising a processor configured to implement the method of any one of claims 9 to 25.
37. A non-transitory computer-readable recording medium storing a bit stream of a video generated by a method performed by a video processing device, wherein: The method comprises: a method according to any one of claims 9-25.
38. A non-transitory computer-readable storage medium storing instructions that cause a processor to implement the method of any one of claims 9 to 25.
39. A method for generating a bitstream, comprising: Generating a bitstream of a video according to the method of any one of claims 9 to 25, and The bit stream is stored on a computer-readable recording medium.
Citation Information
Patent Citations
Video decoding method and device
CN101115201A
Method and apparatus for video coding and decoding
CN106464891A
Cited By
Low frequency non-separable transform signaling in video coding
US12615366B2