Carrier board and its applicable power module

Abstract

The present invention provides a carrier and a power module applicable thereto. The carrier includes a circuit board body and at least one prefabricated substrate. The circuit board body has at least one wiring layer. The at least one prefabricated substrate is buried in the circuit board body, and the structure forms the first surface and the second surface of the carrier, the first surface and the second surface are two surfaces opposite to each other, wherein the at least one prefabricated substrate includes an insulating layer and at least one metal layer, the at least one metal layer is arranged on at least one of the upper surface and the lower surface of the insulating layer, and the insulating layer is at least partially exposed outside the metal layer on the plane where the surface in contact with the at least one metal layer is located, the portion of the insulating layer exposed outside the metal layer is an outer edge portion, and the outer edge portion extends into the circuit board body along a horizontal direction. At least one power semiconductor is arranged on the first surface of the carrier, and is electrically connected to the at least one wiring layer and the at least one metal layer, wherein the projections of the at least one power semiconductor and the at least one metal layer in the vertical direction at least partially overlap.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronics, and in particular to a carrier board and a power module applicable thereto. Background Art

[0002] As an important component of power conversion, modern power electronic devices are widely used in power, electronics, motors and energy industries. Ensuring the long-term stable operation of power electronic devices and improving the power conversion efficiency of power electronic devices have always been important goals pursued by technicians in this field.

[0003] As the core component of modern power electronic equipment, the performance of power semiconductor devices directly determines the reliability and power conversion efficiency of power electronic devices. However, the performance of power semiconductor devices is closely related to thermal management. Good thermal management is crucial to improving the conversion efficiency, power density and reliability of power devices. The reasons are as follows: 1) At lower operating temperatures, the conduction loss of power devices such as MOSFET and IGBT will be reduced, which is conducive to improving system efficiency. 2) In many cases, the amount of thermal energy directly determines the power density, because the power converter is a system used to process power conversion. Usually, semiconductor devices are devices with more losses, and the temperature that semiconductor devices can withstand is limited. If this limit is exceeded, the device will lose its working ability or its performance will deteriorate sharply. Therefore, the heat dissipation system needs to control the temperature of the semiconductor chip within an acceptable range. 3) Usually, the proportion of heat dissipation cost to the cost of the system is also relatively large. 4) The life of semiconductor devices is closely related to temperature. In the field of electronics, there is usually such engineering experience that its life will be reduced by half for every 10 degrees increase in temperature. Lower operating temperature can effectively extend the service life of the device.

[0004] On the other hand, conventional packaging forms of power semiconductors generally use copper substrates and double-sided copper-clad ceramic substrates as circuit carriers. However, copper substrates and double-sided copper-clad ceramic substrates cannot achieve higher integration or more flexible system design requirements due to the limitations of single-layer wiring. If a printed circuit substrate with embedded ceramics is used as a thermal carrier for power semiconductors, although it can meet the requirements of thermal conductivity and insulation, and achieve high integration requirements with flexible wiring. However, the organic insulating material in the conventional printed circuit substrate and the embedded ceramic have a large difference in thermal expansion coefficient. Since the organic insulating material in the conventional printed circuit board is directly connected to the ceramic, after temperature cycle reliability testing or long-term operation, the severely mismatched thermal expansion coefficient has the risk of forming through cracks between the ceramic and the surrounding organic insulating material, and the through cracks will cause the insulation withstand voltage between the power semiconductor and the heat sink to fail to meet safety requirements.

[0005] Therefore, how to develop a carrier board and its applicable power module to solve the problems faced by the prior art and achieve the purpose of reducing parasitic inductance and EMI while improving reliability, expandability and heat dissipation performance is indeed a topic that needs to be addressed in this field. Summary of the invention

[0006] The purpose of the present invention is to provide a carrier board and a power module applicable thereto. By optimizing the layout of the components of the carrier board, the overall performance of the carrier board is improved, which helps to achieve the purpose of reducing parasitic inductance and EMI, making its assembly and fixation simple and reliable, while reducing the volume of the power module and the overall power density of the power module.

[0007] Another object of the present invention is to provide a carrier and a power module applicable thereto. A prefabricated substrate is embedded in a circuit board body, and a carrier is constructed to assemble an electronic device. The insulating layer of the prefabricated substrate is made of a ceramic material, the metal layer is connected to the insulating layer by a sintering process, and the insulating layer is at least partially exposed outside the metal layer on the plane where the surface in contact with the metal layer is located, and the portion of the insulating layer exposed outside the metal layer is an outer edge, and the outer edge of the insulating layer extends into the circuit board body along the water direction. Since the outer edge of the insulating layer overlaps the circuit board body in the horizontal direction by at least a width greater than 0.3 mm, and is connected by, for example, a semi-cured sheet, it helps to increase the reliability of the carrier in the vertical direction. Furthermore, the thickness of the metal layer of the prefabricated substrate is greater than the thickness of the wiring layer used to achieve the connection, which helps to improve the heat dissipation properties of the carrier. On the other hand, when the carrier is used in a power module in conjunction with electronic devices such as power semiconductors, clamping components and transformers, it is more helpful to reduce parasitic inductance and EMI, improve reliability, expandability and heat dissipation performance, etc. The connection process between the carrier board and the bridge arm composed of two series-connected power semiconductors is simple to implement, with low cost and high reliability. The bridge arm composed of two series-connected power semiconductors and the clamping assembly can be connected to the second wiring layer of the circuit board body through the metal layer of the prefabricated substrate, and can also be used with a heat sink to achieve heat dissipation and reduce thermal resistance, thereby achieving the purpose of reducing costs, improving the reliability of the power module and the heat dissipation capacity. The wiring layer of the circuit board body can be implemented with a thinner thickness, combined with the metal layer of the prefabricated substrate, it can reduce the manufacturing cost and further improve the reliability of the carrier board. When the two-open power semiconductors and the clamping assembly of the power module are directly arranged on the carrier board, the assembly structure can be simplified, which has the advantages of reducing costs, simplifying processes, improving product yields and product reliability.

[0008] To achieve the aforementioned purpose, the present disclosure provides a carrier including a circuit board body and at least one prefabricated substrate. The circuit board body has at least one wiring layer. The at least one prefabricated substrate is buried in the circuit board body, wherein the prefabricated substrate includes an insulating layer and at least one metal layer, the metal layer is arranged on at least one of an upper surface and a lower surface of the insulating layer, the upper surface and the lower surface of the insulating layer are two surfaces opposite to each other, and the insulating layer is composed of a ceramic material, wherein the metal layer is connected to the insulating layer through a sintering process, and the insulating layer is at least partially exposed outside the metal layer on the plane where the surface in contact with the at least one metal layer is located, and the portion of the insulating layer exposed outside the metal layer is an outer edge portion, and the outer edge portion extends into the circuit board body along a horizontal direction.

[0009] To achieve the above-mentioned purpose, the present invention provides a power module including a carrier and at least one power semiconductor. The carrier includes a circuit board body and at least one prefabricated substrate. The circuit board body has at least one wiring layer. At least one prefabricated substrate is embedded in the circuit board body, and the structure forms the first surface and the second surface of the carrier, the first surface and the second surface are two surfaces opposite to each other, wherein at least one prefabricated substrate includes an insulating layer and at least one metal layer, the at least one metal layer is arranged on at least one of the upper surface and the lower surface of the insulating layer, the upper surface and the lower surface of the insulating layer are two surfaces opposite to each other, and the insulating layer is composed of a ceramic material, wherein the metal layer is connected to the insulating layer through a sintering process, and the insulating layer is at least partially exposed outside the metal layer on the plane where the surface in contact with the at least one metal layer is located, and the portion of the insulating layer exposed outside the metal layer is an outer edge portion, and the outer edge portion extends into the circuit board body along a horizontal direction. At least one power semiconductor is arranged on the first surface of the carrier, and is electrically connected to the at least one wiring layer and the at least one metal layer, wherein the vertical projections of the at least one power semiconductor and the at least one metal layer on the first surface at least partially overlap. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 A cross-sectional view schematically shows a power module in a first preferred embodiment of the present invention;

[0011] Figure 2 A schematic cross-sectional view of a carrier board before lamination according to a preferred embodiment of the present invention is shown;

[0012] Figure 3A and Figure 3B A cross-sectional view schematically shows a power module in a second preferred embodiment of the present invention;

[0013] Figure 4A and Figure 4B A cross-sectional view schematically shows a power module in a third preferred embodiment of the present invention;

[0014] Figure 5The equivalent circuit diagram of the power module in the embodiment of the present invention is schematically shown;

[0015] Figure 6 A cross-sectional view schematically shows a power module in a fourth preferred embodiment of the present invention;

[0016] Figure 7 A cross-sectional view schematically showing a power module in a fifth preferred embodiment of the present invention;

[0017] Figure 8 A cross-sectional view schematically shows a power module in a sixth preferred embodiment of the present invention;

[0018] Fig. 9 A cross-sectional view schematically shows a power module in a seventh preferred embodiment of the present invention;

[0019] Fig.10 A cross-sectional view schematically shows a power module in an eighth preferred embodiment of the present invention;

[0020] Fig.11 A cross-sectional view schematically showing a power module in a ninth preferred embodiment of the present invention, and

[0021] Fig.12 A cross-sectional view schematically shows a power module in a tenth preferred embodiment of the present invention. DETAILED DESCRIPTION

[0022] Some typical embodiments that embody the features and advantages of the present invention will be described in detail in the following description. It should be understood that the present invention can have various changes in different ways, all of which do not depart from the scope of the present invention, and the description and drawings therein are essentially used for illustrative purposes rather than for limiting the present invention. For example, if the following content of the present disclosure describes that a first feature is set on or above a second feature, it means that it includes an embodiment in which the first feature and the second feature are directly in contact, and also includes an embodiment in which the additional feature can be set between the first feature and the second feature, so that the first feature and the second feature may not be in direct contact. In addition, different embodiments of the present disclosure may use repeated reference symbols and / or marks. These repetitions are for the purpose of simplification and clarity, and are not used to limit the relationship between the various embodiments and / or the appearance structure. Furthermore, in order to facilitate the description of the relationship between a component or feature component and another (multiple) component or (multiple) feature component in the drawings, spatially related terms such as "under...", "below", "lower", "above", "upper" and similar terms may be used. In addition to the orientation shown in the drawings, spatially related terms are used to cover different orientations of the device in use or operation. The device may also be positioned in another manner (e.g., rotated 90 degrees or located in other orientations), and the description of the spatially related terms used is interpreted accordingly. In addition, when a component is referred to as "connected to" or "coupled to" another component, it may be directly connected to or coupled to another component, or there may be an intervening component. Although the numerical ranges and parameters of the broad scope of the present disclosure are approximate values, the numerical values ​​are stated in the specific examples as accurately as possible. In addition, it is understood that although the words "first", "second", "third" and the like may be used in the claims to describe different components, these components should not be limited by these terms, and the components described accordingly in the embodiments are represented by different component symbols. These terms are for different components respectively. For example: the first component may be referred to as the second component, and similarly, the second component may also be referred to as the first component without departing from the scope of the embodiment. The term "and / or" used in this way includes any or all combinations of one or more related listed items. Except in the operation / working examples, or unless explicitly stated, all numerical ranges, amounts, values ​​and percentages disclosed herein (such as those percentages of angles, time durations, temperatures, operating conditions, amount ratios and the like, etc.) should be understood to be modified by the term "about" or "substantially" in all embodiments. Accordingly, unless otherwise indicated, the numerical parameters stated in the present disclosure and the appended claims are approximate values ​​that may vary as needed. For example, each numerical parameter should be interpreted at least according to the number of significant figures described and by applying ordinary rounding principles. The range can be expressed in this article as from one endpoint to another or between two endpoints. All ranges disclosed herein include endpoints unless otherwise specified.

[0023] In order to achieve low parasitic inductance and good heat dissipation of a power device or system, the present disclosure provides a carrier board and a power module applicable thereto. Figure 1 The cross-sectional view of the power module in the first preferred embodiment of the present invention is schematically shown. In this example, the carrier board 1 is Figure 1As shown in the bold dashed box, it includes a circuit board body 20 and at least one prefabricated substrate 10. The circuit board body 20 has at least one wiring layer 23. The prefabricated substrate 10 is, for example, a metal-clad ceramic substrate, including an insulating layer 11 and at least one metal layer 12, 13. The at least one metal layer 12, 13 is respectively arranged on the upper surface and the lower surface of the insulating layer 11, and the upper surface and the lower surface of the insulating layer 11 are two surfaces opposite to each other. In this embodiment, the insulating layer 11 is at least partially exposed outside the at least one metal layer 12, 13 on the plane where the surface in contact with the at least one metal layer 12, 13 is located, and the portion of the insulating layer 11 exposed outside the at least one metal layer 12, 13 is an outer edge portion 111. And the outer edge portion 111 of the insulating layer 11 extends into the circuit board body 20 along a horizontal direction such as the XY plane. In the present embodiment, the insulating layer 11 is made of a ceramic material, for example, one selected from the group consisting of alumina ceramic, aluminum nitride ceramic, silicon nitride ceramic, beryllium oxide ceramic and zirconium oxide reinforced alumina ceramic. The upper surface of the insulating layer 11 has an upper metal layer 12, and the lower surface has a lower metal layer 13. At least one metal layer 12, 13 is connected to the insulating layer 11 through a sintering process. In the present embodiment, the metal layers 12, 13 are selected from the group consisting of copper and aluminum. It is worth noting that the thickness of at least one metal layer 12, 13 is greater than the thickness of one of the wiring layers in the at least one wiring layer 23. In the present embodiment, the thickness of the insulating layer 11 ranges from 0.2 mm to 1.6 mm, and more for example has a typical value of the thickness of a ceramic plate of 0.2 mm, 0.25 mm, 0.32 mm, 0.635 mm, 1 mm or 1.6 mm. At least one wiring layer 23 is embedded in the circuit board body 20, extending along the horizontal direction such as the XY plane, and is located on at least one side of at least one prefabricated substrate 10, and at least one wiring layer 23 is between the plane where the upper surface of the prefabricated substrate 10 is located and the plane where the lower surface of the prefabricated substrate 10 is located. At least one wiring layer 23 can also be located above or below at least one prefabricated substrate 10. Of course, the present disclosure is not limited to this. In this embodiment, the prefabricated substrate 10 can be realized by, for example, a direct copper cladding (DBC), direct aluminum cladding (DBA) or active metal brazing copper cladding (AMB) process, wherein the metal layer of DBC and DBA is directly sintered on the ceramic surface, and the metal layer of AMB is sintered on the ceramic surface through active brazing material. The prefabricated substrate 10 is realized by laser cutting and dividing the board after the pattern is made on a large plate body produced by the above process. In order to realize laser cutting, the metal on the surface of the cutting area needs to be removed in a pretreatment procedure. The outer edge portion 111 of the insulating layer 11 of the prefabricated substrate 10 extends beyond the adjacent metal layers 12 and 13 by at least 0.3 mm in width in the horizontal direction of the XY plane, for example.Therefore, the outer edge 111 of the insulating layer 11 overlaps and connects with the circuit board body 20 in the horizontal direction of the XY axis, for example, and has a width of at least greater than 0.3 mm. The prefabricated substrate 10 is embedded in the circuit board body 20, and the insulating layer 11 and at least one metal layer 12, 13 in the prefabricated substrate 10 are stacked, that is, in addition to the insulating layer 11, there is also a metal layer 12 in the thickness direction of the carrier 1, and the metal layer 12 generally has better thermal conductivity, so that the carrier 1 has better heat dissipation performance. Moreover, the CTE of the insulating medium commonly used in the circuit board body 20 in the XY plane is generally about 10ppm due to the constraint of glass fiber, and the CTE (coefficient of thermal expansion) in the Z direction is about 30ppm. The CTE of the insulating layer 11 is relatively low (about 9ppm for alumina ceramics and about 4ppm for aluminum nitride ceramics). By reducing the proportion of the insulating layer 11 in the thickness direction, the stress caused by the inconsistent thermal expansion coefficient can be effectively reduced. Moreover, since the outer edge 111 of the insulating layer 11 and the insulating medium of the circuit board body 20 have good adaptability in the XY plane, the initiation and expansion of cracks at the stress concentration point (the intersection of the horizontal surface of the outer edge 111 of the insulating layer 11 and the vertical side wall of the insulating layer 11) can be effectively prevented, which helps to improve the reliability of the carrier 1 in the vertical direction, such as the Z axis. In addition, it should be particularly noted that the weak position of the structural reliability of the prefabricated substrate 10 is the position where the vertical side wall of the metal layer 12 and the outer edge 111 of the insulating layer 11 meet, and the effective coating of the insulating medium of the circuit board body 20 at this position can improve the structural reliability of the prefabricated substrate 10, such as the temperature cycle life, by more than an order of magnitude. Correspondingly, if the reliability requirements are certain, the prefabricated substrate 10 can use a thinner insulating layer 11 or a thicker metal layer 12 to further improve the heat dissipation performance. In addition, the outer edge 111 of the insulating layer 11 increases the distance between the metal layers 12 and 13 on both sides of the prefabricated substrate 10. At the same time, the insulation distance between the insulating medium of the circuit board body 20 and the insulating layer 11 at the interface can effectively increase the insulation performance. In addition, the XY direction and the Z direction exist in the bonding path, which can further reduce the risk of penetrating cracks and further improve reliability. Furthermore, the thickness of the metal layers 12 and 13 on both sides of the prefabricated substrate 10 can be inconsistent. For example, the thickness of the metal layer 12 carrying the power device can be greater than the thickness of the metal layer 13 facing the radiator.

[0024] Figure 2The cross-sectional view of the carrier before lamination of a preferred embodiment of the present invention is schematically shown. In this embodiment, the circuit board body 20 may, for example, include at least two core boards (Core) 21 and at least half of the prepreg (Prepreg, PP) 22. The at least two core boards 21 are connected by lamination through the at least half of the prepreg 22. The outer edge 111 of the insulating layer 11 is overlapped and connected with the circuit board body 20 in the horizontal direction of, for example, the XY axis through at least half of the prepreg 22. The outer edge 111 of the insulating layer 11 of the prefabricated substrate 10, for example, exceeds the distance of at least one metal layer 12, 13 in the horizontal direction of the XY axis by at least 0.3 mm, so the outer edge 111 of the exceeding part will be connected to the prepreg 22 in the circuit board body 20 along the horizontal direction of, for example, the XY axis. The circuit board body 2 is provided with a core board 21 and a prepreg 22, and both the core board 21 and the prepreg 22 are provided with insulating materials with a thermal expansion coefficient of less than 10ppm / ℃, such as glass fiber, so the thermal expansion coefficients of the core board 21 and the prepreg 22 match those of the insulating layer 11, and it is not easy to cause the carrier 1 to fail. In addition, the glass fiber preset in the prepreg 22 has a very high strength, which can effectively block the path of the expansion of the cracks at the stress concentration point (the intersection of the horizontal surface of the outer edge 111 of the insulating layer 11 and the vertical side wall of the insulating layer 11), especially when the outer edge exceeds the adjacent metal layer above or below it by more than 0.3mm, it can ensure that the probability of crack expansion is reduced to almost 0. Therefore, the carrier 1 has better reliability.

[0025] In this embodiment, the core plate 21 and the semi-cured sheet 22 of the prefabricated substrate 10 and the circuit board body 20 can be pressed together to form an integrated carrier 1. In one embodiment, before the core plate 21 and the semi-cured sheet 22 of the prefabricated substrate 10 and the circuit board body 20 are pressed together, the core plate 21 and the semi-cured sheet 22 need to be cut to corresponding sizes according to the shape of the prefabricated substrate 10, so the semi-cured sheet 22 is arranged above the upper surface or below the lower surface of the outer edge 111 of the metal layer 12, 13 in the horizontal direction of the prefabricated substrate 10, and the outer edge 111 of the insulating layer 11 is connected by direct pressing, and the connection strength is high. In other embodiments, the semi-cured sheet 22 contains glass fiber and insulating inorganic filler. Of course, the present disclosure is not limited to this.

[0026] In the first preferred embodiment, at least one prefabricated substrate 10 is combined with the circuit board body 20 to form a first surface 101 and a second surface 102 of the carrier 1, and the first surface 101 and the second surface 102 are two surfaces opposite to each other, wherein at least one wiring layer 23 and at least one metal layer 12 can be electrically connected to a power semiconductor 30, for example, through the first surface 101 of the carrier 1. Furthermore, the second surface 102 of the carrier 1 can also carry a surface mount component. Of course, the present disclosure is not limited to this.

[0027] Based on the aforementioned carrier board 1 , the present disclosure further discloses a power module to achieve low parasitic inductance and good heat dissipation of a power device or system. Figure 1 A cross-sectional view of a power module in a first preferred embodiment of the present invention is schematically shown. In this embodiment, the power module 2 includes the aforementioned carrier 1 and at least one power semiconductor 30. The carrier 1 includes a circuit board body 20 and at least one prefabricated substrate 10. The circuit board body 20 has at least one wiring layer 23. At least one prefabricated substrate 10 is embedded in the circuit board body 20, and the structure forms a first surface 101 and a second surface 102 of the carrier 1. The first surface 101 and the second surface 102 are two surfaces opposite to each other. In addition, in this embodiment, at least one prefabricated substrate 10 includes an insulating layer 11, an upper metal layer 12 and a lower metal layer 13. The upper metal layer 12 and the lower metal layer 13 are respectively arranged on the upper surface and the lower surface of the insulating layer 11. In this embodiment, the plane where the surface of the insulating layer 11 in contact with the upper metal layer 12 and the lower metal layer 13 is located is at least partially exposed outside the upper metal layer 12 and the lower metal layer 13, and the portion exposed outside the upper metal layer 12 and the lower metal layer 13 is an outer edge portion 111, and the outer edge portion 111 of the insulating layer 11 of the prefabricated substrate 10 exceeds the area of ​​the adjacent upper metal layer 12 and the lower metal layer 13 by at least 0.3 mm in the horizontal direction of the XY axis, for example. In this embodiment, the outer edge portion 111 of the insulating layer 11 extends into the circuit board body 20 along the horizontal direction of the XY plane, for example. At least one power semiconductor 30 is disposed on the first surface 101 of the carrier 1 through, for example, a solder 301, and is electrically connected to at least one wiring layer 23 and the upper metal layer 12, wherein the vertical projection of the at least one power semiconductor 30 and the upper metal layer 12 on the first surface 101 at least partially overlaps. The thickness of the upper metal layer 12 is greater than the thickness of one wiring layer in the wiring layer 23. Disposing the power semiconductor 30 on the carrier 1 helps to improve the reliability and heat dissipation capability of the power module 2 .

[0028] Figure 3A and Figure 3B The cross-sectional view of the power module in the second preferred embodiment of the present invention is schematically shown. In this embodiment, the power module 2a and Figure 1 The power module 1 shown is similar, and the same reference numerals represent the same components, structures and functions, which will not be described in detail. In this embodiment, the power module 2a includes a carrier 1a, a first power semiconductor S1 and a second power semiconductor S2. The carrier 1a is for example Figure 3AAs shown in the bold dashed box, it includes a circuit board body 20 and a prefabricated substrate 10a. The prefabricated substrate 10a includes an insulating layer 11a, a first upper metal layer 121a, a second upper metal layer 122a and a lower metal layer 13a. The first upper metal layer 121a and the second upper metal layer 122a are arranged on the upper surface of the insulating layer 11a, and the lower metal layer 13a is arranged on the lower surface of the insulating layer 11a. In this embodiment, the gap between the first upper metal layer 121a and the second upper metal layer 122a can be controlled within a very small range, such as 0.5mm. In this embodiment, the first power semiconductor S1 and the second power semiconductor S2 can form a main power circuit by being arranged on the first surface 101 of the carrier 1a. The first end T11 of the first power semiconductor S1 is connected to the first upper metal layer 121a, the second end T12 of the first power semiconductor S1 is electrically connected to the first end T21 of the second power semiconductor S2 through the second upper metal layer 122a, and the second end T22 of the second power semiconductor S2 is connected to the first wiring layer 231. Figure 3B As shown. Therefore, the first power semiconductor S1 and the second power semiconductor S2 are connected in series to form a main power current that flows through the first upper layer 121a through the first end T11 of the first power semiconductor S1, and then from the second end T12 of the first power semiconductor S1 through the second upper metal layer 122a to the first end T21 of the second power semiconductor S2, and finally flows out from the second end T22 of the second power semiconductor S2. In this embodiment, the first upper metal layer 121a and the second upper metal layer 122a through which the current path of the power module 2a passes inside the carrier 1a are provided by the prefabricated substrate 10a, and the thickness is between 0.1mm and 1mm. In other embodiments, the thickness of the first upper metal layer 121a and the second upper metal layer 122a can be arbitrarily selected according to the actual current size, and the present disclosure is not limited to this. Under such a structure, the power module 2a can ensure that the path of the main power current is very smooth, and the length of the circuit path is fully reduced, thereby reducing the impedance of the current path, and further reducing the loss on the current path.

[0029] Figure 4A and Figure 4B A cross-sectional view schematically shows a power module in a third preferred embodiment of the present invention. Figure 5 The equivalent circuit diagram of the power module in the embodiment of the present invention is schematically shown. In this embodiment, the power module 2b and FIG. 3A to FIG. 3B The power module 2a shown is similar, and the same reference numerals represent the same components, structures and functions, which will not be described in detail. In this embodiment, the power module 2b includes a carrier 1b, a first power semiconductor S1, a second power semiconductor S2 and a clamping element 40. The carrier 1b is for example Figure 4AAs shown in the bold dashed box, it includes a circuit board body 20, a first prefabricated substrate 10a and a second prefabricated substrate 10b. The first prefabricated substrate 10a includes a first upper metal layer 12a and a first lower metal layer 13a, which are respectively disposed on the upper surface and the lower surface of the first insulating layer 11a. The second prefabricated substrate 10b includes a second upper metal layer 12b and a second lower metal layer 13b, which are respectively disposed on the upper surface and the lower surface of the second insulating layer 11b. The first prefabricated substrate 10a and the second prefabricated substrate 10b are arranged in a horizontal direction such as the XY axis direction, embedded in the circuit board body 20, and form a first surface 101 and a second surface 102 of the carrier 1b. In this embodiment, the first power semiconductor S1, the second power semiconductor S2 and a clamping component 40 are disposed on the first surface 101 of the carrier 1b. The first power semiconductor S1 and the second power semiconductor S2 are respectively arranged on the first prefabricated substrate 10a and the second prefabricated substrate 10b, and are respectively connected to the first upper metal layer 12a and the second upper metal layer 12b through, for example, solder 301. In this embodiment, the first power semiconductor S1 and the second power semiconductor S2 may be, for example, IGBT, SiMOSFET, SiC MOSFET. The first power semiconductor S1 and the second power semiconductor S2 may be, for example, bare chips, or packaged discrete components or packaged power modules. Of course, the present disclosure is not limited to this. In this embodiment, at least one wiring layer 23 includes a first wiring layer 231 and a second wiring layer 232. The first wiring layer 231 is, for example, a surface wiring layer, and the second wiring layer 232 is, for example, an embedded wiring layer, and the present disclosure is not limited to this. In other embodiments, at least one wiring layer 23 is buried in the circuit board body 20, extends along the horizontal direction of, for example, the XY axis, and is located on one side of the first prefabricated substrate 10a or the second prefabricated substrate 10b, and the present disclosure is not limited to this. In this embodiment, the first end T11 of the first power semiconductor S1 is connected to the first upper metal layer 12a of the first prefabricated substrate 10a, and the second end T12 of the first power semiconductor S1 is connected to the first end T21 of the second power semiconductor S2 through the second upper metal layer 12b of the second prefabricated substrate 10B and the first wiring layer 231. The first end T11 of the first power semiconductor S1 and the second end T22 of the second power semiconductor S2 are connected to the clamping component 40 through the second wiring layer 232 and the first wiring layer 231. In this embodiment, the clamping component 40 is, for example, a clamping capacitor corresponding to Figure 5The clamping capacitor Cin in the equivalent circuit diagram. If the clamping capacitor Cin is placed in the power module 2b, for example, when the first power semiconductor S1 and the second power semiconductor S2 of the switch are turned off, the area enclosed by the corresponding high-frequency loop will decrease, and the parasitic inductance of the loop will also decrease. If the clamping capacitor Cin is not set in the power module 2b, the parasitic inductance value of the loop is Lout+Lin. After the clamping capacitor Cin is set in the power module 2b, the parasitic inductance value of the loop becomes Lin, and the inductance value is reduced. Therefore, adding the clamping inductor Cin to the loop can effectively reduce the parasitic inductance, such as Figure 4B shown.

[0030] In this embodiment, the first power semiconductor S1 and the second power semiconductor S2 are respectively disposed on the first prefabricated substrate 10a and the second prefabricated substrate 10b. The temperature of the first power semiconductor S1 and the second power semiconductor S2 can be effectively controlled by the good heat dissipation capability of the first prefabricated substrate 10a and the second prefabricated substrate 10b. Figure 4B As shown, the direction of the high-frequency current flowing in the second wiring layer 232 is opposite to the direction of the high-frequency current from the first end T11 to the second end T12 of the first power semiconductor S1, the first wiring layer 231, and the first end T21 to the second end T22 of the second power semiconductor S2, and the magnitude is equal. In addition, the area of ​​the high-frequency loop is also affected by the distance between the second wiring layer 232 and the first end T11, T21 and the second end T12, T22, and the distance between the second wiring layer 232 and the first wiring layer 231. In the circuit substrate 20, the distance between the first wiring layer 231 and the second wiring layer 232 is, for example, about 100 μm. Therefore, the power module 2b of the present disclosure effectively reduces the area of ​​the high-frequency loop on the cross section. In the horizontal direction, the distance between the first power semiconductor S1, the second power semiconductor S2 and the clamping component 40 is relatively close, and in the cross-sectional direction, the area of ​​the high-frequency loop is relatively small, so the corresponding loop parasitic inductance of the power module 2b of the present disclosure is very small. The at least one wiring layer 23 of the circuit board body 20 in the carrier 2b is, for example, a multi-layer wiring layer, integrating more functions, such as a driving circuit, a control circuit, etc., which will not be described in detail here.

[0031] Figure 6 The cross-sectional view of the power module in the fourth preferred embodiment of the present invention is schematically shown. In this embodiment, the power module 2c and FIG. 4A to FIG. 4BThe power module 2c is similar to the power module 2b shown in the figure, and the same reference numerals represent the same components, structures and functions, which will not be repeated here. In this embodiment, the power module 2c includes a carrier 1c, a first power semiconductor S1, a second power semiconductor S2, a clamping component 40 and a heat sink 50. The first power semiconductor S1, the second power semiconductor S2 and the clamping component 40 are arranged on the first surface 101 of the carrier 1c. The heat sink 50 is arranged on the second surface 102 of the carrier 1c and is connected by a thermally conductive insulating material. The carrier 1c, for example Figure 6 As shown in the bold dashed box, it includes a circuit board body 20, a first prefabricated substrate 10a, a second prefabricated substrate 10b, a third prefabricated substrate 10c and a fourth prefabricated substrate 10d. The first prefabricated substrate 10a includes a first upper metal layer 12a and a first lower metal layer 13a, which are respectively arranged on the upper surface and the lower surface of the first insulating layer 11a. The second prefabricated substrate 10b includes a second upper metal layer 12b and a second lower metal layer 13b, which are respectively arranged on the upper surface and the lower surface of the second insulating layer 11b. The third prefabricated substrate 10c includes a third upper metal layer 12c and a third lower metal layer 13c, which are respectively arranged on the upper surface and the lower surface of the third insulating layer 11c. The fourth prefabricated substrate 10d includes a fourth upper metal layer 12d and a fourth lower metal layer 13d, which are respectively arranged on the upper surface and the lower surface of the fourth insulating layer 11d. The first prefabricated substrate 10a and the second prefabricated substrate 10b are arranged in a horizontal direction such as the XY axis direction, embedded in the circuit board body 20, and form the first surface 101 of the carrier 1c. The first prefabricated substrate 10a and the third prefabricated substrate 10c are stacked in a vertical direction such as the Z axis, and the second prefabricated substrate 10b and the fourth prefabricated substrate 10d are stacked in a vertical direction such as the Z axis. The third prefabricated substrate 10c and the fourth prefabricated substrate 10d are arranged in a horizontal direction such as the XY axis direction, embedded in the circuit board body 20, and form the second surface 102 of the carrier 1c. In this embodiment, the first power semiconductor S1, the second power semiconductor S2 and a clamping component 40 are disposed on the first surface 101 of the carrier 1c. The first power semiconductor S1 and the second power semiconductor S2 are respectively disposed on the first prefabricated substrate 10a and the second prefabricated substrate 10b, and are respectively connected to the first upper metal layer 12a and the second upper metal layer 12b. The first power semiconductor S1 and the second power semiconductor S2 are connected in series to form a bridge arm, for example, through the second upper metal layer 12b and the first wiring layer 231. The heat sink 50 is connected to the second surface 102 of the carrier 1c through a conductive insulating material. In this embodiment, the carrier 1c also includes a third wiring layer 233, which is located between the second prefabricated substrate 10b and the fourth prefabricated substrate 10d, and is connected to the second end T22 of the second power semiconductor S2 through a process such as a via 234 in the circuit board body 20. Corresponding Figure 5In the equivalent circuit diagram, the first end T11 of the first power semiconductor S1 is connected to the positive electrode P, the second end T22 of the second power semiconductor S2 is connected to the negative electrode N, and the second end T12 of the first power semiconductor S1 and the first end T21 of the second power semiconductor S2 are connected to the output electrode O. The third wiring layer 233 is connected to the negative electrode N and has the same potential as the negative electrode N. Since there is a parasitic capacitance between the output electrode O and the heat sink 50, there is also a parasitic capacitance between the heat sink 50 and the control circuit (not shown), and there is a low impedance link between the control circuit and the negative electrode N, thereby forming an electrical loop from the output electrode O to the heat sink 50, from the heat sink 50 to the control circuit, from the control circuit to the negative electrode N, and then from the negative electrode N to the output electrode O. When the voltage between the output electrode O and the negative electrode N jumps, the above loop generates a common mode current, which will generate a voltage drop in the control loop, and the voltage drop is superimposed on the control signal or the sampling signal to interfere. In this embodiment, a third wiring layer 233 with the same potential as the negative electrode N is provided between the output electrode O and the heat sink 50, which is equivalent to connecting a low impedance branch in parallel between the output electrode O and the negative electrode N in the above loop, so that most of the common mode current is shunted to the branch, thereby greatly reducing the voltage drop caused by the common mode current on the control loop, and effectively avoiding interference with the control signal and the sampling signal. It should be noted that in this embodiment, when both the positive electrode P and the negative electrode N are static locations, that is, there is no high-frequency voltage fluctuation in the circuit, and the circuit node is always at a constant voltage relative to the stable reference ground, the third wiring layer 233 provided below the negative electrode N can be connected to the negative electrode N pole, so that the third wiring layer 233 and the negative electrode are at the same potential. Of course, in other embodiments, the third wiring layer 233 is connected to the positive electrode P, for example, so that the third wiring layer 233 and the P pole are at the same potential, that is, the third wiring layer 233 is located between the first prefabricated substrate 10a and the third prefabricated substrate 10c. On the other hand, since there is a safety insulation requirement between the third wiring layer 233 and the heat sink 50, the third prefabricated substrate 10c and the fourth prefabricated substrate 10d can be connected to the first prefabricated substrate 10a and the second prefabricated substrate 10b respectively through the solder 302 after the third wiring layer 233 is manufactured. In other embodiments, the connection between the first prefabricated substrate 10a and the third prefabricated substrate 10c and the connection between the second prefabricated substrate 10b and the fourth prefabricated substrate 10d can be achieved, for example, by sintering, and the thickness accuracy error of the sintering can be controlled within a very small range, generally within 10μm. The sintered prefabricated substrate is then pressed with the organic material of the circuit board body 20. The present disclosure is not limited to this and will not be repeated.

[0032] Figure 7 The cross-sectional view of the power module in the fifth preferred embodiment of the present invention is schematically shown. In this embodiment, the power module 2d and FIG. 4A to FIG. 4BThe power module 2d is similar to the power module 2b shown in the figure, and the same reference numerals represent the same components, structures and functions, which will not be described in detail. In this embodiment, the power module 2d includes a carrier board 1d, a first power semiconductor S1, a second power semiconductor S2 and a clamping element 40. The carrier board 1d is for example Figure 7 As shown in the bold dashed box, it includes a circuit board body 20, a first prefabricated substrate 10a and a second prefabricated substrate 10b. In addition, the carrier 1d also includes an organic insulating material layer 24, which is arranged in the circuit board body 20, spatially opposite to at least one wiring layer 23, and located on the second surface 102 of the carrier 1d. In this embodiment, at least one wiring layer 23 corresponding to, for example, a multi-layer wiring layer in the carrier 1d can be removed by a milling cutter from the second surface 102 of the adjacent carrier 1d, and then an organic insulating material (such as a prepreg, etc.) is used for filling and pressing to form an organic insulating material layer 24, which is spatially opposite to at least one wiring layer 23. Since the second surface 102 below the wiring layer 23 of the carrier 1d is made of insulating material, and the first prefabricated substrate 10a and the second prefabricated substrate 10b have insulating layers 11a and 11b respectively, when designing the assembly of the power module and the heat sink, there is no need to add additional insulating material between the power module and the heat sink to handle the insulation between the two, thereby simplifying the design of the heat dissipation structure. .

[0033] Figure 8 The cross-sectional view of the power module in the sixth preferred embodiment of the present invention is schematically shown. In this embodiment, the power module 2e and Figure 7 The power module 2d shown is similar, and the same reference numerals represent the same components, structures and functions, which will not be repeated here. In this embodiment, the power module 2e includes a carrier board 1e, a first power semiconductor S1, a second power semiconductor S2 and a clamping component 40. The carrier board 1e also includes an embedded component 25, which is embedded in the organic insulating material layer 24 and electrically connected to at least one wiring layer 23. In one embodiment, at least one wiring layer 23 corresponding to, for example, a multi-layer wiring layer in the carrier board 1e can be removed by a milling cutter, and then the embedded component 25 is surface-mounted to connect at least one wiring layer 23, and an organic insulating material is used to fill and press to form an organic insulating material layer 24 to achieve the setting of the embedded component 25. The design of making full use of the multi-layer wiring area on the second surface 102 of the carrier board 1e can improve the utilization rate of the carrier board 1e, reduce the size of the carrier board 1e, and further improve the power density of the power module 2e. Of course, surface-mount devices can also be connected to the wiring layer on the first surface 101 of the carrier board 1e.

[0034] Fig. 9 The cross-sectional view of the power module in the seventh preferred embodiment of the present invention is schematically shown. In this embodiment, the power module 2f and Figure 7The power module 2d shown is similar, and the same reference numerals represent the same components, structures and functions, which will not be repeated here. In this embodiment, the carrier board 1f also includes a via 26, and a resin is filled in the via 26 to form a resin mesh. Since the vias used to form the multi-layer wiring layer in the circuit board body 20 of the carrier board 1f will form a copper ring on the second side 102 of the carrier board 1f during copper plating. In one embodiment, the copper ring can be mechanically drilled to drill out the copper on the second side 102 of the carrier board 1f, and the insulation of the multi-layer wiring area on the second side 102 of the carrier board 1f is completed through the resin mesh. When the power module is assembled with the heat sink, there is no need to add additional insulating material, which simplifies the design of the heat dissipation structure.

[0035] Fig.10 The cross-sectional view of the power module in the eighth preferred embodiment of the present invention is schematically shown. In this embodiment, the power module 2g and FIG. 4A to FIG. 4B The power module 2g is similar to the power module 2b shown in the figure, and the same reference numerals represent the same components, structures and functions, which will not be described in detail. In this embodiment, the power module 2g includes a carrier 1g, a first power semiconductor S1, a second power semiconductor S2 and a clamping element 40. The carrier 1g is for example Fig.10 As shown in the bold dashed box, it includes a circuit board body 20, a first prefabricated substrate 10a and a second prefabricated substrate 10b. FIG. 4A to FIG. 4B In the power module 2b shown in this embodiment, the carrier 1g further omits the first lower metal layer 13a of the first prefabricated substrate 10a and the second lower metal layer 13b of the second prefabricated substrate 10b, which is beneficial to further reduce the overall height of the power module 2g. Of course, the present disclosure is not limited to this.

[0036] Fig.11 The cross-sectional view of the power module in the ninth preferred embodiment of the present invention is schematically shown. In this embodiment, the power module 2h and FIG. 3A to FIG. 3B The power module 2a shown is similar, and the same reference numerals represent the same components, structures and functions, which will not be repeated here. In this embodiment, the power module 2h includes a carrier board 1h, a first power semiconductor S1, a second power semiconductor S2 and a transformer 60. The first power semiconductor S1, the second power semiconductor S2 and the transformer 60 are disposed on the first surface 101 of the carrier board 1h. The transformer 60 is electrically connected between the first power semiconductor S1 and the second power semiconductor S2. The carrier board 1h, for example Fig.11As shown in the bold dashed box, it includes a circuit board body 20, a first prefabricated substrate 10a, a metal conductor block 27 and a thermally conductive insulating layer 28. The first prefabricated substrate 10a, the metal conductor block 27 and the thermally conductive insulating layer 28 are embedded in the circuit board body 20, and the structure forms the first surface 101 and the second surface 102 of the carrier 1h. In this embodiment, the metal conductor block 27 and the thermally conductive insulating layer 28 are stacked along a vertical direction such as the Z axis, and the metal conductor block 27 and the thermally conductive insulating layer 28 correspond to the first surface 101 and the second surface 102 respectively. In this embodiment, the first power semiconductor S1 is, for example, a high-voltage and low-current power semiconductor, and the second power semiconductor S2 is, for example, a low-voltage and high-current power semiconductor. The voltage of the first power semiconductor S1 and the voltage of the second power semiconductor S2 are converted by a transformer 60. Because the high voltage requirement of the first power semiconductor S1 needs to be met, the first power semiconductor S1 is arranged on the first prefabricated substrate 10a, so that the first prefabricated substrate 10a meets the requirements of heat dissipation and thermal insulation of the first power semiconductor S1. The second power semiconductor S2 is arranged corresponding to the metal conductor block 27, and the second power semiconductor S2 is electrically connected to the metal conductor block 27. The metal conductor block 27 is, for example, thick copper embedded in the circuit board body 20. Since the current of the second power semiconductor S2 is very large, compared with the first upper metal 12a on the first prefabricated substrate 10a, the metal conductor block 27 has a larger conductor cross-section in the direction perpendicular to the current and a smaller resistance, which can further reduce the conduction loss. In addition, a thermally conductive insulating layer 28 is pressed between the metal conductor block 27 and the second surface 102 of the carrier 1h. In this embodiment, the thickness of the thermally conductive insulating layer 28 is, for example, 100μm, which can effectively meet the insulation requirements of the second power semiconductor S2. The thick metal conductor block 27 and the thin thermally conductive insulating layer 28 have better heat dissipation capabilities and meet the heat dissipation requirements of the second power semiconductor S2. Therefore, the power module 2h achieves the purpose of improving reliability, expandability and heat dissipation performance. Of course, the thermally conductive insulating layer 28 may not be provided under the metal conductor block 27. When it is subsequently assembled with the heat sink, the insulation requirement is met by using insulating thermally conductive materials under the metal conductor block 27 or by providing insulating thermally conductive materials on the surface of the heat sink, thereby further improving the heat dissipation capacity.

[0037] Fig.12 The cross-sectional view of the power module in the tenth preferred embodiment of the present invention is schematically shown. In this embodiment, the power module 2i and Fig.11 The power module 2i is similar to the power module 2h shown in the figure, and the same reference numerals represent the same components, structures and functions, which will not be repeated here. In this embodiment, the power module 2i includes a carrier board 1i, a first power semiconductor S1, a second power semiconductor S2 and a transformer 60. The carrier board 1i is for example Fig.12As shown in the bold dashed box, it includes a circuit board body 20, a first prefabricated substrate 10a, a metal conductor block 29 and a heat-conducting insulating layer 28. The first prefabricated substrate 10a, the metal conductor block 29 and the heat-conducting insulating layer 28 are embedded in the circuit board body 20 to form a first surface 101 and a second surface 102 of the carrier board 1i. Fig.11 In the power module 2h shown, the metal conductor block 29 in the power module 2i is a special-shaped structure, that is, there is at least one protrusion 29a in the horizontal direction of the XY plane, and the protrusion 29a is connected to the internal wiring layer 23 in the carrier 1i through a via process, thereby increasing the conductive path, reducing the on-resistance, and reducing the loss.

[0038] In summary, the embodiments of the present invention provide a carrier and a power module applicable thereto. By optimizing the layout of each component of the carrier, the overall performance of the carrier is improved, which helps to achieve the purpose of reducing parasitic inductance and EMI, making its assembly and fixation simple and reliable, while reducing the volume of the power module and the overall power density of the power module. A prefabricated substrate such as a metal-ceramic substrate is embedded in a circuit board body, and a carrier is constructed to assemble an electronic device. The insulating layer of the prefabricated substrate is composed of a ceramic material, the metal layer is connected to the insulating layer through a sintering process, and the plane where the surface of the insulating layer and the metal layer are in contact is at least partially exposed outside the metal layer, and the portion of the insulating layer exposed outside the metal layer is an outer edge, and the outer edge of the insulating layer extends into the circuit board body along the water direction. Since the outer edge of the insulating layer overlaps the circuit board body in the horizontal direction by at least a width greater than 0.3 mm, and is connected by, for example, a prepreg, it helps to increase the reliability of the carrier in the vertical direction. Furthermore, the thickness of the metal layer of the prefabricated substrate is greater than the thickness of the wiring layer used to achieve the connection, which helps to improve the heat dissipation properties of the carrier. On the other hand, when the carrier is used in a power module in conjunction with electronic devices such as power semiconductors, clamping components and transformers, it is more helpful to reduce parasitic inductance and EMI, improve reliability, expandability and heat dissipation efficiency. The connection process between the carrier and the bridge arm composed of two series-connected power semiconductors is simple to implement, with low cost and high reliability. The bridge arm composed of two series-connected power semiconductors and the clamping component can be connected to the second wiring layer of the circuit board body through the metal layer of the prefabricated substrate, and can also be used with a heat sink to achieve heat dissipation and reduce thermal resistance, thereby achieving the purpose of reducing costs and improving the reliability and heat dissipation capacity of the power module. The wiring layer of the circuit board body can be realized in a thinner thickness, combined with the metal layer of the prefabricated substrate, it can reduce the manufacturing cost and further improve the reliability of the carrier. When the two open power semiconductors and the clamping component of the power module are directly arranged on the carrier, the assembly structure can be simplified, which has the advantages of reducing costs, simplifying processes, improving product yields and product reliability.

[0039] Various modifications and variations may be made to the present disclosure by those skilled in the art without departing from the scope of the appended claims.

Claims

1. A carrier board, include: A circuit board body having at least one wiring layer; as well as At least one prefabricated substrate is buried in the circuit board body, wherein the prefabricated substrate includes an insulating layer and at least one metal layer, the metal layer is arranged on at least one of an upper surface and a lower surface of the insulating layer, the upper surface and the lower surface of the insulating layer are two surfaces opposite to each other, and the insulating layer is composed of a ceramic material, wherein the metal layer is connected to the insulating layer through a sintering process, and the insulating layer is at least partially exposed outside the metal layer on the plane where the surface in contact with the at least one metal layer is located, and the portion of the insulating layer exposed outside the metal layer is an outer edge portion, and the outer edge portion extends into the circuit board body along a horizontal direction.

2. The carrier as described in claim 1, wherein the at least one prefabricated substrate is a metal-clad ceramic substrate, the insulating layer is one selected from the group consisting of aluminum oxide ceramics, aluminum nitride ceramics, silicon nitride ceramics, beryllium oxide ceramics and zirconium oxide reinforced aluminum oxide ceramics, and the at least one metal layer is one selected from the group consisting of copper and aluminum. 3 . The carrier as claimed in claim 1 , wherein the thickness of the insulating layer ranges from 0.2 mm to 1.6 mm, and the thickness of the at least one metal layer ranges from 0.1 mm to 1 mm. 4 . The carrier board as claimed in claim 1 , wherein the at least one prefabricated substrate is realized by a direct copper coating or an active metal brazing copper coating process. 5 . The carrier as claimed in claim 1 , wherein a region where the outer edge portion overlaps and connects with the circuit board body in the horizontal direction has a width greater than 0.3 mm.

6. The carrier board as described in claim 1, wherein the circuit board body comprises at least two core boards and at least half a cured sheet, the at least two core boards are connected by the at least half a cured sheet, and wherein the outer edge portion of the insulating layer is overlapped and connected to the circuit board body in a vertical direction through the at least half a cured sheet.

7. A carrier as described in claim 1, wherein the at least one prefabricated substrate is combined with the circuit board body to form a first surface and a second surface of the carrier, the first surface and the second surface are two surfaces opposite to each other, and the at least one wiring layer and the at least one metal layer are electrically connected to an electronic device through the first surface of the carrier.

8. The carrier as claimed in claim 7, wherein the carrier further comprises an organic insulating material layer, which is disposed in the circuit board body, spatially opposite to the at least one wiring layer, and located on the second surface of the carrier. 9 . The carrier as claimed in claim 8 , further comprising an embedded component embedded in the organic insulating material layer and electrically connected to the at least one wiring layer. 10 . The carrier board as claimed in claim 7 , wherein the carrier board comprises a via hole penetrating the first surface and the second surface of the carrier board, and the via hole is filled with a resin. 11 . The carrier as claimed in claim 7 , wherein the insulating layer of the at least one prefabricated substrate and the circuit board body structure form the second surface of the carrier.

12. The carrier board as described in claim 1, wherein the at least one wiring layer is buried in the circuit board body, extends along the horizontal direction, and is located on at least one side of the at least one prefabricated substrate, and the at least one wiring layer is between the plane where the upper surface of the prefabricated substrate is located and the plane where the lower surface of the prefabricated substrate is located.

13. A power module, include: A carrier board, comprising: A circuit board body having at least one wiring layer; and At least one prefabricated substrate is embedded in the circuit board body and is structured to form a first surface and a second surface of the carrier board, the first surface and the second surface are two surfaces opposite to each other, wherein the at least one prefabricated substrate includes an insulating layer and at least one metal layer, the at least one metal layer is disposed on at least one of an upper surface and a lower surface of the insulating layer, the upper surface and the lower surface of the insulating layer are two surfaces opposite to each other, and the insulating layer is composed of a ceramic material, wherein the metal layer is connected to the insulating layer through a sintering process, and the insulating layer is at least partially exposed outside the metal layer on the surface where the surface in contact with the at least one metal layer is located, and the portion of the insulating layer exposed outside the metal layer is an outer edge portion, and the outer edge portion extends into the circuit board body along a horizontal direction; and At least one power semiconductor is disposed on the first surface of the carrier and is electrically connected to the at least one wiring layer and the at least one metal layer, wherein the at least one power semiconductor and the at least one metal layer at least partially overlap in vertical projection on the first surface. 14 . The power module as claimed in claim 13 , wherein the at least one power semiconductor comprises a first power semiconductor and a second power semiconductor, and the first power semiconductor and the second power semiconductor are connected in series through the at least one metal layer to form a bridge arm.

15. The power module as claimed in claim 14, further comprising a clamping component disposed on the first surface, the at least one wiring layer comprising a first wiring layer and a second wiring layer, the first power semiconductor and the second power semiconductor being connected in parallel with the clamping component via the first wiring layer and the second wiring layer.

16. The power module as claimed in claim 14, wherein the at least one prefabricated substrate comprises a first prefabricated substrate and a second prefabricated substrate, which are arranged along the horizontal direction to form the first surface of the carrier, and the first power semiconductor and the second power semiconductor are respectively arranged on the first prefabricated substrate and the second prefabricated substrate.

17. The power module as described in claim 16, wherein the at least one prefabricated substrate further includes a third prefabricated substrate and a fourth prefabricated substrate, which are arranged along the horizontal direction to form the second surface of the carrier, wherein the first prefabricated substrate and the third prefabricated substrate are stacked along the vertical direction, and the second prefabricated substrate and the fourth prefabricated substrate are stacked along the vertical direction. 18 . The power module as claimed in claim 17 , wherein the carrier further comprises a third wiring layer, and at least a portion of the third wiring layer is located between the first prefabricated substrate and the third prefabricated substrate or between the second prefabricated substrate and the fourth prefabricated substrate. 19 . The power module as claimed in claim 18 , wherein the third wiring layer is electrically connected to one end of the bridge arm, and the third wiring layer and the end of the bridge arm are at the same potential. 20 . The power module according to claim 14 , further comprising a heat sink disposed on the second surface of the carrier.

21. The power module as claimed in claim 13, wherein the carrier further comprises an organic insulating material layer disposed in the circuit board body, spatially opposite to the at least one wiring layer, and located on the second surface of the carrier. 22 . The power module as claimed in claim 21 , wherein the carrier further comprises an embedded component embedded in the organic insulating material layer and electrically connected to the at least one wiring layer. 23 . The power module as claimed in claim 13 , wherein the carrier comprises a via hole penetrating the first surface and the second surface of the carrier, and the via hole is filled with a resin. 24 . The power module as claimed in claim 13 , wherein the insulating layer of the at least one prefabricated substrate and the circuit board body structure form the second surface of the carrier.

25. The power module as described in claim 13 further includes a transformer disposed on the first surface, the at least one power semiconductor includes a first power semiconductor and a second power semiconductor, the transformer is electrically connected between the first power semiconductor and the second power semiconductor, and the first power semiconductor is disposed on the at least one prefabricated substrate, wherein the carrier also includes a metal conductor block embedded in the circuit board body and electrically connected to the second power semiconductor. 26 . The power module as claimed in claim 25 , wherein the carrier comprises a thermally conductive insulating layer disposed between the metal conductor block and the second surface of the carrier. 27 . The power module as claimed in claim 25 , wherein the first power semiconductor is a high-voltage, low-current power semiconductor, and the second power semiconductor is a low-voltage, high-current power semiconductor.

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