Method for producing doped layers and use thereof

Abstract

The application provides a preparation method of a doped polysilicon layer, a preparation method of a doped amorphous silicon composite layer, a doped amorphous silicon composite layer, a semiconductor device and a battery. The preparation method of the doped polysilicon layer comprises the following steps: a) alternately preparing intrinsic amorphous silicon layers and doped amorphous silicon layers to form a cycle unit comprising an intrinsic amorphous silicon layer and a doped amorphous silicon layer which is combined on the intrinsic amorphous silicon layer; and b) crystallizing to obtain a doped polysilicon layer. The preparation method of the doped polysilicon layer adopts on-line doping, and in the case that the thickness of the doped polysilicon layer is constant, the use amount of a doping source gas can be reduced from the perspective of technology. The doped polysilicon layer and the doped amorphous silicon composite layer are applied in the battery, so that the manufacturing cost of the battery can be reduced, and the performance of the battery can be ensured.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of solar cells, and particularly relates to a preparation method of a doped polysilicon layer, a doped polysilicon layer, a preparation method of a doped amorphous silicon composite layer, a doped amorphous silicon composite layer, a semiconductor device and a cell. BACKGROUND

[0002] Plasma enhanced chemical vapor deposition (PECVD) is a new preparation technology that generates plasma by means of glow discharge and other methods, so that gaseous substances containing thin film components can generate chemical reactions, thereby realizing the growth of thin film materials.

[0003] At present, the doped polysilicon layer (POLY layer) required for preparing a TOPCON type cell by using a plasma enhanced chemical vapor deposition (PECVD) technology includes P-type doping and N-type doping, and generally uses gaseous alkyl chemical sources as reactants to realize the growth and online doping of the POLY layer. For example, to deposit an N-type POLY layer, silane (SiH4), phosphine (PH3), hydrogen (H2) or argon (Ar) and other inert gases are used; to deposit a P-type POLY layer, silane (SiH4), borane (B2H6) or trimethylborane (TMB), hydrogen (H2) or argon (Ar) and other inert gases are used. SiH4 is the main element for growing the body layer of the POLY layer; H2 and Ar and other inert gases are used as dilution or control gases for the bonding structure of the POLY. PH3, B2H6 or TMB and other group III or group V alkyl gases are used as dopants, generally as a mixture of the alkyl gas diluted in hydrogen, such as 2% PH3 and 98% H2, which are used as source gases together. Although the dopant gas is diluted with H2, the market price of these dopant gases is still relatively high, and the dopant gas has the chemical properties of being flammable, explosive, toxic and corrosive, which greatly limits its industrial use and increases the manufacturing cost of the cell. SUMMARY

[0004] Therefore, the present application aims to provide a preparation method of a doped polysilicon layer, a preparation method of a doped amorphous silicon composite layer, a doped amorphous silicon composite layer, a semiconductor device and a cell, which can reduce the use amount of dopant gas while ensuring the performance of the cell.

[0005] To achieve the above-mentioned purpose, the technical solution of the present application is a preparation method of a doped polysilicon layer, comprising:

[0006] a) alternately preparing intrinsic amorphous silicon layers and doped amorphous silicon layers to form a cycle unit comprising an intrinsic amorphous silicon layer and a doped amorphous silicon layer which is compounded on the intrinsic amorphous silicon layer;

[0007] b) crystallizing to obtain a doped polysilicon layer.

[0008] The preparation method of the doped polysilicon layer further comprises: repeating step a) before step b) to form a plurality of cyclic units comprising an intrinsic amorphous silicon layer and a doped amorphous silicon layer combined on the intrinsic amorphous silicon layer. The plurality of cyclic units comprises n layers, from the first layer to the nth layer; the thickness of each cyclic unit is the same, or the thickness of the intrinsic amorphous silicon layer or the doped amorphous silicon layer of each cyclic unit is the same.

[0009] In one embodiment, the thickness of each cyclic unit is the same, and the thickness ratio of the doped amorphous silicon layer in the cyclic unit increases layer by layer, and the thickness ratio of the doped amorphous silicon layer increases from 40% to 70%, and the total thickness of the doped amorphous silicon layer is 3-50 nm. In one embodiment, the thickness of the intrinsic amorphous silicon layer of each cyclic unit is the same, and the thickness of the doped amorphous silicon layer increases layer by layer. In one embodiment, the thickness of the doped amorphous silicon layer of each cyclic unit is the same, and the thickness of the intrinsic amorphous silicon layer decreases layer by layer.

[0010] The preparation method of the cyclic unit comprises: providing a silicon source gas and a dilution gas into a reaction chamber to form an intrinsic amorphous silicon layer; and providing a doping source gas into the reaction chamber to form a doped amorphous silicon layer on the intrinsic amorphous silicon layer. The doping source gas is selected from phosphine, borane or trimethylborane. The plurality of cyclic units comprises n layers, from the first layer to the nth layer; and in each cyclic unit, the concentration of the doping source in the doped amorphous silicon layer is the same or increases layer by layer.

[0011] The preparation method of the doped polysilicon layer provided by the application is simple, on-line doping is adopted, the unit consumption of the doping gas can be effectively controlled, and the cost is reduced. Meanwhile, the prepared doped polysilicon layer can be applied to a battery to ensure the efficiency of the battery.

[0012] The application further provides a doped polysilicon layer prepared by the preparation method of the doped polysilicon layer.

[0013] The doped polysilicon layer provided by the application can be applied to a battery, has good performance, the unit consumption of the doping gas is low, and the cost can be reduced.

[0014] The application further provides a preparation method of a doped amorphous silicon composite layer, which alternately prepares an intrinsic amorphous silicon layer and a doped amorphous silicon layer to form a plurality of cyclic units comprising an intrinsic amorphous silicon layer and a doped amorphous silicon layer combined on the intrinsic amorphous silicon layer, and obtains a doped amorphous silicon composite layer.

[0015] In the method for preparing the doped amorphous silicon composite layer of the present invention, the multilayer cycling unit includes n layers, from the first layer to the nth layer; the thickness of each cycling unit is the same, or the thickness of the intrinsic amorphous silicon layer or the doped amorphous silicon layer of each cycling unit is the same.

[0016] In the method for preparing the doped amorphous silicon composite layer of the present invention, the preparation method of the circulation unit specifically includes: providing silicon source gas and dilution gas into the reaction chamber to form an intrinsic amorphous silicon layer; and providing dopant source gas into the reaction chamber to form a doped amorphous silicon layer on the intrinsic amorphous silicon layer. The multilayer circulation unit includes n layers, from the first layer to the nth layer; in each circulation unit, the concentration of the dopant source in the doped amorphous silicon layer is the same or increases layer by layer.

[0017] The method for preparing doped amorphous silicon composite layers provided by this invention employs online doping, which can effectively control the unit consumption of doping gas and reduce costs. Simultaneously, the prepared doped amorphous silicon composite layer can be applied to batteries, ensuring battery efficiency.

[0018] The present invention also provides a doped amorphous silicon composite layer, which is prepared by the preparation method of the doped amorphous silicon composite layer described in the above technical solution, and will not be repeated here.

[0019] The doped amorphous silicon composite layer provided by the present invention includes a multilayer cycling unit, wherein the cycling unit includes an intrinsic amorphous silicon layer and a doped amorphous silicon layer, which can reduce the amount of dopant source gas used and reduce its manufacturing cost. When the doped amorphous silicon composite layer is applied in a battery, it has good performance.

[0020] The present invention also provides a semiconductor device, including the doped polycrystalline silicon layer or the doped amorphous silicon composite layer described in the above technical solutions, which will not be described in detail here.

[0021] The semiconductor device provided by this invention uses a low amount of doping source and has a low manufacturing cost. When applied to batteries, the performance of the batteries can be guaranteed.

[0022] The present invention also provides a battery comprising the doped polycrystalline silicon layer, the doped amorphous silicon composite layer, or the semiconductor device described in the above technical solutions, which will not be elaborated further here.

[0023] This invention provides a method for preparing a doped polycrystalline silicon layer, comprising: a) alternately preparing an intrinsic amorphous silicon layer and a doped amorphous silicon layer to form a cyclic unit comprising an intrinsic amorphous silicon layer and a doped amorphous silicon layer composited on the intrinsic amorphous silicon layer; b) silicifying to obtain a doped polycrystalline silicon layer. The method for preparing the doped polycrystalline silicon layer of this invention employs in-line doping. With a fixed thickness of the doped polycrystalline silicon layer, from a process perspective, the amount of dopant source gas used can be reduced, thus lowering manufacturing costs. The resulting doped polycrystalline silicon layer can be applied in semiconductor devices and batteries, reducing battery manufacturing costs while ensuring battery performance. Attached Figure Description

[0024] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. However, the present invention is not limited to the following embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0025] Figure 1 A schematic diagram of a semiconductor device with a single-layer cyclic cell structure;

[0026] Figure 2 ECV test results for semiconductor devices;

[0027] Figure 3 This is a schematic diagram of a semiconductor structure with a multilayer cyclic cell structure. Detailed Implementation

[0028] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0029] This invention provides a method for preparing a doped polycrystalline silicon layer, comprising:

[0030] a) Alternately fabricate intrinsic amorphous silicon layers and doped amorphous silicon layers to form a cycle unit comprising an intrinsic amorphous silicon layer and a doped amorphous silicon layer composited on the intrinsic amorphous silicon layer;

[0031] b) Crystallization yields a doped polycrystalline silicon layer.

[0032] In step a) of this invention, an intrinsic amorphous silicon layer and a doped amorphous silicon layer composited on the intrinsic amorphous silicon layer are alternately prepared using methods well-known to those skilled in the art, forming a recycling unit comprising an intrinsic amorphous silicon layer and a doped amorphous silicon layer composited on the intrinsic amorphous silicon layer. The intrinsic amorphous silicon layer is a pure amorphous silicon layer free of other impurities. Step a) can be prepared using a plasma-enhanced chemical vapor deposition process, which is not limited herein. The recycling unit can be one or multiple layers, preferably forming a multi-layer recycling unit.

[0033] Preferably, the method for preparing the doped polycrystalline silicon layer of the present invention further includes: repeating step a) before step b) to form a multilayer circulating unit comprising an intrinsic amorphous silicon layer and a doped amorphous silicon layer composited on the intrinsic amorphous silicon layer. The method for preparing the circulating unit specifically involves: providing a silicon source gas and a dilution gas into the reaction chamber to form an intrinsic amorphous silicon layer; and providing a doping source gas into the reaction chamber to form a doped amorphous silicon layer on the intrinsic amorphous silicon layer. In one embodiment, a plasma-enhanced chemical vapor deposition (PECVD) process platform is used to achieve online doping of amorphous silicon layers. The specific preparation method of the cyclic unit is as follows: A silicon source gas and a dilution gas are provided to the reaction chamber. The silicon source gas can be SiH4, and the dilution gas can be H2 and Ar, forming an intrinsic amorphous silicon layer. After growing an intrinsic amorphous silicon layer of a certain controllable thickness, a doped amorphous silicon layer is grown. A dopant source gas is provided to the reaction chamber. The dopant source gas is selected from phosphine, borane, or trimethylborane, forming a doped amorphous silicon layer of a certain thickness on the intrinsic amorphous silicon layer. The dopant source is selected from phosphorus to form an n-type doped amorphous silicon layer, and the dopant source is selected from boron to form a p-type doped amorphous silicon layer. The intrinsic amorphous silicon layer and the doped amorphous silicon layer are grown alternately to form a multilayer cyclic unit comprising an intrinsic amorphous silicon layer and a doped amorphous silicon layer composited on the intrinsic amorphous silicon layer. The multilayer cyclic unit of this invention comprises n layers, from the first layer to the nth layer. In each layer of the cyclic unit, the concentration of the dopant source in the doped amorphous silicon layer is the same or increases layer by layer. The multilayer cyclic unit of this invention comprises n layers, from the first layer to the nth layer; each cyclic unit has the same thickness, or the intrinsic amorphous silicon layer or doped amorphous silicon layer of each cyclic unit has the same thickness. In one embodiment, the thickness of each cyclic unit is the same, and the thickness ratio of the doped amorphous silicon layer in the cyclic unit increases layer by layer. In another embodiment, the thickness of each cyclic unit is the same, and the thickness ratio of the doped amorphous silicon layer in the cyclic unit increases layer by layer, the thickness ratio of the doped amorphous silicon layer increasing from 40% to 70%, and the total thickness of the doped amorphous silicon layer is 3-50 nm. In another embodiment, the thickness of the intrinsic amorphous silicon layer of each cyclic unit is the same, and the thickness of the doped amorphous silicon layer increases layer by layer. In yet another embodiment, the thickness of the doped amorphous silicon layer of each cyclic unit is the same, and the thickness of the intrinsic amorphous silicon layer decreases layer by layer. Through the above processing method, a gradient-doped amorphous silicon layer can be formed.

[0034] In one embodiment, the present invention employs plasma-enhanced chemical vapor deposition (PECVD) to prepare a doped polycrystalline silicon layer. This eliminates the need for continuous dopant gas flow throughout the entire PECVD deposition process. During the transition phase between the growth of the intrinsic amorphous silicon layer and the doped amorphous silicon layer, the plasma can be continuously discharged, with only the dopant gas flow rate controlled. Alternatively, the plasma can be turned off first, and the atmosphere within the chamber adjusted to ensure thorough mixing of the altered gas composition before the plasma is turned back on to continue growing the amorphous silicon layer.

[0035] Under the premise of keeping the total thickness and deposition rate of the doped polycrystalline silicon layer constant, the ratio of the thickness of the intrinsic amorphous silicon layer to the thickness of the doped amorphous silicon layer can be increased. This allows the interface between the intrinsic and doped amorphous silicon layers to continuously advance outwards, reducing the consumption of dopant gas. When the thickness ratio of the intrinsic amorphous silicon layer in the cycle cell exceeds 60%, the concentration of the dopant source in the doped polycrystalline silicon layer decreases, and the diffusion distribution on the crystalline silicon substrate becomes smaller. Before high-temperature annealing, the initial position of the dopant source in the amorphous silicon is too close to the surface, thus affecting the cell efficiency.

[0036] In one embodiment, to reduce the amount of dopant source used, intrinsic amorphous silicon layers and doped amorphous silicon layers are prepared alternately. The intrinsic amorphous silicon layer and the doped amorphous silicon layer are treated as a cycle unit and can be repeatedly deposited several times to form multiple cycle unit structures. Each cycle unit structure has the same thickness, and the thickness ratio of the doped amorphous silicon layer in the cycle unit increases layer by layer. This can reduce the amount of dopant source consumed. Compared with a single intrinsic amorphous silicon layer / doped amorphous silicon layer unit, some doped elements are located closer to the c-Si surface.

[0037] After the deposition of the cycle unit, the amorphous silicon is crystallized using methods well-known to those skilled in the art to obtain a doped polycrystalline silicon layer, which is not limited herein. In one embodiment, the amorphous silicon is subjected to high-temperature annealing to crystallize it and obtain a doped polycrystalline silicon layer. During the crystallization process, the dopant elements in the deposited film diffuse toward the substrate and activate a large number of dopant elements, which are called donors. The concentration of dopant elements in the doped polycrystalline silicon layer and the diffusion distribution on the crystalline silicon substrate have a significant impact on the performance of the solar cell, and there is an optimal concentration and diffusion distribution.

[0038] In one embodiment, an N-type doped polycrystalline silicon layer is prepared using PH3. The preparation process is as follows: At the beginning of the coating process, only SiH4 and a dilution gas (H2 or Ar) are introduced into the reaction chamber to grow an intrinsic amorphous silicon layer (I layer) on a crystalline silicon substrate. After growing an I layer of a certain controllable thickness on the crystalline silicon substrate, PH3 is introduced into the reaction chamber to grow an N-type amorphous silicon layer (N layer) of a certain thickness on the I layer, ultimately forming an N-I two-junction doped amorphous silicon composite layer. A high-temperature annealing process is then used to crystallize the amorphous silicon, causing the phosphorus (P) element in the film to diffuse towards the substrate and activate a large amount of P, resulting in a doped polycrystalline silicon layer. Electrochemical capacitance-voltage (ECV) testing shows that the P ion concentration (i.e., P doping amount) is uniformly distributed along the longitudinal direction of the doped polycrystalline silicon layer.

[0039] The present invention also provides a doped polycrystalline silicon layer, which is prepared by the doped polycrystalline silicon layer preparation method described in the above technical solution, and will not be repeated here.

[0040] This invention also provides a method for preparing a doped amorphous silicon composite layer. The method involves alternately preparing intrinsic amorphous silicon layers and doped amorphous silicon layers to form a multi-layered cyclic unit comprising intrinsic amorphous silicon layers and doped amorphous silicon layers composited on the intrinsic amorphous silicon layers, thereby obtaining a doped amorphous silicon composite layer. The obtained doped amorphous silicon composite layer can be heat-treated at the amorphous silicon crystallization temperature for more than 3 hours, and the heat treatment temperature is at least 50°C lower than the minimum crystallization temperature of amorphous silicon. This heat treatment causes doping atoms to penetrate the intrinsic amorphous silicon portion, forming a complete doped amorphous silicon layer.

[0041] The present invention employs methods well known to those skilled in the art to alternately prepare intrinsic amorphous silicon layers and doped amorphous silicon layers composited on the intrinsic amorphous silicon layers, forming a multilayer cyclic unit comprising intrinsic amorphous silicon layers and doped amorphous silicon layers composited on the intrinsic amorphous silicon layers. The methods well known to those skilled in the art include, but are not limited to, plasma-enhanced chemical vapor deposition processes.

[0042] The specific preparation method of the circulating unit of the present invention is as follows: a silicon source gas and a dilution gas are provided into the reaction chamber to form an intrinsic amorphous silicon layer; a doping source gas is provided into the reaction chamber to form a doped amorphous silicon layer on the intrinsic amorphous silicon layer. In one embodiment, the present invention uses a plasma-enhanced chemical vapor deposition process platform to achieve online doping of the amorphous silicon layer. The specific preparation method of the circulating unit is as follows: a silicon source gas and a dilution gas are provided into the reaction chamber, wherein the silicon source gas can be SiH4, and the dilution gas can be H2 and Ar, to form an intrinsic amorphous silicon layer; after growing an intrinsic amorphous silicon layer of a certain controllable thickness, a doped amorphous silicon layer is grown; a doping source gas is provided into the reaction chamber, wherein the doping source gas is selected from phosphine, borane, or trimethylborane, to form a doped amorphous silicon layer of a certain thickness on the intrinsic amorphous silicon layer; the intrinsic amorphous silicon layer and the doped amorphous silicon layer are alternately grown to form a multilayer circulating unit including an intrinsic amorphous silicon layer and a doped amorphous silicon layer composited on the intrinsic amorphous silicon layer. The multilayer cycling unit of the present invention comprises n layers, from the first layer to the nth layer; in each cycling unit, the concentration of the dopant source in the doped amorphous silicon layer is the same or increases layer by layer. The multilayer cycling unit of the present invention comprises n layers, from the first layer to the nth layer; the thickness of each cycling unit is the same, or the thickness of the intrinsic amorphous silicon layer or the doped amorphous silicon layer in each cycling unit is the same. In one embodiment, the thickness of each cycling unit is the same, and the thickness ratio of the doped amorphous silicon layer in the cycling unit increases layer by layer. In another embodiment, the thickness of each cycling unit is the same, and the thickness ratio of the doped amorphous silicon layer in the cycling unit increases layer by layer, the thickness ratio of the doped amorphous silicon layer increases from 40% to 70%, and the total thickness of the doped amorphous silicon layer is 3-50 nm. In another embodiment, the thickness of the intrinsic amorphous silicon layer in each cycling unit is the same, and the thickness of the doped amorphous silicon layer increases layer by layer. In yet another embodiment, the thickness of the doped amorphous silicon layer in each cycling unit is the same, and the thickness of the intrinsic amorphous silicon layer decreases layer by layer.

[0043] In one embodiment, the present invention employs plasma-enhanced chemical vapor deposition (PECVD) to prepare a doped amorphous silicon composite layer. This eliminates the need for continuous dopant gas flow throughout the entire PECVD deposition process. During the transition phase between the growth of the intrinsic amorphous silicon layer and the doped amorphous silicon layer, the plasma can be continuously discharged, with only the dopant gas flow rate controlled. Alternatively, the plasma can be turned off first, and the atmosphere within the chamber adjusted to ensure thorough mixing of the altered gas composition before the plasma is turned back on to continue growing the amorphous silicon layer.

[0044] Under the premise that the total thickness of the doped amorphous silicon composite layer and the coating rate remain unchanged, the thickness ratio of the intrinsic amorphous silicon layer and the doped amorphous silicon layer can be increased, that is, the interface between the intrinsic amorphous silicon layer and the doped amorphous silicon layer can be continuously pushed outward, which can reduce the consumption of doping source gas.

[0045] In one embodiment, to reduce the amount of dopant source used, intrinsic amorphous silicon layers and doped amorphous silicon layers are alternately prepared. This can be repeated several times to form multiple cyclic unit structures comprising intrinsic amorphous silicon layers and doped amorphous silicon layers composited on the intrinsic amorphous silicon layers, resulting in a doped amorphous silicon composite layer. Each cyclic unit structure has the same thickness, and the proportion of doped amorphous silicon layers in each cyclic unit increases progressively, which reduces the amount of dopant source consumed. Compared to a doped amorphous silicon composite layer with a single intrinsic amorphous silicon layer / doped amorphous silicon layer unit, some doped elements are located closer to the C-Si surface.

[0046] The present invention also provides a doped amorphous silicon composite layer, which is prepared by the preparation method of the doped amorphous silicon composite layer described in the above technical solution, and will not be repeated here.

[0047] The present invention also provides a semiconductor device, including the doped polycrystalline silicon layer or the doped amorphous silicon composite layer described in the above technical solutions, which will not be described in detail here.

[0048] In one embodiment, a semiconductor device such as Figure 1 As shown, Figure 1 This is a schematic diagram of a semiconductor device with a single-layer cyclic cell structure. The semiconductor device includes, in sequence, a C-Si(n) substrate, a tunneling oxide layer, an intrinsic amorphous silicon layer (I layer), and an N-type amorphous silicon layer (N layer).

[0049] In one embodiment, the semiconductor device sequentially comprises a C-Si(n) substrate, a tunneling oxide layer, and the doped polycrystalline silicon layer described in the above technical solution. The doping source of the doped polycrystalline silicon layer is element P. The doped polycrystalline silicon layer is obtained by high-temperature silicide crystallization of a single layer comprising an intrinsic amorphous silicon layer and a doped amorphous silicon layer composited on the intrinsic amorphous silicon layer. The thickness of the doped polycrystalline silicon layer is 0.1 μm. Electrochemical capacitance-voltage (ECV) testing is performed on the semiconductor device, and the results are as follows: Figure 2 As shown, Figure 2 The ECV test results for semiconductor devices show that phosphorus (P) in the doped polycrystalline silicon thin film diffuses towards the substrate and activates a large number of P atoms. It can be observed that the P ion concentration (i.e., P doping amount) is not only uniformly distributed vertically in the doped polycrystalline silicon layer (POLY layer), but also that some P atoms enter the crystalline silicon substrate to form activated doped atoms. Both the concentration of P doping in the POLY layer and its diffusion distribution in the crystalline silicon substrate have a significant impact on the performance of solar cells, and there is an optimal concentration and diffusion distribution.

[0050] In one embodiment, a semiconductor device such as Figure 3 As shown, Figure 3This is a schematic diagram of a semiconductor structure with a multilayer cyclic unit structure. The semiconductor device sequentially includes a C-Si(n) substrate, a tunneling oxide layer, and a multilayer cyclic unit comprising an intrinsic amorphous silicon layer (I layer) and a phosphorus-doped amorphous silicon layer (N layer) composited on the intrinsic amorphous silicon layer.

[0051] The present invention also provides a battery comprising the doped polycrystalline silicon layer, the doped amorphous silicon composite layer, or the semiconductor device described in the above technical solutions, which will not be elaborated further here.

[0052] In one embodiment, a TOPCon battery includes the doped polycrystalline silicon layer described in the above technical solution, or includes a semiconductor device, wherein the semiconductor device includes the doped polycrystalline silicon layer described in the above technical solution.

[0053] In one embodiment, a heterojunction solar cell includes the doped amorphous silicon composite layer described in the above technical solution, or includes a semiconductor device, wherein the semiconductor device includes the doped amorphous silicon composite layer described in the above technical solution.

[0054] The above description of the embodiments is only for the purpose of helping to understand the method and core ideas of the present invention. It should be noted that those skilled in the art can make several improvements and modifications to the present invention without departing from the principles of the present invention, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

Claims

1. A method for preparing a doped polycrystalline silicon layer, characterized in that, include: a) Alternately fabricate intrinsic amorphous silicon layers and doped amorphous silicon layers to form a cycle unit comprising an intrinsic amorphous silicon layer and a doped amorphous silicon layer composited on the intrinsic amorphous silicon layer; b) Crystallization to obtain a doped polycrystalline silicon layer; In step a), the intrinsic amorphous silicon layer of the cycle unit is close to the substrate. Step a) is repeated before step b) to form a multilayered cyclic unit comprising an intrinsic amorphous silicon layer and a doped amorphous silicon layer composited on the intrinsic amorphous silicon layer; The thickness of each cyclic unit is the same, and the proportion of the thickness of the doped amorphous silicon layer in the cyclic unit increases layer by layer; The multilayer cyclic unit consists of n layers, from the first layer to the nth layer; in each cyclic unit, the concentration of the dopant source in the doped amorphous silicon layer is the same or increases layer by layer.

2. The method for preparing a doped polycrystalline silicon layer according to claim 1, characterized in that, The thickness ratio of the doped amorphous silicon layer is increased from 40% to 70%, and the total thickness of the doped amorphous silicon layer is 3~50nm.

3. The method for preparing a doped polycrystalline silicon layer according to claim 1, characterized in that, The specific preparation method of the circulation unit is as follows: providing silicon source gas and dilution gas into the reaction chamber to form an intrinsic amorphous silicon layer; providing doping source gas into the reaction chamber to form a doped amorphous silicon layer on the intrinsic amorphous silicon layer.

4. The method for preparing a doped polycrystalline silicon layer according to claim 3, characterized in that, The doping source gas is selected from phosphine, borane, or trimethylborane.

5. A doped polycrystalline silicon layer, characterized in that, It is prepared by the method for preparing doped polycrystalline silicon layers according to any one of claims 1 to 4.

6. A method for preparing a doped amorphous silicon composite layer, characterized in that, Intrinsic amorphous silicon layers and doped amorphous silicon layers are alternately prepared to form a multilayer cyclic unit comprising an intrinsic amorphous silicon layer and a doped amorphous silicon layer composited on the intrinsic amorphous silicon layer, thereby obtaining a doped amorphous silicon composite layer. In this case, the intrinsic amorphous silicon layer of the first cycle unit is close to the substrate; The thickness of each cyclic unit is the same, and the proportion of the thickness of the doped amorphous silicon layer in the cyclic unit increases layer by layer; The multilayer cyclic unit comprises n layers, from the first layer to the nth layer; in each layer of the cyclic unit, the concentration of the dopant source in the doped amorphous silicon layer is the same or increases layer by layer.

7. The method for preparing the doped amorphous silicon composite layer according to claim 6, characterized in that, The specific preparation method of the circulation unit is as follows: providing silicon source gas and dilution gas into the reaction chamber to form an intrinsic amorphous silicon layer; providing doping source gas into the reaction chamber to form a doped amorphous silicon layer on the intrinsic amorphous silicon layer.

8. A doped amorphous silicon composite layer, characterized in that, It is prepared by the method for preparing doped amorphous silicon composite layer according to any one of claims 6 to 7.

9. A semiconductor device, characterized in that, It includes the doped polycrystalline silicon layer of claim 5 or the doped amorphous silicon composite layer of claim 8.

10. A battery comprising the doped polycrystalline silicon layer of claim 5, the doped amorphous silicon composite layer of claim 8, or the semiconductor device of claim 9.

Images