A method for manufacturing a floating T-gate with a gate foot and a gate cap based on a two-step method

Abstract

The application relates to a manufacturing method of a floating T-shaped gate based on a two-step method for manufacturing a gate leg and a gate cap, which comprises the following steps: selecting a semiconductor layer; preparing a first photoresist layer with a gate leg area on the semiconductor layer; preparing a metal layer on the first photoresist layer and the gate leg area; preparing a second photoresist layer with a gate cap area on the metal layer, the gate cap area is exposed and developed from the metal layer through photoetching; preparing a gate cap on the gate cap area; removing the second photoresist layer; removing the metal layer on the first photoresist layer on both sides of the gate cap; and removing the first photoresist layer to prepare a T-shaped gate structure. The application adopts thin glue, improves photoetching resolution, and can make a gate leg with a smaller size. The gate with the small size can greatly improve the frequency of a device and meet the use of the device in a frequency band above millimeter waves.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of semiconductor devices, and relates to a manufacturing method of a floating T-gate with a gate leg and a gate cap based on a two-step method. BACKGROUND

[0002] With the large-scale demand of future communication technologies such as 5G and 6G communication and the national defense application of radar antennas, microwave and millimeter wave devices based on GaN and GaAs materials need to continuously improve their frequency characteristics to meet the needs of radio frequency applications. Gate length and gate structure are key factors that determine the frequency characteristics of devices. T-gate structure is widely used because it has lower parasitic resistance and capacitance than I-gate structure. T-gate technology is the most core single-step process in the entire process flow of GaNHEMT and GaAs pHEMT devices. The characteristic gate length is usually 80-250 nm. In the future, higher frequency communication and radar applications will require gate lengths below 50 nm.

[0003] To meet the expanding demand of circuit frequency in the direction of high frequency in the field of microwave communication and power electronics, as the frequency increases, the gate length of the device needs to be continuously reduced. In the "T" gate process, the reduced gate leg can improve the frequency characteristics of the device, and the larger gate cap can make the gate cross-sectional area along the current conduction direction larger, which can ensure a smaller gate parasitic resistance, thereby effectively suppressing the increase in gate resistance caused by the reduction of gate length.

[0004] A "T" gate with excellent performance requires a small gate leg, a thick gate cap, and a good morphology. The existing common method for manufacturing "T" gate is achieved by photolithography, metal evaporation, stripping, and degumming. Since the size of the gate leg of the "T" gate is generally below 200 nm, the use of traditional optical lithography process will be limited by the performance and cost of the lithography equipment. Therefore, the commonly used method is to use electron beam lithography. At the same time, due to the special structure of the "T" gate, when using electron beam lithography process, multiple layers of photoresist need to be used and T-shaped structure is formed by one-time lithography, and then "T" gate is obtained by gate metal evaporation and stripping.

[0005] When using electron beam lithography process, multiple layers of photoresist need to be used and T-shaped structure is formed by one-time lithography, and then "T" gate is obtained by gate metal evaporation and stripping.

[0006] The use of the multi-layer photoresist causes the total superimposed photoresist thickness to be too thick, often reaching more than 1 um, and scattering occurs in the photoresist during the scanning process of the electron beam current, and the scattering is greater at the bottom, thus causing a certain degree of expansion. Moreover, in the developing process, in order to make the bottom photoresist develop, the gate leg is often expanded outward, and the side wall is inclined. Moreover, the peeling process easily causes lateral irregular expansion of the gate cap metal, thus causing irregular side walls of the gate cap, further increasing the gate capacitance, which seriously affects the frequency performance of the device and introduces a parasitic. Moreover, due to the special T-shaped structure and the thin gate leg, the lower photoresist often peels off the entire gate metal during the peeling process, or causes the gate to collapse, thus reducing the manufacturing efficiency of the device and further increasing the process cost. SUMMARY

[0007] In order to solve the above problems in the prior art, the application provides a manufacturing method of a floating T-shaped gate with a gate leg and a gate cap based on a two-step method.

[0008] The manufacturing method of the floating T-shaped gate with the gate leg and the gate cap based on the two-step method comprises the following steps.

[0009] A semiconductor layer is selected.

[0010] A first photoresist layer with a gate leg area is prepared on the semiconductor layer, and the gate leg area exposes the semiconductor layer.

[0011] A metal layer is prepared on the first photoresist layer and the gate leg area.

[0012] A second photoresist layer with a gate cap area is prepared on the metal layer, the gate cap area exposes the metal layer, and the baking temperature of the second photoresist layer is lower than the baking temperature of the first photoresist layer.

[0013] A gate cap is prepared in the gate cap area.

[0014] The second photoresist layer is removed.

[0015] The metal layer on the first photoresist layer on both sides of the gate cap is removed.

[0016] The first photoresist layer is removed to prepare a T-shaped gate structure.

[0017] In an embodiment of the application, the first photoresist layer with the gate leg area is prepared on the semiconductor layer, and the preparation comprises the following steps.

[0018] The first photoresist layer is coated on the semiconductor layer, and the first photoresist layer is baked.

[0019] Exposing a gate foot region of the first photoresist layer by e-beam lithography;

[0020] Developing the first photoresist layer to remove the first photoresist layer of the gate foot region, forming the gate foot region exposing the semiconductor layer.

[0021] In one embodiment of the present application, a metal layer is prepared on the first photoresist layer and the gate foot region, comprising:

[0022] A metal layer is prepared on the first photoresist layer and the gate foot region by physical vapor deposition method.

[0023] In one embodiment of the present application, a second photoresist layer with a gate cap region is prepared on the metal layer, comprising:

[0024] Coating the second photoresist layer on the metal layer and baking the second photoresist layer;

[0025] Exposing a gate cap region of the second photoresist layer by lithography;

[0026] Developing the second photoresist layer to remove the second photoresist layer of the gate cap region, forming the gate cap region exposing the metal layer.

[0027] In one embodiment of the present application, the temperature difference between the baking temperature of the second photoresist layer and the baking temperature of the first photoresist layer is above 20 degrees Celsius.

[0028] In one embodiment of the present application, a gate cap is prepared in the gate cap region, comprising:

[0029] A gate cap is prepared in the gate cap region by electroplating process.

[0030] In one embodiment of the present application, the second photoresist layer is removed, comprising:

[0031] The second photoresist layer is removed by cleaning with acetone and ethanol, and blow-drying treatment is performed.

[0032] In one embodiment of the present application, the metal layer on the first photoresist layer on both sides of the gate cap is removed, comprising:

[0033] The metal layer on the first photoresist layer on both sides of the gate cap is removed by wet etching or dry etching method.

[0034] In one embodiment of the present application, the first photoresist layer is removed, comprising:

[0035] The first photoresist layer is removed by ultrasonic cleaning.

[0036] Compared with the prior art, the present application has the following beneficial effects:

[0037] The present application uses thin glue, which not only improves the lithography resolution, but also makes the size of the gate foot smaller. The small size of the gate can greatly improve the frequency of the device. At the same time, the present application uses electroplating process instead of metal evaporation stripping process. Compared with the metal evaporation process, the electroplating process makes the side wall steep, the appearance better, and the gate resistance smaller, reduces the parasitic capacitance of the device, and improves the performance of the device. At the same time, the stripping process is avoided, and the product yield is improved.

[0038] Other aspects and features of the present application will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the application. It should be understood, however, that the drawings solely are for purposes of illustration and that they are not intended to limit the scope of the application as described by the appended claims. It should also be understood that the figures are not necessarily to scale: proportionally, the emphasis, instead, being placed upon illustrating the principles of the application. BRIEF DESCRIPTION OF DRAWINGS

[0039] Figure 1 A flowchart of a preparation method of a preparation method of a floating T-shaped gate based on a two-step method of manufacturing gate feet and gate caps is provided for an embodiment of the present application.

[0040] Figures 2a-2l A process diagram of a preparation method of a floating T-shaped gate based on a two-step method of manufacturing gate feet and gate caps is provided for an embodiment of the present application. DETAILED DESCRIPTION

[0041] The present application will be further described below in conjunction with specific embodiments, but the implementation of the present application is not limited thereto.

[0042] Embodiment one

[0043] Please refer to Figure 1 , Figures 2a-2l , Figure 1 A flowchart of a preparation method of a floating T-shaped gate based on a two-step method of manufacturing gate feet and gate caps is provided for an embodiment of the present application. Figures 2a-2l A process diagram of a preparation method of a floating T-shaped gate based on a two-step method of manufacturing gate feet and gate caps is provided for an embodiment of the present application. The present application provides a preparation method of a floating T-shaped gate based on a two-step method of manufacturing gate feet and gate caps, which includes:

[0044] Step 1, please refer to 2a, select a semiconductor layer.

[0045] Preferably, the semiconductor layer may, for example, include a substrate layer and a barrier layer located on the substrate layer, the material of the substrate layer includes sapphire, silicon or silicon carbide, etc., and the material of the barrier layer includes AlGaN / GaN or AlGaAS / GaAs, etc.

[0046] Step 2, preparing a first photoresist layer with a gate foot region on the semiconductor layer, the gate foot region exposing the semiconductor layer.

[0047] Step 2.1, please refer to 2b, coating a first photoresist layer on the semiconductor layer, and baking the first photoresist layer.

[0048] Preferably, the thickness of the first photoresist layer ranges from 75 to 200 nm.

[0049] Step 2.2, please refer to 2c, using electron beam lithography to lithograph the gate foot region of the first photoresist layer.

[0050] Step 2.3, please refer to 2d, developing the first photoresist layer to remove the first photoresist layer in the gate foot region, forming a gate foot region exposing the semiconductor layer, thereby the length of the gate foot can be defined.

[0051] Step 3, please refer to 2e, preparing a metal layer on the first photoresist layer and the gate foot region.

[0052] Specifically, the metal layer is prepared on the first photoresist layer and the gate foot region by physical vapor deposition method (such as evaporation or sputtering process).

[0053] Preferably, the material of the metal layer includes Ni / Au / Pt.

[0054] Step 4, preparing a second photoresist layer with a gate cap region on the metal layer, the gate cap region exposing the metal layer by lithography, the baking temperature of the second photoresist layer is lower than that of the first photoresist layer.

[0055] Preferably, the temperature difference between the baking temperature of the second photoresist layer and the baking temperature of the first photoresist layer is above 20 degrees Celsius.

[0056] Preferably, the thickness of the second photoresist layer ranges from 300 to 1000 nm.

[0057] Step 4.1, please refer to 2f, coating a second photoresist layer on the metal layer, and baking the second photoresist layer.

[0058] In this embodiment, the baking temperature of the second photoresist layer is lower than that of the first photoresist layer, so that the first photoresist layer will not be affected when the second photoresist layer is baked, so that the first photoresist layer will not be deformed or evaporated, and the second photoresist layer can be effectively baked.

[0059] Step 4.2, please refer to 2g, lithographing the gate cap region of the second photoresist layer. For example, using electron beam lithography to lithograph the gate cap region of the second photoresist layer.

[0060] Step 4.3, see 2h, develop the second photoresist layer to remove the second photoresist layer in the gate cap region, to form the gate cap region exposing the metal layer.

[0061] Step 5, see 2i, prepare the gate cap in the gate cap region.

[0062] Specifically, the gate cap is prepared in the gate cap region by an electroplating process.

[0063] Preferably, the material of the gate cap is Au.

[0064] Step 6, see 2j, remove the second photoresist layer.

[0065] Specifically, the second photoresist layer is removed by using acetone and ethanol cleaning, and then blow-dried.

[0066] The conventional stripping cannot be used when removing the second photoresist layer, and the ultrasonic cleaning cannot be used, because the conventional stripping and the ultrasonic cleaning are easy to remove the first photoresist layer together. Instead, acetone and ethanol cleaning is used, and the cleaning can be slightly shaken, and then directly blow-dried.

[0067] Step 7, see 2k, remove the metal layer on the first photoresist layer on both sides of the gate cap.

[0068] Specifically, the metal layer on the first photoresist layer on both sides of the gate cap is removed by using wet etching or dry etching.

[0069] Step 8, see 2l, remove the first photoresist layer to prepare the T-shaped gate structure.

[0070] Specifically, the first photoresist layer is removed by using ultrasonic cleaning.

[0071] Since the size of the gate leg is small, the intensity of the ultrasonic and the degree of water impact should be paid attention to in the cleaning process of removing the first photoresist layer. After cleaning, the metal on the planar material is left to form the T-shaped gate.

[0072] The gate leg and the gate cap are prepared in two steps. The gate leg is formed by separately coating the first photoresist layer and depositing the metal. The single-layer photoresist is thinner than the multi-layer photoresist, the electron beam scattering caused by the incident light is smaller, the lithography resolution is improved, and the smaller size of the gate leg lithography pattern can be obtained, and the sidewall of the gate leg is more steep.

[0073] The grid cap of the present application is made by single-layer glue photoetching and electroplating process, since the grid cap size is larger, the photoetching can be completed by electron beam photoetching and also by photoetching, the metal process adopts electroplating process, which can efficiently obtain thicker metal, and the side wall has good steep appearance, which is beneficial to reduce the grid resistance. Since the grid cap metal generally adopts gold Au, the electroplating process can greatly save the gold usage, and compared with the conventional metal deposition and stripping two-step process, the electroplating process only needs a single step to be completed, and avoids the problem of small-size grid foot falling caused by the stripping process.

[0074] The present application avoids the stripping process in the process design process, and has higher yield.

[0075] The electroplating process designed in the process flow of the present application can make the grid side wall steep, the appearance is better, the grid resistance is smaller, and the stability of process and device performance is improved.

[0076] Compared with the metal evaporation, the electroplating process saves more metal, greatly reduces the cost, and is more easy to industrialize.

[0077] In the description of the present application, the terms "first", "second" are only used for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise specifically limited.

[0078] In the description of the present application, the description of the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or specific data points described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In the description of the present application, the illustrative description of the above terms is not necessarily for the same embodiment or example. Moreover, the specific features, structures, materials or specific data points described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in the present application.

[0079] The above is a further detailed description of the present application in combination with specific preferred embodiments, and the specific implementation of the present application cannot be limited to these descriptions. For those skilled in the art, without departing from the concept of the present application, a number of simple deductions or substitutions can be made, which should be regarded as falling within the protection scope of the present application.

Claims

1. A method of making a floating T-stub of a grid based on a two-step method of making a grid foot and a grid cap, characterized in that, The method for manufacturing the floating T-shaped gate comprises the following steps: selecting a semiconductor layer; preparing a first photoresist layer with a gate leg area on the semiconductor layer, the gate leg area exposing the semiconductor layer; preparing a metal layer on the first photoresist layer and the gate leg area; preparing a second photoresist layer with a gate cap area on the metal layer, the gate cap area exposing the metal layer by photoetching, the baking temperature of the second photoresist layer being lower than the baking temperature of the first photoresist layer, and the temperature difference between the baking temperature of the second photoresist layer and the baking temperature of the first photoresist layer being above 20 degrees Celsius; preparing a gate cap on the gate cap area by electroplating process; removing the second photoresist layer, cleaning and removing the second photoresist layer by using acetone and ethanol, and performing blow-drying treatment; removing the metal layer on the first photoresist layer on both sides of the gate cap; removing the first photoresist layer to prepare a T-shaped gate structure; and removing the first photoresist layer by using ultrasonic cleaning.

2. The method of claim 1, wherein, The method for preparing the first photoresist layer with a gate leg area on the semiconductor layer comprises the following steps: coating the first photoresist layer on the semiconductor layer and baking the first photoresist layer; electron beam lithographing the gate leg area of the first photoresist layer; developing the first photoresist layer to remove the first photoresist layer of the gate leg area, thereby forming the gate leg area exposing the semiconductor layer.

3. The method of claim 1, wherein, The method for preparing the metal layer on the first photoresist layer and the gate leg area comprises the following steps: preparing the metal layer on the first photoresist layer and the gate leg area by physical vapor deposition method.

4. The method of claim 2, wherein, The method for preparing the second photoresist layer with a gate cap area on the metal layer comprises the following steps: coating the second photoresist layer on the metal layer and baking the second photoresist layer; photoetching the gate cap area of the second photoresist layer; developing the second photoresist layer to remove the second photoresist layer of the gate cap area, thereby forming the gate cap area exposing the metal layer.

5. The method of claim 1, wherein, The method for removing the metal layer on the first photoresist layer on both sides of the gate cap comprises the following steps: adopting wet etching or dry etching method to remove the metal layer on the first photoresist layer on both sides of the gate cap.

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