A method for manufacturing a shielded gate trench MOSFET with integrated Schottky diode

Abstract

The present invention provides a method for manufacturing a shielded gate trench MOSFET with an integrated Schottky diode, wherein a gate trench, a Schottky trench, a shielding electrode, an isolation dielectric layer, and a gate oxide layer are formed on a substrate by using an existing process; a photolithography process is used to remove the gate oxide layer on the sidewall of the Schottky region trench and the surface of the substrate; a gate oxide layer is grown on the surface of the substrate for a second time; polysilicon is deposited and etched back to the surface of the substrate; ion implantation is performed on the substrate to form a body region; a dry etching process is used to etch away all the gate oxide layer on the surface of the substrate; a furnace tube oxidation heat treatment is used to push down the body to produce an oxide film layer with a uniform thickness; ion implantation is performed on the substrate to form a source region, and a furnace tube heat treatment is used to push down the source region. The present invention etches the gate oxide layer on the surface of the substrate lightly, and then performs furnace tube heat treatment with an oxidized body region to push down, thereby controlling the oxide film thickness before the source region is injected, making the injection depth of the source region of the Schottky and MOS tubes consistent, thereby improving the leakage of the device.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor manufacturing, and in particular to a method for manufacturing a shielded gate trench MOSFET with an integrated Schottky diode. Background Art

[0002] In the shielded gate trench (SGT) process of integrating Schottky diodes in cells, in order to achieve independent turn-on threshold voltages for Schottky transistors and MOS transistors, the gate oxide thickness on the silicon of the Schottky region (Schottky transistor) and the cell region (MOS transistor) needs to be different. However, the different gate oxide thickness will affect the subsequent process body injection and source injection, such as Figure 1 A to Figure 1 As shown in G.

[0003] The energy injected into the Body is large, and the B element is light, so the injection depth is less affected by the difference in oxide film thickness; while the energy injected into the Source is small, and the As element is heavy, so the injection depth is more affected by the difference in oxide film thickness. When the injection depth in the cell region is appropriate, the Source injection depth in the Schottky region will be deeper, shortening the channel of the Schottky tube. The short channel effect increases the drain current of the Schottky tube, resulting in overall leakage failure of the device.

[0004] Therefore, a new method for integrating a Schottky transistor in a shielded gate trench field effect transistor is urgently needed. Summary of the invention

[0005] In order to solve the problems existing in the above-mentioned prior art, the present invention provides a method for manufacturing a shielded gate trench MOSFET with an integrated Schottky diode, so as to improve the leakage of the device.

[0006] The present invention provides a method for manufacturing a shielded gate trench MOSFET with an integrated Schottky diode, comprising the following steps:

[0007] Step 1: forming a gate trench, a Schottky trench, a shielding electrode, an isolation dielectric layer on a substrate using an existing process, and growing a gate oxide layer;

[0008] Step 2: using a photolithography process to remove the gate oxide layer on the sidewall of the Schottky region trench and the surface of the substrate;

[0009] Step 3, secondary growth of a gate oxide layer on the surface of the substrate;

[0010] Step 4: depositing polysilicon and etching back to the substrate surface;

[0011] Step 5, performing ion implantation on the substrate to form a body region;

[0012] Step 6: using a dry etching process to completely etch away the gate oxide layer on the surface of the substrate;

[0013] Step 7: Using furnace tube oxidation heat treatment to push the body down to produce an oxide film layer with uniform thickness;

[0014] Step eight, ion implantation is performed on the substrate to form a source region, and furnace heat treatment is performed to push down the source region.

[0015] Preferably, the substrate in step one is a silicon substrate.

[0016] Preferably, the isolation dielectric layer in step 1 is an oxide layer.

[0017] Preferably, in step 1, the thickness of the gate oxide layer is 250A to 1000A.

[0018] Preferably, the thickness of the gate oxide layer grown for the second time in step three is 50 Å to 250 Å.

[0019] Preferably, the thickness of the oxide film layer in step seven is 150A to 250A.

[0020] The manufacturing method of the shielded gate trench MOSFET with integrated Schottky diode of the present invention comprises the following steps: after forming the body injection region, the gate oxide layer on the surface of the silicon substrate is completely etched away by dry etching, and then the body region is pushed down by furnace tube oxidation heat treatment, so as to control the oxide film thickness on the surface of the Schottky and MOS tubes to be consistent before the source region is injected, so that the injection depth of the source region of the Schottky and MOS tubes is consistent, thereby improving the leakage of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0022] Figure 1 A to Figure 1 G shows a schematic diagram of the current process flow for integrating Schottky transistors in SGT MOSFETs;

[0023] Figure 2 A flowchart showing a method for manufacturing a shielded gate trench MOSFET with an integrated Schottky diode according to an embodiment of the present invention;

[0024] Figure 3A-3H Schematic diagram showing the device structure in each step of the method for manufacturing a shielded gate trench MOSFET with an integrated Schottky diode according to an embodiment of the present invention. DETAILED DESCRIPTION

[0025] The present invention is described below based on embodiments, but the present invention is not limited to these embodiments. In the detailed description of the present invention below, some specific details are described in detail. It is possible for a person skilled in the art to fully understand the present invention without the description of these details. In order to avoid confusing the essence of the present invention, known methods, processes, flows, components and circuits are not described in detail.

[0026] In addition, persons of ordinary skill in the art will appreciate that the drawings provided herein are for illustration purposes and are not necessarily drawn to scale.

[0027] Unless the context clearly requires otherwise, the words "include", "comprising" and similar words throughout the application should be interpreted as including rather than exclusive or exhaustive; that is, the meaning is "including but not limited to".

[0028] In the description of the present invention, it should be understood that the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0029] Shielded Gate Trench Metal-Oxide-Semiconductor Field Effect Transistor (SGT MOSFET) is a typical trench MOSFET. It is widely used in the field of low-voltage power semiconductors because of its high device integration, low on-resistance, low gate-drain charge density, and large current capacity, thus having low switching losses and fast switching speed. In semiconductor integrated circuits, in order to improve the cross-frequency characteristics of the device, the current common practice is to integrate Schottky diodes on SGT MOSFETs.

[0030] Figure 1 A to Figure 1 G shows a schematic diagram of the current process flow for integrating Schottky transistors in SGT MOSFETs. Figure 1 A to Figure 1 G, including the following steps: (1) Figure 1 As shown in A, a trench is formed on a silicon substrate, including a gate trench 11 and a Schottky trench 12, a shielding electrode 13, an isolation dielectric layer 14, and a gate oxide layer 15 is grown; (2) as Figure 1 As shown in B, a photolithography process is used to remove the gate oxide layer 15 on the sidewall of the Schottky region trench and the surface of the substrate; (3) Figure 1As shown in C, the gate oxide layer is grown again, and thus, the oxide film steps formed by the gate oxide difference of the two trench structures (cell and Schottky) are shown in the figure; (4) Figure 1 As shown in D, gate polysilicon 16 is grown and etched back to the substrate surface; (5) as shown in Figure 1 As shown in E, the injection forms the body region 17, and the furnace tube heat treatment pushes the body down; (6) as Figure 1 As shown in F, wet etching adjusts the residual oxide film in the cell area; (7) Figure 1 As shown in G, Source is photolithographically processed, injected to form Source region 18, and furnace heat treated to push Source down. In step (5), the energy injected into Body is relatively large, and the B element is relatively light, so the injection depth is less affected by the difference in oxide film thickness. In step (7), the energy injected into Source is relatively small, and the As element is relatively heavy, so the injection depth is more affected by the difference in oxide film thickness. Specifically, as shown in the figure, when the cell injection depth is appropriate, the Source injection depth in the Schottky region will be deeper, which will shorten the communication of the Schottky tube. The short channel effect will increase the drain current of the Schottky tube, resulting in overall leakage failure of the device.

[0031] In order to solve the problem of device leakage, the gate oxide thickness on the silicon of the Schottky region (Schottky transistor) and the cell region (MOS transistor) must be consistent before the Source is injected. Therefore, the present invention proposes a method for manufacturing a shielded gate trench MOSFET with an integrated Schottky diode. The technical solution of the present invention is further explained below in conjunction with the accompanying drawings and through specific implementation methods.

[0032] like Figure 2 As shown, it is a flow chart showing a method for manufacturing a shielded gate trench MOSFET with an integrated Schottky diode according to an embodiment of the present invention; Figures 3A to 3G As shown, it is a schematic diagram of the device structure in each step of the method for manufacturing a shielded gate trench MOSFET with an integrated Schottky diode according to an embodiment of the present invention; the method for manufacturing a shielded gate trench MOSFET with an integrated Schottky diode according to an embodiment of the present invention comprises the following steps:

[0033] Step 1: Figure 3A As shown, a gate trench 31, a Schottky trench 32, a shielding electrode 33, an isolation dielectric layer 34 are formed on a substrate by using existing processes, and a gate oxide layer 35 is grown.

[0034] The constituent material of the substrate may be undoped single crystal silicon, single crystal silicon doped with impurities, silicon on insulator (SOI), stacked silicon on insulator (SSOI), stacked silicon germanium on insulator (S-SiGeOI), silicon germanium on insulator (SiGeOI) and germanium on insulator (GeOI), etc. As an example, in the embodiment of the present invention, the substrate is made of single crystal silicon material.

[0035] The trenches include gate trenches 31 and Schottky trenches 32, which are defined by a hard mask layer and formed in a silicon substrate. The gate trenches 31 and Schottky trenches 32 formed in this step include a plurality of them, and the specific distribution may be that Schottky trenches 32 are embedded between the gate trenches 31.

[0036] In the embodiment of the present invention, the isolation dielectric layer 34 is an oxide layer, which can be formed by thermal oxidation or HDP process. The gate oxide layer 35 is formed by growth, and has a thickness of 250A to 1000A. The isolation dielectric layer includes a shielding electrode isolation dielectric layer and an isolation dielectric layer between the shielding electrode and the gate, which are not distinguished here and are collectively referred to as the isolation dielectric layer.

[0037] Step 2: Figure 3B As shown, a photolithography process is used to remove the gate oxide layer on the sidewall of the trench in the Schottky region and the surface of the substrate.

[0038] Step 3: Figure 3C As shown, a gate oxide layer is grown secondary on the substrate surface.

[0039] In order to achieve independent turn-on threshold voltages for Schottky transistors and MOS transistors, the gate oxide thickness on the silicon of the Schottky region (Schottky transistor) and the cell region (MOS transistor) needs to be different. In step two, the gate oxide layer on the sidewalls of the Schottky region trench and on the surface of the substrate is removed by photolithography. In step three, the gate oxide layer is grown a second time. In an embodiment of the present invention, the thickness of the secondarily grown gate oxide layer is 50A to 250A. As shown in the figure, the oxide film step is formed by the difference in gate oxides of the two trench structures (cell and Schottky).

[0040] Step 4: Figure 3D As shown, polysilicon is deposited and then etched back to the substrate surface.

[0041] Step 5: Figure 3E As shown, ion implantation is performed on the substrate to form a body region.

[0042] The energy of Body injection is large, and the B element is light, so the injection depth is less affected by the difference in oxide film thickness. In the embodiment of the present invention, the energy of Body injection is 60-180KeV, and the dose is 0.5-2.0E13 / cm3, which can be adjusted according to device requirements.

[0043] Step 6: Figure 3F As shown, the gate oxide layer on the surface of the substrate is completely etched away using a dry etching process.

[0044] Step 7: Figure 3G As shown, furnace tube oxidation heat treatment is used to push the body down to produce an oxide film layer with uniform thickness.

[0045] In the embodiment of the present invention, the thickness of the oxide film layer is 150 Å to 250 Å.

[0046] Step 8: Figure 3H As shown, ion implantation is performed on the substrate to form a source region, and furnace heat treatment is used to push down the source region.

[0047] The energy of the source injection is relatively small, and the As element is relatively heavy, so the injection depth is greatly affected by the difference in oxide film thickness. In the embodiment of the present invention, the energy of the source injection is 40-80 KeV, and the dose is 2-8E15 / cm3.

[0048] The manufacturing method of the shielded gate trench MOSFET with integrated Schottky diode of the present invention requires that the gate oxide thickness on the silicon of the Schottky region (Schottky transistor) and the cell region (MOS transistor) be consistent before source injection in order to solve the problem of device leakage. Therefore, after forming the body injection region, the gate oxide layer on the surface of the silicon substrate is completely etched away by dry etching, and then the body region is subjected to furnace tube oxidation heat treatment to push it down, so as to control the oxide film thickness of the Schottky and MOS tube surfaces to be consistent before source injection.

[0049] The manufacturing method of the shielded gate trench MOSFET with integrated Schottky diode of the embodiment of the present invention also includes: interlayer dielectric deposition, contact hole exposure and etching, contact hole injection to form ohmic contact; Schottky contact groove exposure and etching; metal deposition, at the bottom of the Schottky contact groove, the metal contacts the epitaxial layer to form a Schottky diode; subsequent processes include conventional metal exposure, etching, and alloying processes.

[0050] like Figure 1 G and Figure 3H The Source injection conditions of the existing integrated Schottky SGT process and the embodiment of the present invention are shown. Compared with the existing integrated Schottky SGT process, the method for manufacturing a shielded gate trench MOSFET with an integrated Schottky diode in the embodiment of the present invention can eliminate the difference in silicon surface oxide film thickness caused by the different thicknesses of the Schottky gate oxide and the cell gate oxide, making the Source injection depths of the Schottky and MOS tubes consistent, thereby improving the leakage of the device.

[0051] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for manufacturing a shielded gate trench MOSFET with an integrated Schottky diode, characterized in that: The following steps are involved: Step 1: forming a gate trench, a Schottky trench, a shielding electrode, an isolation dielectric layer on a substrate using an existing process, and growing a gate oxide layer; Step 2: using a photolithography process to remove the gate oxide layer on the sidewall of the Schottky region trench and the surface of the substrate; Step 3, secondary growth of a gate oxide layer on the surface of the substrate; Step 4: depositing polysilicon and etching the polysilicon back to the substrate surface; Step 5, performing ion implantation on the substrate to form a body region; Step 6: using a dry etching process to completely etch away the gate oxide layer on the surface of the substrate; Step 7: Using furnace tube oxidation heat treatment to push the body down to produce an oxide film layer with uniform thickness; Step eight, ion implantation is performed on the substrate to form a source region, and furnace heat treatment is performed to push down the source region.

2. The method for manufacturing a shielded gate trench MOSFET with integrated Schottky diode according to claim 1, characterized in that: The substrate in step 1 is a silicon substrate.

3. The method for manufacturing a shielded gate trench MOSFET with integrated Schottky diode according to claim 1, characterized in that: The isolation dielectric layer in step 1 is an oxide layer.

4. The method for manufacturing a shielded gate trench MOSFET with integrated Schottky diode according to claim 1, characterized in that: The thickness of the gate oxide layer in step 1 is 250A to 1000A.

5. The method for manufacturing a shielded gate trench MOSFET with integrated Schottky diode according to claim 1, characterized in that: The thickness of the gate oxide layer grown for the second time in step 3 is 50A to 250A.

6. The method for manufacturing a shielded gate trench MOSFET with integrated Schottky diode according to claim 1, characterized in that: The thickness of the oxide film layer in step seven is 150A to 250A.

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