Clock calibration structure and calibration method thereof

Abstract

The application discloses a clock calibration structure and a calibration method thereof, and relates to the technical field of communication, and aims to solve the problem of low precision in the prior art and the problem that the chip precision counting demand cannot be met. The clock calibration circuit is composed of a relaxation oscillator, a crystal oscillator, a frequency synthesizer, a digital operation control circuit and a counter. The crystal oscillator is used for initial calibration of the frequency of the relaxation oscillator, and the frequency synthesizer is used for secondary calibration of the frequency of the relaxation oscillator. The problem that the ordinary relaxation oscillator in the prior art is realized by a resistor, a capacitor and a comparator, the precision is low, and the chip precision counting demand cannot be met is solved. The frequency of the relaxation oscillator is calibrated by the crystal oscillator and the frequency synthesizer, and the performance of the high-frequency-precision relaxation oscillator can be realized.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of communication technology, in particular to a clock calibration structure and a calibration method thereof. BACKGROUND

[0002] The relaxation oscillator (ROSC) is mainly used to generate a non-sinusoidal output signal, such as a square wave or a triangular wave. The relaxation oscillator contains a nonlinear element such as a transistor, which can periodically release the energy stored in the capacitor or inductor, so that the output signal waveform changes instantaneously. The relaxation oscillator that generates a square wave can be used for the clock signal of a sequential logic circuit (such as a timer, a counter). The relaxation oscillator is a kind of on-chip RC oscillator without input signal, with a positive feedback amplifier with a frequency selection network. The frequency selection network is composed of resistance and capacitance elements, which has the advantages of easy implementation, strong portability, high frequency stability, low power consumption, etc., and is widely used in microcontrollers.

[0003] However, the ordinary relaxation oscillator is realized by resistance, capacitance and comparator, which has low precision and cannot meet the chip accurate counting requirements. SUMMARY

[0004] The purpose of the present application is to provide a clock calibration structure and a calibration method thereof, which solves the problem of low precision of the ordinary relaxation oscillator in the prior art and cannot meet the chip accurate counting requirements.

[0005] In order to achieve the above-mentioned purpose, the present application provides the following technical scheme:

[0006] In a first aspect, the present application provides a clock calibration structure, comprising:

[0007] a relaxation oscillator, a crystal oscillator, a frequency synthesizer, a digital operation control circuit and a counter;

[0008] One end of the relaxation oscillator is connected to the digital operation control circuit, and the other end of the relaxation oscillator is connected to the counter; the crystal oscillator and the frequency synthesizer are both connected to the counter; the counter is connected to the digital operation control circuit; the crystal oscillator and the frequency synthesizer are connected to each other;

[0009] The counter is used to count the clock signals generated by the relaxation oscillator, the crystal oscillator and the frequency synthesizer; the digital operation control circuit is used to adjust the frequency of the relaxation oscillator; the crystal oscillator is used to initially calibrate the frequency of the relaxation oscillator, and the frequency synthesizer is used to secondarily calibrate the frequency of the relaxation oscillator.

[0010] In a second aspect, the present application provides a clock calibration method, characterized in that the clock calibration structure of any one of claims 1-4 is used for calibration, and the method comprises the following steps:

[0011] Starting the relaxation oscillator and the crystal oscillator;

[0012] Taking the first frequency output by the crystal oscillator as a reference frequency, and using a counter to count the clock of the relaxation oscillator to obtain a first clock number;

[0013] Through a digital operation control circuit, the frequency of the relaxation oscillator is initially calibrated to make the first clock number meet an initial preset condition;

[0014] Starting the frequency synthesizer to generate a second frequency;

[0015] Taking the second frequency as a reference frequency, and using a counter to count the clock of the relaxation oscillator to obtain a second clock number;

[0016] Through the digital operation control circuit, the frequency of the relaxation oscillator is twice calibrated to make the second clock number meet a target preset condition, and the calibration is completed.

[0017] Compared with the prior art, the clock calibration structure and the calibration method thereof are provided. The clock calibration circuit is composed of the relaxation oscillator, the crystal oscillator, the frequency synthesizer, the digital operation control circuit, and the counter. The crystal oscillator is used for initial calibration of the frequency of the relaxation oscillator, and the frequency synthesizer is used for twice calibration of the frequency of the relaxation oscillator. The problem that the ordinary relaxation oscillator in the prior art is realized by resistance, capacitance, and a comparator, has low precision, and cannot meet the chip accurate counting requirement is solved. The crystal oscillator and the frequency synthesizer are used for calibration of the frequency of the relaxation oscillator, and high-frequency precision relaxation oscillator performance can be realized. BRIEF DESCRIPTION OF DRAWINGS

[0018] The accompanying drawings, which are included to provide a further understanding of the present application, constitute a part of the present application and illustrate embodiments of the present application and the description thereof, and do not constitute an improper limitation of the present application. In the drawings:

[0019] Figure 1 A clock calibration circuit schematic diagram provided by the present application;

[0020] Figure 2 A relaxation oscillator structure connection schematic diagram in the clock calibration circuit provided by the present application;

[0021] Figure 3 A capacitor switch array schematic diagram in the relaxation oscillator structure provided by the present application;

[0022] Figure 4 The clock calibration method provided by the application has the flowchart shown in the figure.

[0023] Reference numerals: 110 - relaxation oscillator, 120 - crystal oscillator, 130 - frequency synthesizer, 140 - digital operation control circuit, 150 - counter, capacitor switch array 210, comparator 220, resistor 230. DETAILED DESCRIPTION

[0024] In order to clearly describe the technical solutions of the embodiments of the application, in the embodiments of the application, the words "first", "second", etc. are used to distinguish the same items or similar items with basically the same functions and effects. For example, the first threshold and the second threshold are only used to distinguish different thresholds, and the order is not limited. Those skilled in the art can understand that the words "first", "second", etc. do not limit the number and execution order, and the words "first", "second", etc. also do not mean that they are necessarily different.

[0025] It should be noted that in the present application, the words "exemplary" or "for example" are used to represent an example, illustration or description. Any embodiment or design scheme described as "exemplary" or "for example" in the present application should not be interpreted as more preferred or more advantageous than other embodiments or design schemes. Rather, the words "exemplary" or "for example" are intended to present the relevant concept in a specific manner.

[0026] In the present application, "at least one" means one or more, and "multiple" means two or more. The association relationship of the associated objects is described, which means that there can be three relationships, for example, A and / or B, which can represent the following cases: A exists alone, A and B exist together, and B exists alone, where A and B can be singular or plural. The character " / " generally represents an "or" relationship between the associated objects before and after it. "At least one of the following" or similar expressions means any combination of these items, including any combination of single item or multiple items. For example, at least one of a, b or c can represent: a, b, c, the combination of a and b, the combination of a and c, the combination of b and c, or the combination of a, b and c, where a, b and c can be single or multiple.

[0027] The terms used in the present scheme are explained as follows:

[0028] The relaxation oscillator (ROSC) is mainly used to generate a non-sinusoidal wave output signal, such as a square wave or a triangular wave. The relaxation oscillator contains a nonlinear element such as a transistor, which can periodically release the energy stored in the capacitor or inductor, so that the output signal waveform changes instantaneously.

[0029] Relaxation oscillator that generates a square wave can be used in the clock signal of sequential logic circuits (e.g. timers, counters), although a crystal oscillator is usually selected for the clock signal. An oscillator that generates a triangular wave (or sawtooth wave) is usually used in time-based applications, to generate the horizontal deflection signal in cathode ray tubes in oscilloscopes or televisions. In frequency generators, triangular waves are often used to shape the output to approximate a sine wave. A relaxation oscillator is a type of multivibrator.

[0030] Crystal oscillator: refers to a thin piece (referred to as a wafer) cut from a piece of quartz crystal at a certain azimuth angle, quartz crystal resonator, referred to as quartz crystal or crystal, crystal oscillator; and the crystal element added with IC in the package to form an oscillation circuit is called a crystal oscillator. Its products are generally packaged with metal shells, and some are packaged with glass shells, ceramics or plastics. It can be applied in various scenes, such as: general crystal oscillator, used in various circuits to generate an oscillation frequency. The quartz crystal resonator is used to generate a standard pulse signal in cooperation with other elements, and is widely used in digital circuits. The quartz crystal resonator is used for microprocessor and quartz crystal oscillator for watch, etc.

[0031] Frequency synthesizer: frequency synthesizer is an important part of modern electronic systems, and is a key device in modern communication systems, radars and test equipment, which can provide high-precision and high-stability frequency. There are three basic frequency synthesis methods: ① direct frequency synthesis; ② phase-locked frequency synthesis; and ③ direct digital frequency synthesis (DDS).

[0032] Counter: counting is a kind of most simple and basic operation. The counter is a logic circuit for realizing such operation. The counter mainly counts the number of pulses in a digital system to realize the functions of measurement, counting and control, and also has a frequency division function. The counter is composed of basic counting units and some control gates, and the counting unit is composed of a series of various types of flip-flops with information storage function, such as RS flip-flop, T flip-flop, D flip-flop and JK flip-flop.

[0033] The ordinary relaxation oscillator is realized by resistance, capacitance and comparator, and has low precision and cannot meet the accurate counting requirement of the chip. In view of the problem of low frequency precision of the relaxation oscillator, the high-precision relaxation oscillator is realized through calibration.

[0034] Next, the scheme provided by the embodiment of the present application will be described in combination with the drawings:

[0035] Figure 1 The clock calibration circuit provided by the present application is shown in the figure. Figure 1As shown in the figure, the clock calibration structure can include: a relaxation oscillator 110, a crystal oscillator 120, a frequency synthesizer 130, a digital operation control circuit 140 and a counter 150; one end of the relaxation oscillator 110 is connected with the digital operation control circuit 140, and the other end of the relaxation oscillator 110 is connected with the counter 150; the crystal oscillator 120 and the frequency synthesizer 130 are both connected with the counter 150; the counter 150 is connected with the digital operation control circuit 140; the crystal oscillator 120 and the frequency synthesizer 130 are connected with each other; the counter 150 is used for counting the clock signals generated by the relaxation oscillator 110, the crystal oscillator 120 and the frequency synthesizer 130; the digital operation control circuit 140 is used for adjusting the frequency of the relaxation oscillator 110; the crystal oscillator 120 is used for initially calibrating the frequency of the relaxation oscillator 110, and the frequency synthesizer 130 is used for secondarily calibrating the frequency of the relaxation oscillator 110.

[0036] As shown in the figure, the counter can be one or two, Figure 1 As shown in the figure, the counter can be one or two, Figure 1 In the actual application, two counters can be used, one of which is used for counting the number of relaxation oscillator clocks when the crystal oscillator output signal is used as the reference frequency, and the other is used for counting the number of relaxation oscillator clocks when the frequency synthesizer output signal is used as the reference frequency. When there is only one counter, the counter can count the number of relaxation oscillator clocks in different stages.

[0037] First, the crystal oscillator is used to count the clock signals output by the relaxation oscillator to obtain a first clock value, and the first clock value is processed, and the error is adjusted to the capacitance array or the frequency of the relaxation oscillator. During calibration, the crystal oscillator performs coarse calibration on the frequency. The frequency synthesizer is frequency-multiplied on the basis of the crystal oscillator, and has higher precision. After coarse calibration, the frequency synthesizer with higher precision is used for calibration. Counter 1 is used to count the frequency of the relaxation oscillator with the clock output by the crystal oscillator. Counter 2 is used to count the frequency of the relaxation oscillator with the clock output by the frequency synthesizer, and the precision of counter 1 is higher than that of counter 2.

[0038] Optionally, the relaxation oscillator circuit corresponding to the relaxation oscillator can be combined Figure 2 to illustrate: Figure 2 The figure is a connection diagram of the relaxation oscillator structure in the clock calibration circuit provided by the application. As shown in the figure, Figure 2As shown, the relaxation oscillator circuit corresponding to the relaxation oscillator may include at least a capacitor switch array 210, a comparator 220, and a resistor 230. The input end of the comparator 220 is connected to different power supplies, and the output end of the comparator 220 is connected to the capacitor switch array 210; the resistor 230 and the capacitor switch array 210 are connected in parallel to the ground.

[0039] The comparator 220 compares the input first voltage and the input second voltage to obtain a voltage result, and transmits the voltage result to the capacitor switch array 210 .

[0040] like Figure 2 As shown, voltages V1 and V2 are input to the comparator. The comparator 220 compares the voltages V1 and V2, resets the logic of the voltage result, and then inputs it to the capacitor switch array 210. One end of the resistor 230 is grounded, and one end of the capacitor switch array 210 is also grounded.

[0041] During the specific adjustment, the digital operation control circuit adjusts the frequency of the relaxation oscillator by adjusting the capacitance code value in the capacitance switch array, wherein the equivalent capacitance value of the capacitance array increases as the capacitance code value increases.

[0042] Furthermore, the specific structure of the capacitor switch array can be combined with Figure 3 Provide explanation. Figure 3 Schematic diagram of the capacitor switch array in the relaxation oscillator structure provided by the present invention. Figure 3 As shown, the capacitor switch array may include at least N switches and capacitors, one switch and one capacitor are connected in series to form a capacitor switch branch, N switches and capacitors form N capacitor switch branches, and the N capacitor switch branches are connected in parallel to the relaxation oscillator circuit.

[0043] Optionally, the relaxation oscillator, crystal oscillator and frequency synthesizer are all connected to an oscillator driving module; the oscillator driving module provides voltage to drive the relaxation oscillator, crystal oscillator and frequency synthesizer to start oscillation and maintain oscillation.

[0044] Using the above Figure 1 The clock calibration structure in the relaxation oscillator can be calibrated. The specific calibration method can be combined with Figure 4 To explain:

[0045] Figure 4 The flowchart of the clock calibration method provided by the present invention is shown in FIG. Figure 4 As shown, the calibration process may include the following steps:

[0046] Step 410: Start the relaxation oscillator and the crystal oscillator.

[0047] During startup, it can be triggered by an external trigger circuit or controlled by a controller. The specific startup method can be set according to actual application requirements and is not specifically limited in this manual.

[0048] Step 420: Using the first frequency output by the crystal oscillator as a reference frequency, a counter is used to count the clocks of the relaxation oscillator to obtain a first clock number.

[0049] Step 430: Initially calibrate the frequency of the relaxation oscillator through a digital operation control circuit so that the first clock number meets an initial preset condition.

[0050] Step 440: Start the frequency synthesizer to generate a second frequency.

[0051] Step 450: Using the second frequency as a reference frequency, a counter is used to count the clocks of the relaxation oscillator to obtain a second clock number.

[0052] Step 460: The frequency of the relaxation oscillator is calibrated twice by the digital operation control circuit so that the second clock number meets the target preset condition, and the calibration is completed.

[0053] Figure 4 The method starts a relaxation oscillator and a crystal oscillator; uses a first frequency output by the crystal oscillator as a reference frequency, uses a counter to count the clocks of the relaxation oscillator to obtain a first clock number; performs an initial calibration on the frequency of the relaxation oscillator through a digital operation control circuit so that the first clock number meets an initial preset condition; starts a frequency synthesizer to generate a second frequency; uses the second frequency as a reference frequency, uses a counter to count the clocks of the relaxation oscillator to obtain a second clock number; performs a secondary calibration on the frequency of the relaxation oscillator through the digital operation control circuit so that the second clock number meets a target preset condition, and calibration is completed. The crystal oscillator is used for initial calibration of the frequency of the relaxation oscillator, and the frequency synthesizer is used for secondary calibration of the frequency of the relaxation oscillator. This solves the problem in the prior art that ordinary relaxation oscillators are implemented using resistors, capacitors, and comparators, have low precision, and cannot meet the chip's precise counting requirements. By calibrating the relaxation oscillator frequency through a crystal oscillator and a frequency synthesizer, high-frequency precision relaxation oscillator performance can be achieved.

[0054] based on Figure 4 The present specification also provides some specific implementation methods of the method, which are described below.

[0055] Optionally, after starting the relaxation oscillator, the relaxation oscillator generates a third frequency, and the method may further include:

[0056] acquire a target value of the relaxation oscillator output frequency setting;

[0057] determine a ratio of the target value and the first frequency as a first parameter;

[0058] In initial calibration, the initial preset condition met by the first clock number is that: wherein X1 represents the first clock number, N1 represents the first parameter, f3 represents a third frequency generated by the relaxation oscillator, and f1 represents the first frequency output by the crystal oscillator, f4 represents the target value of the relaxation oscillator output frequency setting.

[0059] Optionally, the method can further include:

[0060] based on the formula: calculate a second parameter; wherein N2 represents the second parameter, and f2 represents a second frequency generated by the frequency synthesizer;

[0061] In secondary calibration, the initial preset condition met by the second clock number is that: wherein X2 represents the second clock number,

[0062] Optionally, the initial calibration of the frequency of the relaxation oscillator by the digital operation control circuit to make the first clock number meet the initial preset condition can specifically include:

[0063] After the digital operation control circuit calculates the first clock number of the relaxation oscillator that needs to be adjusted, if the frequency of the relaxation oscillator is higher than the target value of the relaxation oscillator output frequency setting, the capacitance value is increased.

[0064] If the frequency of the relaxation oscillator is higher than the target value of the relaxation oscillator output frequency setting, the capacitance value is decreased. That is, after the digital operation control circuit calculates the first clock number of the relaxation oscillator that needs to be adjusted, if the frequency of the relaxation oscillator is higher than the target value, the capacitance code value can be increased; if the frequency of the relaxation oscillator is higher than the target value, the capacitance code value is decreased; the equivalent capacitance value of the capacitance array increases with the increase of the code value.

[0065] Similarly, in secondary calibration, the same way can also be used to compare with the target value, so as to adjust the frequency of the relaxation oscillator.

[0066] The technical solutions in the embodiments of the present specification have the following advantages:

[0067] 1) the crystal oscillator is used for initial calibration of the frequency of the relaxation oscillator, and the frequency synthesizer is used for secondary calibration of the frequency of the relaxation oscillator, which solves the problem that the general relaxation oscillator in the prior art is realized by resistance, capacitance and a comparator, has low precision and cannot meet the demand of accurate counting of a chip, and through the crystal oscillator and the frequency synthesizer, the frequency of the relaxation oscillator is calibrated, high-frequency-precision relaxation oscillator performance can be realized, and the frequency precision of the relaxation oscillator is improved.

[0068] 2) the chip internal relaxation oscillator frequency calibration replaces an off-chip XO, and reduces the chip cost.

[0069] In actual application, the preparation method in the above embodiment can be implemented by relying on a preparation device and a preparation equipment, wherein the preparation equipment can further include a memory. The memory is used for storing computer execution instructions for executing the scheme of the application and is controlled by the processor to execute. The processor is used for executing the computer execution instructions stored in the memory, so as to realize the preparation method provided by the embodiment of the application.

[0070] The memory can be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compact discs, laser discs, optical discs, digital versatile discs, Blu-ray discs and the like), magnetic disk storage media or other magnetic storage devices, or any other medium capable of carrying or storing desired program codes in the form of instructions or data structures and capable of being accessed by a computer, but is not limited thereto. The memory can exist independently and be connected to the processor through a communication line. The memory can also be integrated with the processor.

[0071] Optionally, the computer execution instructions in the embodiment of the application can also be referred to as application program codes, and the embodiment of the application does not make a specific limitation thereto.

[0072] Those skilled in the art should easily understand that, in combination with the units and algorithm steps of the examples described in the embodiments disclosed herein, the present application can be realized in the form of hardware or a combination of hardware and computer software. Whether a certain function is realized in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0073] The processor in the specification can also have the function of the memory. The memory is used to store computer execution instructions for executing the scheme of the present application, and is controlled by the processor to execute. The processor is used to execute the computer execution instructions stored in the memory, so as to realize the method provided by the embodiments of the present application.

[0074] The memory can be a read-only memory (ROM) or other type of static storage device that can store static information and instructions, a random access memory (RAM) or other type of dynamic storage device that can store information and instructions, an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, an optical disc storage (including a compact disc, a laser disc, an optical disc, a digital versatile disc, a Blu-ray disc, etc.), a magnetic disc storage medium or other magnetic storage device, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but not limited to. The memory can exist independently and be connected to the processor through a communication line. The memory can also be integrated with the processor.

[0075] The method disclosed in the embodiments of the present application can be applied to a processor or implemented by the processor. The processor can be an integrated circuit chip with a signal processing capability. In the implementation process, the steps of the method disclosed in the embodiments of the present application can be completed by using an integrated logic circuit or a software form of an instruction in the processor. The processor can be a general-purpose processor, a digital signal processor (DSP), an ASIC, a field-programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. The methods, steps and logical block diagrams disclosed in the embodiments of the present application can be implemented or executed by the processor. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor or the like. The steps of the method disclosed in conjunction with the embodiments of the present application can be directly embodied as a hardware code executed by the processor, or a combination of hardware and software modules in the processor. The software module can be located in a storage medium such as random access memory (RAM), a flash memory, a read-only memory (ROM), a programmable read-only memory (PROM), an electrically programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a register, or a storage device. The storage medium is located in the storage device, and the processor reads information in the storage device and combines the hardware to complete the steps of the method.

[0076] In the above embodiments, all or part of the embodiments can be implemented by software, hardware, firmware or any combination thereof. When implemented by software, all or part of the embodiments can be implemented in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer programs or instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present application are performed. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a terminal, a user equipment or other programmable devices. The computer programs or instructions can be stored in a computer readable storage medium or transferred from one computer readable storage medium to another computer readable storage medium, for example, the computer programs or instructions can be transferred from one website site, computer, server or data center to another website site, computer, server or data center through a wired or wireless manner. The computer readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center and the like integrated with one or more available media. The available media can be a magnetic medium, such as a floppy disk, a hard disk, a magnetic tape; an optical medium, such as a digital video disc (DVD); or a semiconductor medium, such as a solid state drive (SSD).

[0077] Although the application has been described in connection with various embodiments thereof, it will be understood that the application is capable of further modifications and that this application is intended to cover any and all such variations, using the scope of the claims. The word "comprising" does not exclude other components or steps not mentioned. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. A single processor or other unit can fulfill the functions of several items recited in the claims. The terms "first", "second" and the like in the description do not necessarily imply that there are two or more of these items, but these terms can only indicate that there is at least a first and a second of a given item and do not require or imply that such first and second identical items exist, although such is the usual understanding in the art.

[0078] Although the application has been described in connection with specific embodiments thereof, it will be understood that it is capable of further modifications and this application is intended to cover any and all such variations, using the scope of the claims. The description and drawings merely schematically illustrate specific embodiments of the application. It is understood that those skilled in the art can readily make changes to the forms and details of the present application without departing from the spirit and the scope of the application. It is therefore intended that the application be considered as including all such modifications and variations as come within the scope of the claims.

Claims

1. A clock calibration structure, characterized in that: include: Relaxation oscillators, crystal oscillators, frequency synthesizers, digital operation control circuits and counters; One end of the relaxation oscillator is connected to the digital operation control circuit, and the other end of the relaxation oscillator is connected to the counter; the crystal oscillator and the frequency synthesizer are both connected to the counter; the counter is connected to the digital operation control circuit; the crystal oscillator and the frequency synthesizer are connected to each other; The counter is used to count the clock signals generated by the relaxation oscillator, the crystal oscillator and the frequency synthesizer; the digital operation control circuit is used to adjust the frequency of the relaxation oscillator; the crystal oscillator is used to perform initial calibration of the frequency of the relaxation oscillator, and the frequency synthesizer is used to perform secondary calibration of the frequency of the relaxation oscillator.

2. The clock calibration structure according to claim 1, wherein: The relaxation oscillator circuit corresponding to the relaxation oscillator includes at least a capacitor switch array, a comparator, and a resistor, wherein the input end of the comparator is connected to different power supplies, and the output end of the comparator is connected to the capacitor switch array; the resistor and the capacitor switch array are connected to the ground in parallel; The comparator performs comparison based on the input first voltage and the second voltage to obtain a voltage result, and transmits the voltage result to the capacitor switch array.

3. The clock calibration structure according to claim 2, wherein: The capacitor switch array includes at least N switches and N capacitors, one switch and one capacitor are connected in series to form a capacitor switch branch, and N switches and N capacitors form N capacitor switch branches, wherein N is greater than or equal to 1. When N is greater than 1, the N capacitor switch branches are connected in parallel to the relaxation oscillator circuit.

4. The clock calibration structure according to claim 1, wherein: The number of the counters is 1 or 2.

5. The clock calibration structure according to claim 1, wherein: The relaxation oscillator, crystal oscillator and frequency synthesizer are all connected to an oscillator driving module; the oscillator driving module provides voltage to drive the relaxation oscillator, crystal oscillator and frequency synthesizer to start oscillation and maintain oscillation.

6. The clock calibration structure according to claim 2, wherein: The equivalent capacitance value of the capacitor switch array increases as the capacitance value of the capacitor increases.

7. A clock calibration method, characterized in that: Calibration is performed using the clock calibration structure according to any one of claims 1 to 6, the method comprising: Start the relaxation oscillator and the crystal oscillator; Using the first frequency output by the crystal oscillator as a reference frequency, using a counter to count the clocks of the relaxation oscillator to obtain a first clock number; Performing initial calibration on the frequency of the relaxation oscillator through a digital operation control circuit so that the first clock number meets an initial preset condition; Starting the frequency synthesizer to generate a second frequency; Using the second frequency as a reference frequency, using a counter to count the clocks of the relaxation oscillator to obtain a second clock number; The frequency of the relaxation oscillator is calibrated twice by the digital operation control circuit so that the second clock number meets the target preset condition, and the calibration is completed.

8. The clock calibration method according to claim 7, wherein: After starting the relaxation oscillator, the relaxation oscillator generates a third frequency, and the method further includes: Obtaining a target value for setting the relaxation oscillator output frequency; determining a ratio of the target value to the first frequency as a first parameter; During initial calibration, the first clock number satisfies the following initial preset conditions: Wherein, X1 represents the first clock number, N1 represents the first parameter, f3 represents the third frequency generated by the relaxation oscillator, f1 represents the first frequency output by the crystal oscillator, f4 represents the target value for setting the relaxation oscillator output frequency.

9. The clock calibration method according to claim 8, wherein: After starting the frequency synthesizer, it also includes: Based on the formula: Calculating a second parameter; wherein N2 represents the second parameter, and f2 represents the second frequency generated by the frequency synthesizer; During the secondary calibration, the initial preset condition satisfied by the second clock number is: Among them, X2 represents the second clock number, 10. The clock calibration method according to claim 8, wherein: Initially calibrating the frequency of the relaxation oscillator by a digital operation control circuit so that the first clock number meets an initial preset condition, specifically comprising: After the digital operation control circuit calculates the first clock number required to adjust the relaxation oscillator, if the frequency of the relaxation oscillator is higher than the target value set for the output frequency of the relaxation oscillator, the capacitance value is increased; If the relaxation oscillator frequency is higher than the target value set by the relaxation oscillator output frequency, the capacitance value is reduced.

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