High level syntax for video with mixed nal unit types

Abstract

A video encoder maintains a first reference picture list; maintains a second reference picture list; determines that a picture is an instantaneous decoding refresh (IDR) picture; determines that a reference picture list syntax element is present in a slice header of the IDR picture; and in response to determining that the picture is an IDR picture and that the reference picture list syntax element is present in the slice header of the IDR picture, updates the first reference picture list and the second reference picture list such that neither the first reference picture list nor the second reference picture list has a picture that precedes any preceding instantaneous random access point (IRAP) picture in a decoding order when arranged in an output order or a decoding order.

Description

[0001] This application claims priority to U.S. Provisional Patent Application No. 62 / 992,676, filed on March 20, 2020, U.S. Provisional Patent Application No. 63 / 004,105, filed on April 2, 2020, and U.S. Application No. 17 / 205,578, filed on March 18, 2021, the entire contents of each of which are incorporated herein by reference. Technical Field

[0002] The present disclosure relates to video encoding and video decoding. Background Art

[0003] Digital video capabilities can be integrated into a variety of devices, including digital televisions, digital direct broadcast systems, wireless broadcast systems, personal digital assistants (PDAs), laptop or desktop computers, tablet computers, e-book readers, digital cameras, digital recording devices, digital media players, video game devices, video game consoles, cellular or satellite radio telephones, so-called "smart phones," video teleconferencing devices, video streaming devices, and the like. Digital video devices implement video coding techniques, such as those described by the standards specified by MPEG-2, MPEG-4, ITU-T H.263, ITU-T H.264 / MPEG-4 Part 10, Advanced Video Codec (AVC), ITU-T H.265 / High Efficiency Video Codec (HEVC), and extensions of such standards. By implementing such video coding techniques, video devices can more efficiently transmit, receive, encode, decode, and / or store digital video information.

[0004] Video coding techniques include spatial (intra-picture) prediction and / or temporal (inter-picture) prediction to reduce or eliminate redundancy inherent in video sequences. For block-based video codecs, a video slice (e.g., a video picture or a portion of a video picture) may be partitioned into video blocks, which may also be referred to as codec tree units (CTUs), codec units (CUs), and / or codec nodes. Video blocks in an intra-coded (I) slice of a picture are encoded using spatial prediction relative to reference samples in neighboring blocks in the same picture. Video blocks in an inter-coded (P or B) slice of a picture may use spatial prediction relative to reference samples in neighboring blocks in the same picture, or temporal prediction relative to reference samples in other reference pictures. Pictures may be referred to as frames, and reference pictures may be referred to as reference frames. Summary of the Invention

[0005] A video processing device can form a new picture from sub-pictures of different pictures. It is required that all sub-pictures of a picture have the same RPL entry in the slice header. Accordingly, the techniques of this disclosure enable a merged picture to be formed using sub-pictures of an IDR picture by ensuring that an IDR picture with sub-pictures includes an RPL syntax element. By encoding video data using the techniques of this disclosure, a video processing device can generate a merged picture, for example, from a sub-picture that originates from a random access picture and another sub-picture that originates from a non-random access picture. That is, a video processing device can merge a sub-picture that originates from a random access picture and another sub-picture that originates from a non-random access picture into the same coded picture that conforms to VVC. By encoding video data in the manner described herein, when such a merged picture is received by a video decoder, the video decoder has the appropriate reference picture lists to decode such a merged picture.

[0006] According to one example, a method of encoding video data includes maintaining a first reference picture list; maintaining a second reference picture list; determining that a picture is an instantaneous decoding refresh (IDR) picture; determining that a reference picture list syntax element is present in a slice header of the IDR picture; and in response to determining that the picture is an IDR picture and that the reference picture list syntax element is present in the slice header of the IDR picture, updating the first reference picture list and the second reference picture list such that neither the first reference picture list nor the second reference picture list has a picture that precedes any preceding instant random access point (IRAP) picture in a decoding order when arranged in an output order or a decoding order.

[0007] According to another example, a device for decoding video data includes a memory configured to store video data; and one or more processors implemented in circuitry and configured to: maintain a first reference picture list; maintain a second reference picture list; determine that a picture is an instantaneous decoding refresh (IDR) picture; determine that a reference picture list syntax element is present in a slice header of the IDR picture; and in response to determining that the picture is an IDR picture and that the reference picture list syntax element is present in the slice header of the IDR picture, update the first reference picture list and the second reference picture list such that neither the first reference picture list nor the second reference picture list has a picture that precedes any preceding instant random access point (IRAP) picture in a decoding order when arranged in an output order or a decoding order.

[0008] According to another example, a computer-readable storage medium stores instructions that, when executed by one or more processors, cause the one or more processors to maintain a first reference picture list; maintain a second reference picture list; determine that a picture is an instantaneous decoding refresh (IDR) picture; determine that a reference picture list syntax element is present in a slice header of the IDR picture; and in response to determining that the picture is an IDR picture and the reference picture list syntax element is present in the slice header of the IDR picture, update the first reference picture list and the second reference picture list so that neither of the first reference picture list and the second reference picture list, arranged in output order or decoding order, includes a picture that precedes any previous instantaneous random access point (IRAP) picture arranged in decoding order.

[0009] According to another example, an apparatus for encoding a video includes means for maintaining a first reference picture list; means for maintaining a second reference picture list; means for determining that a picture is an instantaneous decoding refresh (IDR) picture; means for determining that a reference picture list syntax element is present in a slice header of the IDR picture; and means for updating the first reference picture list and the second reference picture list, in response to determining that the picture is an IDR picture and the reference picture list syntax element is present in the slice header of the IDR picture, such that neither the first reference picture list nor the second reference picture list, arranged in output order or decoding order, includes a picture that precedes any previous instantaneous random access point (IRAP) picture arranged in decoding order.

[0010] One or more examples will be described in detail in the accompanying drawings and the following description. Other features, objects, and advantages will be apparent from the description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 is a block diagram illustrating an example video encoding and decoding system that may perform the techniques of this disclosure.

[0012] Figure 2A and Figure 2B is a conceptual diagram illustrating an exemplary quad-tree binary tree (QTBT) structure and a corresponding codec tree unit (CTU).

[0013] Figure 3 is an exemplary use case for viewport-relative 360-degree video streaming.

[0014] Figure 4 An example of the proposed constraints is shown.

[0015] Figure 5 is a block diagram illustrating an example video encoder that may perform the techniques of this disclosure.

[0016] Figure 6 is a block diagram illustrating an example video decoder that may perform the techniques of this disclosure.

[0017] Figure 7 is a flowchart illustrating an example video encoding process.

[0018] Figure 8 is a flow chart illustrating an example video decoding process.

[0019] Figure 9 is a flowchart illustrating an example video encoding process. DETAILED DESCRIPTION

[0020] Video coding (e.g., video encoding and / or video decoding) generally involves predicting a block of video data based on a coded block of video data in the same picture (e.g., intra-frame prediction) or a coded block of video data in a different picture (e.g., inter-frame prediction). To perform inter-frame prediction, the video encoder and video decoder are configured to maintain, e.g., construct, update, and / or store a reference picture list (RPL). The RPL includes a list of coded pictures that can be used to encode and decode the picture currently being coded.

[0021] In some cases, the video encoder also calculates residual data by comparing the predicted block to the original block. Thus, the residual data represents the difference between the samples of the predicted block and the samples of the original block. To reduce the number of bits required to signal the residual data, the video encoder transforms and quantizes the residual data and signals the transformed and quantized residual data in the encoded bitstream. The compression achieved by the transform and quantization process can be lossy, meaning that the transform and quantization process can introduce distortion to the decoded video data.

[0022] The video decoder decodes the residual data and adds it to the prediction block to produce a reconstructed video block that more closely matches the original video block than the prediction block alone. Due to losses introduced by the transformation and quantization of the residual data, the first reconstructed block may contain distortion or artifacts. To further improve the quality of the decoded video, the video decoder may perform one or more filtering operations on the reconstructed video block.

[0023] Video is encoded as a series of pictures, each of which is divided into one or more slices. A slice can include an integer number of blocks, such as a codec tree unit (CTU). In some cases, blocks within a slice can be grouped into slices or some other such grouping. For some applications, such as two-dimensional movies or television, a picture typically corresponds to a single, continuous scene. For other types of applications, such as 360-degree video, a picture can include multiple sub-pictures, each of which can correspond to a single, continuous scene, while the entire picture does not correspond to a single, continuous scene. A sub-picture generally refers to a rectangular area within a picture consisting of one or more slices. As an exemplary use case, in some embodiments, a 360-degree picture can be patched from 96 different sub-pictures. The 96 different sub-pictures can be continuous or discontinuous across boundaries. When streaming 360-degree video, the user may only receive some of the sub-pictures.

[0024] To support 360-degree video, the Versatile Video Codec (VVC) standard supports sub-pictures. This disclosure describes techniques that enable a video codec (e.g., a video encoder or video decoder) to support reference picture scaling for sub-pictures. This disclosure also describes techniques that enable a video codec to support both reference picture resampling and sub-pictures.

[0025] As explained in more detail below, in a picture without sub-pictures, all Video Codec Layer (VCL) Network Abstraction Layer (NAL) units of the picture have the same NAL unit type, for example, the same value of nal_unit_type in VVC. A NAL unit refers to a syntax structure that contains an indication of the type of data to follow and bytes containing that data in the form of a Raw Byte Sequence Payload (RBSP) interspersed with anti-contention bytes as necessary. However, for pictures with sub-pictures, different sub-pictures may include different types of VCL NAL units. As will be explained in more detail below, existing implementations of mixed NAL unit types within a picture may lead to codec scenarios where certain reference pictures required for coding the current picture are not available. The present disclosure describes techniques for supporting mixed NAL unit types in a manner that avoids such codec scenarios. More specifically, in response to determining that a picture is an instantaneous decoding refresh (IDR) picture and a reference picture list syntax element is present in a slice header of the IDR picture, the video encoder and the video decoder are configured to update a first reference picture list and a second reference picture list so that neither the first reference picture list nor the second reference picture list, arranged in output order or decoding order, includes a picture that precedes any previous instantaneous random access point (IRAP) picture, arranged in decoding order.

[0026] A video processing device can form a new picture from sub-pictures of different pictures. It is required that all sub-pictures of a picture have the same RPL entry in the slice header. Thus, the techniques of this disclosure enable a merged picture to be formed using sub-pictures of an IDR picture by ensuring that an IDR picture with sub-pictures includes RPL syntax elements. By encoding video data using the techniques of this disclosure, a video processing device can generate a merged picture, for example, from a sub-picture that originates from a random access picture and another sub-picture that originates from a non-random access picture. That is, a video processing device can merge a sub-picture that originates from a random access picture and another sub-picture that originates from a non-random access picture into the same coded picture that conforms to VVC. By encoding video data in the manner described herein, when such a merged picture is received by a video decoder, the video decoder has the appropriate reference picture lists to decode such a merged picture.

[0027] Figure 1 FIG. 1 is a block diagram illustrating an example video encoding and decoding system 100 that can perform the techniques of this disclosure. The techniques of this disclosure are generally directed to coding (encoding and / or decoding) video data. In general, video data includes any data for processing video. Thus, video data can include raw, unencoded video, encoded video, decoded (e.g., reconstructed) video, and video metadata, such as signaling data.

[0028] As Figure 1 shown in this example, system 100 includes a source device 102 that provides encoded video data to be decoded and displayed by a destination device 116. In particular, source device 102 provides the video data to destination device 116 via a computer-readable medium 110. Source device 102 and destination device 116 can comprise any of a wide variety of devices, including desktop computers, notebook (i.e., laptop) computers, mobile devices, tablet computers, set-top boxes, telephone handsets such as smartphones, televisions, cameras, display devices, digital media players, video gaming consoles, video streaming devices, broadcast receiver devices, or the like. In some cases, source device 102 and destination device 116 can be equipped for wireless communication, and thus can be referred to as wireless communication devices.

[0029] In Figure 1In the example of , source device 102 includes video source 104, memory 106, video encoder 200 and output interface 108. Target device 116 includes input interface 122, video decoder 300, memory 120 and display device 118. According to the present disclosure, the video encoder 200 of source device 102 and the video decoder 300 of target device 116 can be configured to apply a technique for signaling and parsing a high-level grammar of a video with mixed NAL unit types. Therefore, source device 102 represents an example of a video encoding device, while target device 116 represents an example of a video decoding device. In other examples, the source device and target device can include other components or configurations. For example, source device 102 can receive video data from an external video source such as an external camera. Similarly, target device 116 can be connected to an external display device without including an integrated display device.

[0030] like Figure 1 The illustrated system 100 is merely an example. Generally speaking, any digital video encoding and / or decoding device can implement techniques for signaling and parsing high-level syntax for video with mixed NAL unit types. The source device 102 and the destination device 116 are merely examples of such codec devices in which the source device 102 generates encoded and decoded video data for transmission to the destination device 116. This disclosure uses the term "codec" to refer to a device that performs encoding and decoding (encoding and / or decoding) of data. Thus, the video encoder 200 and the video decoder 300 represent examples of codec devices, specifically examples of video encoders and video decoders, respectively. In some examples, the source device 102 and the destination device 116 can operate in a substantially symmetrical manner, such that each of the source device 102 and the destination device 116 includes video encoding and decoding components. Thus, the system 100 can support one-way or two-way video transmission between the source device 102 and the destination device 116, for example, for video streaming, video playback, video broadcasting, or video telephony.

[0031] Typically, video source 104 represents a source of video data (i.e., raw, unencoded video data) and provides a series of sequential pictures (also referred to as "frames") of video data to video encoder 200, which encodes the data for the pictures. Video source 104 of source device 102 may include a video capture device, such as a camera, a video archive containing previously captured raw video, and / or a video feed interface that receives video from a video content provider. As a further option, video source 104 may generate computer graphics-based data as the source video, or a combination of live video, archived video, and computer-generated video. In each case, video encoder 200 encodes captured, pre-captured, or computer-generated video data. Video encoder 200 may rearrange the pictures from the order in which they were received (sometimes referred to as "display order") into a codec order for encoding and decoding. Video encoder 200 may generate a bitstream comprising the encoded video data. Source device 102 may then output the encoded video data onto computer-readable medium 110 via output interface 108 for receipt and / or retrieval by, for example, input interface 122 of target device 116 .

[0032] Memory 106 of source device 102 and memory 120 of destination device 116 represent general purpose memory. In some examples, memories 106 and 120 can store raw video data, such as raw video from video source 104 and raw decoded video data from video decoder 300. Additionally or alternatively, memories 106 and 120 can store software instructions executable by, for example, video encoder 200 and video decoder 300, respectively. Although memory 106 and memory 120 are shown as separate from video encoder 200 and video decoder 300 in this example, it should be understood that video encoder 200 and video decoder 300 can also include internal memory for functionally similar or equivalent purposes. Furthermore, memories 106 and 120 can store encoded video data, such as encoded video data output from video encoder 200 and input to video decoder 300. In some examples, portions of memories 106 and 120 can be allocated as one or more video buffers, for example, to store raw, decoded video data and / or encoded video data.

[0033] The computer-readable medium 110 can represent any type of medium or device capable of transmitting encoded video data from the source device 102 to the target device 116. In one example, the computer-readable medium 110 represents a communication medium that enables the source device 102 to send the encoded video data directly to the target device 116 in real time via, for example, a radio frequency network or a computer-based network. According to a communication standard such as a wireless communication protocol, the output interface 108 can modulate a transmission signal including the encoded video data, and the input interface 122 can demodulate the received transmission signal. The communication medium can include any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium can form part of a packet-based network, such as a local area network, a wide area network, or a global network such as the Internet. The communication medium can include routers, switches, base stations, or any other device that can help facilitate communication from the source device 102 to the target device 116.

[0034] In some examples, source device 102 may output the encoded data from output interface 108 to storage device 112. Similarly, destination device 116 may access the encoded data from storage device 112 via input interface 122. Storage device 112 may include any of a variety of distributed or locally accessed data storage media, such as a hard drive, Blu-ray disc, DVD, CD-ROM, flash memory, volatile or non-volatile memory, or any other suitable digital storage medium for storing encoded video data.

[0035] In some examples, source device 102 may output the encoded video data to file server 114 or another intermediate storage device that may store the encoded video data generated by source device 102. Target device 116 may access the stored video data from file server 114 via streaming or downloading.

[0036] The file server 114 may be any type of server device capable of storing encoded video data and transmitting the encoded video data to the target device 116. The file server 114 may represent a web server (e.g., for a website), a server configured to provide file transfer protocol services (e.g., File Transfer Protocol (FTP) or File Transfer over Unidirectional Transport (FLUTE)), a content delivery network (CDN) device, a hypertext transfer protocol (HTTP) server, a Multimedia Broadcast Multicast Service (MBMS) or enhanced MBMS (eMBMS) server, and / or a network attached storage (NAS) device. The file server 114 may additionally or alternatively implement one or more HTTP streaming protocols, such as Dynamic Adaptive Streaming over HTTP (DASH), HTTP Live Streaming (HLS), Real Time Streaming Protocol (RTSP), HTTP Dynamic Streaming, etc.

[0037] Target device 116 can access encoded video data from file server 114 through any standard data connection, including an Internet connection. This can include a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., a digital subscriber line (DSL), a cable modem, etc.), or a combination of both that is suitable for accessing encoded video data stored on file server 114. Input interface 122 can be configured to operate according to any one or more of various protocols

[0038] Output interface 108 and input interface 122 can represent wireless transmitters / receivers, modems, wired networking components (e.g., Ethernet cards), wireless communication components operating according to any of a variety of IEEE 802.11 standards, or other physical components. In examples where output interface 108 and input interface 122 comprise wireless components, output interface 108 and input interface 122 can be configured to transfer data, such as encoded video data, according to a cellular communication standard, such as 4G, 4G-LTE (Long-Term Evolution), LTE Advanced, 5G, or the like. In some examples where output interface 108 includes a wireless transmitter, output interface 108 and input interface 122 can be configured to transfer data, such as encoded video data, according to other wireless standards, such as an IEEE 802.11 specification, an IEEE 802.15 specification (e.g., ZigBee®), a Bluetooth® standard, or the like. In some examples, source device 102 and / or target device 116 can include respective system on a chip (SoC) devices. For example, source device 102 can include an SoC device that performs the functions attributable to video encoder 200 and / or output interface 108, and target device 116 can include an SoC device that performs the functions attributable to video decoder 300 and / or input interface 122. TM TM In some examples, source device 102 and / or target device 116 can include respective system on a chip (SoC) devices. For example, source device 102 can include an SoC device that performs the functions attributable to video encoder 200 and / or output interface 108, and target device 116 can include an SoC device that performs the functions attributable to video decoder 300 and / or input interface 122.

[0039] The techniques of this disclosure can be applied to video coding in support of any of a variety of multimedia applications, such as over-the-air television broadcasts, cable television transmissions, satellite television transmissions, Internet streaming video transmissions, such as dynamic adaptive streaming over HTTP (DASH), digital video that is encoded onto a data storage medium, decoding of digital video stored on a data storage medium, or other applications.

[0040] ​The input interface 122 of the target device 116 receives an encoded video bitstream from the computer-readable medium 110 (e.g., a communication medium, a storage device 112, a file server 114, etc.). The encoded video bitstream may include signaling information defined by the video encoder 200, which is also used by the video decoder 300, such as syntax elements with values ​​describing characteristics and / or processing of video blocks or other codec units (e.g., slices, pictures, groups of pictures, sequences, etc.). The display device 118 displays decoded pictures of the decoded video data to a user. The display device 118 may represent any of a variety of display devices, such as a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.

[0041] although Figure 1 Although not shown, in some examples, the video encoder 200 and the video decoder 300 can each be integrated with an audio encoder and / or an audio decoder and can include appropriate MUX-DEMUX units or other hardware and / or software to process multiplexed streams including audio and video in a common data stream. If applicable, the MUX-DEMUX units can be in accordance with the ITU H.223 multiplexer protocol, or other protocols such as the User Datagram Protocol (UDP).

[0042] The video encoder 200 and the video decoder 300 can each be implemented as any of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combination thereof. When these techniques are partially implemented in software, the device can store the instructions of the software in a suitable non-transitory computer-readable medium and use one or more processors to execute these instructions in hardware to perform the techniques of the present disclosure. Each of the video encoder 200 and the video decoder 300 can be included in one or more encoders or decoders, any of which can be integrated as part of a combined encoder / decoder (CODEC) in the corresponding device. The device including the video encoder 200 and / or the video decoder 300 can include an integrated circuit, a microprocessor, and / or a wireless communication device such as a cellular phone.

[0043] The video encoder 200 and the video decoder 300 may operate according to a video codec standard, such as ITU-T H.265 (also known as High Efficiency Video Codec (HEVC)) or its extensions such as multi-view and / or scalable video codec extensions. Alternatively, the video encoder 200 and the video decoder 300 may operate according to other proprietary or industry standards, such as ITU-T H.266, also known as Versatile Video Codec (VVC). A draft of the VVC standard is described in "Versatile Video Codec (Draft 8)" by Bross et al. at the 17th meeting of the Joint Video Experts Group (JVET) of ITU-T SG 16WP 3 and ISO / IEC JTC 1 / SC 29 / WG 11 in Brussels, Belgium, from January 7 to 17, 2020 (hereinafter referred to as "VVC Draft 8"). However, the technology of the present disclosure is not limited to any particular codec standard.

[0044] Typically, the video encoder 200 and the video decoder 300 can perform block-based picture encoding and decoding. The term "block" generally refers to a structure that includes data to be processed (e.g., encoded data, decoded data, or other data used in the encoding and / or decoding process). For example, a block can include a two-dimensional matrix of samples of luminance and / or chrominance data. Typically, the video encoder 200 and the video decoder 300 can encode and decode video data represented in a YUV (e.g., Y, Cb, Cr) format. That is, instead of encoding and decoding red, green, and blue (RGB) data of picture samples, the video encoder 200 and the video decoder 300 can encode and decode luminance and chrominance components, where the chrominance components may include red hue and blue hue chrominance components. In some examples, the video encoder 200 converts received RGB formatted data into a YUV representation before encoding, and the video decoder 300 converts the YUV representation into an RGB format. Alternatively, pre-processing and post-processing units (not shown) can perform these conversions.

[0045] The present disclosure may generally relate to the encoding and decoding of pictures (e.g., encoding and decoding), including the process of encoding or decoding the data of a picture. Similarly, the present disclosure may relate to the encoding and decoding of picture blocks, including the process of encoding or decoding the data of the block, such as prediction and / or residual encoding and decoding. The encoded video bitstream generally includes a series of values ​​of syntax elements that represent codec decisions (e.g., codec mode) and the partitioning of the picture into blocks. Therefore, references to encoding and decoding a picture or block should generally be understood as encoding and decoding the values ​​of the syntax elements that form the picture or block.

[0046] HEVC defines various blocks, including codec units (CUs), prediction units (PUs), and transform units (TUs). According to HEVC, a video codec (such as the video encoder 200) partitions a codec tree unit (CTU) into multiple CUs according to a quadtree structure. That is, the video codec partitions the CTU and CU into four equal, non-overlapping squares, and each node of the quadtree has zero or four child nodes. A node without child nodes may be referred to as a "leaf node," and the CU of such a leaf node may include one or more PUs and / or one or more TUs. The video codec may further partition the PUs and TUs. For example, in HEVC, the residual quadtree (RQT) represents the partitioning of TUs. In HEVC, PU represents inter-frame prediction data, and TU represents residual data. An intra-predicted CU includes intra-frame prediction information, such as an intra-frame mode indication.

[0047] As another example, the video encoder 200 and the video decoder 300 can be configured to operate according to VVC. According to VVC, a video codec (such as the video encoder 200) partitions a picture into multiple codec tree units (CTUs). The video encoder 200 can partition the CTUs according to a tree structure, such as a quadtree binary tree (QTBT) structure or a multi-type tree (MTT) structure. The QTBT structure eliminates the concept of multiple partition types, such as the separation between CU, PU, ​​and TU of HEVC. The QTBT structure includes two levels: a first level partitioned according to quadtree partitioning, and a second level partitioned according to a binary tree. The root node of the QTBT structure corresponds to the CTU. The leaf nodes of the binary tree correspond to the codec units (CUs).

[0048] In the MTT partition structure, blocks can be partitioned using quadtree (QT) partitioning, binary tree (BT) partitioning, and one or more ternary tree (TT) (also known as ternary tree (TT)) partitioning. A ternary or ternary tree partition is a partition that divides a block into three sub-blocks. In some examples, the ternary or ternary tree partition divides the block into three sub-blocks without dividing the original block by the center. Partition types in MTT (e.g., QT, BT, and TT) can be symmetric or asymmetric.

[0049] In some examples, the video encoder 200 and the video decoder 300 may use a single QTBT or MTT structure to represent each of the luma and chroma components, while in other examples, the video encoder 200 and the video decoder 300 may use two or more QTBT or MTT structures, such as one QTBT / MTT structure for the luma component and another QTBT / MTT structure for the two chroma components (or two QTBT / MTT structures for the corresponding chroma components).

[0050] The video encoder 200 and the video decoder 300 can be configured to use quadtree partitioning, QTBT partitioning, MTT partitioning, or other partitioning structures according to HEVC. For illustrative purposes, the description of the technology of the present disclosure is presented for QTBT partitioning. However, it should be understood that the technology of the present disclosure can also be applied to video codecs configured to use quadtree partitioning or other types of partitioning.

[0051] In some examples, a CTU includes a codec tree block (CTB) of luma samples, two corresponding CTBs of chroma samples for a picture with three sample arrays, or a CTB of samples for a monochrome picture or a picture coded and decoded using three separate color planes and syntax structures for coding and decoding the samples. A CTB can be an N×N sample block where N is some value, such that partitioning is to divide a component into multiple CTBs. A component is an array or a single sample of one of the three arrays (luminance and two chroma) that make up a picture in 4:2:0, 4:2:2, or 4:4:4 color format, or an array or a single sample of an array that makes up a picture in monochrome format. In some examples, a codec block is an M×N sample block where M is some value and N is some value, such that partitioning is to divide a CTB into multiple codec blocks.

[0052] Blocks (e.g., CTUs or CUs) can be grouped in various ways within a picture. As an example, a brick can refer to a rectangular area of ​​a CTU row within a particular slice in a picture. A slice can be a rectangular area within a particular slice column and a particular slice row in a picture. A slice column refers to a rectangular area of ​​a CTU with a height equal to the height of the picture and a width specified by a syntax element (e.g., a syntax element in a picture parameter set). A slice row refers to a rectangular area of ​​a CTU with a height specified by a syntax element (e.g., a syntax element in a picture parameter set) and a width equal to the width of the picture.

[0053] In some examples, a slice can be partitioned into multiple bricks, each of which can include one or more CTU rows within the slice. A slice that is not partitioned into multiple bricks can also be referred to as a brick. However, a brick that is a true subset of a slice cannot be referred to as a slice.

[0054] The tiles in a picture can also be arranged in slices. A slice can be an integer number of tiles of a picture that can be contained exclusively in a single Network Abstraction Layer (NAL) unit. In some examples, a slice includes a contiguous sequence of multiple complete slices or only complete tiles of a slice.

[0055] This disclosure may use "NxN" and "N by N" interchangeably to refer to the sample dimensions of a block (such as a CU or other video block) in the vertical and horizontal dimensions, for example, 16x16 samples or 16 by 16 samples. Typically, a 16x16 CU will have 16 samples in the vertical direction (y=16) and 16 samples in the horizontal direction (x=16). Likewise, an NxN CU typically has N samples in the vertical direction and N samples in the horizontal direction, where N represents a non-negative integer value. The samples in a CU may be arranged in rows and columns. Furthermore, a CU does not necessarily need to have the same number of samples in the horizontal direction as in the vertical direction. For example, a CU may include NxM samples, where M is not necessarily equal to N.

[0056] The video encoder 200 encodes the video data of the CU representing prediction and / or residual information and other information. The prediction information indicates how to predict the CU so as to form a prediction block for the CU. The residual information generally represents the sample-by-sample difference between the samples of the CU before encoding and the prediction block.

[0057] To predict a CU, the video encoder 200 may typically form a prediction block for the CU through inter-frame prediction or intra-frame prediction. Inter-frame prediction typically refers to predicting a CU based on data of a previously coded picture, while intra-frame prediction typically refers to predicting a CU based on previously coded data of the same picture. To perform inter-frame prediction, the video encoder 200 may use one or more motion vectors to generate a prediction block. The video encoder 200 may typically perform a motion search to identify a reference block that closely matches the CU, for example, based on the difference between the CU and the reference block. The video encoder 200 may calculate a difference metric using the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean squared difference (MSD), or other such difference calculations to determine whether the reference block closely matches the current CU. In some examples, the video encoder 200 may use unidirectional prediction or bidirectional prediction to predict the current CU.

[0058] Some examples of VVC also provide an affine motion compensation mode, which can be considered an inter-frame prediction mode. In affine motion compensation mode, the video encoder 200 can determine two or more motion vectors representing non-translational motion, such as zooming in or out, rotation, perspective motion, or other irregular motion types.

[0059] To perform intra prediction, the video encoder 200 can select an intra prediction mode to generate a prediction block. Some examples of VVC provide sixty-seven intra prediction modes, including various directional modes, as well as a planar mode and a DC mode. Typically, the video encoder 200 selects an intra prediction mode that describes neighboring samples of a current block (e.g., a block of a CU) from which to predict the samples of the current block. Assuming that the video encoder 200 encodes and decodes CTUs and CUs in raster scan order (from left to right, from top to bottom), such samples can typically be above, above and to the left of, or to the left of the current block in the same picture as the current block.

[0060] The video encoder 200 encodes data indicating the prediction mode for the current block. For example, for inter-frame prediction mode, the video encoder 200 may encode data indicating which of various available inter-frame prediction modes to use, as well as motion information for the corresponding mode. For example, for unidirectional or bidirectional inter-frame prediction, the video encoder 200 may encode motion vectors using Advanced Motion Vector Prediction (AMVP) or Merge Mode. The video encoder 200 may use a similar mode to encode motion vectors for affine motion compensation mode.

[0061] After a prediction (such as intra-frame prediction or inter-frame prediction of a block), the video encoder 200 can calculate residual data for the block. The residual data, such as a residual block, represents the sample-by-sample difference between the block and a predicted block for the block formed using the corresponding prediction mode. The video encoder 200 can apply one or more transforms to the residual block to produce transform data in a transform domain rather than a sample domain. For example, the video encoder 200 can apply a discrete cosine transform (DCT), an integer transform, a wavelet transform, or a conceptually similar transform to the residual video data. In addition, the video encoder 200 can apply a secondary transform after the first transform, such as a mode-dependent non-separable secondary transform (MDNSST), a signal-dependent transform, a Karhunen-Loeve transform (KLT), etc. The video encoder 200 generates transform coefficients after applying one or more transforms.

[0062] As described above, after any transform produces transform coefficients, the video encoder 200 may perform quantization of the transform coefficients. Quantization generally refers to the process of quantizing the transform coefficients to minimize the amount of data used to represent the transform coefficients, thereby providing further compression. By performing the quantization process, the video encoder 200 may reduce the bit depth associated with some or all of the transform coefficients. For example, the video encoder 200 may round down an n-bit value to an m-bit value during quantization, where n is greater than m. In some examples, to perform quantization, the video encoder 200 may perform a bitwise right shift on the value to be quantized.

[0063] After quantization, the video encoder 200 can scan the transform coefficients to produce a one-dimensional vector based on the two-dimensional matrix including the quantized transform coefficients. The scan can be designed to place transform coefficients with higher energy (and therefore lower frequency) at the front of the vector and transform coefficients with lower energy (and therefore higher frequency) at the back of the vector. In some examples, the video encoder 200 can scan the quantized transform coefficients using a predefined scan order to produce a serialized vector and then entropy encode the quantized transform coefficients of the vector. In other examples, the video encoder 200 can perform adaptive scanning. After scanning the quantized transform coefficients to form a one-dimensional vector, the video encoder 200 can entropy encode the one-dimensional vector, for example, according to context-adaptive binary arithmetic coding (CABAC). The video encoder 200 can also entropy encode the values ​​of syntax elements that describe metadata associated with the encoded video data for use by the video decoder 300 when decoding the video data.

[0064] To perform CABAC, the video encoder 200 may assign context within a context model to a symbol to be transmitted. The context may relate to, for example, whether the symbol's neighboring values ​​are zero values. The probability determination may be based on the context assigned to the symbol.

[0065] The video encoder 200 may also generate syntax data, such as block-based syntax data, picture-based syntax data, and sequence-based syntax data, for the video decoder 300 in, for example, a picture header, a block header, a slice header, or other syntax data, such as a sequence parameter set (SPS), a picture parameter set (PPS), or a video parameter set (VPS). Similarly, the video decoder 300 may similarly decode such syntax data to determine how to decode the corresponding video data.

[0066] In this way, the video encoder 200 can generate a bitstream including encoded video data, for example, syntax elements describing how to divide a picture into blocks (e.g., CUs) and prediction information and / or residual information for the blocks. Ultimately, the video decoder 300 can receive the bitstream and decode the encoded video data.

[0067] In general, the video decoder 300 performs a reciprocal process to that performed by the video encoder 200 to decode the encoded video data of the bitstream. For example, the video decoder 300 may use CABAC to decode the values ​​of syntax elements of the bitstream in a manner substantially similar to, but inverse of, the CABAC encoding process of the video encoder 200. The syntax elements may define partition information for partitioning a picture into CTUs, and partitioning each CTU according to a corresponding partition structure (such as a QTBT structure) to define CUs of the CTU. The syntax elements may further define prediction and residual information for a block (e.g., a CU) of video data.

[0068] The residual information may be represented by, for example, quantized transform coefficients. The video decoder 300 may inverse quantize and inverse transform the quantized transform coefficients of a block to reproduce a residual block for the block. The video decoder 300 uses the signaled prediction mode (intra-frame or inter-frame prediction) and associated prediction information (e.g., motion information for inter-frame prediction) to form a prediction block for the block. The video decoder 300 may then combine the prediction block and the residual block (on a sample-by-sample basis) to reproduce the original block. The video decoder 300 may perform additional processing, such as deblocking, to reduce visual artifacts along block boundaries.

[0069] The present disclosure may generally involve "signaling" certain information, such as syntax elements. The term "signaling" may generally refer to the communication of the values ​​of syntax elements and / or other data used to decode encoded video data. That is, the video encoder 200 may signal the values ​​of syntax elements in a bitstream. Typically, signaling involves generating values ​​in the bitstream. As described above, the source device 102 may transmit the bitstream to the destination device 116 in substantially real time or in non-real time, such as when storing syntax elements on the storage device 112 for later retrieval by the destination device 116.

[0070] Figure 2A and Figure 2B1 is a conceptual diagram illustrating an example quadtree binary tree (QTBT) structure 130 and a corresponding codec tree unit (CTU) 132. Solid lines represent quadtree splitting, and dashed lines indicate binary tree splitting. In each split node (i.e., non-leaf node) of the binary tree, a flag is signaled to indicate which split type is used (i.e., horizontal or vertical), where in this example, 0 indicates horizontal splitting and 1 indicates vertical splitting. For quadtree splitting, there is no need to indicate the split type because the quadtree node splits the block horizontally and vertically into 4 sub-blocks of equal size. Therefore, the video encoder 200 can encode and the video decoder 300 can decode syntax elements (such as split information) of the region tree layer of the QTBT structure 130 (i.e., solid lines) and syntax elements (such as split information) of the prediction tree layer of the QTBT structure 130 (i.e., dashed lines). The video encoder 200 can encode and the video decoder 300 can decode video data, such as prediction and transform data, for the CU represented by the terminal leaf node of the QTBT structure 130.

[0071] generally, Figure 2B The CTU 132 may be associated with parameters that define the size of blocks corresponding to nodes of the first and second levels of the QTBT structure 130. These parameters may include a CTU size (indicating the size of the CTU 132 in samples), a minimum quadtree size (MinQTSize, indicating the minimum allowed quadtree leaf node size), a maximum binary tree size (MaxBTSize, indicating the maximum allowed binary tree root node size), a maximum binary tree depth (MaxBTDepth, indicating the maximum allowed binary tree depth), and a minimum binary tree size (MinBTSize, indicating the minimum allowed binary tree leaf node size).

[0072] A root node of a QTBT structure corresponding to a CTU can have four child nodes at a first level of the QTBT structure, where each child node can be partitioned according to quadtree partitioning. That is, a node of the first level is either a leaf node (having no child nodes) or has four child nodes. The example of the QTBT structure 130 represents such a node as including a parent node and child nodes with solid lines for branches. If a node of the first level is not larger than a maximum allowed binary tree root node size (MaxBTSize), the node can be further partitioned by a corresponding binary tree. The binary tree partitioning of a node can be iterated until the partitioning results in nodes that reach a minimum allowed binary tree leaf node size (MinBTSize) or a maximum allowed binary tree depth (MaxBTDepth). The example of the QTBT structure 130 represents such a node as having dashed lines for branches. A binary tree leaf node is referred to as a coding unit (CU), which is used for prediction (e.g., intra- or inter-prediction) and transform without any further partitioning. As noted above, a CU can also be referred to as a “video block” or “block.”

[0073] In one example of a QTBT partitioning structure, the CTU size is set to 128x128 (luma samples and two corresponding 64x64 chroma samples), the MinQTSize is set to 16x16, the MaxBTSize is set to 64x64, the MinBTSize (of both width and height) is set to 4, and the MaxBTDepth is set to 4. Quadtree partitioning is first applied to the CTU to generate quadtree leaf nodes. A quadtree leaf node can have a size from 16x16 (i.e., MinQTSize) to 128x128 (i.e., CTU size). If a quadtree leaf node is 128x128, the leaf quadtree node is not further partitioned by a binary tree because its size exceeds the MaxBTSize (i.e., 64x64 in this example). Otherwise, the quadtree leaf node is further partitioned by a binary tree. Thus, the quadtree leaf node is also a root node of a binary tree and the binary tree depth is 0. When the binary tree depth reaches the MaxBTDepth (4 in this example), no further partitioning is allowed. A binary tree node having a width equal to the MinBTSize (4 in this example) means that no further vertical partitioning (i.e., division of the width) of the binary tree node is allowed. Similarly, a binary tree node having a height equal to the MinBTSize means that no further horizontal partitioning (i.e., division of the height) of the binary tree node is allowed. As noted above, leaf nodes of a binary tree are referred to as CUs and are further processed according to prediction and transform without further partitioning.

[0074] VVC draft 8 specifies the normative bitstream and picture formats, high-level syntax (HLS) and semantics, as well as the parsing and decoding process. VVC also specifies profile / layer / level (PTL) restrictions, byte stream formats, hypothetical reference decoders, and supplementary enhancement information (SEI) in appendices.

[0075] VVC inherits many advanced features from HEVC, such as the network abstraction layer (NAL) unit and parameter set concepts, tile and wavefront parallel processing, layered coding and decoding, and the use of SEI messages for supplementary data signaling. VVC introduces more new advanced features, including the concepts of rectangular slices and sub-pictures, picture resolution adaptation, mixed NAL unit types, picture headers (PH), progressive decoding refresh (GDR) pictures, virtual boundaries, and reference picture lists (RPL) for reference picture management.

[0076] In viewport-dependent 360-degree video streams, a version of the content is typically encoded with a smaller IRAP picture interval to provide fast viewport switching capabilities. VVC draft 8 allows different VCL NAL unit types to coexist in a picture to enable fast viewport changes between multiple quality codec representations for viewport-adaptive 360-degree streaming.

[0077] Figure 3 An example use case showing a viewport-dependent 360-degree video stream. Sub-image A is the background video that is always present, while foreground sub-images B and C can be presented to the user based on the user's viewing direction. Sub-images B and C have more frequent random access images than sub-image A to allow for fast viewport switching. The user can switch from sub-image B to sub-image C and then back to sub-image B, as shown in the following example. Figure 3 VVC allows a sub-picture originating from a random access picture and another sub-picture originating from a non-random access picture to be merged into the same coded picture compliant with VVC.

[0078] IDR pictures do not use inter prediction during decoding and may be the first picture in the bitstream in decoding order, or may appear later in the bitstream. Each IDR picture is the first picture of a CVS in decoding order. When the nal_unit_type of each VCL NAL unit for an IDR picture is equal to IDR_W_RADL, the picture may have an associated RADL picture. When the nal_unit_type of each VCL NAL unit for an IDR picture is equal to IDR_N_LP, the picture does not have any associated preceding pictures. IDR pictures do not have associated RASL pictures.

[0079] The SPS syntax element sps_idr_rpl_present_flag is used to specify that the reference picture list syntax element is present in the slice header of an IDR picture to facilitate reference picture list parsing and construction.

[0080] The PPS syntax element mixed_nalu_types_in_pic_flag is used to indicate that each picture that references the PPS has more than one VCL NAL unit, the VCL NAL units do not have the same nal_unit_type value, and the picture is not an IRAP picture. The constraints on mixed NAL unit types in a picture are specified as follows:

[0081] For any particular picture's VCL NAL unit, the following applies:

[0082] - If mixed_nalu_types_in_pic_flag is equal to 0, the value of nal_unit_type shall be the same for all coded slice NAL units of a picture. A picture or PU is said to have the same NAL unit type as the coded slice NAL units of the picture or PU.

[0083] Otherwise (mixed_nalu_types_in_pic_flag is equal to 1), the VCL NAL units of one or more sub-pictures of the picture all have a specific value of nal_unit_type, which is equal to STSA_NUT, RADL_NUT, RASL_NUT, IDR_W_RADL, IDR_N_LP, or CRA_NUT, while other VCL NAL units in the picture all have a different specific value of nal_unit_type, which is equal to TRAIL_NUT, RADL_NUT, or RASL_NUT.

[0084] The design of mixed NAL unit types in VVC draft 8 has some potential disadvantages.

[0085] The NAL unit type definition will now be discussed. The VCL NAL unit types are defined in Table 1. It is assumed that all VCL NAL units of the same access unit must have the same NAL unit type value, and this value defines the type of the access unit and its coded pictures.

[0086] Table 1 NAL unit type codes and categories

[0087]

[0088] There are three basic types of pictures in HEVC: intra random access point (IRAP) pictures, leading pictures, and trailing pictures. For mixed NAL unit types, some NAL unit types may be available in all three categories, so the NAL unit type definition may need to be updated.

[0089] Aspects of IDR reference picture list presentation will now be discussed. The semantics of sps_idr_rpl_present_flag is specified as follows.

[0090] sps_idr_rpl_present_flag equal to 1 specifies that the reference picture list syntax element is present in the slice header of the IDR picture. sps_idr_rpl_present_flag equal to 0 specifies that the reference picture list syntax element is not present in the slice header of the IDR picture.

[0091] Since an IDR picture is defined as an IRAP picture with nal_unit_type equal to IDR_W_RADL or IDR_N_LP for each VCL NAL unit, this definition may not apply to pictures with mixed IDR and non-IRAP NAL unit types.

[0092] In addition, for CRA pictures used for reference picture list construction, the bitstream conformance requirements are as follows:

[0093] - When the current picture is a CRA picture, entries in RefPicList[0] or RefPicList[1] in output order or decoding order shall not reference any picture (if any) that precedes any previous IRAP picture in decoding order.

[0094] Similar constraints apply to IDR pictures with sps_idr_rpl_present_flag equal to 1.

[0095] Aspects of hybrid RASL NAL units in non-IRAP pictures will now be discussed. A Random Access Skip Leading (RASL) picture is a coded picture where the nal_unit_type of each VCL NAL unit is equal to RASL_NUT. A RASL picture is a leading picture that may not be decodable when performing random access from the associated IRAP picture. The constraints on RASL pictures are as follows:

[0096] - Every picture that depends on a RASL picture must also be a RASL picture. RADL and RASL pictures can be mixed in decoding order, but RASL pictures must precede RADL pictures in output order.

[0097] - All RASL pictures are preceding pictures of the associated CRA picture. When the NoOutputBeforeRecoveryFlag of the associated CRA picture is equal to 1, the RASL picture is not output and may not be decoded correctly because the RASL picture may contain references to pictures that are not present in the bitstream. RASL pictures are not used as reference pictures in the decoding process of non-RASL pictures. When field_seq_flag is equal to 0, all RASL pictures (if any) are located before all non-preceding pictures of the same associated CRA picture in decoding order.

[0098] The general decoding process in VVC draft 8 specifies that for each IRAP picture in the bitstream, the following applies:

[0099] - If the picture is the first picture of a layer in decoding order in the bitstream, an IDR picture, or the first picture of a layer following the EOS NAL unit of a layer in decoding order, the variable NoOutputBeforeRecoveryFlag of the picture is set equal to 1.

[0100] Otherwise, when the image is a CRA image, the following applies:

[0101] o If some external means not specified in this specification is available to set the picture's variable HandleCraAsCvsStartFlag to a value, then set the picture's HandleCraAsCvsStartFlag equal to the value provided by the external means and set NoOutputBeforeRecoveryFlag equal to HandleCraAsCvsStartFlag.

[0102] Otherwise, for the picture, HandleCraAsCvsStartFlag and NoOutputBeforeRecoveryFlag are both set to 0.

[0103] When the current picture is a RASL picture and the NoOutputBeforeRecoveryFlag of the associated IRAP picture is equal to 1, PictureOutputFlag is set equal to 0.

[0104] For mixed NAL unit types, RASL NAL units can be Figure 3 So far, the decoding process has not been specified to handle pictures with RASL_NUT that are not RASL pictures.

[0105] Aspects of the reference picture entry constraints will now be discussed. The bitstream conformance requirements for Step-by-Step Temporal Sub-Layer Access (STSA) pictures, post-pictures, and RADL pictures are as follows:

[0106] - When nal_unit_type of the current slice is equal to STSA_NUT, there shall be no active entry in RefPicList[0] or RefPicList[1] with TemporalId equal to the TemporalId of the current picture and nuh_layer_id equal to the nuh_layer_id of the current picture.

[0107] - When the current picture is a picture following an STSA picture in decoding order, where the STSA picture has TemporalId equal to the current picture's TemporalId and nuh_layer_id equal to the current picture's nuh_layer_id, there shall not be a picture with TemporalId equal to the current picture's TemporalId and nuh_layer_id equal to the current picture's nuh_layer_id before the STSA picture in decoding order, with the current picture being the active entry in RefPicList[0] or RefPicList[1].

[0108] - When the current picture is a CRA picture, entries in RefPicList[0] or RefPicList[1] in output order or decoding order shall not reference pictures that precede (if any) any previous IRAP picture in decoding order.

[0109] - When the current picture is a subsequent picture, the active entries in RefPicList[0] or RefPicList[1] shall not reference pictures generated by the decoding process used to generate unavailable reference pictures for the IRAP picture associated with the current picture.

[0110] - When the current picture is a subsequent picture that follows, in decoding order and output order, one or more preceding pictures (if any) associated with the same IRAP picture, entries in RefPicList[0] or RefPicList[1] shall not reference pictures generated by the decoding process used to generate unavailable reference pictures for the IRAP picture associated with the current picture.

[0111] - When the current picture is a recovery point picture or a picture that follows the recovery point picture in output order, there shall be no entries in RefPicList[0] or RefPicList[1] that contain pictures generated by the decoding process used to generate unavailable reference pictures for the GDR picture of the recovery point picture.

[0112] - When the current picture is a subsequent picture, the active entries in RefPicList[0] or RefPicList[1] shall not reference pictures that precede the associated IRAP picture in output order or decoding order.

[0113] - When the current picture is a subsequent picture that follows one or more preceding pictures (if any) associated with the same IRAP picture in decoding order and output order, entries in RefPicList[0] or RefPicList[1] shall not reference pictures that precede the associated IRAP picture in output order or decoding order.

[0114] - When the current picture is a RADL picture, there shall not be any active entries in RefPicList[0] or RefPicList[1]:

[0115] οRASL pictures

[0116] o Pictures generated by the decoding process used to generate unavailable reference pictures

[0117] o pictures that precede the associated IRAP picture in decoding order

[0118] VVC draft 8 constrains the IRAP VCL NAL unit to be a mixed NAL unit type as follows:

[0119] For each slice with a nal_unit_type value nalUnitTypeA in the range IDR_W_RADL to CRA_NUT (inclusive), one or more slices with another value of nal_unit_type are also contained in picture picA (i.e., the value of mixed_nalu_types_in_pic_flag of picture picA is equal to 1), the following applies:

[0120] - The slice shall belong to the sub-picture subpicA whose corresponding subpic_treatment_as_pic_flag[i] value is equal to 1.

[0121] - A slice shall not belong to a sub-picture of picA that contains VCL NAL units with nal_unit_type not equal to nalUnitTypeA.

[0122] - If nalUnitTypeA is equal to CRA, for all subsequent PUs that follow the current picture in decoding order and output order in the CLVS, neither RefPicList[0] nor RefPicList[1] for the slices in subpicA in those PUs shall include any pictures that precede picA in decoding order in the active entry.

[0123] However, there are no restrictions on pictures with mixed NAL unit types.

[0124] Various aspects of the mixed NAL unit type indication will now be discussed. VVC draft 8 signals the mixed_nalu_types_in_pic_flag in the PPS, and the decoder must parse the PH and track the reference PPS of each picture to evaluate the mixed type attribute of the current picture. For the common case where there is no mixed type, a higher-level indicator may help simplify such identification process. The syntax element no_mixed_nalu_types_in_pic_constraint_flag is signaled in the profile_tier_level() syntax structure, which specifies when no mixed NAL unit type applies to the output layer set. However, it is useful to have this indicator at the layer level (e.g., Coded Layer Video Sequence (CLVS)) to easily identify the picture type.

[0125] Table 2 shows the syntax element mixed_nalu_types_in_pic_flag in PPS.

[0126] Table 2 Picture parameter set RBSP syntax

[0127]

[0128] This disclosure proposes various techniques for signaling high-level syntax to support VVC hybrid NAL unit types.

[0129] This disclosure proposes techniques related to NAL unit types.

[0130] Based on the hybrid NAL unit type concept of VVC draft 8, the NAL unit type definition can be updated as shown in Table 3 below. <add>and< / add> The text displayed between the <del>and< / del> The text displayed between represents the text that has been deleted from the original text, that is, the text that has been removed.

[0131] Table 3 Proposed NAL unit type codes and categories

[0132]

[0133] A leading picture or a trailing picture may include a NAL unit whose NAL unit type is equal to IDR_W_RADL, IDR_N_LP, CRA_NUT, RASL_NUT, RADL_NUT, and / or STSA_NUT.

[0134] In another example of the present invention, a GDR picture may be an IRAP picture. An IRAP picture may have mixed IDR, CRA, and GDR sub-pictures or NAL units. When random access occurs in an associated IRAP picture or a preceding IDR, CRA, or GDR NAL unit in decoding order, pictures of leading or trailing pictures may not be correctly decoded for output.

[0135] A new PH NAL unit type, or picture type, or flag syntax element may be signaled to indicate that the picture may be skipped because it may not be correctly decoded when random access occurs to the preceding picture containing IDR, CRA, or GDR NAL units. A new PH NAL unit type, or picture type, or flag syntax element may be signaled to indicate whether the picture is a leading picture or a trailing picture.

[0136] This disclosure describes techniques related to IDR reference picture list presentation. The semantics of sps_idr_rpl_present_flag may be updated as follows:

[0137] sps_idr_rpl_present_flag is equal to 1 to specify IDR <del>picture

[0138] < / del> <add>VCL NAL units< / add> The reference picture list syntax element is present in the slice header of the sps_idr_rpl_present_flag is equal to 0 to specify the IDR <del>picture

[0139] < / del> <add>VCL NAL units< / add> There is no reference picture list syntax element in the slice header of .

[0140] The following constraints are proposed as bitstream conformance requirements for IDR pictures:

[0141] <add>When the current picture is an IDR picture and sps_idr_rpl_present_flag is equal to 1, the entries in RefPicList[0] or RefPicList[1] in output order or decoding order shall not refer to pictures that precede any preceding IRAP picture in decoding order, if present.< / add>

[0142] This disclosure describes techniques related to mixing RASL NAL units in non-IRAP pictures. RASL NAL units can be mixed with other NAL unit types, such as IDR_W_RADL, IDR_N_LP, CRA_NUT, RADL_NUT, STSA_NUT, and TRAIL_NUT, in non-IRAP pictures, but not in RASL pictures. RASL sub-pictures may not be decoded correctly when sub-picture-based bitstream merging occurs for associated CRA sub-pictures.

[0143] VVC draft 8 uses NoOutputBeforeRecoveryFlag to control the output of RASL pictures. This control may not be applicable to RASL sub-pictures because merging may not occur on the associated IRAP pictures.

[0144] This disclosure proposes a technique for signaling a flag in a PPS or PH to indicate that one or more sub-pictures of a picture referencing the PPS may not be correctly decoded due to random access performed from the associated IRAP sub-picture. As a result, when sub-picture-based bitstream merging occurs, the associated pictures may not be output.

[0145] Table 4 Proposed random access skip picture flag in PPS

[0146]

[0147] pps_random_access_skipped_picture_flag equal to 1 specifies that the picture referencing the PPS has one or more VCL NAL units with nal_unit_type value equal to RASL_NUT. pps_random_access_skipped_picture_flag equal to 0 specifies that the picture referencing the PPS has no VCL NAL units with nal_unit_type value equal to RASL_NUT.

[0148] The general decoding process is updated as follows:

[0149] For each picture in the bitstream, the following applies:

[0150] - If the picture is the first picture of a layer in the bitstream in decoding order, an IDR picture, or the first picture of a layer following the EOS NAL unit of a layer in decoding order, the variable NoOutputBeforeRecoveryFlag of the picture is set equal to 1.

[0151] <add>

[0152] - Otherwise, when the VCL NAL unit type is equal to CRA_NUT, the following applies:

[0153] - If some external means not specified in this specification is available to set the variable HandleCraAsCvsStartFlag[i] of the i-th sub-picture to a value, then set HandleCraAsCvsStartFlag[i] of the i-th sub-picture equal to the value provided by the external means.

[0154] Otherwise, set HandleCraAsCvsStartFlag[i] equal to 0.

[0155] - If at least one HandleCraAsCvsStartFlag[i] (where i ranges from 0 to sps_num_subpics_minus1) is equal to 1, then NoOutputBeforeRecoveryFlag is set to 1, otherwise, NoOutputBeforeRecoveryFlag is set to 0.

[0156] < / add>

[0157] When the current image is a RASL image <add>or pictures that refer to a PPS with pps_random_access_skipped_picture_flag value equal to 1< / add> When PictureOutputFlag is set to 0, and <del>associated IRAP picture< / del> The NoOutputBeforeRecoveryFlag is equal to 1.

[0158] In another example, a variable NoOutputBeforeRecoveryFlag can be set for each sub-picture. When NoOutputBeforeRecoveryFlag[i] of the i-th IRAP or GDR sub-picture is equal to 1, the decoder does not output the associated sub-pictures that follow the IRAP or GDR sub-picture in decoding order and are not decodable, and pictures containing undecodable sub-pictures may also not be output. Pictures containing sub-pictures that cannot be correctly decoded can be indicated by the picture type, PH or SH NAL unit type, or a syntax element indication in a parameter set or PH / SH.

[0159] For single-layer bitstream, the following constraints are updated as follows:

[0160] -Any RASL image <add>or refer to pps_random_access_skipped_picture_flag equal to 1 associated with the CRA picture< / add> The preceding pictures of a PPS shall precede any RADL pictures associated with a CRA picture in output order.

[0161] In one example, a new picture type PicTypeA may be defined for preceding pictures of one or more NAL units with nal_unity_type equal to RASL_NUT, and when the current picture is a RASL or PicTypeA picture, PictureOutputFlag is set equal to 0 and the associated IRAP picture's NoOutputBeforeRecoveryFlag is equal to 1.

[0162] In another example, a new picture type PicTypeB may be defined for pictures of one or more NAL units with nal_unit_type equal to RASL_NUT, and PictureOutputFlag is set equal to 0 and NoOutputBeforeRecoveryFlag equal to 1 when the current picture is a RASL or PicTypeB picture.

[0163] In another example, it is proposed that RASL_NUT VCL NAL units are not allowed to be mixed with VCL NAL units with different NAL unit types. The constraints for mixed NAL unit types are updated as follows.

[0164] For any particular picture's VCL NAL unit, the following applies:

[0165] - If mixed_nalu_types_in_pic_flag is equal to 0, the value of nal_unit_type shall be the same for all coded slice NAL units of a picture. A picture or PU is said to have the same NAL unit type as the coded slice NAL units of the picture or PU.

[0166] - Otherwise (mixed_nalu_types_in_pic_flag is equal to 1), the VCL NAL units of one or more sub-pictures of the picture have a specific value of nal_unit_type, which is equal to STSA_NUT, RADL_NUT, <del>RASL_NUT,< / del> IDR_W_RADL, IDR_N_LP or CRA_NUT, while other VCL NAL units in the picture have different specific values ​​of nal_unit_type, which are equal to TRAIL_NUT, RADL_NUT, <del>or RASL_NUT< / del> .

[0167] This disclosure describes techniques related to reference picture list entry constraints. The constraints for a RADL picture may be updated as follows:

[0168] When the current picture is a RADL picture, there should be no RADL pictures in RefPicList[0] or RefPicList[1]. <add>or pictures containing RASL_NUT VCL NAL units< / add> Activity entry.

[0169] In another example, the constraint can be expressed as follows:

[0170] For each slice with nal_unit_type value RADL_NUT, in a picture picA that also contains one or more slices with another nal_unit_type value (i.e., the value of mixed_nalu_types_in_pic_flag of picture picA is equal to 1), neither RefPicList[0] nor RefPicList[1] of the slices in subpicA shall include any of the following pictures in the active entry:

[0171] -RASL pictures or pictures containing RASL_NUT VCL NAL units

[0172] - Pictures generated by the decoding process used to generate unavailable reference pictures

[0173] - Pictures that precede the associated IRAP picture in decoding order

[0174] Figure 4 Two inter predictions that are prohibited by the proposed constraints are shown.

[0175] This disclosure describes techniques related to mixed NAL unit type indication. Signaling the SPS mixed NAL unit type flag enables or disables mixed NAL unit types at the CLVS level. The proposed syntax is shown in Table 5.

[0176] Table 5 Proposed SPS mixed NAL unit type syntax

[0177]

[0178] sps_mixed_nalu_types_flag equal to 1 specifies that each picture in the CLVS referencing the SPS has one or more VCL NAL units, and when there is more than one VCL NAL unit in a picture, the VCL NAL units may or may not have the same nal_unit_type value. sps_mixed_nalu_types_flag equal to 0 specifies that each picture in the CLVS referencing the SPS has one or more VCL NAL units, and the VCL NAL units of each picture in the CLVS referencing the SPS have the same nal_unit_type value. When sps_mixed_nalu_types_flag is equal to 0, the value of mixed_nalu_types_in_pic_flag shall be equal to 0.

[0179] In some examples, the semantics may be specified as follows:

[0180] sps_mixed_nalu_types_flag equal to 1 specifies that each picture within the CLVS referencing the SPS has more than one VCL NAL unit, and the VCL NAL units may not have the same nal_unit_type value. sps_mixed_nalu_types_flag equal to 0 specifies that each picture within the CLVS referencing the SPS has one or more VCL NAL units, and the VCL NAL units of each picture within the CLVS referencing the SPS have the same nal_unit_type value. When sps_mixed_nalu_types_flag is equal to 0, the value of mixed_nalu_types_in_pic_flag shall be equal to 0.

[0181] Figure 5 FIG2 is a block diagram illustrating an example video encoder 200 that may perform the techniques of this disclosure. Figure 5 This is for illustrative purposes only and should not be considered limiting of the techniques broadly illustrated and described in this disclosure. For illustrative purposes, this disclosure describes the video encoder 200 based on the techniques of VVC (under development ITU-T H.266) and HEVC (ITU-T H.265). However, the techniques of this disclosure can be performed by video encoding devices configured for other video coding standards.

[0182] exist Figure 5In the example of FIG, the video encoder 200 includes a video data memory 230, a mode selection unit 202, a residual generation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a filter unit 216, a decoded picture buffer (DPB) 218, and an entropy coding unit 220. Any or all of the video data memory 230, the mode selection unit 202, the residual generation unit 204, the transform processing unit 206, the quantization unit 208, the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the filter unit 216, the DPB 218, and the entropy coding unit 220 may be implemented in one or more processors or in processing circuitry. For example, the units of the video encoder 200 may be implemented as one or more circuits or logic elements, as part of a hardware circuit, or as part of a processor, ASIC, or FPGA. Furthermore, the video encoder 200 may include additional or alternative processors or processing circuitry to perform these and other functions.

[0183] The video data memory 230 may store video data to be encoded by the components of the video encoder 200. The video encoder 200 may receive video data from, for example, the video source 104 ( Figure 1 ) receives video data stored in the video data memory 230. The DPB 218 can be used as a reference picture memory that stores reference video data for use by the video encoder 200 when predicting subsequent video data. The video data memory 230 and the DPB 218 can be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM), including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. The video data memory 230 and the DPB 218 can be provided by the same memory device or by separate memory devices. In various examples, the video data memory 230 can be on-chip with the other components of the video encoder 200, as shown, or off-chip relative to those components.

[0184] In this disclosure, references to the video data memory 230 should not be construed as limited to memory internal to the video encoder 200 (unless specifically described as such), or to memory external to the video encoder 200 (unless specifically described as such). Rather, references to the video data memory 230 should be understood as reference memory that stores video data received by the video encoder 200 for encoding (e.g., video data of a current block to be encoded). Figure 1 The memory 106 may also temporarily store outputs from various units of the video encoder 200 .

[0185] ShownFigure 5 The various units in video encoder 200 are not required to be implemented on the same hardware. For example, motion estimation unit 222 and motion compensation unit 224 can be implemented on one hardware, and mode select unit 202, residue generation unit 204, and inverse scan unit 208 can be implemented on a different hardware. In some examples, video encoder 200 can be implemented as one or more electronic circuits (e.g., one or more processors) with dedicated functionality. In some examples, video encoder 200 can be implemented as a software program running on one or more general purpose processors.

[0186] Video encoder 200 can include an arithmetic logic unit (ALU), a basic function unit (EFU), digital circuits, analog circuits, and / or programmable cores formed from programmable circuitry. In examples where the operations of video encoder 200 are performed using software run by the programmable circuitry, memory 106 Figure 1 ) can store the instructions (e.g., object code) of the software that video encoder 200 receives and runs, or another memory within video encoder 200 (not shown) can store such instructions.

[0187] Video data memory 230 is configured to store video data to be encoded. Video encoder 200 can retrieve pictures of the video data from video data memory 230 and provide the video data to residue generation unit 204 and mode select unit 202. Video data in video data memory 230 can be raw video data that is to be encoded.

[0188] Mode select unit 202 includes motion estimation unit 222, motion compensation unit 224, and intra prediction unit 226. Mode select unit 202 can include additional functional units to perform video prediction according to other prediction modes. As examples, mode select unit 202 can include a palette unit, an intra block copy unit (which can be part of motion estimation unit 222 and / or motion compensation unit 224), an affine unit, a linear model (LM) unit, or similar units.

[0189] The mode selection unit 202 typically performs multiple encoding runs to test combinations of coding parameters and the resulting rate-distortion values ​​for such combinations. The coding parameters may include partitioning a CTU into CUs, a prediction mode for a CU, a transform type for the residual data of a CU, a quantization parameter for the residual data of a CU, etc. The mode selection unit 202 may ultimately select a combination of coding parameters that has a better rate-distortion value than other tested combinations.

[0190] The video encoder 200 may partition a picture retrieved from the video data memory 230 into a series of CTUs and encapsulate one or more CTUs into a slice. The mode selection unit 202 may partition the CTUs of the picture according to a tree structure (such as the QTBT structure or quadtree structure of HEVC described above). As described above, the video encoder 200 may form one or more CUs by partitioning the CTUs according to the tree structure. Such CUs may also be generally referred to as "video blocks" or "blocks."

[0191] Typically, the mode select unit 202 also controls its components (e.g., the motion estimation unit 222, the motion compensation unit 224, and the intra prediction unit 226) to generate a prediction block for the current block (e.g., the current CU, or, in HEVC, the overlapping portion of the PU and TU). For inter prediction of the current block, the motion estimation unit 222 may perform a motion search to identify one or more closely matching reference blocks in one or more reference pictures (e.g., one or more previously coded pictures stored in the DPB 218). Specifically, the motion estimation unit 222 may calculate values ​​that indicate how similar the potential reference blocks are to the current block, such as based on the sum of absolute differences (SAD), sum of squared differences (SSD), mean absolute difference (MAD), mean squared difference (MSD), etc. The motion estimation unit 222 may typically perform these calculations using the sample-by-sample differences between the current block and the reference block under consideration. The motion estimation unit 222 may identify the reference block with the lowest value resulting from these calculations, which indicates the reference block that most closely matches the current block.

[0192] Motion estimation unit 222 may form one or more motion vectors (MVs) that define the position of a reference block in a reference picture relative to the position of a current block in a current picture. Motion estimation unit 222 may then provide the motion vectors to motion compensation unit 224. For example, for unidirectional inter prediction, motion estimation unit 222 may provide a single motion vector, while for bidirectional inter prediction, motion estimation unit 222 may provide two motion vectors. Motion compensation unit 224 may then use the motion vectors to generate a prediction block. For example, motion compensation unit 224 may use the motion vectors to retrieve data for the reference block. As another example, if the motion vectors have fractional sample precision, motion compensation unit 224 may interpolate the values ​​of the prediction block based on one or more interpolation filters. Furthermore, for bidirectional inter prediction, motion compensation unit 224 may retrieve data for two reference blocks identified by corresponding motion vectors and combine the retrieved data, for example, by sample-by-sample averaging or weighted averaging.

[0193] As another example, for intra prediction, or intra prediction codecs, the intra prediction unit 226 can generate a prediction block from samples adjacent to the current block. For example, for directional mode, the intra prediction unit 226 can generally mathematically combine the values ​​of the adjacent samples and pad these calculated values ​​along a defined direction on the current block to generate the prediction block. As another example, for DC mode, the intra prediction unit 226 can calculate the average value of the adjacent samples to the current block and generate the prediction block to include the obtained average value for each sample of the prediction block.

[0194] Mode selection unit 202 provides the prediction block to residual generation unit 204. Residual generation unit 204 receives the original, unencoded version of the current block from video data memory 230 and the prediction block from mode selection unit 202. Residual generation unit 204 calculates the sample-by-sample difference between the current block and the prediction block. The resulting sample-by-sample difference defines a residual block for the current block. In some examples, residual generation unit 204 may also determine the difference between the sample values ​​in the residual block to generate the residual block using residual differential pulse code modulation (RDPCM). In some examples, residual generation unit 204 may be formed using one or more subtractor circuits that perform binary subtraction.

[0195] In the example where the mode select unit 202 partitions the CU into PUs, each PU may be associated with a luma prediction unit and a corresponding chroma prediction unit. The video encoder 200 and the video decoder 300 may support PUs of various sizes. As described above, the size of a CU may refer to the size of the luma codec block of the CU, and the size of a PU may refer to the size of the luma prediction unit of the PU. Assuming that the size of a particular CU is 2Nx2N, the video encoder 200 may support PU sizes of 2Nx2N or NxN for intra prediction, and symmetric PU sizes of 2Nx2N, 2NxN, Nx2N, NxN, or similar for inter prediction. The video encoder 200 and the video decoder 300 may also support asymmetric partitioning of PU sizes of 2NxnU, 2NxnD, nLx2N, and nRx2N for inter prediction.

[0196] In an example where the mode selection unit 202 does not further partition the CU into PUs, each CU may be associated with a luma codec block and a corresponding chroma codec block. As described above, the size of a CU may refer to the size of the luma codec block of the CU. The video encoder 200 and the video decoder 300 may support CU sizes of 2Nx2N, 2NxN, or Nx2N.

[0197] For other video codecs, such as intra block copy mode codec, affine mode codec, and linear model (LM) mode codec (as a few examples), the mode selection unit 202 generates a prediction block for the current block being encoded via the corresponding unit associated with the codec. In some examples, such as palette mode codec, the mode selection unit 202 may not generate a prediction block, but instead generate syntax elements that indicate how to reconstruct the block based on the selected palette. In this mode, the mode selection unit 202 may provide these syntax elements to the entropy coding unit 220 for encoding.

[0198] As described above, the residual generation unit 204 receives video data of a current block and a corresponding prediction block. The residual generation unit 204 then generates a residual block for the current block. To generate the residual block, the residual generation unit 204 calculates the sample-by-sample difference between the prediction block and the current block.

[0199] The transform processing unit 206 applies one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). The transform processing unit 206 may apply various transforms to the residual block to form the transform coefficient block. For example, the transform processing unit 206 may apply a discrete cosine transform (DCT), a directional transform, a Karhunen-Loeve transform (KLT), or a conceptually similar transform to the residual block. In some examples, the transform processing unit 206 may perform multiple transforms on the residual block, such as a primary transform and a secondary transform, such as a rotation transform. In some examples, the transform processing unit 206 does not apply a transform to the residual block.

[0200] Quantization unit 208 may quantize the transform coefficients in the transform coefficient block to produce a quantized transform coefficient block. Quantization unit 208 may quantize the transform coefficients of the transform coefficient block according to a quantization parameter (QP) value associated with the current block. Video encoder 200 (e.g., via mode select unit 202) may adjust the degree of quantization applied to the transform coefficient block associated with the current block by adjusting the QP value associated with the CU. Quantization may introduce information loss, and thus, the quantized transform coefficients may have lower precision than the original transform coefficients produced by transform processing unit 206.

[0201] The inverse quantization unit 210 and the inverse transform processing unit 212 may apply inverse quantization and inverse transform, respectively, to the quantized transform coefficient block to reconstruct a residual block from the transform coefficient block. The reconstruction unit 214 may generate a reconstructed block corresponding to the current block (although possibly with some degree of distortion) based on the reconstructed residual block and the prediction block generated by the mode selection unit 202. For example, the reconstruction unit 214 may add samples of the reconstructed residual block to corresponding samples from the prediction block generated by the mode selection unit 202 to generate the reconstructed block.

[0202] Filter unit 216 may perform one or more filtering operations on the reconstructed block. For example, filter unit 216 may perform a deblocking operation to reduce blocking artifacts along the edges of the CU. In some examples, the operations of filter unit 216 may be skipped.

[0203] The video encoder 200 stores the reconstructed blocks in the DPB 218. For example, in examples where the operation of the filter unit 216 is not required, the reconstruction unit 214 can store the reconstructed blocks in the DPB 218. In examples where the operation of the filter unit 216 is required, the filter unit 216 can store the filtered reconstructed blocks in the DPB 218. The motion estimation unit 222 and the motion compensation unit 224 can retrieve a reference picture from the DPB 218, which is formed by the reconstructed (and possibly filtered) blocks, to inter-predict blocks of subsequently encoded pictures. In addition, the intra-prediction unit 226 can use the reconstructed blocks in the DPB 218 of the current picture to perform intra-prediction on other blocks in the current picture.

[0204] In general, the entropy coding unit 220 may entropy encode syntax elements received from other functional components of the video encoder 200. For example, the entropy coding unit 220 may entropy encode quantized transform coefficient blocks from the quantization unit 208. As another example, the entropy coding unit 220 may entropy encode prediction syntax elements (e.g., motion information for inter-frame prediction or intra-frame mode information for intra-frame prediction) from the mode selection unit 202. The entropy coding unit 220 may perform one or more entropy coding operations on the syntax elements, another example of video data, to generate entropy-encoded data. For example, the entropy coding unit 220 may perform a context-adaptive variable length coding (CAVLC) operation, a CABAC operation, a variable-to-variable (V2V) coding operation, a syntax-based context-adaptive binary arithmetic coding (SBAC) operation, a probability interval partitioned entropy (PIPE) coding operation, an exponential-Golomb coding operation, or another type of entropy coding operation on the data. In some examples, entropy encoding unit 220 may operate in a bypass mode in which syntax elements are not entropy encoded.

[0205] The video encoder 200 may output a bitstream including entropy-encoded syntax elements required for reconstructing a slice or a picture. Specifically, the entropy encoding unit 220 may output a bitstream.

[0206] The operations described above are described for blocks. This description should be understood as operations for luma codec blocks and / or chroma codec blocks. As described above, in some examples, the luma codec blocks and chroma codec blocks are the luma and chroma components of a CU. In some examples, the luma codec blocks and chroma codec blocks are the luma and chroma components of a PU.

[0207] In some examples, the operations performed for luma codec blocks do not need to be repeated for chroma codec blocks. As an example, the operations for identifying the motion vector (MV) and reference picture for the luma codec block do not need to be repeated in order to identify the MV and reference picture for the chroma block. Instead, the MV of the luma codec block can be scaled to determine the MV for the chroma block, and the reference picture can be the same. As another example, the intra prediction process can be the same for luma codec blocks and chroma codec blocks.

[0208] Video encoder 200 represents an example of a device configured to entropy encode video data, the device including a memory configured to store the video data, and one or more processing units implemented in circuitry and configured to signal high-level syntax for a video signal having mixed NAL unit types.

[0209] Figure 6 A block diagram of an example video decoder 300 is shown that may perform the techniques of this disclosure. Figure 6 This is for the purpose of explanation and does not limit the techniques broadly illustrated and described in this disclosure. For illustrative purposes, this disclosure describes the video decoder 300 based on the techniques of VVC (ITU-T H.266 under development) and HEVC (ITU-T H.265). However, the techniques of this disclosure can be performed by video codec devices configured for other video codec standards.

[0210] exist Figure 6 In the example of FIG, the video decoder 300 includes a coded picture buffer (CPB) memory 320, an entropy decoding unit 302, a prediction processing unit 304, an inverse quantization unit 306, an inverse transform processing unit 308, a reconstruction unit 310, a filter unit 312, and a decoded picture buffer (DPB) 314. Any or all of the CPB memory 320, the entropy decoding unit 302, the prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, the filter unit 312, and the DPB 314 can be implemented in one or more processors or in processing circuitry. For example, the units of the video decoder 300 can be implemented as one or more circuits or logic elements as part of a hardware circuit, or as part of a processor, an ASIC, or an FPGA. Furthermore, the video decoder 300 can include additional or alternative processors or processing circuitry to perform these and other functions.

[0211] The prediction processing unit 304 includes a motion compensation unit 316 and an intra prediction unit 318. The prediction processing unit 304 may include additional units to perform prediction according to other prediction modes. As an example, the prediction processing unit 304 may include a palette unit, an intra block copy unit (which may form part of the motion compensation unit 316), an affine unit, a linear model (LM) unit, etc. In other examples, the video decoder 300 may include more, fewer, or different functional components.

[0212] CPB memory 320 may store video data, such as an encoded video bitstream, to be decoded by components of video decoder 300. For example, the video bitstream may be encoded from computer readable medium 110 ( Figure 1 ) obtains video data stored in CPB memory 320. CPB memory 320 may include a CPB that stores coded video data (e.g., syntax elements) from the coded video bitstream. In addition, CPB memory 320 may store video data other than syntax elements for coded or decoded pictures, such as temporary data representing outputs from various units of video decoder 300. DPB 314 typically stores decoded pictures, which video decoder 300 may output and / or use as reference video data when decoding subsequent data or pictures of the coded video bitstream. CPB memory 320 and DPB 314 may be formed from any of a variety of memory devices, such as DRAM, including SDRAM, MRAM, RRAM, or other types of memory devices. CPB memory 320 and DPB 314 may be provided by the same memory device or separate memory devices. In various examples, CPB memory 320 may be on-chip with other components of video decoder 300, or off-chip relative to those components.

[0213] Additionally or alternatively, in some examples, video decoder 300 may retrieve the video from memory 120 ( Figure 1 ) to retrieve the encoded and decoded video data. That is, the memory 120 may utilize the CPB memory 320 to store data as described above. Similarly, when some or all of the functions of the video decoder 300 are implemented in software to be executed by the processing circuitry of the video decoder 300, the memory 120 may store instructions to be executed by the video decoder 300.

[0214] Shown Figure 6 Various units are shown to aid in understanding the various operations performed by the video decoder 300. These units may be implemented as fixed function circuits, programmable circuits, or a combination thereof. Figure 5Similarly, a fixed-function circuit refers to a circuit that provides a specific function and is preset in the operations that can be performed. A programmable circuit refers to a circuit that can be programmed to perform a variety of tasks and provide flexible functionality in the operations that can be performed. For example, a programmable circuit can run software or firmware so that the programmable circuit operates in a manner defined by the instructions of the software or firmware. A fixed-function circuit can run software instructions (e.g., receive parameters or output parameters), but the type of operation performed by the fixed-function circuit is generally immutable. In some examples, one or more of these units can be different circuit blocks (fixed-function or programmable), and in some examples, one or more of these units can be integrated circuits.

[0215] The video decoder 300 may include an ALU, an EFU, digital circuits, analog circuits, and / or a programmable core formed by programmable circuits. In an example where the operation of the video decoder 300 is performed by software running on the programmable circuits, on-chip or off-chip memory may store instructions (e.g., object code) for the software received and executed by the video decoder 300.

[0216] The entropy decoding unit 302 may receive the encoded video data from the CPB and perform entropy decoding on the video data to reproduce syntax elements. The prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, and the filter unit 312 may generate decoded video data based on the syntax elements extracted from the bitstream.

[0217] Typically, the video decoder 300 reconstructs a picture on a block-by-block basis. The video decoder 300 may perform a reconstruction operation on each block separately (where the block currently being reconstructed (ie, decoded) may be referred to as the "current block").

[0218] The entropy decoding unit 302 may entropy decode syntax elements defining the quantized transform coefficients of the quantized transform coefficient block, as well as transform information, such as a quantization parameter (QP) and / or transform mode indication(s). The inverse quantization unit 306 may use the QP associated with the quantized transform coefficient block to determine the degree of quantization and, similarly, the degree of inverse quantization to be applied by the inverse quantization unit 306. The inverse quantization unit 306 may, for example, perform a bitwise left shift operation to inverse quantize the quantized transform coefficients. The inverse quantization unit 306 may thereby form a transform coefficient block comprising the transform coefficients.

[0219] After the inverse quantization unit 306 forms the transform coefficient block, the inverse transform processing unit 308 may apply one or more inverse transforms to the transform coefficient block to generate a residual block associated with the current block. For example, the inverse transform processing unit 308 may apply an inverse DCT, an inverse integer transform, an inverse Karl-Lof transform (KLT), an inverse rotational transform, an inverse directional transform, or another inverse transform to the transform coefficient block.

[0220] In addition, prediction processing unit 304 generates a prediction block based on the prediction information syntax element entropy decoded by entropy decoding unit 302. For example, if the prediction information syntax element indicates that the current block is inter-predicted, motion compensation unit 316 may generate a prediction block. In this case, the prediction information syntax element may indicate a reference picture in DPB 314 from which to retrieve the reference block, and a motion vector that identifies the position of the reference block in the reference picture relative to the position of the current block in the current picture. Motion compensation unit 316 may generally generate a prediction block in the same manner as described for motion compensation unit 224 ( Figure 5 ) is performed in a manner substantially similar to that described in the foregoing.

[0221] As another example, if the prediction information syntax element indicates that the current block is intra-predicted, the intra-prediction unit 318 may generate a prediction block according to the intra-prediction mode indicated by the prediction information syntax element. Again, the intra-prediction unit 318 may generally generate a prediction block in the same manner as described with respect to the intra-prediction unit 226 ( Figure 5 The intra prediction unit 318 may retrieve data of neighboring samples of the current block from the DPB 314.

[0222] The reconstruction unit 310 may reconstruct the current block using the prediction block and the residual block. For example, the reconstruction unit 310 may add samples of the residual block to corresponding samples of the prediction block to reconstruct the current block.

[0223] The filter unit 312 may perform one or more filtering operations on the reconstructed block. For example, the filter unit 312 may perform a deblocking operation to reduce blocking artifacts along the edges of the reconstructed block. The operations of the filter unit 312 may not necessarily be performed in all examples.

[0224] The video decoder 300 may store the reconstructed block in the DPB 314. For example, in an example where the operation of the filter unit 312 is not performed, the reconstruction unit 310 may store the reconstructed block to the DPB 314. In an example where the operation of the filter unit 312 is performed, the filter unit 312 may store the filtered reconstructed block to the DPB 314. As described above, the DPB 314 may provide reference information to the prediction processing unit 304, such as samples of the current picture for intra-frame prediction and previously decoded pictures for subsequent motion compensation. In addition, the video decoder 300 may output a decoded picture (e.g., a decoded video) from the DPB 314 for display on a display device such as a video processor. Figure 1 18).

[0225] In this manner, video decoder 300 represents an example of a video decoding device including a memory configured to store video data, and one or more processing units implemented in circuitry and configured to parse the high-level syntax of video having mixed NAL unit types.

[0226] Figure 7 1 shows a flow chart of an example method for encoding a current block. The current block may include a current CU. Although the video encoder 200 ( Figure 1 and Figure 5 ) is described, but it should be understood that other devices can be configured to perform the same Figure 7 Similar approach.

[0227] In this example, the video encoder 200 initially predicts a current block (350). For example, the video encoder 200 may form a prediction block for the current block. The video encoder 200 may then calculate a residual block for the current block (352). To calculate the residual block, the video encoder 200 may calculate the difference between the original unencoded block and the prediction block for the current block. The video encoder 200 may then transform the residual block and quantize the transform coefficients of the residual block (354). Next, the video encoder 200 may scan the quantized transform coefficients of the residual block (356). During the scan, or after the scan, the video encoder 200 may entropy encode the transform coefficients (358). For example, the video encoder 200 may encode the transform coefficients using CAVLC or CABAC. The video encoder 200 may then output the entropy encoded data for the block (360).

[0228] Figure 8 is a flowchart illustrating an example method for decoding a current block of video data. The current block may include a current CU. Although the video decoder 300 ( Figure 1 and 6 ) is described, but it should be understood that other devices can be configured to perform the sameFigure 8 Similar approach.

[0229] The video decoder 300 may receive entropy-encoded data (370) for a current block, such as entropy-encoded prediction information and entropy-encoded data for transform coefficients of a residual block corresponding to the current block. The video decoder 300 may entropy decode the entropy-encoded data to determine prediction information for the current block and reproduce transform coefficients of the residual block (372). The video decoder 300 may predict the current block (374), for example, by calculating a prediction block for the current block using an intra-frame or inter-frame prediction mode indicated by the prediction information for the current block. The video decoder 300 may then inverse scan the reproduced transform coefficients (376) to create a block of quantized transform coefficients. The video decoder 300 may then inverse quantize the transform coefficients and apply an inverse transform to the transform coefficients to produce a residual block (378). Ultimately, the video decoder 300 may decode the current block (380) by combining the prediction block and the residual block.

[0230] Figure 9 is a flowchart illustrating an example method of encoding video data. Although the video encoder 200 ( Figure 1 and Figure 5 ) is described, but it should be understood that other devices can be configured to perform the same Figure 9 Similar approach.

[0231] exist Figure 9 In the example of FIG, video encoder 200 maintains a first reference picture list (402). Video encoder 200 maintains a second reference picture list (404). For example, the first reference picture list and the second reference picture list can be RefPicList[0] and RefPicList[1] discussed above.

[0232] The video encoder 200 determines that a picture is an instantaneous decoding refresh (IDR) picture (406). The IDR picture may include an IDR video coding layer (VCL) network abstraction layer (NAL) unit. The picture may include at least one IDR sub-picture, and all blocks of the at least one IDR sub-picture may be coded and decoded without inter-frame prediction. The at least one IDR sub-picture may have an associated preceding picture. The video encoder 200 determines that a reference picture list syntax element is present in a slice header of the IDR picture (408).

[0233] In response to determining that the picture is an IDR picture and the reference picture list syntax element is present in the slice header of the IDR picture, the video encoder 200 updates the first reference picture list and the second reference picture list so that no picture in the first reference picture list and the second reference picture list, arranged in output order or decoding order, precedes any previous instantaneous random access point (IRAP) picture arranged in decoding order (410). The previous IRAP picture may include one of a previous IDR picture and a previous CRA picture.

[0234] The video encoder 200 may output, in a bitstream of the encoded video data, syntax elements including a reference picture list syntax element and a syntax element indicating that the reference picture list syntax element is present in a slice header corresponding to an IDR VCL NAL unit. The video encoder 200 may output, in a bitstream of the encoded video data, syntax elements indicating that a picture includes multiple VCL NAL units having different NAL unit types.

[0235] The following clauses provide exemplary descriptions of the above-mentioned techniques and devices.

[0236] Clause 1: A method of decoding video data, the method comprising: receiving a network abstraction layer (NAL) unit of the video data; determining a NAL unit type for the NAL unit; and determining content of the NAL unit based on the determined NAL unit type.

[0237] Clause 2: The method of decoding video data further comprises receiving one or more syntax elements separate from the NAL unit and indicating allowed NAL unit types for the NAL unit.

[0238] Clause 3: The method of clause 1 or 2, further comprising: constructing one or more reference picture lists, wherein entries of the one or more reference picture lists are selected based at least in part on the NAL unit type.

[0239] Clause 4: A method of encoding video data, the method comprising: determining a NAL unit type for a NAL unit; determining content of the NAL unit based on the determined NAL unit type; and outputting the NAL unit in an encoded bitstream of the video data.

[0240] Clause 5: A method of encoding video data, the method comprising: determining content of a NAL unit; determining a NAL unit type for the NAL unit based on the determined content; and outputting the NAL unit in an encoded bitstream of the video data.

[0241] Clause 6: A method of encoding and decoding video data, the method comprising: determining a picture type of a picture of the video data; and constructing one or more reference picture lists, wherein entries of the one or more reference picture lists are selected based at least in part on the picture type.

[0242] Clause 7: The method of clause 6, wherein encoding and decoding comprises decoding.

[0243] Clause 8: The method of clause 6, wherein encoding and decoding comprises encoding.

[0244] Clause 9: A device for encoding and decoding video data, the device comprising one or more components for performing the method described in any one of clauses 1-8.

[0245] Clause 10: The apparatus of clause 9, wherein the one or more components comprise one or more processors implemented in circuitry.

[0246] Clause 11: The apparatus of clause 9 or 10, further comprising a memory for storing video data.

[0247] Clause 12: The apparatus of any of clauses 9-11, further comprising a display configured to display the decoded video data.

[0248] Clause 13: The device of any of clauses 9-12, wherein the device comprises one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

[0249] Clause 14: Apparatus as recited in any of clauses 9-13, wherein the apparatus comprises a video decoder.

[0250] Clause 15: Apparatus as recited in any of clauses 9-14, wherein the apparatus comprises a video encoder.

[0251] Clause 16: A computer-readable storage medium having stored thereon instructions that, when executed, cause one or more processors to perform the method of any of clauses 1-8.

[0252] Clause 17: A method of encoding video data, the method comprising: maintaining a first reference picture list; maintaining a second reference picture list; determining that a picture is an instantaneous decoding refresh (IDR) picture; determining that a reference picture list syntax element is present in a slice header of the IDR picture; responsive to determining that the picture is an IDR picture and that the reference picture list syntax element is present in the slice header of the IDR picture, updating the first reference picture list and the second reference picture list such that neither of the first reference picture list and the second reference picture list has a picture that precedes any preceding instantaneous random access point (IRAP) picture in a decoding order.

[0253] Clause 18: The method of clause 17, wherein the IDR picture comprises an IDR video coding layer (VCL) network abstraction layer (NAL) unit.

[0254] Clause 19: The method of clause 17 or 18, further comprising: outputting, in a bitstream of encoded video data, a syntax element, wherein the syntax element comprises the reference picture list syntax element and a syntax element indicating that the reference picture list syntax element is present in a slice header corresponding to the IDR VCL NAL unit.

[0255] Clause 20: The method of clause 19, further comprising: outputting, in a bitstream of encoded video data, a syntax element indicating that the picture comprises a plurality of VCL NAL units having different NAL unit types.

[0256] Clause 21: The method of clauses 17-20, wherein the picture comprises at least one IDR sub-picture.

[0257] Clause 22: The method of clause 21, wherein all blocks of the at least one IDR sub-picture are coded without inter prediction.

[0258] Clause 23: The method of clause 21 or 22, wherein the at least one IDR sub-picture has an associated leading picture.

[0259] Clause 24: The method of any of clauses 17-23, wherein the preceding IRAP picture comprises one of a preceding IDR picture or a preceding clean random access (CRA) picture.

[0260] Clause 25: A device for decoding video data, the device comprising: a memory configured to store the video data; one or more processors implemented in circuitry and configured to: maintain a first reference picture list; maintain a second reference picture list; determine that a picture is an instantaneous decoding refresh (IDR) picture; determine that a reference picture list syntax element is present in a slice header of the IDR picture; and in response to determining that the picture is an IDR picture and the reference picture list syntax element is present in the slice header of the IDR picture, update the first reference picture list and the second reference picture list so that neither the first reference picture list nor the second reference picture list, arranged in output order or decoding order, includes a picture that precedes any previous instantaneous random access point (IRAP) picture arranged in decoding order.

[0261] Clause 26: The apparatus of clause 25, wherein the IDR picture comprises an IDR Video Codec Layer (VCL) Network Abstraction Layer (NAL) unit.

[0262] Clause 27: An apparatus according to clause 26, wherein the one or more processors are further configured to: output syntax elements in a bitstream of encoded video data, wherein the syntax elements include a reference picture list syntax element and a syntax element indicating that the reference picture list syntax element is present in a slice header corresponding to an IDR VCL NAL unit.

[0263] Clause 28: The apparatus of clause 27, wherein the one or more processors are further configured to: output a syntax element in the bitstream of the coded video data, the syntax element indicating that a picture comprises a plurality of VCL NAL units having different NAL unit types.

[0264] Clause 29: Apparatus according to any of clauses 25-28, wherein the picture comprises at least one IDR sub-picture.

[0265] Clause 30: The apparatus of clause 29, wherein all blocks of the at least one IDR sub-picture are coded without inter prediction.

[0266] Clause 31: The apparatus of clause 29, wherein the at least one IDR sub-picture has an associated preceding picture.

[0267] Clause 32: Apparatus according to any of clauses 25-31, wherein the previous IRAP picture comprises one of a previous IDR picture or a previous clean random access (CRA) picture.

[0268] Clause 33: The apparatus of any of clauses 25-32, wherein the apparatus comprises a wireless communication device, further comprising a transmitter configured to transmit the encoded video data.

[0269] Clause 34: The device of clause 33, wherein the wireless communication device comprises a telephone handset, and wherein the transmitter is configured to modulate the signal comprising the encoded video data in accordance with a wireless communication standard.

[0270] Clause 35: The apparatus of any of clauses 25-34, further comprising a camera configured to capture video data.

[0271] Clause 36: The device of any of clauses 25-35, wherein the device comprises one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

[0272] Clause 37: A computer-readable storage medium storing instructions that, when executed by one or more processors, cause the one or more processors to: maintain a first reference picture list; maintain a second reference picture list; determine that a picture is an instantaneous decoding refresh (IDR) picture; determine that a reference picture list syntax element is present in a slice header of the IDR picture; and in response to determining that the picture is an IDR picture and the reference picture list syntax element is present in the slice header of the IDR picture, update the first reference picture list and the second reference picture list so that neither of the first reference picture list and the second reference picture list, arranged in output order or decoding order, contains a picture that precedes any previous instantaneous random access point (IRAP) picture arranged in decoding order.

[0273] Clause 38: The computer-readable storage medium of clause 37, wherein the IDR picture comprises an IDR video codec layer (VCL) network abstraction layer (NAL) unit.

[0274] Clause 39: Computer-readable storage medium according to clause 37 or 38, wherein the picture comprises at least one IDR sub-picture.

[0275] Clause 40: The computer-readable storage medium of any of clauses 37-39, wherein the previous IRAP picture comprises one of a previous IDR picture or a previous clean random access (CRA) picture.

[0276] Clause 41: An apparatus for encoding video data, the apparatus comprising means for maintaining a first reference picture list; means for maintaining a second reference picture list; means for determining that a picture is an instantaneous decoding refresh (IDR) picture; means for determining that a reference picture list syntax element is present in a slice header of the IDR picture; and means for updating the first reference picture list and the second reference picture list in response to determining that the picture is an IDR picture and the reference picture list syntax element is present in the slice header of the IDR picture so that neither the first reference picture list nor the second reference picture list, arranged in output order or decoding order, includes a picture that precedes any previous instantaneous random access point (IRAP) picture arranged in decoding order.

[0277] Clause 42: The apparatus of clause 41, wherein the IDR picture comprises an IDR video codec layer (VCL) network abstraction layer (NAL) unit.

[0278] Clause 43: The apparatus of clause 42, further comprising: means for outputting syntax elements in a bitstream of the coded video data, the syntax elements comprising a reference picture list syntax element and a syntax element indicating that the reference picture list syntax element is present in a slice header corresponding to an IDR VCL NAL unit.

[0279] Clause 44: The apparatus of clause 43, further comprising: means for outputting a syntax element in a bitstream of the coded video data, the syntax element indicating that a picture comprises a plurality of VCL NAL units having different NAL unit types.

[0280] Clause 45: Apparatus according to any of clauses 41-44, wherein the picture comprises at least one IDR sub-picture.

[0281] Clause 46: Apparatus according to any of clauses 41-45, wherein the previous IRAP picture comprises one of a previous IDR picture or a previous clean random access (CRA) picture.

[0282] It should be appreciated that, depending on the examples, certain actions or events of any of the techniques described herein may be performed in a different order, may be added, combined, or omitted entirely (e.g., not all described actions or events are required to practice the techniques). Furthermore, in some examples, actions or events may be performed concurrently rather than sequentially, for example, through multithreading, interrupt handling, or multiple processors.

[0283] In one or more examples, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or sent via a computer-readable medium as one or more instructions or codes and executed by a hardware-based processing unit. Computer-readable media may include computer-readable storage media, which corresponds to tangible media such as data storage media, or communication media, including any media that facilitates the transfer of a computer program from one place to another, for example, according to a communication protocol. In this manner, computer-readable media may generally correspond to (1) a non-transitory tangible computer-readable storage medium, or (2) a communication medium such as a signal or carrier wave. Data storage media may be any available medium that can be accessed by one or more computers or one or more processors to retrieve instructions, codes, and / or data structures to implement the techniques described in this disclosure. A computer program product may include computer-readable media.

[0284] As an example and not limitation, such computer-readable storage media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, flash memory or any other device that can be used to store the required program code in the form of instructions or data structures and can be accessed by a computer. Moreover, any connection is appropriately referred to as a computer-readable medium. For example, if instructions are sent from a website, server or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL) or wireless technology (such as infrared, radio and microwave), the definition of the medium includes coaxial cable, fiber optic cable, twisted pair, digital subscriber line or wireless technology such as infrared, radio and microwave. However, it should be understood that computer-readable storage media and data storage media do not include connections, carrier waves, signals or other transient media, but are directed to non-transient tangible storage media. The disks and optical disks used herein include compact disks (CDs), laser disks, optical disks, digital versatile disks (DVDs), floppy disks and Blu-ray disks, where disks typically copy data magnetically, while optical disks copy data optically via lasers. The above combinations should also be included within the scope of computer-readable media.

[0285] Instructions may be executed by one or more processors, such as one or more digital signal processors (DSPs), general-purpose microprocessors, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other equivalent integrated or discrete logic circuits. Thus, the terms "processor" and "processing circuitry" as used herein may refer to any of the foregoing structures or any other structure suitable for implementing the techniques described herein. Additionally, in some aspects, the functionality described herein may be provided within dedicated hardware and / or software modules configured for encoding and decoding, or incorporated into a combined codec. Likewise, the technology may be fully implemented in one or more circuits or logic elements.

[0286] The techniques of this disclosure can be implemented in a variety of devices or apparatuses, including wireless handsets, integrated circuits (ICs), or a set of integrated circuits (e.g., a chipset). Various components, modules, or units are described in this disclosure to emphasize functional aspects of a device configured to perform the disclosed techniques, but need not be implemented by different hardware units. Rather, as described above, the various units may be combined in a codec hardware unit in conjunction with appropriate software and / or firmware, or provided by some interoperating hardware unit, which includes one or more processors as described above.

[0287] Various examples have been described. These and other examples are within the scope of the following claims.

Claims

1. A method for encoding and decoding video data, the method comprising: Maintaining a first reference picture list; maintaining a second reference picture list; Determine if the picture is an instantaneous decoding refresh IDR picture; Processing of syntax elements indicating the presence of reference picture list syntax elements in the slice header of the IDR video codec layer VCL network abstraction layer NAL unit; as well as In response to determining that the picture is the IDR picture and the syntax element indicates that the reference picture list syntax element is present in the slice header of the IDR VCL NAL unit, updating the first reference picture list and the second reference picture list so that there is no picture in the first reference picture list and the second reference picture list arranged in output order or decoding order that precedes any previous immediate random access point (IRAP) picture arranged in decoding order.

2. The method according to claim 1, wherein The IDR picture includes the IDR VCL NAL unit.

3. The method according to claim 2, wherein: The encoding and decoding comprises encoding, and wherein processing the syntax elements indicating that the reference picture list syntax elements are present in the slice header of the IDR VCL NAL unit comprises outputting syntax elements in a bitstream of encoded video data, the syntax elements comprising a syntax element indicating that the reference picture list syntax elements are present in the slice header of the IDR VCL NAL unit.

4. The method according to claim 3, further comprising: A syntax element is output in the bitstream of encoded video data, the syntax element indicating that the picture includes a plurality of VCL NAL units having different NAL unit types.

5. The method according to claim 1, wherein The picture includes at least one IDR sub-picture.

6. The method according to claim 5, wherein: All blocks of the at least one IDR sub-picture are coded without inter-frame prediction.

7. The method according to claim 5, wherein: The at least one IDR sub-picture has an associated preceding picture.

8. The method according to claim 1, wherein At least one of the previous IRAP pictures includes one of a previous IDR picture or a previous clean random access CRA picture.

9. A device for encoding and decoding video data, the device comprising: a memory configured to store video data; and One or more processors implemented in circuitry and configured to: Maintaining a first reference picture list; maintaining a second reference picture list; Determine if the picture is an instantaneous decoding refresh IDR picture; Processing of syntax elements indicating the presence of reference picture list syntax elements in the slice header of the IDR video codec layer VCL network abstraction layer NAL unit; as well as In response to determining that the picture is the IDR picture and the syntax element indicates that the reference picture list syntax element is present in the slice header of the IDR VCL NAL unit, updating the first reference picture list and the second reference picture list so that there is no picture in the first reference picture list and the second reference picture list arranged in output order or decoding order that precedes any previous immediate random access point (IRAP) picture arranged in decoding order.

10. The apparatus according to claim 9, wherein The IDR picture includes the IDR VCL NAL unit.

11. The apparatus according to claim 10, wherein The encoding and decoding comprises encoding, and wherein, to process the syntax element indicating that the reference picture list syntax element is present in the slice header of the IDR VCL NAL unit, the one or more processors are further configured to: Syntax elements are output in a bitstream of encoded video data, the syntax elements including a syntax element indicating that the reference picture list syntax element is present in the slice header of the IDR VCL NAL unit.

12. The apparatus according to claim 11, wherein The one or more processors are further configured to: A syntax element is output in the bitstream of encoded video data, the syntax element indicating that the picture includes a plurality of VCL NAL units having different NAL unit types.

13. The apparatus according to claim 9, wherein The picture includes at least one IDR sub-picture.

14. The apparatus according to claim 13, wherein All blocks of the at least one IDR sub-picture are coded without inter-frame prediction.

15. The apparatus according to claim 13, wherein The at least one IDR sub-picture has an associated preceding picture.

16. The apparatus according to claim 9, wherein At least one of the previous IRAP pictures includes one of a previous IDR picture or a previous clean random access CRA picture.

17. The apparatus according to claim 9, wherein The apparatus comprises a wireless communication device and also includes a transmitter configured to transmit encoded video data.

18. The apparatus according to claim 17, wherein The wireless communication device comprises a telephone handset, and wherein the transmitter is configured to modulate a signal comprising the encoded video data in accordance with a wireless communication standard.

19. The apparatus according to claim 9, further comprising: A camera is configured to capture the video data.

20. The apparatus according to claim 9, wherein The device includes one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

21. A computer-readable storage medium storing instructions that, when executed by one or more processors, cause the one or more processors to: Maintaining a first reference picture list; maintaining a second reference picture list; Determine if the picture is an instantaneous decoding refresh IDR picture; Processing of syntax elements indicating the presence of reference picture list syntax elements in the slice header of the IDR video codec layer VCL network abstraction layer NAL unit; as well as In response to determining that the picture is the IDR picture and the syntax element indicates that the reference picture list syntax element is present in the slice header of the IDRVCL NAL unit, updating the first reference picture list and the second reference picture list so that no picture in the first reference picture list and the second reference picture list, arranged in output order or decoding order, precedes any previous immediate random access point (IRAP) picture arranged in decoding order.

22. The computer-readable storage medium of claim 21, wherein: The IDR picture includes the IDR VCL NAL unit.

23. The computer-readable storage medium of claim 21, wherein: The picture includes at least one IDR sub-picture.

24. The computer-readable storage medium of claim 21, wherein: At least one of the previous IRAP pictures includes one of a previous IDR picture or a previous clean random access CRA picture.

25. A device for encoding and decoding video data, the device comprising: means for maintaining a first reference picture list; means for maintaining a second reference picture list; A component for determining whether a picture is an instantaneous decoding refresh (IDR) picture; Components for processing a syntax element indicating the presence of a reference picture list syntax element in a slice header of an IDR video codec layer (VCL) network abstraction layer (NAL) unit; as well as means for updating the first reference picture list and the second reference picture list so that neither the first reference picture list nor the second reference picture list, arranged in output order or decoding order, precedes any preceding immediate random access point (IRAP) picture in decoding order, in response to determining that the picture is the IDR picture and the syntax element indicates that the reference picture list syntax element is present in the slice header of the IDR VCL NAL unit.

26. The device according to claim 25, wherein The IDR picture includes the IDR VCL NAL unit.

27. The device according to claim 26, wherein The encoding and decoding comprises encoding, and wherein the means for processing the syntax element indicating that the reference picture list syntax element is present in the slice header of the IDR VCL NAL unit comprises: Means for outputting syntax elements in a bitstream of encoded video data, wherein the syntax elements include a syntax element indicating that the reference picture list syntax element is present in the slice header of the IDR VCL NAL unit.

28. The apparatus according to claim 27, further comprising: Means for outputting a syntax element in the bitstream of encoded video data, wherein the syntax element indicates that the picture comprises a plurality of VCL NAL units having different NAL unit types.

29. The apparatus according to claim 25, wherein The picture includes at least one IDR sub-picture.

30. The apparatus of claim 25, wherein: At least one of the previous IRAP pictures includes one of a previous IDR picture or a previous clean random access CRA picture.

Images