Light emitting diode and light emitting device

Abstract

The present application relates to a light emitting diode, comprising an epitaxial structure, a first electrode, a second electrode and a hole compensation layer, the epitaxial structure having opposite first and second surfaces, the epitaxial structure comprising an N-type semiconductor layer, a light emitting layer and a P-type semiconductor layer, the light emitting layer being located between the N-type semiconductor layer and the P-type semiconductor layer, the P-type semiconductor layer comprising a P-type contact layer and a P-type base layer, the P-type base layer being located between the P-type contact layer and the light emitting layer, the first electrode being located on the second surface of the epitaxial structure and electrically connected to the N-type semiconductor layer, the second electrode being located on the second surface of the epitaxial structure and electrically connected to the P-type semiconductor layer, the hole compensation layer being located between the P-type contact layer and the second electrode. In this way, the light emitting efficiency of the light emitting diode can be effectively improved, and the light decay in aging is also significantly improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor manufacturing, and in particular to a light emitting diode and a light emitting device. BACKGROUND

[0002] A light emitting diode (LED) is a semiconductor light emitting element, which is usually made of semiconductors such as GaN, GaAs, GaP, GaAsP, etc., and the core is a PN junction with light emitting characteristics. The LED has the advantages of high light intensity, high efficiency, small size, long service life, etc., and is considered to be one of the most potential light sources at present.

[0003] An ultraviolet light emitting diode (UV-LED) is a kind of solid-state semiconductor device that can directly convert electrical energy into ultraviolet light. With the development of technology, ultraviolet light emitting diodes have broad market application prospects in the fields of biological medicine, anti-counterfeiting identification, purification (water, air, etc.), computer data storage and military, etc. In recent years, with the increasing demand for drinking water, daily sterilization and disinfection, the application of ultraviolet LEDs has gradually become a research hotspot. In order to improve the disinfection efficiency of ultraviolet LEDs, various means are used by competing manufacturers to extract light from ultraviolet LEDs as much as possible to achieve the maximum luminous efficiency of ultraviolet LEDs.

[0004] Therefore, how to effectively improve the luminous efficiency of ultraviolet LEDs has become a technical problem to be solved by those skilled in the art. SUMMARY

[0005] The present application provides a light emitting diode, which includes an epitaxial structure, a first electrode, a second electrode and a hole compensation layer.

[0006] The epitaxial structure has opposite first and second surfaces, and includes an N-type semiconductor layer, a light emitting layer and a P-type semiconductor layer. The light emitting layer is located between the N-type semiconductor layer and the P-type semiconductor layer. The P-type semiconductor layer includes a P-type contact layer and a P-type base layer, and the P-type base layer is located between the P-type contact layer and the light emitting layer. The first electrode is located on the second surface of the epitaxial structure and electrically connected to the N-type semiconductor layer. The second electrode is located on the second surface of the epitaxial structure and electrically connected to the P-type semiconductor layer. The hole compensation layer is located between the P-type contact layer and the second electrode.

[0007] In some embodiments, the hole compensation layer is a NiO layer, and Mg is doped in the NiO layer.

[0008] In some embodiments, the concentration of Mg doped in the NiO layer ranges from 1x10 18 cm -3 ~1x1022 cm -3 .

[0009] In some embodiments, the thickness of the hole compensation layer ranges from 30 to 200 angstroms.

[0010] In some embodiments, the hole compensation layer is a discontinuous hole compensation layer.

[0011] In some embodiments, the inner pitch of the discontinuous hole compensation layer ranges from 0.1 to 300 microns.

[0012] In some embodiments, the concentration of the P-type impurity doped in the P-type contact layer gradually decreases along the direction from the first surface to the second surface.

[0013] In some embodiments, the concentration of the P-type impurity doped in the P-type contact layer ranges from 1 x 1018cm-3 to 1 x 1021cm-3. 18 cm -3 22 cm -3 .

[0014] In some embodiments, the material of the P-type contact layer includes GaN or AlGaN.

[0015] In some embodiments, the thickness of the P-type contact layer ranges from 10 to 1000 angstroms.

[0016] In some embodiments, the P-type contact layer includes a first sub-layer and a second sub-layer, the first sub-layer is located between the second sub-layer and the P-type base layer, the concentration of the P-type impurity doped in the first sub-layer ranges from 2 x 1018cm-3 to 3 x 1020cm-3, and the concentration of the P-type impurity doped in the second sub-layer ranges from 1 x 1018cm-3 to 2 x 1020cm-3. 20 20 -3 19 20 -3 .

[0017] In some embodiments, the material of the P-type base layer includes AlGaN or GaN.

[0018] In some embodiments, the thickness of the P-type base layer ranges from 50 to 5000 angstroms.

[0019] In some embodiments, the light emitting wavelength of the light emitting layer ranges from 190 to 360 nm.

[0020] In some embodiments, the material of the second electrode includes a high work function material, and the work function of the high work function material is greater than 4.25 eV.

[0021] In some embodiments, the second electrode is a Ni alloy metal structure.

[0022] ​​​​​​In some embodiments, the second electrode has a thickness ranging from 50 to 3000 angstroms.

[0023] Another embodiment of the present application provides a light emitting device using the light emitting diode according to any one of the above embodiments.

[0024] An embodiment of the present application provides a light emitting diode and a light emitting device. The light emitting diode includes a P-type semiconductor layer, a P-type contact layer, a hole compensation layer, a second electrode, and a light emitting layer. The hole compensation layer is disposed between the P-type contact layer and the second electrode. The hole compensation layer is configured to compensate for holes in the P-type contact layer. The light emitting layer is disposed between the P-type semiconductor layer and the second electrode. The light emitting layer is configured to emit light when a voltage is applied to the P-type semiconductor layer and the second electrode.

[0025] Other features and advantages of the present application will be set forth in the descriptions below, and in part will become apparent to those skilled in the art upon examination of the following or can be learned by practice of the present application. BRIEF DESCRIPTION OF DRAWINGS

[0026] In order to more clearly illustrate the technical solutions of the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art descriptions. Obviously, the drawings in the following description are some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor.

[0027] Figure 1 is a structural schematic diagram of a light emitting diode provided by a first embodiment of the present application;

[0028] Figure 2 is a structural schematic diagram of a hole compensation layer and a second electrode provided by an embodiment of the present application;

[0029] Figure 3 is a partial structural schematic diagram of a P-type semiconductor layer and a second electrode provided by an embodiment of the present application;

[0030] Figure 4 is a structural schematic diagram of a light emitting diode provided by a second embodiment of the present application;

[0031] Figure 5 is a structural schematic diagram of a light emitting diode provided by a third embodiment of the present application;

[0032] Figure 6 is a partial structural schematic diagram of a P-type semiconductor layer and a second electrode provided by another embodiment of the present application;

[0033] Figure 7A is a structural schematic diagram of a light emitting diode provided by a fourth embodiment of the present application;

[0034] Figure 7B is a top view structural schematic diagram of a light emitting diode;

[0035] Figure 8 is a schematic diagram of light efficiency comparison between the light emitting diode of the present application and the prior art light emitting diode;

[0036] Figure 9 is a schematic diagram of electro-optical conversion efficiency comparison between the light emitting diode of the present application and the prior art light emitting diode;

[0037] Figure 10 is a schematic diagram of aging comparison between the light emitting diode of the present application and the prior art light emitting diode;

[0038] Figure 11 is a schematic diagram of aging comparison between the light emitting diode of the present application and the prior art light emitting diode;

[0039] Figure 12 is a schematic diagram of aging comparison between the light emitting diode of the present application and the prior art light emitting diode.

[0040] Reference signs:

[0041] 1, 2, 3, 4 - light emitting diode; 10 - epitaxial structure; 101 - first surface; 102 - second surface; 103 - N-type semiconductor layer; 104 - light emitting layer; 105 - P-type semiconductor layer; 1051 - P-type base layer; 1052 - P-type contact layer; 1052a - first sub-layer; 1052b - second sub-layer; 1053 - P-type high-doped layer; 1054 - P-type hole injection layer; 12 - substrate; 14, 14' - hole compensation layer; 141 - first compensation layer; 142 - second compensation layer; 21 - first electrode; 22 - second electrode; 30 - insulating layer; 31 - first pad electrode; 32 - second pad electrode; L1 - inner spacing. DETAILED DESCRIPTION

[0042] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some, but not all of the embodiments of the present application; and the technical features designed in different implementation manners of the present application can be combined with each other as long as there is no conflict. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0043] In the description of the present application, it should be understood that the terms "center", "transverse", "upper", "lower", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the purpose of facilitating the description of the present application and simplifying the description, and do not indicate or imply that the device or component referred to must have a particular orientation or be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined as "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, unless otherwise specified, the meaning of "a plurality of" is two or more. In addition, the term "comprising" and any variation thereof means "at least including".

[0044] Please refer to Figure 1 , Figure 2 and Figure 3 , Figure 1 is a schematic structural diagram of a light emitting diode 1 provided by the first embodiment of the present application, Figure 2 is a schematic structural diagram of the hole compensation layer 14 and the structure at the second electrode 22 provided by an embodiment of the present application, Figure 3 is a schematic structural diagram of part of the P-type semiconductor layer 105 and the second electrode 22 provided by an embodiment of the present application. The first embodiment of the present application provides a light emitting diode 1. As shown in the figure, the light emitting diode 1 can include an epitaxial structure 10, a first electrode 21, and a second electrode 22.

[0045] The epitaxial structure 10 is arranged on a substrate 12. The substrate 12 can be an insulating substrate, and preferably, the substrate 12 can be made of a transparent material or a translucent material. In the illustrated embodiment, the substrate 12 is a sapphire substrate. In some embodiments, the substrate 12 can be a patterned sapphire substrate, but the present application is not limited thereto. The substrate 12 can also be made of a conductive material or a semiconductor material. For example, the substrate 12 material can include at least one of silicon carbide, silicon, magnesium aluminum oxide, magnesium oxide, lithium aluminum oxide, aluminum gallium oxide, and gallium nitride.

[0046] The epitaxial structure 10 has opposite first and second surfaces 101 and 102. In the present embodiment, the first and second surfaces 101 and 102 of the epitaxial structure 10 are respectively Figure 1The lower surface and the upper surface of the epitaxial structure 10 in the figure. The epitaxial structure 10 includes an N-type semiconductor layer 103, a light emitting layer 104 and a P-type semiconductor layer 105. The light emitting layer 104 is located between the N-type semiconductor layer 103 and the P-type semiconductor layer 105. As shown, the N-type semiconductor layer 103, the light emitting layer 104 and the P-type semiconductor layer 105 are sequentially stacked on the substrate 12.

[0047] The N-type semiconductor layer 103 can provide electrons to the light emitting layer 104 under the action of a power source. In some embodiments, the N-type semiconductor layer 103 includes an N-type doped nitride layer. The N-type doped nitride layer can include one or more N-type impurities of group IV elements. The N-type impurities can include one or a combination of Si, Ge, Sn. In some embodiments, a buffer layer can also be provided between the N-type semiconductor layer 103 and the substrate 12 to alleviate the lattice mismatch between the substrate 12 and the N-type semiconductor layer 103. The buffer layer can include an undroped AlN (u-AlN) or an undroped AlGaN (u-AlGaN). The N-type semiconductor layer 103 can also be connected to the substrate 12 through an adhesive layer. In some embodiments, the N-type semiconductor layer 103 can include a first N-type sub-layer having a first doping concentration and a second N-type sub-layer having a second doping concentration, wherein the first N-type sub-layer is located between the second N-type sub-layer and the light emitting layer 104, and the first doping concentration is higher than the second doping concentration. Preferably, the first doping concentration is preferably 1.2 times or more of the second doping concentration, for example, can be between 1.2 times and 2 times, wherein the first N-type sub-layer acts as a contact layer, and a higher doping concentration can better achieve ohmic contact with the contact electrode, thereby reducing the voltage of the device; the second N-type sub-layer acts as a carrier injection and expansion layer, and needs to have a relatively large thickness (preferably 1 μm or more), so that the doping concentration of the second N-type sub-layer is set to be slightly lower than that of the first N-type sub-layer, which is beneficial to avoid the decrease of the crystal quality of the N-type semiconductor layer 103 caused by high doping, and is also beneficial to the lateral diffusion of carriers. In a specific embodiment, the first doping concentration can be 1×10 19 / cm 3 The above, for example, can be 1×10 19 / cm 3 ~5×10 19 / cm 3 , and the second doping concentration is 5×10 18 / cm 3 The above, for example, can be 5×10 18 / cm 3 ~3×10 19 / cm 3The thickness of the second N-type sub-layer is preferably greater than or equal to 1 μm, so as to balance the crystal quality and the carrier spreading capability of the N-type semiconductor layer 103.

[0048] The light emitting layer 104 can be a quantum well structure (QW). In some embodiments, the light emitting layer 104 can also be a multiple quantum well structure (MQW) including a plurality of quantum well layers (Well) and a plurality of quantum barrier layers (Barrier) arranged alternately in a repeated manner, such as a GaN / AlGaN, InAlGaN / InAlGaN or InGaN / AlGaN multiple quantum well structure. In addition, the composition and thickness of the well layers in the light emitting layer 104 determine the wavelength of the generated light. In order to improve the light emitting efficiency of the light emitting layer 104, the depth of the quantum well, the number of pairs of quantum well and quantum barrier, the thickness and / or other characteristics in the light emitting layer 104 can be changed. In some embodiments, the light emitting wavelength of the light emitting layer 104 is 190-360 nm, i.e., the light emitting layer 104 emits ultraviolet light, and the light emitting diode 1 is an ultraviolet light emitting diode. In some embodiments, the light emitting layer 104 can have n-type doping, such as Si doping, and the doping depth is preferably 1 x 1018 / cm3 to 1 x 1020 / cm3, for example, 2 x 1018 / cm3 or 5 x 1018 / cm3, etc. The appropriate doping can improve the photoelectric performance of the light emitting diode 1. 18 / cm 3 The above, preferably 1 x 1018 / cm3 to 1 x 1020 / cm3, for example, 2 x 1018 / cm3 or 5 x 1018 / cm3, etc. The appropriate doping can improve the photoelectric performance of the light emitting diode 1. 18 / cm 3 The above, preferably 1 x 1018 / cm3 to 1 x 1020 / cm3, for example, 2 x 1018 / cm3 or 5 x 1018 / cm3, etc. The appropriate doping can improve the photoelectric performance of the light emitting diode 1. 19 / cm 3 The above, preferably 1 x 1018 / cm3 to 1 x 1020 / cm3, for example, 2 x 1018 / cm3 or 5 x 1018 / cm3, etc. The appropriate doping can improve the photoelectric performance of the light emitting diode 1. 18 / cm 3 The above, preferably 1 x 1018 / cm3 to 1 x 1020 / cm3, for example, 2 x 1018 / cm3 or 5 x 1018 / cm3, etc. The appropriate doping can improve the photoelectric performance of the light emitting diode 1. 18 / cm 3 The above, preferably 1 x 1018 / cm3 to 1 x 1020 / cm3, for example, 2 x 1018 / cm3 or 5 x 1018 / cm3, etc. The appropriate doping can improve the photoelectric performance of the light emitting diode 1.

[0049] The P-type semiconductor layer 105 can provide holes to the light emitting layer 104 under the action of a power source. In some embodiments, the P-type semiconductor layer 105 includes a P-type doped nitride layer. The P-type doped nitride layer can include one or more P-type impurities of group II elements. The P-type impurities can include one or a combination of Mg, Zn, Be. The P-type semiconductor layer 105 can be a multi-layer structure with different compositions. The P-type semiconductor layer 105 can include a P-type contact layer 1052 and a P-type base layer 1051. The P-type base layer 1051 is located between the P-type contact layer 1052 and the light emitting layer 104.

[0050] In a specific embodiment, the epitaxial structure 10 can comprise a confinement layer (not shown in the figure) disposed between the light-emitting layer 104 and the P-type semiconductor layer 105, which preferably has a high Al component and is lowly doped or undoped, and preferably has a thickness of 50 nm or less, so as to confine the diffusion of the doped elements of the P-type semiconductor layer 105 to the light-emitting layer 104, thereby improving the optoelectronic performance of the light-emitting diode 1.

[0051] The first electrode 21 is disposed on the second surface 102 of the epitaxial structure 10 and is electrically connected to the N-type semiconductor layer 103. The second electrode 22 is disposed on the second surface 102 of the epitaxial structure 10 and is electrically connected to the P-type semiconductor layer 105.

[0052] The first electrode 21 can be a single-layer structure, a double-layer structure or a multi-layer structure, such as a Ti / Al, Ti / Al / Ti / Au, Ti / Al / Ni / Au, V / Al / Pt / Au or the like laminated structure. In some embodiments, the first electrode 21 can be directly formed on the mesa of the epitaxial structure 10 and forms a good ohmic contact with the N-type semiconductor layer 103.

[0053] The second electrode 22 can be made of a transparent conductive material or a metal material, which can be selected according to the doping condition of the surface layer of the P-type semiconductor layer 105. In some embodiments, the second electrode 22 is made of a transparent conductive material, which can include indium tin oxide (ITO), indium zinc oxide (IZO), indium oxide (InO), tin oxide (SnO), cadmium tin oxide (CTO), antimony tin oxide (ATO), aluminum zinc oxide (AZO), zinc tin oxide (ZTO), gallium doped zinc oxide (GZO), tungsten doped indium oxide (IWO) or zinc oxide (ZnO), but the embodiments of the present disclosure are not limited thereto. In other embodiments, the second electrode 22 can be made of a metal material such as Ni or Rh.

[0054] In some embodiments, the light emitting diode 1 can further include a hole compensation layer 14 between the P-type contact layer 1052 and the second electrode 22. Considering that the P-type base layer 1051 (such as AlGaN) and the P-type contact layer 1052 (such as P-GaN) have a higher degree of lattice mismatch, it is theoretically more difficult to grow, has a higher defect density, and holes are more likely to be trapped in transmission. Therefore, the hole compensation layer 14 is provided to provide hole compensation, which helps to improve injection efficiency. In other words, the hole compensation layer 14 is used to increase the hole concentration and help limit the formation of rough surfaces (suppressing dislocation scattering and Auger recombination), thereby effectively improving the light emitting efficiency of the light emitting diode 1 and significantly improving the aging light decay. Preferably, the hole compensation layer 14 is a Mg-doped NiO layer. NiO has a higher band gap, and holes are less likely to be trapped in transmission, so it has better performance. The NiO layer is doped with Mg, which has the following advantages: the band gap of NiO is about 3.5 eV, the band gap of MgO is about 7.8 eV, and the band gap of NiO doped with about 5% Mg is 3.5ev*0.95+7.8eV*0.05=3.7eV, which is beneficial to enhance the transmission ability of holes and block electrons, and reduce Auger recombination; in addition, according to the different proportions of Mg doping, the band gap of NiO can be converted from 3.5 eV to a higher band gap, ensuring that Ni vacancies are not easily trapped by epitaxial defects or free electrons, further improving the hole compensation and carrying capacity of the P region.

[0055] Considering that NiO needs to select a P-type material with appropriate Mg doping to further optimize the photoelectric properties of the device. When the Mg content is too low, NiO is not enough to compensate for the lack of holes in the P-type material; when the Mg content is too high, the defects of the P-type material will be too many, which will form a rough surface, affect the growth quality of the NiO film, block the migration of holes, and the like. Therefore, preferably, the concentration of Mg doped in the NiO layer is in the range of 1x10 18 cm -3 ~1x10 22 cm -3 More preferably, the concentration of Mg doped in the NiO layer is in the range of 5x10 20 cm -3 ~1x10 22 cm -3 Preferably, the percentage of Mg doped in the NiO layer is in the range of 0.1% to 5%, for example, it can be 1%, 1.5%, 2%, 2.5%, etc. The thickness of the hole compensation layer 14 is in the range of 30-200 angstroms.

[0056] In some embodiments, as Figure 2As shown, the hole compensation layer 14 may include a first compensation layer 141 and a second compensation layer 142. The first compensation layer 141 is located between the P-type contact layer 1052 and the second compensation layer 142. In other words, the first compensation layer 141, the second compensation layer 142, and the second electrode 22 are sequentially stacked on the surface of the P-type contact layer 1052. Both the first compensation layer 141 and the second compensation layer 142 are made of NiO. NiO has a relatively high band gap, and holes are less likely to be captured by defects during transmission, resulting in better performance. Preferably, the first compensation layer 141 is doped with Mg, while the second compensation layer 142 is not doped with Mg. The undoped second compensation layer 142 can serve as a diffusion buffer layer, preventing excessive Mg from entering the Ni alloy metal structure to form magnesium metal compounds (most magnesium metal compounds are brittle phases, which reduce structural strength and are detrimental to the top layer structure), thereby improving the reliability of the light-emitting diode 1.

[0057] In some embodiments, the concentration of P-type impurities doped in the P-type contact layer 1052 is along the direction from the first surface 101 to the second surface 102 (i.e., Figure 1 The concentration of P-type impurities in the P-type contact layer 1052 gradually decreases from bottom to top. This gradual decrease helps improve the interface of the P-type contact layer 1052, reduces the ineffective recombination of carriers through leakage channels, improves photoelectric reliability, and increases luminous efficiency. At the same time, improving the interface of the P-type contact layer 1052 can also improve the film quality of the hole compensation layer 14, reduce the interference of defects on the transmission and transport of holes in the hole compensation layer 14, and increase the hole concentration in the P-region. Therefore, the luminous efficiency of the light-emitting diode 1 can be further improved, and the aging and light decay are also significantly improved.

[0058] Considering that when doping the P-type contact layer 1052 with a high or low concentration of P-type impurities, if the P-type impurity doping is too high, there will be too many defects in the P-material, which will form rough surfaces and leakage channels in the P-type substrate 1051 and the P-type contact layer 1052, which may directly cause leakage in the light-emitting diode 1; in addition, rough surfaces will affect the growth quality of the hole compensation layer 14 film in the P-region, and defects will also block hole migration. Therefore, the P-type impurity concentration range in the P-type contact layer 1052 is preferably 1×10⁻⁶. 18 cm -3 ~1×10 22 cm -3 The preferred P-type impurity for doping in the P-type contact is Mg, as Mg doping can increase the hole concentration and improve the hole compensation and carrying capacity of the P-region.

[0059] For example, the P-type contact layer 1052 is arranged along the direction from the first surface 101 to the second surface 102 (i.e. Figure 1The P-type contact layer 1052 is divided into four regions (from bottom to top), each region accounting for 25% of the thickness of the P-type contact layer 1052. The concentration of P-type impurities in the first region is higher than that in the second region, the second region is higher than that in the third region, and the third region is higher than that in the fourth region. Similarly, the P-type contact layer 1052 can also be roughly divided into 50 regions, 33 regions, 20 regions, 10 regions, 5 regions, 3 regions, and 2 regions, respectively, along the direction from the first surface 101 to the second surface 102, according to 2%, 3.3%, 5%, 10%, 20%, 33%, and 50% of the thickness of the P-type contact layer 1052. The concentration of P-type impurities in these regions gradually decreases along the direction from the first surface 101 to the second surface 102. It should be noted that the P-type impurity concentration in each region refers to the average concentration of P-type impurities in that region.

[0060] In some embodiments, such as Figure 3 As shown, the P-type contact layer 1052 may include a first sublayer 1052a and a second sublayer 1052b. The first sublayer 1052a is located between the second sublayer 1052b and the P-type substrate 1051. That is, the first sublayer 1052a, the second sublayer 1052b, and the second electrode 22 are sequentially stacked on the P-type substrate 1051. The concentration of P-type impurities doped in the first sublayer 1052a is higher than that in the second sublayer 1052b. The concentration of P-type impurities doped in the first sublayer 1052a ranges from 2 × 10⁻⁶. 20 ~3×10 20 cm -3 The concentration of P-type impurities in the second sublayer 1052b doped ranges from 1 × 10⁻⁶. 19 ~2×10 20 cm -3The P-type impurity concentration in the first sub-layer 1052a refers to the average concentration of the P-type impurities doped in the first sub-layer 1052a, and the P-type impurity concentration in the second sub-layer 1052b refers to the average concentration of the P-type impurities doped in the second sub-layer 1052b. The thickness of the first sub-layer 1052a can be the same as or different from the thickness of the second sub-layer 1052b. When the first sub-layer 1052a and the second sub-layer 1052b have the same thickness, the thickness of the low-doping-concentration region stack is in the range of 10-500 angstroms, and the cutoff concentration is more controllable. However, the concentration adjustment in the early stage is relatively large, and if the time period of the flow of the doped organic source gas is short, overshooting may occur, which affects the crystal quality by forming a mismatch region at the interface. When the first sub-layer 1052a and the second sub-layer 1052b have different thicknesses, the thickness is in the range of 10-990 angstroms, the doping level changes relatively slowly with the thickness, the mismatch degree is relatively low, and the crystallization quality is better, but the cutoff concentration may deviate from the designed value.

[0061] In some embodiments, the material of the P-type contact layer 1052 can include GaN and / or AlGaN. In some embodiments, the material of the P-type base layer 1051 can include AlGaN and / or GaN. The use of AlGaN can further improve the light-emitting performance of the light-emitting diode 1 by taking advantage of the fact that AlGaN material absorbs less in the ultraviolet band. The use of GaN can facilitate the formation of stable contact between the P-electrode material at the chip end and the GaN material, and facilitate carrier injection, because the work function of GaN is much lower than that of AlGaN, and the P-type doping of GaN is difficult and has high activation efficiency.

[0062] In some embodiments, considering the film thickness control limit capability of the device and in order to easily form quantum tunneling, the thickness of the P-type contact layer 1052 is preferably in the range of 10-1000 angstroms. In some embodiments, considering that the P-type base layer 1051 will absorb the light emitted by the light-emitting layer 104, the P-type base layer 1051 can be appropriately thinned, and the thickness of the P-type base layer 1051 is in the range of 50-5000 angstroms.

[0063] Currently, ITO thin film is one of the preferred electrode materials for the second electrode 22, and it is widely used and extensively studied in ultraviolet LED devices. However, the ITO film has a high absorption coefficient in the deep ultraviolet band, which reduces the light extraction efficiency of the device. Typically, the light extraction efficiency of the LED device is improved by reducing the thickness of the ITO film to decrease the absorption coefficient for deep ultraviolet light; however, thinning the ITO film reduces the stability of the device. Therefore, balancing the absorption and contact characteristics of the electrode material, a high work function material is selected as the material for the second electrode 22. The work function of the high work function material is greater than 4.25 eV. The second electrode 22 made of high work function material can form a good low-voltage ohmic contact with the P-type contact layer 1052, and its reflection performance is also better than that of the ITO film. Preferably, the second electrode 22 is a Ni alloy metal structure or a Pa alloy metal structure.

[0064] In some embodiments, the thickness of the second electrode 22 ranges from 50 to 3000 angstroms. The lower limit of the thickness of the second electrode 22 is set to 50 Å to ensure the photoelectric stability of the interface. If the second electrode 22 is further thinned, it is easily affected by the tensile stress of the upper layer material during the manufacturing process, resulting in local peeling. This leads to poor contact between the second electrode 22 and the lower layer material, which may result in process failure or unstable electrical properties during testing.

[0065] Please see Figure 4 , Figure 4 This is a schematic diagram of the structure of the light-emitting diode 2 provided in the second embodiment of the present invention. Compared to Figure 1 The main difference between the light-emitting diode 1 shown in the first embodiment and the light-emitting diode 2 provided in the second embodiment is that the hole compensation layer is an intermittent hole compensation layer 14'. This intermittent hole compensation layer 14' has better reflectivity because the hole compensation layer (such as a NiO layer) absorbs some of the light emitted by the light-emitting layer 104. Therefore, making it intermittent reduces the light absorption performance of the hole compensation layer, thereby improving the light emission characteristics of the light-emitting diode 2. Preferably, the inner spacing L1 of the intermittent hole compensation layer 14' ranges from 0.1 micrometers to 300 micrometers, where 0.1 micrometers is the limit of precision for the LED mask, and 300 micrometers is the limit spacing to ensure the diffusion of conventional current on the electrode strip. More preferably, the upper limit of the inner spacing L1 is 40 micrometers. The inner spacing L1 refers to the spacing between two adjacent hole compensation layers, and the inner spacing L1 can be the same or different. For example, taking... Figure 4 For example, the intermittent hole compensation layer 14' has three inner spacings L1 from left to right, named the first inner spacing, the second inner spacing, and the third inner spacing respectively. The values ​​of the first inner spacing, the second inner spacing, and the third inner spacing can be the same or different, and can be varied according to the actual reflective requirements.

[0066] Referring to Figure 5 and Figure 5 , Figure 5 is a structural schematic diagram of a light emitting diode 3 provided by a third embodiment of the present application, Figure 6 is a partial structural schematic diagram of a P-type semiconductor layer 105 and a second electrode 22 provided by another embodiment of the present application. Compared with Figure 1 the light emitting diode 1 shown in the first embodiment, the difference of a light emitting diode 3 provided by the third embodiment mainly lies in that the P-type semiconductor layer 105 comprises a P-type high-doped layer 1053 and a P-type base layer 1051, and the P-type base layer 1051 is located between the P-type high-doped layer 1053 and the light emitting layer 104. The P-type impurity concentration doped in the P-type high-doped layer 1053 increases first and then decreases along the direction from the first surface 101 to the second surface 102. By means of the change of the P-type impurity concentration doped in the P-type high-doped layer 1053, the light emitting efficiency of the light emitting diode 3 can be effectively improved, and the light decay in aging is also significantly improved.

[0067] In some embodiments, as shown in Figure 6 , the P-type high-doped layer 1053 comprises a P-type hole injection layer 1054 and a P-type contact layer 1052 which are sequentially stacked on the P-type base layer 1051. The P-type impurity concentration doped in the P-type hole injection layer 1054 gradually increases along the direction from the first surface 101 to the second surface 102, and the P-type impurity concentration doped in the P-type contact layer 1052 gradually decreases along the direction from the first surface 101 to the second surface 102. In this way, the light emitting efficiency of the light emitting diode 3 can be improved, and the light decay in aging is also significantly improved. The P-type contact layer 1052 of the present embodiment can refer to the related description of the P-type contact layer 1052 in the first embodiment. Preferably, the P-type impurity concentration of the P-type contact layer 1052 close to the first surface 101 side is greater than the P-type impurity concentration of the P-type contact layer 1052 close to the second surface 102 side. Preferably, the P-type impurity concentration doped in the P-type contact layer 1052 ranges from 1×1018cm-3to 1×1020cm-3. 18 cm -3 ~1×10 22 cm -3 , the P-type impurity concentration doped in the P-type hole injection layer 1054 ranges from 1×1018cm-3to 1×1020cm-3. 17 cm -3 ~1×10 22 cm -3 .

[0068] In some embodiments, the P-type semiconductor layer 105 in the light emitting diode can further include a P-type hole injection layer 1054, the P-type hole injection layer 1054 is located between the P-type base layer 1051 and the P-type contact layer 1052, and the P-type impurity doping concentration in the P-type hole injection layer 1054 gradually increases in the direction from the first surface 101 to the second surface 102.

[0069] Referring to Figure 7A and Figure 7B , Figure 7A is a structural schematic diagram of a light emitting diode 4 provided by a fourth embodiment of the present application, Figure 7B is a top view structural schematic diagram of the light emitting diode 4. Compared with Figure 5 The difference between the light emitting diode 4 provided by the fourth embodiment and the light emitting diode 3 shown in the third embodiment mainly lies in that the light emitting diode 4 can further include an insulating layer 30, a first pad electrode 31 and a second pad electrode 32. The insulating layer 30 covers the epitaxial structure 10, and the insulating layer 30 mainly plays an insulating protection effect. The insulating layer 30 has different effects according to the position involved, for example, when the insulating layer 30 covers the sidewall of the epitaxial structure 10, it can be used to prevent the electrical connection between the N-type semiconductor layer 103 and the P-type semiconductor layer 105 due to the leakage of the conductive material, and reduce the short-circuit abnormality of the light emitting diode 4, but the embodiments of the present disclosure are not limited thereto. The material of the insulating layer 30 includes a non-conductive material. The non-conductive material is preferably an inorganic material or a dielectric material. The inorganic material can include silica gel. The dielectric material includes electrically insulating materials such as aluminum oxide, silicon nitride, silicon oxide, titanium oxide, or magnesium fluoride. For example, the insulating layer 30 can be silicon dioxide, silicon nitride, titanium oxide, tantalum oxide, niobium oxide, barium titanate, or a combination thereof, and the combination thereof can be a Bragg reflector (DBR) formed by repeatedly stacking two materials with different refractive indices.

[0070] The first pad electrode 31 and the second pad electrode 32 are located on the insulating layer 30. The first pad electrode 31 and the second pad electrode 32 are electrically connected to the first electrode 21 and the second electrode 22 through the openings of the insulating layer 30, respectively. The first pad electrode 31 and the second pad electrode 32 can be formed together in the same process by using the same material, and therefore can have the same layer structure.

[0071] In addition, the light emitting diodes 1, 2, 3 in the first embodiment, the second embodiment and the third embodiment can also be provided with the insulating layer 30 to play an insulating protection effect and improve the stability of the light emitting diodes 1, 2, 3; the light emitting diodes 1, 2, 3 in the first embodiment, the second embodiment and the third embodiment can also be provided with the first pad electrode 31 and the second pad electrode 32 to facilitate installation and use, etc.

[0072] Referring to Figure 8 , Figure 8The left vertical axis represents VF (forward voltage), the right vertical axis represents LOP (light output power), and the horizontal axis represents existing light-emitting diodes (LEDs) and LEDs with different Mg doping concentrations in the NiO layer (hole compensation layer 14) of this application. The average VF of existing LEDs is approximately 6.35V, and the average LOP is approximately 10.84mW; the average VF of LEDs with d1 doping concentration is approximately 5.65V, and the average LOP is approximately 12.71mW; the average VF of LEDs with d2 doping concentration is approximately 5.53V, and the average LOP is approximately 18.16mW; and the average VF of LEDs with d3 doping concentration is approximately 5.55V, and the average LOP is approximately 13.6mW. Compared to existing LEDs, the forward voltage of LEDs with different Mg doping concentrations in the NiO layer is reduced, and the brightness is increased, which can effectively improve the luminous efficiency of LEDs. The doping concentration relationship is d1>d2>d3. The d1 concentration range is 5×10⁻⁶. 20 ~8×10 20 cm -3 The d2 concentration range is 1×10 20 ~5×10 20 cm -3 The concentration range of d3 is 5 × 10⁻⁶. 19 ~8×10 19 cm -3 .

[0073] Please see Figure 9 , Figure 9 The vertical axis represents the electro-optical conversion efficiency (WPE), and the horizontal axis represents the electro-optical conversion efficiency (EPE) of existing LEDs and the LEDs with different Mg doping concentrations in the NiO layer (hole compensation layer 14) of this application. The average WPE of existing LEDs is approximately 1.7%; the average WPE of LEDs with d1 doping concentration is approximately 2.2%; the average WPE of LEDs with d2 doping concentration is approximately 3.3%; and the average WPE of LEDs with d3 doping concentration is approximately 2.5%. Compared to existing LEDs, the electro-optical conversion efficiency of LEDs with different Mg doping concentrations in the NiO layer is improved, which can effectively improve the luminous efficiency of LEDs. The doping concentration relationship is d1>d2>d3. The d1 concentration range is 5×10⁻⁶. 20 ~8×10 20 cm -3 The d2 concentration range is 1×10 20 ~5×10 20 cm -3 The concentration range of d3 is 5 × 10⁻⁶. 19 ~8×10 19 cm -3 .

[0074] Please refer to Figure 10 , Figure 10 The horizontal axis is time length, and the vertical axis is light output power maintenance rate (light output power maintenance rate = light output power of the device after 1008 hours of aging / initial aging light output power of the device at 0 hours, and the "light output power maintenance rate" in the present patent is defined as such). Figure 11 The aging condition is: temperature 45℃, current 150mA, time length 1008H. After long-time aging, the light output power maintenance rate of the light emitting diode of the present application is improved from 59.1% to 90.1% compared with the prior art, and the light emitting diode is also significantly improved in terms of aging light decay.

[0075] Please refer to Figure 11 , Figure 11 The horizontal axis is time length, and the vertical axis is light output power maintenance rate. Figure 11 The aging condition is: 85% humidity, temperature 85℃, current 100mA, time length 1008H. After long-time aging of temperature + humidity, the light output power maintenance rate of the light emitting diode of the present application is improved from 44.4% to 88.2% compared with the prior art, and the light emitting diode is also significantly improved in terms of aging light decay.

[0076] Please refer to Figure 12 , Figure 12 The horizontal axis is time length, and the vertical axis is light output power maintenance rate. Figure 12 The aging condition is: temperature 45℃, current 100mA, time length 1008H. After long-time aging, the light output power maintenance rate of the light emitting diode of the present application is improved from 70.9% to 91.2% compared with the prior art, and the light emitting diode is also significantly improved in terms of aging light decay.

[0077] Another embodiment of the present application provides a light emitting device which adopts the light emitting diode 1, 2, 3, 4, 5 of any of the above embodiments.

[0078] In addition, those skilled in the art should understand that although there are many problems in the prior art, each embodiment or technical solution of the present application can only be improved in one or several aspects, and it is not necessary to solve all the technical problems listed in the prior art or background art at the same time. Those skilled in the art should understand that what is not mentioned in a claim should not be regarded as a limitation of the claim.

[0079] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, and are not intended to limit the present application; although the present application has been described in detail with reference to the above embodiments, those skilled in the art should understand that the technical solutions recorded in the above embodiments can be modified, or some or all of the technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A light emitting diode, characterized by: The light emitting diode comprises: an epitaxial structure having opposite first and second surfaces, the epitaxial structure comprising an N-type semiconductor layer, a light emitting layer, and a P-type semiconductor layer, the light emitting layer being between the N-type semiconductor layer and the P-type semiconductor layer, the P-type semiconductor layer comprising a P-type contact layer and a P-type base layer, the P-type base layer being between the P-type contact layer and the light emitting layer; a first electrode on the second surface of the epitaxial structure and electrically connected to the N-type semiconductor layer; a second electrode on the second surface of the epitaxial structure and electrically connected to the P-type semiconductor layer; a hole compensation layer between the P-type contact layer and the second electrode; the hole compensation layer is a NiO layer, the hole compensation layer comprising a first compensation layer and a second compensation layer, the first compensation layer being between the P-type contact layer and the second compensation layer, the second compensation layer being between the first compensation layer and the second electrode, the first compensation layer being doped with Mg, and the second compensation layer being not doped with Mg.

2. The light emitting diode of claim 1, wherein: The concentration of Mg doped in the NiO layer ranges from 1 x 10 18 cm -3 ~1 x 10 22 cm -3 .

3. The light emitting diode of claim 1, wherein: The thickness of the hole compensation layer ranges from 30 to 200 angstroms.

4. The light emitting diode of claim 1, wherein: The hole compensation layer is an intermittent hole compensation layer.

5. The light emitting diode of claim 4, wherein: The inner spacing of the intermittent hole compensation layer ranges from 0.1 to 300 microns.

6. The light emitting diode of claim 1, wherein: The concentration of P-type impurities doped in the P-type contact layer gradually decreases along the direction from the first surface to the second surface.

7. The light emitting diode of claim 1, wherein: The P-type impurity doped in the P-type contact layer has a concentration ranging from 1 x 1016 18 cm -3 ~1 x 1018 22 cm -3 .

8. The light emitting diode of claim 1, wherein: The material of the P-type contact layer comprises GaN or AlGaN.

9. The light emitting diode of claim 1, wherein: The thickness of the P-type contact layer ranges from 10 to 1000 angstroms.

10. The light emitting diode of claim 1, wherein: The P-type contact layer includes a first sub-layer and a second sub-layer, the first sub-layer is located between the second sub-layer and the P-type base layer, the first sub-layer is doped with a P-type impurity at a concentration ranging from 2*10 20 to 3*10 20 cm -3 -3, and the second sub-layer is doped with a P-type impurity at a concentration ranging from 1*10 19 to 2*10 20 cm -3 .

11. The light emitting diode of claim 1, wherein: The material of the P-type base layer comprises AlGaN or GaN.

12. The light emitting diode of claim 1, wherein: The thickness of the P-type base layer ranges from 50 to 5000 angstroms.

13. The light emitting diode of claim 1, wherein: The light emitting wavelength of the light emitting layer is 190 to 360 nm.

14. The light emitting diode of claim 1, wherein: The material of the second electrode comprises a high work function material, and the work function of the high work function material is greater than 4.25 eV.

15. The light emitting diode of claim 14, wherein: The second electrode is a Ni alloy metal structure.

16. The light emitting diode of claim 14, wherein: The thickness of the second electrode ranges from 50 to 3000 angstroms.

17. A light-emitting device, characterized in that: The light emitting device adopts the light emitting diode according to any one of claims 1 to 16.

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