A two-phase sawtooth voltage mode PWM control circuit

Abstract

The application discloses a two-phase sawtooth wave voltage mode PWM control circuit, which obtains two voltage feedback signals through resistance voltage division sampling of a power stage circuit output voltage and is connected to a two-phase sawtooth wave voltage mode control loop and a transient response acceleration module respectively; when load jump occurs, the transient response acceleration module acts, and two-phase high-frequency pulse signals generated are connected to the two-phase sawtooth wave voltage mode control loop. The two-phase sawtooth wave voltage mode control loop generates two-phase symmetrical duty cycle signals PWM1 and PWM2, and gate control signals generated after the two-phase symmetrical duty cycle signals PWM1 and PWM2 pass through a dead zone control module and a driving module in turn control the turn-on and turn-off of power tubes in the power stage circuit. The two-phase sawtooth wave voltage mode control loop realizes stable control of the power stage circuit, the transient response acceleration module reduces undershoot and recovery time, and improves transient performance.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of circuits, and particularly relates to a two-phase sawtooth wave voltage mode PWM control circuit. BACKGROUND

[0002] With the development of 5G, AI artificial intelligence, blockchain, and big data technology, more and more electronic devices are connected to the Internet, and various data are exponentially growing. The massive data drive the data center to develop towards a super large scale. The supply voltage of the memory, CPU, GPU, and ASIC in the data center is about 1V, and the traditional data center power supply system architecture is 48 / 12 / 1V. In 2017, Google officially released a 48 / 1V single-stage power supply system architecture. In recent years, the system topologies related to 48V to 1V can be roughly divided into isolation topologies, resonant topologies, and hybrid topologies. The biggest drawback of the isolation topology is that a high-turn-ratio transformer is needed, and the bulky transformer occupies a large area on the PCB, affecting the power density of the system. At the same time, the resonant topology often needs to adjust the output through an auxiliary stage, requiring a two-stage structure. The non-isolated hybrid topology introduces flying capacitors and inductors, improving the overall efficiency of the system and increasing the power density.

[0003] At present, in the hybrid topology, the Double Step Down (DSD) architecture becomes a suitable candidate scheme due to the 2 times duty cycle improvement and 2 times equivalent frequency improvement, Figure 1 and Figure 2 are the DSD architecture and its steady-state waveform, respectively. However, when the load jumps, it is still a challenge to achieve a fast response with stable control. Because the DSD structure needs two-phase control signals that are 180 degrees apart and do not overlap, hysteresis control is obviously not suitable. The traditional PWM control has inherent cycle delay when the load jumps (if the load jump occurs after the PWM wave, it needs to wait for the next PWM wave to come before adjusting) and there is a risk of two-phase control overlap. An adaptive on-time (AO 2 T) control is proposed, but this control needs a complex mirror copying circuit and still needs a recovery time of up to 8.2us when the load jumps.

[0004] In summary, in the current 48V to 1V field, the reliable control loop for the DSD architecture still needs to be further improved, especially the loop that can quickly respond to the load when the load jumps still needs to be further explored. SUMMARY

[0005] The technical problems to be solved by the present application are to provide a two-phase sawtooth wave voltage mode PWM control circuit, to realize stable control of a power stage circuit, to adopt a transient response acceleration module for the inherent period delay of PWM control, to reduce the under-shoot and recovery time when the load jumps, and to improve the transient performance, so as to solve the technical problem that the load cannot be quickly responded when the DSD architecture jumps.

[0006] The present application adopts the following technical solutions:

[0007] The two-phase sawtooth wave voltage mode PWM control circuit comprises a resistance voltage division sampling power stage circuit, which is used to output a voltage to generate two voltage feedback signals, and is connected to a two-phase sawtooth wave voltage mode control loop and a transient response acceleration module, respectively. When the load jumps, the transient response acceleration module sends two-phase high-frequency pulse signals generated by the transient response acceleration module to the two-phase sawtooth wave voltage mode control loop, and the two-phase sawtooth wave voltage mode control loop generates duty cycle signals PWM1 and PWM2 through a dead zone control module and a driving module to generate gate control signals, respectively controlling the conduction and turn-off of the power tube in the resistance voltage division sampling power stage circuit.

[0008] Specifically, the two-phase sawtooth wave voltage mode control loop comprises an error amplifier EA and a two-phase sawtooth wave and clock signal generating circuit, the negative input terminal of the error amplifier EA is connected to the voltage feedback signal, and the positive input terminal is connected to the reference voltage, the output terminal of the error amplifier EA is connected to the negative input terminal of the first comparator and the second comparator, respectively, the positive input terminal of the first comparator and the second comparator is connected to the two-phase staggered sawtooth wave output by the two-phase sawtooth wave and clock signal generating circuit, the output terminal of the first comparator and one clock signal generated by the two-phase sawtooth wave and clock signal generating circuit are connected to the first AND gate through the first latch, the output terminal of the second comparator and the other clock signal generated by the two-phase sawtooth wave and clock signal generating circuit are connected to the second AND gate through the second latch, and the two signals generated by the transient response acceleration module are connected to the first AND gate and the second AND gate, respectively. The first AND gate generates a duty cycle signal PWM1 through the first inverter to output a signal S1, and the second AND gate outputs a signal S2, and the signal S1 and the signal S2 are output through an OR gate to output a duty cycle signal PWM2.

[0009] Further, the two-phase sawtooth wave and clock signal generating circuit includes a first D flip-flop, a second D flip-flop and a third D flip-flop, the signal OSC5 generated by the oscillator is sequentially connected to the first sawtooth wave generating circuit, the second sawtooth wave generating circuit, the first pulse reduction module and the second pulse reduction module through the second D flip-flop, the third D flip-flop and the first D flip-flop, the clock signal generated by the oscillator is divided into two-phase signals with a duty cycle of 50% through the first D flip-flop, and then two-phase sawtooth waves are generated through the first sawtooth wave generating circuit and the second sawtooth wave generating circuit, and two-phase clock signals are generated through the first pulse reduction module and the second pulse reduction module.

[0010] Further, the sawtooth wave generating circuit includes a transconductance amplifier, the positive input terminal of the transconductance amplifier is connected to a reference voltage, the negative input terminal of the transconductance amplifier is connected to a voltage feedback signal, the output terminal of the transconductance amplifier is connected to the gate of a field effect transistor NM1, the source of the field effect transistor NM1 is connected to the negative input terminal of the transconductance amplifier through a resistor R5, the drain of the field effect transistor NM1 is divided into two paths, one path is connected to the drain of a field effect transistor PM1, and the other path is connected to the gates of the field effect transistors PM1 and PM2, the source of the field effect transistor PM1 is connected to the source of the field effect transistor PM2, the drain of the field effect transistor PM2 is connected to the source of a field effect transistor PM3, the drain of the field effect transistor PM3 is divided into two paths, one path is connected to the ground through a capacitor C1, and the other path is connected to the drain of a field effect transistor NM2, the source of the field effect transistor NM2 is connected to the ground, and the gate of the field effect transistor NM2 is connected to the gate of the field effect transistor PM3 and an oscillator.

[0011] Specifically, the duty cycle signals PWM1 and PWM2 are two-phase symmetrical duty cycle signals.

[0012] Specifically, the transient response acceleration module includes an oscillator, the oscillator is connected to the second port of a selector MUX1 and the second port of a selector MUX2, the first port of the selector MUX1 is connected to the ground, the third port of the selector MUX1 outputs a high-frequency pulse signal through a second inverter, the first port of the selector MUX2 is connected to a voltage VDD, the third port of the selector MUX2 outputs another high-frequency pulse signal, the S terminals of the selectors MUX1 and MUX2 are respectively connected to the output terminal of a third comparator, the negative input terminal of the third comparator is connected to a voltage feedback signal, and the positive input terminal of the third comparator is connected to a reference voltage.

[0013] Further, in the steady state, the third comparator outputs a low potential, and the selectors MUX1 and MUX2 select the low potential and the high potential respectively; when the load jumps, the third comparator outputs a high potential, and the selectors MUX1 and MUX2 output high-frequency pulse beams, the transient response acceleration module outputs two-phase high-frequency pulse signals in opposite directions to control the turn-on and turn-off of the power transistor.

[0014] Specifically, the resistor divider sampling power stage circuit includes the power transistor S. HA Power transistor S HA The drain is connected to the input voltage V. IN Power transistor S HA The source stage is divided into two paths, one of which goes through the power transistor S. HB The drain and source are respectively connected to inductor L B One end and power transistor S LB The drain of the power transistor S LB The source is grounded; the other path is through capacitor C. fly Connect inductors L respectively A One end, and the power transistor S LA The drain of the power transistor S LA Source grounding, inductor L A The other end and inductor L B The other end is connected in parallel and then splits into four paths. The first path goes through capacitor C. OUT Grounded, the second path is through resistor R OUT The third path is grounded, and after passing through resistor R1, it splits into two paths: one path connects to the transient response acceleration module, and the second path is grounded through resistor R2; the fourth path is grounded through resistor R3, and after passing through resistor R3, it splits into two paths: one path connects to the two-phase sawtooth wave voltage mode control loop, and the other path is grounded through resistor R4.

[0015] Furthermore, the power transistor S HA and S LA Control signal and power transistor S HB and S LB The control signals are symmetrical to each other.

[0016] Furthermore, the power transistor S HA and S LA Control signal and power transistor S HB and S LB The control signals are 180 degrees out of phase.

[0017] Compared with the prior art, the present invention has at least the following beneficial effects:

[0018] This invention discloses a two-phase sawtooth wave voltage-mode PWM control circuit. It employs two interleaved sawtooth waves and the output signal of the same error amplifier, which are then passed through two comparators to generate two symmetrical PWM control signals. This achieves two-phase symmetrical control of the power stage circuit, avoiding the risk of simultaneous conduction of two high-side transistors and ensuring that the voltage across the flying capacitor is maintained at V. IN / 2, so as to equalize the two-way average inductance current. In view of the period delay problem inherent in the PWM control, a transient response acceleration module is proposed, the basic principle of which is to equivalently increase the switching frequency when the load jumps, so as to quickly control the turn-on and turn-off of the power tube in the power stage circuit, thereby achieving the purpose of quickly responding to the load jump; when the load jump occurs, the transient response acceleration module acts to generate two-phase opposite high-frequency pulse signals, which can be quickly turned on and turned off through the AND gate logic and the two-phase sawtooth wave PWM control loop, thereby reducing the undershoot and recovery time and improving the transient performance.

[0019] Further, the voltage feedback signal and the reference voltage generate an error amplification signal through an error amplifier, and the same error amplification signal and the two-phase staggered sawtooth waves generate two-phase symmetrical duty control signals through two comparators, so as to stably control the power tube in the power stage circuit. Meanwhile, the control loop can receive the signal generated by the transient response acceleration module through the AND gate, and when the load jump occurs, the transient response acceleration module generates two-phase high-frequency pulse signals to quickly control the turn-on and turn-off of the power tube, thereby achieving the purpose of quickly responding to the load change.

[0020] Further, the sawtooth wave module circuit controls the current flowing through the resistor R5 through a transconductance operational amplifier, replicates the current through the current mirror technology, controls the turn-on and turn-off of the switching tube PM3 and NM2 through the OSC2 signal, charges and discharges the capacitor C1, and thereby generates a single-phase sawtooth wave RAMP2. When the OCS2 is at a low potential, the switching tube PM3 is turned on and the switching tube NM2 is turned off, at this time the capacitor C1 is charged, and the RAMP2 waveform is a triangular wave rising edge; when the OCS2 is at a high potential, the switching tube PM3 is turned off and the switching tube NM2 is turned on, at this time the capacitor C1 is discharged, and the RAMP2 waveform is a triangular wave falling edge and maintains a low potential until the OSC2 becomes a low potential to start the next period.

[0021] Further, in the steady state of the system, the two-phase sawtooth wave voltage module PWM control loop generates two-phase duty symmetrical control signals PWM1 and PWM2, which can stably control the power tube in the power stage circuit and ensure that the two-way average inductance current of the power stage circuit is equal.

[0022] Further, the oscillator signal OSC5 sequentially passes through the second D flip-flop, the third D flip-flop and the first D flip-flop to generate two-phase opposite signals with a duty cycle of 50%, and the two-phase signals can generate two-phase clock signals through the pulse reduction module and two-phase staggered sawtooth waves through the sawtooth wave module circuit. The two-phase sawtooth waves generated by the scheme have a phase difference of 180°, and the single-phase sawtooth wave is at a low potential for half a cycle and is a triangular wave for the other half cycle. Such two-phase sawtooth waves ensure the generation of two-phase symmetrical duty signals.

[0023] Further, the output voltage of the voltage feedback sampling power stage circuit will decrease when the load jumps from light load to heavy load. When the output voltage decreases to a set voltage threshold, the comparator outputs high potential, at which time the two multiplexers select the output of high frequency pulse signal to quickly control the turn-on and turn-off of the power tube in the power stage circuit, realizing the fast response to the load.

[0024] Further, when the system is in steady state, the third comparator outputs low potential, and the selector MUX1 and the selector MUX2 select to output low potential and high potential respectively, at which time the transient response acceleration module signal will not affect the PWM control signal, and the system runs in steady state; when the load jumps, the third comparator outputs high potential, and the selector MUX1 and the selector MUX2 output high frequency pulse beams, and the transient response acceleration loop outputs two continuous and opposite high frequency pulse signals, controlling the turn-on and turn-off of the power tube, and the transient response acceleration module is faster than the PWM control loop, and can make timely adjustment to the load change.

[0025] Further, the power stage circuit adopts the combination of flying capacitor and two-phase Buck, and a capacitor is connected in series in the middle, and the drain end of the high side switch of phase B is connected to the source end of the high side switch of phase A instead of the input power supply, combining the advantages of switch capacitor and buck converter; by introducing a flying capacitor and two inductors, the benefits of 2 times of duty cycle increase can be brought, and the equivalent input voltage of each path is V IN / 2, and two paths are charged, which is equivalent to obtaining 2 times of frequency characteristics and turn-on time, thereby reducing the influence of delay; at the same time, the higher power supply voltage V IN causes the switching loss of high voltage tube to increase, while the flying capacitor in the DSD structure maintains V IN / 2, reducing the voltage stress of the device, allowing the use of small parasitic low voltage devices, and the inductor current can be automatically balanced, and the current ripple of the inductor is also reduced compared with the Buck.

[0026] Further, when the system is in steady state, the two-phase sawtooth wave voltage module PWM control loop generates two-phase duty cycle symmetric control signals PWM1 and PWM2, which, after the dead zone module and the driving module, generate power tube gate control signals, which can realize the stable control of the power tube of the power stage circuit, and ensure that the average inductor currents of the two paths of the power stage circuit are equal.

[0027] Further, when the system is in steady state, the control signals of the power tubes S HA and S LA are 180 degrees different from the control signals of the power tubes S HB and S LB , so that the two-phase duty cycles do not overlap, the two-phase inductors are interleaved in charging and discharging, and the flying capacitor maintains V IN / 2, the system can operate stably.

[0028] In conclusion, the application adopts two-phase staggered sawtooth waves and the same error amplifier output signal to generate two-phase symmetrical PWM control signals through two comparators, realizes two-phase symmetrical control of the power stage circuit, avoids the risk of simultaneous conduction of two-phase high-side tubes, and ensures that the voltage across the flying capacitor is maintained at V IN / 2, and achieves the purpose of equal two-way inductance current. In view of the period delay problem inherent in PWM control, a transient response acceleration module is proposed, the basic principle of which is to equivalently increase the switching frequency when the load jumps, quickly control the conduction and turn-off of the power tube in the power stage circuit, and achieve the purpose of quickly responding to load jump. When the load jump occurs, the transient response acceleration module acts, generates two-phase opposite high-frequency pulse signals, and through the AND gate logic, the two-phase sawtooth wave PWM control loop can quickly realize the conduction and turn-off of the power tube in the power stage circuit, reduce the undershoot and recovery time, and improve the transient performance.

[0029] The technical solutions of the application will be further described in detail below through the drawings and examples. BRIEF DESCRIPTION OF DRAWINGS

[0030] Figure 1 It is a double-buck converter topology graph;

[0031] Figure 2 It is a double-buck converter key waveform graph;

[0032] Figure 3 It is a double-buck converter system block diagram applying the two-phase sawtooth wave voltage mode PWM control circuit of the application;

[0033] Figure 4 It is a double-buck converter steady-state waveform graph applying the two-phase sawtooth wave voltage mode PWM control circuit of the application;

[0034] Figure 5 It is a double-buck converter transient waveform graph applying the two-phase sawtooth wave voltage mode PWM control circuit of the application;

[0035] Figure 6 It is a two-phase sawtooth wave voltage mode control loop graph of the two-phase sawtooth wave voltage mode PWM control circuit of the application;

[0036] Figure 7 It is a clock and sawtooth wave module circuit graph of the two-phase sawtooth wave voltage mode control loop of the application;

[0037] Figure 8 It is a transient response acceleration module circuit graph of the two-phase sawtooth wave voltage mode PWM control circuit of the application;

[0038] Figure 9For switching frequency 500kHz, load jumps from 10mA to 1A, the simulation graph of the under-shoot and recovery time with and without transient response acceleration module;

[0039] Figure 10 For the efficiency simulation curve of the dual-buck converter using the two-phase sawtooth wave voltage mode PWM control circuit of the application. DETAILED DESCRIPTION

[0040] The technical solutions in the embodiments of the application will be clearly and completely described below with reference to the drawings in the embodiments of the application. Obviously, the described embodiments are some of the embodiments of the application, rather than all the embodiments of the application. Based on the embodiments in the application, all other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the application.

[0041] In the description of the application, it should be understood that the terms "center", "longitudinal", "transverse", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "one side", "one end", "one edge" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only used to facilitate the description of the application and simplify the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the application. In addition, in the description of the application, unless otherwise specified and limited, the meaning of "a plurality of" is two or more.

[0042] In the description of the application, it should be noted that, unless otherwise specified and limited, the terms "mounting", "connection", "connection" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the communication inside two elements. For a person of ordinary skill in the art, the specific meaning of the above terms in the application can be understood according to the specific circumstances.

[0043] It should be understood that when used in the present specification and the appended claims, the terms "comprise" and "include" indicate the presence of described features, whole, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, whole, steps, operations, elements, components and / or sets thereof.

[0044] It is also to be understood that the terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting thereof. As used in the description of the application and the appended claims, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0045] It should be further understood that the term "and / or" as used in the specification and in the claims, if any, means any one of the associated listed items, or a combination of any of the associated listed items, and includes all possible combinations thereof.

[0046] The various structural diagrams according to the disclosed embodiments of the application are shown in the drawings. These diagrams are not drawn to scale, in which certain details are exaggerated for clarity of presentation and may be omitted. The shapes and relative sizes of the various regions, layers, and the relative positional relationship between them shown in the drawings are only exemplary, and in actuality, they may deviate due to manufacturing tolerances or technical limitations, and regions / layers with different shapes, sizes, and relative positions can be additionally designed by those skilled in the art according to actual needs.

[0047] The application provides a two-phase sawtooth wave voltage mode PWM control circuit, which realizes a two-phase sawtooth wave voltage mode control loop and a transient response acceleration module, and is realized through a 48V to 1V DC / DC converter.

[0048] Please refer to Figure 3 The two-phase sawtooth wave voltage mode PWM control circuit of the application comprises a resistance voltage division sampling power stage circuit, a dead zone control module, a driving module, a two-phase sawtooth wave voltage mode control loop and a transient response acceleration module; two voltage feedback signals obtained by output voltage of the resistance voltage division sampling power stage circuit are connected to the two-phase sawtooth wave voltage mode control loop and the transient response acceleration module respectively, when load jump occurs, the transient response acceleration module generates two-phase high-frequency pulse signals and sends them to the two-phase sawtooth wave voltage mode control loop, the two-phase sawtooth wave voltage mode control loop generates two-phase symmetrical duty cycle signals PWM1 and PWM2, which are sequentially connected to power tubes in the resistance voltage division sampling power stage circuit through the dead zone control module and the driving module, thereby realizing control of the resistance voltage division sampling power stage circuit.

[0049] The transient response acceleration module can solve the problem of inherent cycle delay of PWM control, and the acceleration principle is as follows:

[0050] When the load jumps, the switching frequency of the system is equivalent to being improved, and the change of the load is quickly responded;

[0051] When the load jump is detected, the transient response acceleration module acts, before the voltage loop PWM waveform comes, two continuous opposite high-frequency pulse signals are generated to control the on and off of two switch tubes, the two inductance currents are quickly staggered charging and discharging, the difference between the two inductance currents is reduced, and the under-shoot and recovery time is reduced.

[0052] Please refer to Figure 6 , the two-phase sawtooth wave voltage module control loop includes error amplifier EA and two-phase sawtooth wave and clock signal generating circuit, the negative input terminal of error amplifier EA is connected with voltage feedback signal VFB2, the positive input terminal is connected with reference voltage VREF2, the output terminal of error amplifier EA is connected with the negative input terminal of first comparator and second comparator respectively, the positive input terminal of first comparator and second comparator is connected with the output of two-phase sawtooth wave and clock signal generating circuit respectively, the output terminal of first comparator and the clock signal CLK1 generated by two-phase sawtooth wave and clock signal generating circuit generate output signal QN1 through first latch, output signal VTP1 of transient response acceleration module output signal QN1 outputs duty cycle signal PWM1 through first AND gate, the output terminal of second comparator and the clock signal CLK2 generated by two-phase sawtooth wave and clock signal generating circuit generate output signal QN2 through second latch, output signal QN2 and transient response acceleration module output signal VTP2 output signal S2 through second AND gate, PWM1 signal outputs signal S1 through first inverter, signal S1 and signal S2 output duty cycle signal PWM2 through OR gate, two-phase staggered sawtooth wave RAMP1 and RAMP2 generated by two-phase sawtooth wave and clock signal generating circuit and the same error amplifier EA output signal V ea Through the comparison of two comparators COMP, two-phase symmetrical duty cycle signals PWM1 and PWM2 are generated to control the two-phase circuit of DSD architecture respectively.

[0053] Among them, the generated two-phase symmetrical control signals avoid the risk of simultaneous conduction of two high-side tubes in traditional PWM control, and greatly reduce the complexity of the control loop compared with the mirror replication circuit.

[0054] Please refer to Figure 7 , the two-phase sawtooth wave and clock signal generating circuit includes first D flip-flop, second D flip-flop and third D flip-flop, the signal OSC5 generated by the oscillator is connected with first sawtooth wave generating circuit, second sawtooth wave generating circuit, first pulse reduction module and second pulse reduction module in turn through second D flip-flop, third D flip-flop and first D flip-flop respectively, the clock signal generated by the oscillator is divided into two-phase duty cycle signals OSC1 and OSC2 with 50% duty cycle through the first D flip-flop, then two-phase sawtooth waves RAMP1 and RAMP2 and two-phase clock signals CLK1 and CLK2 are generated through the corresponding sawtooth wave generating circuit and pulse reduction module.

[0055] The sawtooth wave generating circuit comprises a transconductance amplifier, the positive input of the transconductance amplifier is connected to a reference voltage VREF3, the negative input of the transconductance amplifier is connected to a voltage feedback signal VFB3, the output of the transconductance amplifier is connected to the gate of a field effect transistor NM1, the source of the field effect transistor NM1 is connected to the negative input of the transconductance amplifier through a resistor R5, the drain of the field effect transistor NM1 is divided into two paths, one path is connected to the drain of a field effect transistor PM1, the other path is connected to the gates of the field effect transistor PM1 and a field effect transistor PM2 respectively, the source of the field effect transistor PM1 is connected to the source of the field effect transistor PM2, the drain of the field effect transistor PM2 is connected to the source of a field effect transistor PM3, the drain of the field effect transistor PM3 is divided into two paths, one path is connected to the ground through a capacitor C1, the other path is connected to the drain of a field effect transistor NM2, the source of the field effect transistor NM2 is connected to the ground, the gate of the field effect transistor NM2 is connected to the gate of the field effect transistor PM3 to form an oscillator; the size of the capacitor charging current is controlled by a transconductance amplifier and a resistor, the conduction and turn-off of the field effect transistor PM3 and the field effect transistor NM2 are controlled by OSC1 and OSC2 signals, the charging and discharging of the capacitor C1 are realized, and thus a sawtooth wave signal is generated.

[0056] Please refer to Figure 8 The transient response acceleration module comprises an oscillator, a third comparator, a selector MUX1, a selector MUX2 and a second inverter, the oscillator is connected to the second port of the selector MUX1 and the selector MUX2 respectively, the first port of the selector MUX1 is connected to the ground, the third port of the selector MUX1 outputs a two-phase high-frequency pulse signal VTP1 through the second inverter, the first port of the selector MUX2 is connected to VDD, the third port of the selector MUX2 outputs a two-phase high-frequency pulse signal VTP1, the S end of the selector MUX1 and the selector MUX2 is connected to the output signal VCOMP3 generated by the output end of the third comparator, the negative input end of the third comparator is connected to a voltage feedback signal VFB1, and the positive input end of the third comparator is connected to a reference voltage VREF1; which is equivalent to increasing the equivalent switching frequency of the system in transient response, and the corresponding switching control signal is generated by sampling the change of the output voltage, without affecting the normal PWM control.

[0057] In the steady state, the output of the third comparator is low, the selectors MUX1 and MUX2 select the output of high and low potentials, the transient response acceleration module outputs two high potential signals, and then performs AND logic operation with the PWM control signal, without affecting the PWM waveform.

[0058] When the load jumps, the third comparator outputs high potential, the selector MUX1 and the selector MUX2 output high-frequency pulse beams, the transient response acceleration module outputs two continuous and opposite high-frequency pulse signals, the transient response acceleration module is faster than the voltage module PWM control loop, continuously and rapidly controls the power tube to turn on and turn off, realizes fast response to load transformation, and reduces the undershoot and recovery time. The user can change the valley value of the transient response undershoot by configuring different resistance voltage division ratios according to requirements, can change the switch tube frequency during the transient response by changing the oscillator frequency, and can change the conduction time of the switch tube during the transient response by selecting a pulse compression module added to the output signal end; the transient response acceleration module is also applicable to other DC / DC converters, and is particularly applicable to DC / DC converters requiring two control signals.

[0059] Please refer to Figure 3 , the resistance voltage division sampling power stage circuit comprises an input voltage V IN , the negative electrode of the input voltage V IN is grounded, and the positive electrode is connected to the drain of a power tube S HA , the source of the power tube S HA is divided into two paths, one path is connected to one end of an inductor L HB through the drain and the source of the power tube S B respectively, and the drain of the power tube S LB , and the source of the power tube S LB is grounded; the other path is connected to one end of an inductor L fly through a capacitor C A respectively, and the drain of the power tube S LA , and the source of the power tube S LA is grounded, the other end of the inductor L A and the other end of the inductor L B are connected in parallel and then divided into four paths, the first path is grounded through a capacitor C OUT , the second path is grounded through a resistor R OUT , the third path is divided into two paths through a resistor R1, one path is connected to a transient response acceleration module, and the second path is grounded through a resistor R2; the fourth path is divided into two paths through a resistor R3, one path is connected to a two-phase sawtooth voltage module control loop, and the other path is grounded through a resistor R4.

[0060] Please refer to Figure 4 , the power tubes S HA and S LA need a set of control signals, the power tubes S HB and S LBThe second group of control signals is needed, and the two groups of control signals need to be 180 degrees apart and symmetrical to each other. The application designs a two-phase sawtooth wave voltage mode PWM control method, adopts a two-phase period staggered sawtooth wave, and the two-phase sawtooth waves are 180 degrees apart. The two-phase PWM control signals with a phase difference of 180 degrees can be generated by comparing the error amplifier signal, the robust control of the DSD architecture is realized, the complex duty cycle replication circuit is not needed, and the error caused by the replication accuracy of the duty cycle replication circuit can be avoided.

[0061] Please refer to Figure 5 , including the comparison chart before and after the transient response acceleration module when the load jump occurs. When the load jump occurs before a PWM wave arrives, the system can immediately adjust the duty cycle to respond to the load change, which can reduce the undershoot and recovery time. However, when the load jump occurs after a PWM wave, the duty cycle adjustment needs to wait for a period until the next PWM wave arrives, and at this time the output voltage has a large undershoot, and the adjustment recovery time will also become very long. In view of the inherent delay problem of the PWM wave, the application designs a transient response acceleration module. When the output voltage is detected to be lower than the set voltage threshold, the transient acceleration loop generates two continuous opposite high-frequency pulse beams, as shown in Figure 5 , before the PWM control waveform arrives, the conduction and turn-off of the two power tubes are quickly controlled, so as to respond to the output load change in time, thereby reducing the undershoot and recovery time.

[0062] Please refer to Figure 9 , the load jump waveform diagram under a single-phase switching frequency of 500 kHz. The output voltage V OUT The steady-state ripple is 11.4 mV, which shows that the two-phase sawtooth wave voltage mode control loop can realize the robust control of the DSD architecture. When the load current changes from 10 mA to 1 A in 10 ns, the undershoot is 200 mV and the recovery time is 5.3 μs without the transient response acceleration module. After the transient response acceleration module is added, the undershoot is 102 mV and the recovery time is 1.6 μs, the undershoot is reduced by 49%, and the recovery time is reduced by 70%. After the transient response acceleration module is added, the difference between the two inductance currents is also much smaller than that without the transient response acceleration module. The inductance current matching and fast recovery matching can avoid the flying capacitor voltage V Cfly deviating from V IN / 2 being too large.

[0063] The simulation results show that the transient response acceleration module proposed accelerates the transient response speed, reduces the undershoot and recovery time.

[0064] Please refer to Figure 10The efficiency curve of the DSD converter has a peak efficiency of 92.7% at a switching frequency of 250 kHz, a peak efficiency of 90% at 500 kHz, a peak efficiency of 87.8% at a switching frequency of 750 kHz, and a peak efficiency of 86% at a switching frequency of 1000 kHz.

[0065] The two-phase sawtooth wave voltage mode control loop and the transient response acceleration module are suitable for other DC / DC converters requiring two control signals, can stably realize two-way PWM control, and users can configure the resistance ratio to change the turn-on voltage value of the transient response acceleration module. When the transient occurs, the pulse number frequency can be changed by configuring the frequency of the oscillator, and the width of the pulse number can be adjusted by adding the pulse reduction module. The proposed transient response acceleration module is suitable for various scenarios that require transient response speed.

[0066] To make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings herein can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art without creative labor on the basis of the embodiments in the present application belong to the scope of protection of the present application.

[0067] When the load jump occurs, the traditional PWM has the problem that the two duty cycles are simultaneously greater than 0.5, at which time the two-phase high-side tube has the risk of simultaneous conduction, which will cause Figure 1 V SWB The node voltage reaches 48V, so that S LB The power tube has the risk of being broken down. If the AO 2 T control scheme is used, the control signal of one phase is generated by sampling one inductor current, and the control signal of the other phase is generated by copying the delay circuit through a mirror circuit. This scheme has complex circuit design, is not conducive to improving the overall efficiency, and still needs a recovery time of 8.2us when the load jumps.

[0068] The two-phase sawtooth wave voltage mode control loop designed in the present application has the following advantages: in the steady state of the system, the two-phase interleaved sawtooth waves RAMP1 and RAMP2 and the same error amplifier output signal V eaThe two comparators are used for comparison respectively, two-phase symmetrical duty signals PWM1 and PWM2 are generated, and two-phase circuits of the DSD architecture are controlled respectively.

[0069] Because there is inherent cycle delay in the PWM control, when the load jump occurs after a PWM, the system needs to wait for the next PWM wave to arrive, and then the load change can be adjusted.

[0070] The transient response acceleration module designed in the application can cooperate with the two-phase sawtooth wave voltage mode control loop. When the load jump occurs, the output voltage will decrease, and when the output voltage decreases to the set voltage threshold, the comparator will generate a set signal, and the transient acceleration loop starts to work, and two continuous opposite high-frequency pulse signals are output to control the switching tube to respond to the load change in time. The transient response acceleration module is faster than the voltage control loop, and when the output voltage decreases to the set threshold, the generated pulse can control the power tube to turn on and off before the normal PWM wave arrives.

[0071] The two-phase sawtooth wave voltage mode PWM control of the application has an input voltage of 48V, an output voltage of 1V, a maximum load current of 1A, and a switching frequency range of 250-1000 kHz. At a switching frequency of 250 kHz, the peak efficiency is 92.7%, at a switching frequency of 500 kHz, the peak efficiency is 92%, at a switching frequency of 750 kHz, the peak efficiency is 87.8%, and at a switching frequency of 1000 kHz, the peak efficiency is 86%. After the transient response acceleration module is added, when the load jump occurs, the undershoot is reduced from 200mV to 108mV, and the undershoot is reduced by 49%; the recovery time is reduced from 5.3us to 1.6us, and the recovery time is reduced by 70%.

[0072] The two-phase sawtooth wave voltage mode control loop and the transient response acceleration module designed in the application are designed using a 0.18um BCD process and are simulated and verified.

[0073] The system input voltage is 48V, the output voltage is 1V, the maximum load current is 1A, and the switching frequency range is 250-1000 kHz.

[0074] At 250 kHz, 500 kHz, 750 kHz, 1000 kHz switching frequency, the peak efficiency of 92.7%, 92%, 87.8%, 86% is realized. After adding the transient response acceleration module, when the load jumps, the undershoot is reduced from 200 mV to 108 mV, and the undershoot is reduced by 49%; the recovery time is reduced from 5.3 mu s to 1.6 mu s, and the recovery time is reduced by 70%.

[0075] In summary, the two-phase sawtooth wave voltage mode PWM control circuit of the present application adopts the two-phase sawtooth wave voltage mode control loop of the present application, the system peak efficiency is higher, and the DSD architecture can be run stably. After adding the proposed transient response acceleration module, when the load jumps, the undershoot and recovery time are significantly reduced, greatly improving the transient performance. The user can configure the voltage divider resistance ratio to adjust the start-up voltage of the transient response acceleration circuit, and the pulse beam generated by the transient response acceleration module can configure the switching frequency and pulse width, greatly facilitating the user to use the transient response acceleration module in different environments. The transient response acceleration module is suitable for other DC / DC converters. Compared with the previous converter control method, the two-phase sawtooth wave PWM control loop and the transient response acceleration module proposed in the present application have great advantages in efficiency and transient performance.

[0076] The above is only to illustrate the technical idea of the present application, and cannot limit the protection scope of the present application. Any modification made according to the technical idea of the present application on the basis of the technical scheme falls within the protection scope of the claims of the present application.

Claims

1. A two-phase sawtooth voltage mode PWM control circuit, characterized by, The resistance voltage sampling power stage circuit is used for outputting two voltage feedback signals, and is connected with two-phase sawtooth wave voltage module control loops and a transient response acceleration module. When the load jump occurs, the transient response acceleration module sends two-phase high-frequency pulse signals to the two-phase sawtooth wave voltage module control loops, and the two-phase sawtooth wave voltage module control loops generate duty cycle signals PWM1 and PWM2 through a dead zone control module and a driving module to generate gate control signals to control the conduction and turn-off of power tubes in the resistance voltage sampling power stage circuit.

2. The two-phase sawtooth voltage mode PWM control circuit of claim 1, wherein, The two-phase sawtooth wave voltage module control loop comprises an error amplifier EA and a two-phase sawtooth wave and clock signal generating circuit. The negative input terminal of the error amplifier EA is connected with a voltage feedback signal, and the positive input terminal is connected with a reference voltage. The output terminal of the error amplifier EA is connected with the negative input terminal of a first comparator and a second comparator. The positive input terminals of the first comparator and the second comparator are connected with two-phase staggered sawtooth waves generated by the two-phase sawtooth wave and clock signal generating circuit. The output terminal of the first comparator and a clock signal generated by the two-phase sawtooth wave and clock signal generating circuit are connected with a first AND gate through a first latch. The output terminal of the second comparator and another clock signal generated by the two-phase sawtooth wave and clock signal generating circuit are connected with a second AND gate through a second latch. Two signals generated by the transient response acceleration module are connected with the first AND gate and the second AND gate. The duty cycle signal PWM1 generated by the first AND gate is output as a signal S1 through a first inverter. The second AND gate outputs a signal S2. The signal S1 and the signal S2 are output as a duty cycle signal PWM2 through an OR gate.

3. The two-phase sawtooth voltage mode PWM control circuit of claim 2, wherein, The two-phase sawtooth wave and clock signal generating circuit comprises a first D flip-flop, a second D flip-flop and a third D flip-flop. A signal OSC5 generated by an oscillator is sequentially connected with a first sawtooth wave generating circuit, a second sawtooth wave generating circuit, a first pulse reduction module and a second pulse reduction module through the second D flip-flop, the third D flip-flop and the first D flip-flop. The clock signal is divided into two-phase signals with a duty cycle of 50% through the first D flip-flop. Then, two-phase sawtooth waves are generated through the first sawtooth wave generating circuit and the second sawtooth wave generating circuit. Two-phase clock signals are generated through the first pulse reduction module and the second pulse reduction module.

4. The two-phase sawtooth voltage mode PWM control circuit of claim 3, wherein, The sawtooth wave generating circuit comprises a transconductance amplifier, the positive input of the transconductance amplifier is connected to a reference voltage, the negative input of the transconductance amplifier is connected to a voltage feedback signal, the output of the transconductance amplifier is connected to the gate of a field effect transistor NM1, the source of the field effect transistor NM1 is connected to the negative input of the transconductance amplifier through a resistor R5, the drain of the field effect transistor NM1 is divided into two paths, one path is connected to the drain of a field effect transistor PM1, the other path is connected to the gates of the field effect transistor PM1 and a field effect transistor PM2 respectively, the source of the field effect transistor PM1 is connected to the source of the field effect transistor PM2, the drain of the field effect transistor PM2 is connected to the source of a field effect transistor PM3, the drain of the field effect transistor PM3 is divided into two paths, one path is connected to the ground through a capacitor C1, the other path is connected to the drain of a field effect transistor NM2, the source of the field effect transistor NM2 is connected to the ground, the gate of the field effect transistor NM2 is connected to the gate of the field effect transistor PM3, and the gate of the field effect transistor PM3 is connected to an oscillator.

5. The two-phase sawtooth voltage mode PWM control circuit of claim 1, wherein, The duty cycle signals PWM1 and PWM2 are two symmetrical duty cycle signals.

6. The two-phase sawtooth voltage mode PWM control circuit of claim 1, wherein, The transient response acceleration module comprises an oscillator, the oscillator is connected to the second port of a selector MUX1 and the second port of a selector MUX2 respectively, the first port of the selector MUX1 is connected to the ground, the third port of the selector MUX1 outputs a high frequency pulse signal through a second inverter, the first port of the selector MUX2 is connected to VDD, the third port of the selector MUX2 outputs another high frequency pulse signal, the S port of the selector MUX1 and the S port of the selector MUX2 are connected to the output of a third comparator respectively, the negative input of the third comparator is connected to the voltage feedback signal, and the positive input of the third comparator is connected to the reference voltage.

7. The two-phase sawtooth voltage mode PWM control circuit of claim 6, wherein, In the steady state, the third comparator outputs a low voltage, and the selector MUX1 and the selector MUX2 output a low voltage and a high voltage respectively; when the load jumps, the third comparator outputs a high voltage, the selector MUX1 and the selector MUX2 output high frequency pulse beams, and the transient response acceleration module outputs two opposite high frequency pulse signals to control the turn-on and turn-off of the power transistor.

8. The two-phase sawtooth voltage mode PWM control circuit of claim 1, wherein, The resistance voltage sampling power stage circuit comprises a power transistor S HA , the drain of the power transistor S HA is connected to an input voltage V IN , the source of the power transistor S HA is divided into two paths, one path is connected to one end of an inductor L HB and the drain of the power transistor S B through the drain and the source of the power transistor S LB , and the source of the power transistor S LB is grounded; the other path is connected to the other end of the inductor L fly and the drain of the power transistor S A through a capacitor C LA , and the source of the power transistor S LA is grounded, the other end of the inductor L A and the other end of the inductor L B are connected in parallel and then divided into four paths, the first path is grounded through a capacitor C OUT , the second path is grounded through a resistor R OUT , the third path is divided into two paths after passing through a resistor R1, one path is connected to a transient response acceleration module, and the second path is grounded through a resistor R2; the fourth path is divided into two paths after passing through a resistor R3, one path is connected to a two-phase sawtooth voltage module control loop, and the other path is grounded through a resistor R4.

9. The two-phase sawtooth voltage mode PWM control circuit of claim 8, wherein, Power transistor S HA and S LA The control signals of power transistors S HB and S LB are mutually symmetrical.

10. The two-phase sawtooth voltage mode PWM control circuit of claim 8, wherein, Power transistor S HA and S LA The control signal of power transistor S HB and S LB is 180 degrees out of phase.

Images