Cmos image sensor package carrier, design method, and cleanliness improvement method

By designing a CMOS image sensor packaging carrier that adapts to various transportation and adsorption methods, the problem of frequent carrier replacement was solved, and the cleanliness and quality of the product were improved.

CN115332122BActive Publication Date: 2025-11-18CHANGCHUN CHANGGUANG YUANXIN INTEGRATED CIRCUIT CO LTD
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Patent Information

Application Number
CN202211012533.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-08-23
Publication Date
2025-11-18
Estimated Expiration
2042-08-23

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  • Figure CN115332122B_ABST
    Figure CN115332122B_ABST
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Abstract

The application provides a CMOS image sensor packaging carrier, a design method and a cleanliness improvement method, wherein the CMOS image sensor packaging carrier comprises a carrier body, a limiting structure arranged on the carrier body, the limiting structure being used for placing a CMOS image sensor, and the limiting structure enabling the CMOS image sensor to be adsorbed or clamped by a clamp, a conveying ear edge arranged on the carrier body, the conveying ear edge being used for being conveyed by a conveying belt, and a clamping groove arranged on the carrier body, the clamping groove being used for enabling the carrier body to be clamped. The CMOS image sensor packaging carrier adopting the technical scheme can adapt to various carrier conveying modes and adsorption modes of a process platform, reduces the degree of human participation during conversion between different process machines, reduces surface pollution of the CMOS image sensor, thereby improving the surface cleanliness of the CMOS image sensor product and improving the quality of the produced CMOS image sensor.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor manufacturing, in particular to a design method of a CMOS image sensor packaging carrier, a CMOS image sensor packaging carrier and a method for improving the cleanliness of a CMOS image sensor. BACKGROUND

[0002] The CMOS image sensor converts the light image on the photosensitive surface into an electrical signal in a proportional relationship with the light image by using the photoelectric conversion function of a photoelectric device. The CMOS image sensor has the characteristics of small size, light weight, high integration, high resolution, low power consumption, long service life and low price, and has been widely used in various industries.

[0003] As an optical device, the CMOS image sensor has higher cleanliness requirements than ordinary integrated circuits. The behavior of personnel is the main source of contamination in the clean room, and is an important factor affecting the product pass rate of the entire packaging process. It has an impact on the quality of the CMOS image sensor produced. In the packaging process of the CMOS image sensor, multiple workstations are involved, and the transportation methods and process platform fixation methods of different workstations are quite different. However, the existing carrier transportation structure and process platform limiting structure are relatively simple, and cannot adapt to the transportation methods and process platform adsorption methods of multiple workstations. Therefore, when switching between different process machines, the carrier needs to be frequently replaced, and the device needs to be picked up and placed manually multiple times, which requires a high degree of human involvement. SUMMARY

[0004] The purpose of the present application is to overcome the defects of the prior art, and to provide a CMOS image sensor packaging carrier that can adapt to multiple carrier transportation methods and process platform adsorption methods, reduce the degree of human involvement when switching between different process machines, and thus reduce the surface contamination of the CMOS image sensor, thereby improving the surface cleanliness of the CMOS image sensor product and improving the quality of the produced CMOS image sensor.

[0005] The present application also provides a design method of a CMOS image sensor packaging carrier and a method for improving the cleanliness of a CMOS image sensor.

[0006] To achieve the above-mentioned purpose, the present application adopts the following specific technical solutions:

[0007] In the first aspect, the present application provides a CMOS image sensor packaging carrier, in the second aspect, the present application provides a design method of a CMOS image sensor packaging carrier, and in the third aspect, the present application provides a method for improving the cleanliness of a CMOS image sensor.

[0008] The CMOS image sensor package carrier according to the embodiment of the first aspect of the present application comprises: a carrier main body; a limiting structure arranged on the carrier main body, the limiting structure being used for limiting the CMOS image sensor so that the CMOS image sensor is adsorbed or clamped; a conveying ear arranged on the carrier main body, the conveying ear being used for cooperating with a conveying belt to convey; and a clamping groove arranged on the carrier main body, the clamping groove being used for clamping the carrier main body.

[0009] The CMOS image sensor package carrier according to the embodiment of the present application can at least achieve the following beneficial effects: the conveying ear and the clamping groove enable the CMOS image sensor package carrier to adapt to various conveying modes, the limiting structure enables the CMOS image sensor to adapt to various adsorption modes and clamping modes of a process platform, when the CMOS image sensor package carrier can adapt to the adsorption or clamping mode of the process platform and the conveying mode, the CMOS image sensor package carrier can be directly applied to the process platform without artificial replacement of a device carrier. Therefore, the CMOS image sensor package carrier according to the embodiment of the present application can adapt to various carrier conveying modes and adsorption modes of the process platform, thereby reducing the degree of human participation in conversion between different process platforms, and further reducing the surface pollution of the CMOS image sensor and improving the quality of the produced CMOS image sensor.

[0010] According to some embodiments of the present application, the limiting structure comprises a boss limiting hole, the boss limiting hole being arranged on the carrier main body and being used for limiting the CMOS image sensor.

[0011] According to some embodiments of the present application, the limiting structure further comprises a positioning hole, the positioning hole being distributed along the circumference of the boss limiting hole and being used for positioning and avoiding the CMOS image sensor.

[0012] According to some embodiments of the present application, the carrier main body has an adsorption area, the adsorption area being used for being adsorbed by a sealing ring adsorption clamp, the boss limiting hole is formed in the adsorption area, the conveying ear is formed on both sides of the adsorption area, and the clamping groove is formed on one side of the conveying ear close to the adsorption area.

[0013] According to some embodiments of the present application, the conveying ear is provided with a conveying hole, the conveying hole is used for cooperating with the conveying belt to convey the CMOS image sensor package carrier.

[0014] According to some embodiments of the present application, the thickness of the conveying ear is less than or equal to the thickness of the clamping groove.

[0015] The design method of the CMOS image sensor package carrier according to the embodiment of the second aspect of the present application is used for designing the CMOS image sensor package carrier of the first aspect, and the design method of the CMOS image sensor package carrier comprises the following steps.

[0016] S100, acquiring a process capability range of a process machine and determining a size of a CMOS image sensor packaging carrier according to the process capability range of the process machine;

[0017] S200, determining sizes of a carrier body, a conveying ear edge and a clamping groove according to the process capability range of the process machine and the size of the CMOS image sensor packaging carrier;

[0018] S300, determining a size of a CMOS image sensor and determining a size of a limiting structure according to the size of the CMOS image sensor.

[0019] The design method of the CMOS image sensor packaging carrier according to the embodiment of the present application can at least achieve the following beneficial effects: the size of the CMOS image sensor packaging carrier applicable to all process machines is determined according to the capability range of all process machines, and the specific structure of the CMOS image sensor packaging carrier is determined according to the capability range of the process machine, the size of the CMOS image sensor packaging carrier and the size of the CMOS image sensor, so that the design method of the CMOS image sensor packaging carrier applicable to all process machines is designed. Since the CMOS image sensor packaging carrier designed by the design method of the CMOS image sensor packaging carrier according to the embodiment of the present application is applicable to all process machines, human intervention in the production process of the CMOS image sensor is greatly reduced or avoided, the surface contamination of the CMOS image sensor is reduced or avoided, and the quality of the produced CMOS image sensor is improved.

[0020] According to some embodiments of the present application, S100 includes: the maximum values of the process capability range of the carrier and the guide rail clamping the CMOS image sensor packaging carrier are X1, Y1, Z1 to X n , Y n , Z n , the minimum value of the maximum values of the process capability range is determined as X min , Y min , Z min , and X min , Y min , Z min are the outer contour sizes of the packaging carrier.

[0021] The method for improving the cleanliness of the CMOS image sensor according to the third aspect of the embodiment of the present application uses the CMOS image sensor packaging carrier according to the first aspect to convey the CMOS image sensor to different process machines.

[0022] According to the design method of the CMOS image sensor package carrier, the CMOS image sensor can be transported to different process machines using the CMOS image sensor package carrier of the first aspect, human intervention can be reduced or avoided, surface pollution of the CMOS image sensor can be reduced, and cleanliness of the CMOS image sensor can be improved.

[0023] Additional aspects and advantages of the present application will be described in the following description, become apparent from the following description, or be learned by practice of the present application. BRIEF DESCRIPTION OF DRAWINGS

[0024] The above and / or additional aspects and advantages of the present application will become apparent and be readily understood from the following description, taken in conjunction with the accompanying drawings, in which:

[0025] Figure 1 is a schematic view of a CMOS image sensor package carrier according to an embodiment of the present application;

[0026] Figure 2 is Figure 1 is a sectional view along line A-A;

[0027] Figure 3 is a flowchart of a design method of a CMOS image sensor package carrier according to an embodiment of the present application.

[0028] Reference numerals: carrier body 1, boss limiting hole 2, conveying ear edge 3, positioning hole 4, clamping groove 5, conveying hole 6. DETAILED DESCRIPTION

[0029] Hereinafter, embodiments of the present application will be described with reference to the accompanying drawings. In the following description, the same modules are denoted by the same reference numerals. In the case of the same reference numerals, their names and functions are also the same. Therefore, detailed descriptions thereof will not be repeated.

[0030] In order to make the objectives, technical solutions and advantages of the present application clearer, further detailed description will be made to the present application in combination with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, and do not constitute limitation to the present application.

[0031] In the description of the present application, one or more is meant to be one or more, more than two is meant to be two or more, greater than, less than, more than, etc. are understood to not include the number, above, below, etc. are understood to include the number. If it is described that the first, the second is only used for the purpose of distinguishing technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features or the sequence of indicated technical features.

[0032] In the description of the present application, the words such as arrangement, installation, connection and the like should be understood in a broad sense unless otherwise explicitly limited, and the skilled in the art can reasonably determine the specific meaning of the above words in the present application in combination with the specific content of the technical solution.

[0033] In a first aspect, the present application provides a CMOS image sensor packaging carrier, in a second aspect, the present application provides a design method of a CMOS image sensor packaging carrier, and in a third aspect, the present application provides a method for improving the cleanliness of a CMOS image sensor.

[0034] According to the CMOS image sensor packaging carrier of the first aspect of the present application, the carrier body 1 is provided with a limiting structure for placing the CMOS image sensor, and the limiting structure allows the CMOS image sensor to be adsorbed or clamped; a conveying ear edge 3 is provided on the carrier body 1, and the conveying ear edge 3 is used to cooperate with the conveying belt to realize the transmission of the CMOS image sensor; a clamping groove 5 is provided on the carrier body 1, and the clamping groove 5 is used to clamp the carrier body 1.

[0035] The conveying ear edge 3 and the clamping groove 5 allow the CMOS image sensor packaging carrier to adapt to various transportation modes, and the limiting structure allows the CMOS image sensor to adapt to various process platform adsorption modes and clamping modes. When the CMOS image sensor packaging carrier can adapt to the adsorption or clamping mode of the process platform and the transportation mode, the CMOS image sensor packaging carrier can be directly applied to the process machine, without the need for artificial replacement of the device carrier. Therefore, the CMOS image sensor packaging carrier of the present application can adapt to various carrier transportation modes and process platform adsorption modes, thereby reducing the degree of human involvement in the conversion of different process machines, and further reducing the surface contamination of the CMOS image sensor and improving the quality of the produced CMOS image sensor.

[0036] According to some embodiments of the present application, as shown in Figure 2 The limiting structure includes a boss limiting hole 2 opened on the carrier body 1, the boss limiting hole 2 is a through hole penetrating through the carrier body 1, the boss limiting hole 2 is used to limit the CMOS image sensor, the CMOS image sensor is placed in the boss limiting hole 2, and the CMOS image sensor is adsorbed in the boss limiting hole 2 from below the boss limiting hole 2.

[0037] The process platform adsorption mode mainly has the boss adsorption, the mechanical clamping and so on. The boss adsorption is a kind of vacuum adsorption. When the CMOS image sensor is placed in the boss limiting hole 2, the CMOS image sensor is protruded on the surface of the carrier main body 1, which is convenient for the CMOS image sensor to be mechanically clamped, and the CMOS image sensor is not blocked by other structures in the up-down direction, which is convenient for the CMOS image sensor to be adsorbed by the boss.

[0038] It should be noted that the size of the boss limiting hole 2 cannot be set arbitrarily, and the transmission ear edge, clamping groove and boss of the boss adsorption clamp on the CMOS image sensor packaging carrier need to be considered comprehensively.

[0039] According to some embodiments of the application, the CMOS image sensor packaging carrier is conveyed by a conveying belt to a process machine, and the assembly gap between the boss limiting hole 2 and the boss adsorption clamp must be greater than the conveying positioning accuracy of the conveying belt, which leads to the need for the boss of the boss adsorption clamp to be as small as possible when the size of the CMOS image sensor is fixed. The boss provides a heat source for heat conduction of the CMOS image sensor body, and needs to form a larger contact area with the CMOS image sensor, i.e. the boss size needs to be as large as possible. Therefore, the boss size of the boss adsorption clamp and the size of the boss limiting hole 2 need to be reasonably determined according to the positioning accuracy of the conveying belt and the actual situation under the premise of meeting the heating efficiency.

[0040] In some cases, the actually determined size of the boss limiting hole 2 is usually small and cannot place the CMOS image sensor. According to some embodiments of the application, as shown in Figure 2 The boss limiting hole 2 is a stepped hole, the large hole of the upper part of the boss limiting hole 2 is used for placing the CMOS image sensor, and the small hole of the boss limiting hole 2 is the actually determined size of the boss limiting hole 2. The small hole is used for cooperating with the boss of the boss adsorption clamp.

[0041] According to some embodiments of the application, as shown in Figure 1 The limiting structure further includes positioning holes 4, the number of the positioning holes 4 is four, which are distributed along the four corners of the boss limiting hole 2, and the positioning holes 4 are used for positioning and avoiding the CMOS image sensor. Since the shape of the CMOS image sensor is square, four positioning holes 4 are formed at the four corners of the boss limiting hole 2 to avoid bumping into the CMOS image sensor.

[0042] According to some embodiments of the application, the carrier main body has an adsorption area, and the adsorption area is used for being adsorbed by a sealed ring adsorption clamp.

[0043] The surface of the carrier body is a plane or an inclined plane, and the carrier body as a whole can be adsorbed by the sealing ring adsorption clamp. The area of the carrier body adsorbed by the sealing ring adsorption clamp is an adsorption area, and the size of the adsorption area can be determined according to the size of the sealing ring adsorption clamp. The sealing ring adsorption method is one of vacuum adsorption, and the edge of the adsorption area should not be provided with or as far as possible avoid being provided with other structures to avoid affecting the adsorption effect of the sealing ring adsorption.

[0044] According to some embodiments of the present application, as shown in Figure 1 The conveying lug 3 is arranged on one side or both sides of the carrier body 1, and the conveying lug 3 is provided with a conveying hole 6. The conveying hole 6 cooperates with the conveying belt to convey the CMOS image sensor packaging carrier. The position of the conveying hole 6 corresponds to the device stepping distance, mainly plays an auxiliary positioning role, and realizes stepping conveying with a fixed distance.

[0045] According to some embodiments of the present application, as shown in Figure 1 The clamping groove 5 is arranged on the carrier body 1, and the clamping groove 5 is located on the side of the conveying lug 3 close to the adsorption area. The clamping groove 5 is used for being clamped by a clamping structure. The clamping structure is an inherent structure of a machine table, so the position of the clamping groove is fixed and will not conflict with the conveying belt, but will limit the thickness of the conveying lug 3. The thickness of the conveying lug 3 must be less than or equal to the thickness of the clamping groove 5.

[0046] According to some embodiments of the present application, the conveying methods of the process machine table mainly include a conveying belt driving method and a clip clamping and translation method. The adsorption methods of the process machine table mainly include a sealing ring adsorption method, a boss adsorption method and a mechanical clamping method. The boss limiting hole 2 of the CMOS image sensor packaging carrier enables the CMOS image sensor packaging carrier to adapt to the boss adsorption and mechanical clamping. The adsorption area of the carrier body 1 enables the CMOS image sensor packaging carrier to adapt to the sealing ring adsorption. The conveying lug 3 enables the CMOS image sensor packaging carrier to adapt to the conveying belt conveying. The clamping groove 5 enables the CMOS image sensor packaging carrier to adapt to the clip clamping and translation.

[0047] The CMOS image sensor packaging carrier adopting the embodiments of the present application can adapt to various carrier conveying methods and adsorption methods of the process platform, reduce the degree of human participation when different process machines are converted, and further reduce the pollution of the surface of the CMOS image sensor, so as to improve the surface cleanliness of the CMOS image sensor product and improve the quality of the produced CMOS image sensor.

[0048] The design method of the CMOS image sensor packaging carrier according to the second aspect of the present application is used to design the CMOS image sensor packaging carrier of the first aspect, as shown in Figure 3 The design method of the CMOS image sensor packaging carrier includes:

[0049] S100: Obtain the process capability range of the process equipment and determine the size of the CMOS image sensor packaging carrier based on the process capability range of the process equipment.

[0050] The maximum process capability range of the stage and guide rails of the process equipment for holding the CMOS image sensor packaging carrier is defined as X1, Y1, Z1 to X. n Y n Z n Determine the minimum value within the maximum range of process capabilities as X. min Y min Z min and with X min Y min Z min This refers to the outer contour dimensions of the packaging carrier.

[0051] This section describes the process capability range of the CMOS image sensor packaging carrier held by the stage and guide rails of the statistical processing machine. It defines the maximum process capability in the X direction, the maximum process capability in the Y direction, and the maximum process capability in the Z direction. The maximum process capability range of the first processing machine is denoted as X1, Y1, Z1; the maximum process capability range of the second processing machine is denoted as X2, Y2, Z2; and so on, up to X... n Y n Z n Determine X1 to X n Minimum value X min Determine Y1 to Y n The minimum value Y min Determine Z1 to Z n The minimum value Z min ; with X min Y min Z min The outer contour dimensions of the packaging carrier are designed to make the packaging carrier suitable for all process equipment.

[0052] S200. Determine the dimensions of the carrier body, transfer lugs, and clamping slots based on the process capability range of the machine tool and the dimensions of the CMOS image sensor packaging carrier.

[0053] Based on the process capability range of the equipment and the size of the CMOS image sensor packaging carrier, the dimensions and specific structure of the carrier body, the conveying lugs, and the clamping slots are reasonably determined so that the CMOS image sensor packaging carrier can adapt to various transportation methods.

[0054] S300. Determine the size of the CMOS image sensor and determine the size of the limiting structure based on the size of the CMOS image sensor.

[0055] The size of the limiting structure is determined according to the size of the CMOS image sensor, so that the CMOS image sensor can be placed in the limiting structure and can be adsorbed or clamped.

[0056] The size of the CMOS image sensor packaging carrier is determined according to the capability range of all the process machines, and the specific structure of the CMOS image sensor packaging carrier is determined according to the capability range of the process machines, the size of the CMOS image sensor packaging carrier and the size of the CMOS image sensor, so that a design method of the CMOS image sensor packaging carrier applicable to all the process machines is designed. Since the CMOS image sensor packaging carrier designed by the design method of the CMOS image sensor packaging carrier according to the embodiment of the application can be applied to all the process machines, human intervention in the production process of the CMOS image sensor is greatly reduced or avoided, surface contamination of the CMOS image sensor is reduced or avoided, and the quality of the produced CMOS image sensor is improved.

[0057] The process machine is usually in an image recognition mode, the focusing range data of the relative carrier surface of different machine image recognition systems are collected, multiple reference system conversion calculations are performed, and finally the distance D between the lower surface of the conveying ear 3 and the upper surface of the assembled CMOS image sensor is obtained.

[0058] According to some embodiments of the application, the focusing surface distance of different process machines relative to the carrier is a1-a2, the conveying ear 3 lower surface distance b1-b2 of the CMOS image sensor packaging carrier is obtained according to a1-a2. The distance between the lower surface of the conveying ear 3 and the upper surface of the assembled CMOS image sensor is D, which needs to satisfy b1

[0059] It should be noted that the CMOS image sensor packaging carrier is conveyed to the process machine by the conveying belt, and the assembly gap between the convex limiting hole 2 and the convex adsorption clamp must be greater than the conveying positioning accuracy of the conveying belt, so the conveying ear 3 and the conveying hole 6 will affect the convex limiting hole 2. When D=(b1+b2) / 2 causes the size of the convex limiting hole 2 to be unable to be realized, D can be adjusted, but still needs to satisfy b1

[0060] The method for improving the cleanliness of the CMOS image sensor according to the third aspect of the embodiment of the application uses the CMOS image sensor packaging carrier according to the first aspect to convey the CMOS image sensor to different process machines.

[0061] Using the CMOS image sensor package carrier of the first aspect as above to transport the CMOS image sensor to different process machines can reduce or avoid human intervention, thereby reducing the surface contamination of the CMOS image sensor and improving the cleanliness of the CMOS image sensor.

[0062] In the description of the present specification, the description of the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" and the like means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any appropriate manner in any one or more embodiments or examples. Furthermore, different embodiments or examples described in the present specification and the features of different embodiments or examples can be combined and combined by those skilled in the art without contradiction.

[0063] Although the embodiments of the present application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present application, and those skilled in the art can make changes, modifications, replacements and variations to the above embodiments within the scope of the present application.

[0064] The specific embodiments of the present application described above do not constitute a limitation on the scope of protection of the present application. Any various other corresponding changes and modifications made in accordance with the technical concept of the present application shall be included in the scope of protection of the claims of the present application.

Claims

1. A CMOS image sensor packaging carrier, characterized in that, include: Vehicle body; A limiting structure is provided on the carrier body, the limiting structure is used to limit the CMOS image sensor, so that the CMOS image sensor can be attracted or clamped. A conveyor ear is disposed on the main body of the vehicle and is used to cooperate with the conveyor belt for transmission; the conveyor ear is provided with a conveying hole; A clamping groove is provided on the vehicle body, and the clamping groove is used to clamp the vehicle body; The limiting structure includes a boss limiting hole, which is formed in the carrier body and is used to limit the CMOS image sensor; the carrier body has an adsorption area, which is used to be adsorbed by a sealing ring adsorption clamp, the boss limiting hole is formed in the adsorption area, the conveying ear is formed on one or both sides of the adsorption area, and the clamping groove is formed on the side of the conveying ear close to the adsorption area.

2. The CMOS image sensor packaging carrier as described in claim 1, characterized in that, The limiting structure also includes positioning holes, which are distributed circumferentially along the boss limiting hole. The positioning holes are used to position and avoid the CMOS image sensor.

3. The CMOS image sensor packaging carrier as described in claim 1, characterized in that, The transmission port cooperates with the conveyor belt to transport the CMOS image sensor packaging carrier.

4. The CMOS image sensor packaging carrier as described in claim 1, characterized in that, The thickness of the conveying ear is less than or equal to the thickness of the clamping groove.

5. A design method for a CMOS image sensor packaging carrier, characterized in that, A method for designing a CMOS image sensor packaging carrier as described in any one of claims 1 to 4, the method comprising: S100: Obtain the process capability range of the process equipment and determine the size of the CMOS image sensor packaging carrier based on the process capability range of the process equipment. S200. Determine the dimensions of the carrier body, the transfer lug, and the clamping slot based on the process capability range of the process equipment and the dimensions of the CMOS image sensor packaging carrier. S300. Determine the size of the CMOS image sensor and determine the size of the limiting structure based on the size of the CMOS image sensor.

6. A method for improving the cleanliness of a CMOS image sensor, characterized in that, The CMOS image sensor is transported to different process equipment using the CMOS image sensor packaging carrier as described in any one of claims 1 to 4.

Citation Information

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