A switched capacitor converter

Abstract

The present invention discloses a switched capacitor converter, comprising switches S1 to S4, capacitors C2, C3, C4, diodes, D2, D3, an input terminal Vin, an output terminal Vout, and a ground terminal; one end of the switch S1 is connected to the input terminal Vin, the other end of the switch S1 is simultaneously connected to one end of the switch S2, one end of the capacitor C3, and the cathode of the diode D3, the other end of the capacitor C3 is simultaneously connected to the cathode of the diode D1 and the anode of the diode D2, the cathode of the diode D2 is simultaneously connected to the anode of the diode D3 and one end of the capacitor C4, the other end of the switch S2 is simultaneously connected to the output terminal Vout, one end of the switch S3, and one end of the capacitor C2, the other end of the switch S3 is simultaneously connected to one end of the switch S4, the anode of the diode D1, and the other end of the capacitor C4, and the other end of the switch S4 and the other end of the capacitor C2 are simultaneously connected to the ground terminal. The switched capacitor converter of the present invention has the characteristics of large transformation ratio, high power density, and low device stress.

Description

Technical Field

[0001] The present invention relates to the technical field of power supplies, and in particular to a switched capacitor converter. Background Art

[0002] Switched-capacitor converters are commonly used as power supplies for low-voltage, high-current loads such as CPUs, chipsets, and peripherals. Because they lack magnetic components, they reduce power loss and offer a large transformation ratio, high power density, and minimal component stress. Therefore, compared to traditional step-down converters, they can utilize lower-voltage switching transistors to achieve higher conversion efficiency. Furthermore, they offer a greater step-down ratio.

[0003] FIG1(a) is a schematic diagram of an embodiment of a circuit of a conventional switched capacitor converter, comprising a switch S1, a switch S2, a switch S3, a switch S4, a capacitor C1, a capacitor C2, an input terminal Vin, an output terminal Vout, and a ground terminal; one end of the switch S1 is connected to the input terminal Vin, the other end of the switch S1 is simultaneously connected to one end of the switch S2 and one end of the capacitor C1, the other end of the switch S2 is simultaneously connected to the output terminal Vout, one end of the switch S3, and one end of the capacitor C2, the other end of the switch S3 is simultaneously connected to one end of the switch S4 and the other end of the capacitor C1, and the switch S1 is connected to one end of the switch S2 and one end of the capacitor C2. The other end of the switch S4 is connected to the ground end and the other end of the capacitor C2 at the same time; the control ends of the switch S1, the switch S2, the switch S3 and the switch S4 are respectively used to input the drive signal G1, the drive signal G2, the drive signal G3 and the drive signal G4. When the drive signal G1, the drive signal G2, the drive signal G3 and the drive signal G4 are high, the switch S1, the switch S2, the switch S3 and the switch S4 are turned on; when the drive signal G1, the drive signal G2, the drive signal G3 and the drive signal G4 are low, the switch S1, the switch S2, the switch S3 and the switch S4 are turned off.

[0004] Figure 2 FIG1(a) is a timing diagram of the switched capacitor converter circuit. Switches S1, S2, S3, and S4 all operate at a 50% duty cycle. The driving waveforms of switches S1 and S3 are the same, the driving waveforms of switches S2 and S4 are the same, and the driving waveforms of switches S1 and S3 are complementary to the driving waveforms of switches S2 and S4.

[0005] Figure 1(b) shows the equivalent circuit diagram of Figure 1(a) when switches S1 and S3 are on. When switches S1 and S3 are on, capacitors C1 and C2 are connected to Vin for charging. The capacitances of capacitors C1 and C2 are designed to be the same, and the voltage at the output terminal Vout is 1 / 2 Vin. Figure 1(c) shows the equivalent circuit diagram of Figure 1(a) when switches S2 and S4 are on. When switches S2 and S4 are on, capacitors C1 and C2 discharge to Vout. Since the capacitances of capacitors C1 and C2 are designed to be the same, the voltage at the output terminal Vout is 1 / 2 Vin. Therefore, the step-down ratio of the switched capacitor converter in Figure 1(a) is only 2:1, and the voltage across capacitors C1 and C2 is 1 / 2 Vin. The charge and discharge inrush current is large, increasing device losses and shortening device life.

[0006] To achieve a larger ratio, the existing switched capacitor converter circuit needs to add switching devices and capacitors. The increase in switching devices increases the complexity of control and the cost of floating drive. For example, when achieving a 3:1 ratio, please refer to the circuit diagram of the conventional switched capacitor converter. Figure 3 , six MOS tubes are required, five of which are floating drivers. For the timing diagram, please refer to Figure 4 , the capacitors C1, C2, C3, and Co have the same values. Therefore, when the step-down ratio increases, more floating driver chips need to be sampled, and the increase in MOS tubes will increase the overall loss of the switched capacitor converter. Summary of the Invention

[0007] In view of this, the present invention proposes a switched capacitor converter, which at least to a certain extent solves one of the technical problems existing in the prior art.

[0008] In order to solve the above technical problems, the technical solution embodiments provided by the present invention are as follows:

[0009] A switched capacitor converter includes a switch tube S1, a switch tube S2, a switch tube S3, a switch tube S4, a capacitor C2, a capacitor C3, a capacitor C4, a diode D1, a diode D2, a diode D3, an input terminal Vin, an output terminal Vout, and a ground terminal;

[0010] One end of the switch tube S1 is connected to the input end Vin, the other end of the switch tube S1 is simultaneously connected to one end of the switch tube S2, one end of the capacitor C3, and the cathode of the diode D3, the other end of the capacitor C3 is simultaneously connected to the cathode of the diode D1 and the anode of the diode D2, the cathode of the diode D2 is simultaneously connected to the anode of the diode D3 and one end of the capacitor C4, the other end of the switch tube S2 is simultaneously connected to the output end Vout, one end of the switch tube S3, and one end of the capacitor C2, the other end of the switch tube S3 is simultaneously connected to one end of the switch tube S4, the anode of the diode D1, and the other end of the capacitor C4, the other end of the switch tube S4 and the other end of the capacitor C2 are simultaneously connected to the ground end;

[0011] When the switched capacitor converter is operating, the duty cycles of the switches S1, S2, S3, and S4 are all 50%, the driving waveforms of the switches S1 and S3 are the same, the driving waveforms of the switches S2 and S4 are the same, and the driving waveforms of the switches S1 and S3 are complementary to the driving waveforms of the switches S2 and S4.

[0012] Preferably, the switch tube S1 , the switch tube S2 , the switch tube S3 and the switch tube S4 are all MOS tubes.

[0013] Furthermore, when the switched capacitor converter is operating, a dead time is set between the driving waveforms of the switch tubes S1 and S3 and the driving waveforms of the switch tubes S2 and S4.

[0014] Furthermore, the switched capacitor converter further includes at least one extended switch module; the extended switch module includes: a capacitor C7_i, a diode D7_i, a diode D8_i, and a diode D9_i, where i is a natural number greater than or equal to 1; the cathode of the diode D7_i is connected to the other end of the switch tube S1, the anode of the diode D7_i and one end of the capacitor C7_i are connected together as the input end of the extended switch module, the other end of the capacitor C7_i is simultaneously connected to the cathode of the diode D8_i and the anode of the diode D9_i, the anode of the diode D8_i is connected to the other end of the switch tube S3, and the cathode of the diode D9_i serves as the output end of the extended switch module;

[0015] When there is one extended switch module, the input end of the extended switch module is connected to the cathode of the diode D2, and the output end of the extended switch module is connected to the connection point between the anode of the diode D3 and one end of the capacitor C4;

[0016] When there are two or more expansion switch modules, the input end of the first expansion switch module is connected to the cathode of the diode D2, the output end of the previous expansion switch module is connected to the input end of the next expansion switch module, and the output end of the last expansion switch module is connected to the connection point between the anode of the diode D3 and one end of the capacitor C4.

[0017] Furthermore, the switched capacitor converter also includes a diode D4, a diode D5, a diode D6 and a capacitor C6; the cathode of the diode D6 is connected to one end of the capacitor C2, the anode of the diode D6 is simultaneously connected to the cathode of the diode D5 and one end of the capacitor C6, the anode of the diode D5 is simultaneously connected to the other end of the capacitor C5 and the cathode of the diode D4, and the anode of the diode D4 and the other end of the capacitor C6 are simultaneously connected to the ground end.

[0018] Furthermore, the switched capacitor converter further includes a Buck circuit; the Buck circuit includes a switch tube S5, a switch tube S6, an inductor L1, and an output capacitor Co; the other end of the switch tube S5 is connected to one end of the switch tube S3, the other end of the switch tube S5 is simultaneously connected to one end of the switch tube S6 and one end of the inductor L1, the other end of the inductor L1 and one end of the output capacitor Co are simultaneously connected to the output terminal Vout, and the other end of the switch tube S6 and the other end of the output capacitor Co are simultaneously connected to the ground terminal;

[0019] When the switched capacitor converter is operating, the driving waveforms of the switch tube S5 and the switch tube S6 are complementary; when the switch tube S1 and the switch tube S3 are turned on, the switch tube S5 is turned off; when the switch tube S2 and the switch tube S4 are turned on, the switch tube S5 can be turned on.

[0020] Furthermore, when the switched capacitor converter is operating, the driving waveforms of the switch tube S5 and the switch tube S6 are provided with a dead time.

[0021] Furthermore, when the switched capacitor converter is operating, the duty cycles of the switch tubes S1 , S2 , S3 and S4 are determined by the duty cycle of the closed-loop regulation of the Buck circuit.

[0022] Furthermore, when the switched capacitor converter is operating, the on-time of the switch tube S2 and the switch tube S4 must be greater than or equal to the on-time of the switch tube S5.

[0023] Compared with the prior art, the present invention has the following beneficial effects:

[0024] (1) The switched capacitor converter provided by the embodiment of the present invention requires only four switching tubes in the circuit, so the control is simple and the loss of the switching tubes is reduced. At the same time, the reduction in the number of switching tubes reduces the number of driver chips, meeting the low-cost requirement.

[0025] (2) The switched capacitor converter provided in the embodiment of the present invention can achieve a step-down ratio of 3:1, 4:1, etc. by adding an extended switch module and / or a BUCK circuit, thereby increasing scalability.

[0026] (3) The voltage division of each capacitor in the switched capacitor converter provided by the embodiment of the present invention is reduced, the charging and discharging impact current of the capacitor is small, the voltage stress of the switch tube is reduced, the device loss is reduced, and the service life is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The following drawings describe the embodiments of the present invention so that the technical features and advantages of the present invention will become more clear:

[0028] FIG1( a ) is a circuit diagram of an embodiment of a switched capacitor converter in the prior art;

[0029] FIG1( b ) is an equivalent circuit diagram of FIG1( a ) when the switch tubes S1 and S3 are turned on;

[0030] FIG1(c) is an equivalent circuit diagram of FIG1(a) when the switch tubes S2 and S4 are turned on;

[0031] Figure 2 The timing diagram of the switched capacitor converter circuit in Figure 1(a) is shown;

[0032] Figure 3 A circuit diagram of another embodiment of a switched capacitor converter in the prior art;

[0033] Figure 4 for Figure 3 Timing diagram of the switched capacitor converter circuit;

[0034] FIG5( a ) is a circuit diagram of a switched capacitor converter according to a first embodiment of the present invention;

[0035] FIG5( b ) is an equivalent circuit diagram of FIG5( a ) when the switch tubes S1 and S3 are turned on;

[0036] FIG5(c) is an equivalent circuit diagram of FIG5(a) when the switch tubes S2 and S4 are turned on;

[0037] Figure 6 5(a) is a timing diagram of the switched capacitor converter circuit;

[0038] Figure 7 A circuit diagram of a switched capacitor converter according to a second embodiment of the present invention;

[0039] FIG8( a ) is a circuit diagram of a switched capacitor converter according to a third embodiment of the present invention;

[0040] FIG8( b ) is an equivalent circuit diagram of FIG8( a ) when the switch tubes S1 and S3 are turned on;

[0041] FIG8( c ) is an equivalent circuit diagram of FIG8( a ) when the switch tubes S2 and S4 are turned on;

[0042] Figure 9 8(a) is a timing diagram of the switched capacitor converter circuit;

[0043] Figure 10 1 is a circuit diagram of a switched capacitor converter according to a fourth embodiment of the present invention;

[0044] Figure 11 for Figure 10 Timing diagram of the switched-capacitor converter circuit. DETAILED DESCRIPTION

[0045] The present invention is described below based on examples, but the present invention is not limited to these examples, and the following examples are not intended to limit the scope of the present invention. Those skilled in the art can fully understand the present invention without the description of these details.

[0046] It should be noted that the terms "including" and "having" and any variations thereof described in the specification and claims of this application are intended to cover non-exclusive inclusions. For example, the inclusion of a series of components, unit circuits or control timings is not necessarily limited to those components, unit circuits or control timings clearly listed, but may include components, unit circuits or control timings that are not clearly listed or are inherent to these circuits.

[0047] In addition, the embodiments and features in the embodiments of the present application may be combined with each other unless there is any conflict.

[0048] It will be understood that, in the specification and the claims, when it is described that an element is “connected” to another element, the element can be “directly connected” to the other element.

[0049] Example 1

[0050] FIG5( a ) is a circuit diagram of a switched capacitor converter according to a first embodiment of the present invention. Referring to FIG5( a ), the switched capacitor converter includes a switch S1, a switch S2, a switch S3, a switch S4, a capacitor C2, a capacitor C3, a capacitor C4, a diode D1, a diode D2, a diode D3, an input terminal Vin, an output terminal Vout, and a ground terminal. One end of the switch S1 is connected to the input terminal Vin, the other end of the switch S1 is simultaneously connected to one end of the switch S2, one end of the capacitor C3, and the cathode of the diode D3. The other end of the capacitor C3 is simultaneously connected to the cathode of the diode D1 and the anode of the diode D2. The cathode of the diode D2 is simultaneously connected to the anode of the diode D3 and one end of the capacitor C4. The other end of the switch S2 is simultaneously connected to the output terminal Vout, the switch S1, and the output terminal Vout. One end of the switch S3 is connected to one end of the capacitor C2, and the other end of the switch S3 is simultaneously connected to one end of the switch S4, the anode of the diode D1 and the other end of the capacitor C4, and the other end of the switch S4 and the other end of the capacitor C2 are simultaneously connected to the ground end; the control ends of the switch S1, the switch S2, the switch S3 and the switch S4 are respectively used to input the drive signal G1, the drive signal G2, the drive signal G3 and the drive signal G4. When the drive signal G1, the drive signal G2, the drive signal G3 and the drive signal G4 are high, the switch S1, the switch S2, the switch S3 and the switch S4 are turned on; when the drive signal G1, the drive signal G2, the drive signal G3 and the drive signal G4 are low, the switch S1, the switch S2, the switch S3 and the switch S4 are turned off.

[0051] The switch transistors S1, S2, S3, and S4 can be, for example, MOS transistors, where the drain of the MOS transistor is one end of the switch transistor, the source of the MOS transistor is the other end of the switch transistor, and the gate of the MOS transistor is the control end of the switch transistor; or insulated gate bipolar transistors (IGBTs), bipolar junction transistors (bipolar transistors or BJTs), and other active controlled power semiconductors, and the terminal connection method corresponds to the terminal connection method of the MOS transistor. For those skilled in the art, it is possible to select which type of switch transistor to use as the switch transistors S1 to S4 of the present invention and configure the relevant terminals accordingly. The present invention does not limit the selection of the switch transistors S1 to S4.

[0052] Figure 6 FIG5(a) is a timing diagram of a switched capacitor converter circuit. Switches S1, S2, S3, and S4 all operate at a 50% duty cycle. The driving waveforms of switches S1 and S3 are identical, and the driving waveforms of switches S2 and S4 are identical. Furthermore, the driving waveforms of switches S1 and S3 complement the driving waveforms of switches S2 and S4, and a dead time is provided to avoid overlap.

[0053] Figure 5(b) is the equivalent circuit diagram of Figure 5(a) when the switch tubes S1 and S3 are turned on. When the switch tubes S1 and S3 are turned on, the loop formed by the input terminal Vin, the switch tube S1, the capacitor C3, the diode D2, the capacitor C4, the switch tube S3, the capacitor C2 and the ground terminal charges the capacitors C3, C4 and C2. The voltage at the output terminal Vout is 1 / 3*Vin, achieving a 3:1 voltage reduction.

[0054] Figure 5(c) is the equivalent circuit diagram of Figure 5(a) when the switch tubes S2 and S4 are turned on. When the switch tubes S2 and S4 are turned on: the ground terminal, the switch tube S4, the diode D1, the capacitor C3, the switch tube S2 and the output terminal Vout form a loop, and the capacitor C3 discharges the output terminal Vout; the ground terminal, the switch tube S4, the capacitor C3, the diode D3, the switch tube S2 and the output terminal Vout form a loop, and the capacitor C4 discharges the output terminal Vout; the ground terminal and the capacitor C2 form a loop, and the capacitor C2 discharges the output terminal Vout; at this time, the capacitors C3 and C4 are connected in parallel and then in series with the capacitor C2 to discharge the output terminal Vout. Since the capacitance values ​​of the capacitors C3, C4 and C5 are designed to be the same, a 3:1 voltage reduction is achieved.

[0055] The switching capacitor converter circuit of this embodiment has a step-down ratio of 3:1. Figure 3 The switched capacitor converter with a step-down ratio of 3:1 shown does not increase the number of switching tubes, has simple control, and has a small voltage divider among capacitors C2, C3, and C4, thereby reducing inrush current and loss.

[0056] Example 2

[0057] Figure 7 The circuit diagram of the switched capacitor converter according to the second embodiment of the present invention is shown in FIG. Figure 7 This embodiment adds at least one or more expanded switch modules based on the first embodiment. Each expanded switch module includes a capacitor C7_i, a diode D7_i, a diode D8_i, and a diode D9_i, where i is a natural number greater than or equal to 1. The cathode of diode D7_i is connected to the other end of switch S1, the anode of diode D7_i and one end of capacitor C7_i are connected together as the input end of the expanded switch module, the other end of capacitor C7_i is connected to both the cathode of diode D8_i and the anode of diode D9_i, the anode of diode D8_i is connected to the other end of switch S3, and the cathode of diode D9_i serves as the output end of the expanded switch module.

[0058] The connection relationship between the expansion switch modules in the first embodiment is:

[0059] When there is one extended switch module, the input end of the extended switch module is connected to the cathode of the diode D2, and the output end of the extended switch module is connected to the connection point between the anode of the diode D3 and one end of the capacitor C4;

[0060] When there are two or more expansion switch modules, the input end of the first expansion switch module is connected to the cathode of the diode D2, the output end of the previous expansion switch module is connected to the input end of the next expansion switch module, and the output end of the last expansion switch module is connected to the connection point between the anode of the diode D3 and one end of the capacitor C4.

[0061] In this embodiment, when the switch tubes S1 and S3 are turned on, a loop consisting of the input terminal Vin, the switch tube S1, the capacitor C3, the diode D2, the series circuit consisting of the capacitor C7_i and the diode D7_9 in each extended switch module, the capacitor C4, the switch tube S3, the capacitor C2, and the ground terminal charges the capacitor C3, the capacitors C7_i in each extended switch module, the capacitor C4, and the capacitor C2. The values ​​of the capacitors are the same, and the voltage at the output terminal Vout is 1 / (3+n)*Vin, where n is the number of extended switch modules and the value of n is a natural number greater than or equal to 1, achieving an (n+3):1 voltage reduction.

[0062] When switches S2 and S4 are turned on: the ground, switch S4, diode D1, capacitor C3, switch S2, and output Vout form a loop, and capacitor C3 discharges to output Vout; the ground, switch S4, diode D8_i, capacitor C7_i, diode D7_i, switch S2, and output Vout form a loop, and the number of loops is the same as the number of extended switch modules; the ground, switch S4, capacitor C3, diode D3, switch S2, and output Vout form a loop, and capacitor C4 discharges to output Vout; the ground and capacitor C2 form a loop, and capacitor C2 discharges to output Vout; at this time, capacitor C3, capacitor C7_i, and capacitor C4 are connected in parallel and then in series with capacitor C2 to discharge to output Vout. Since the values ​​of the capacitors are the same, an (n+3):1 voltage reduction is achieved.

[0063] From the above analysis, it can be seen that the step-down ratio of this embodiment is (n+3):1. It can be seen that this embodiment can achieve a large step-down ratio without increasing the number of switches, and the scalability of the converter is increased.

[0064] Example 3

[0065] FIG8( a ) is a circuit diagram of a switched capacitor converter according to a first embodiment of the present invention. Referring to FIG8( a ), a diode D4, a diode D5, a diode D6, and a capacitor C6 are added to the first embodiment. The cathode of the diode D6 is connected to one end of the capacitor C2, the anode of the diode D6 is connected to both the cathode of the diode D5 and one end of the capacitor C6, the anode of the diode D5 is connected to both the other end of the capacitor C2 and the cathode of the diode D4, and the anode of the diode D4 and the other end of the capacitor C6 are connected to ground.

[0066] Figure 9 FIG8(a) is a timing diagram of a switched capacitor converter circuit. Switches S1, S2, S3, and S4 all operate at a 50% duty cycle. The driving waveforms of switches S1 and S3 are identical, and the driving waveforms of switches S2 and S4 are identical. Furthermore, the driving waveforms of switches S1 and S3 complement the driving waveforms of switches S2 and S4, and a dead time is provided to avoid overlap.

[0067] Figure 8(b) is the equivalent circuit diagram of Figure 8(a) when the switch tubes S1 and S3 are turned on. When the switch tubes S1 and S3 are turned on, the loop formed by the input terminal Vin, the switch tube S1, the capacitor C3, the diode D2, the capacitor C4, the switch tube S3, the capacitor C2, the diode D6, the capacitor C6 and the ground terminal charges the capacitors C3, C4, C2 and C6. The values ​​of the capacitors are the same, and the voltage at the output terminal Vout is 1 / 2*Vin, achieving a 2:1 voltage step-down.

[0068] FIG8(c) is an equivalent circuit diagram of FIG8(a) when the switch tubes S2 and S4 are turned on. When the switch tubes S2 and S4 are turned on: the ground terminal, the switch tube S4, the diode D1, the capacitor C3, the switch tube S2 and the output terminal Vout form a loop, and the capacitor C3 discharges to the output terminal Vout; the ground terminal, the switch tube S4, the capacitor C3, the diode D3, the switch tube S2 and the output terminal Vout form a loop, and the capacitor C4 discharges to the output terminal Vout; the ground terminal, the diode D4 and the capacitor C2 form a loop, and the capacitor C2 discharges to the output terminal Vout; the ground terminal, the capacitor C6 and the diode D6 form a loop, and the capacitor C6 discharges to the output terminal Vout; at this time, the network formed by the parallel connection of the capacitors C3 and C4 and the network formed by the parallel connection of the capacitors C2 and C6 are connected in series to discharge to the output terminal Vout. Since the values ​​of the capacitors are the same, a 4:1 voltage reduction is achieved.

[0069] Example 4

[0070] Figure 10 This is a circuit diagram of a switched capacitor converter according to a fourth embodiment of the present invention. Figure 10This embodiment adds a Buck circuit to the third embodiment to achieve a higher voltage step-down ratio while maintaining a constant voltage at the output terminal Vout. The Buck circuit includes a switch S5, a switch S6, an inductor L1, and an output capacitor Co. The other end of switch S5 is connected to one end of switch S3, which is also connected to one end of switch S6 and one end of inductor L1. The other end of inductor L1 and one end of output capacitor Co are both connected to the output terminal Vout. The other end of switch S6 and the other end of output capacitor Co are both connected to ground. The control terminals of switches S5 and S6 are respectively used to input drive signals G5 and G6. When drive signals G5 and G6 are high, switches S5 and S6 are turned on. When drive signals G5 and G6 are low, switches S5 and S6 are turned off.

[0071] The values ​​of capacitors C3, C4, C5, and C6 are all the same. The value of capacitor Co is related to the load current I, the voltage ripple value of capacitor Co, and the duty cycle T of the Buck circuit. The calculation formula is C*V=I*T.

[0072] Figure 11 for Figure 10 Timing diagram of the switched capacitor converter circuit, where Vs is the voltage at the node where the other end of switch S2 and one end of switch S3 are connected, and Vout is the voltage at the output terminal Vout of the switched capacitor converter. Figure 11 The drive waveforms for switches S1 and S3 are identical, as are the drive waveforms for switches S2 and S4. These waveforms complement those of switches S2 and S4, with a dead time interval to prevent overlap. The drive waveforms for switches S5 and S6 complement each other, with a dead time interval to prevent overlap. The duty cycles of switches S1, S2, S3, and S4 are determined by the closed-loop regulation of the buck circuit. Therefore, switches S1, S2, S3, and S4 are not limited to a 50% duty cycle, enabling a wider range of output voltage regulation. The capacitor can be charged and discharged in a very short time, remaining in a hold state for the remainder of the time. The duty cycles of switches S1, S2, S3, and S4 are determined by the duty cycle regulation of the subsequent stage.

[0073] When the switch tubes S1 and S3 are turned on, Vs is 1 / 2*Vin. At this time, the switch tube S5 is not turned on, and the switch tube S6 is turned on. The inductor L1 continues to flow to provide energy for the output.

[0074] When the switches S2 and S4 are turned on, Vs is 1 / 4*Vin. The switch S5 can be turned on in this stage, and the inductor L1 is excited with 1 / 4*Vin. Vout is D(1 / 4*Vin), where D is the duty cycle of the switch S5. This achieves voltage reduction with various ratios, and Vout has a constant voltage output.

[0075] The on-time of switches S2 and S4 is determined by the on-time of switch S5. The on-time of switches S2 and S4 must be ≥ the on-time of switch S5, that is, Ton(S2, S4) ≥ Ton(S5). The duty cycles of switches S1, S2, S3, and S4 are determined by the duty cycle adjustment of the subsequent stage S5, which increases the adjustment range of D and, therefore, provides a wider output voltage range.

[0076] For example, when Vin is 48V and switches S1 and S3 are on, Vs is 24V. At this point, switch S5 is off, and switch S6 is on, allowing inductor L1 to freewheel and provide energy for the output. When switches S2 and S4 are on, Vs is 12V, and switch S5 can be turned on during this phase, allowing a higher-ratio step-down using 12V as the Buck input voltage. This converter extends the input voltage range, improves the step-down ratio, and provides a constant-voltage output.

[0077] The terms used in the above embodiments are illustrative and exemplary, rather than restrictive. Since the present invention can be embodied in various forms without departing from the spirit or essence of the invention, it should be understood that the above embodiments are not limited to any of the foregoing details, but should be interpreted broadly within the spirit and scope of the appended claims. Therefore, all changes and modifications that fall within the scope of the claims or their equivalents are intended to be covered by the appended claims.

Claims

1. A switched capacitor converter, characterized in that: It includes a switch tube S1, a switch tube S2, a switch tube S3, a switch tube S4, a capacitor C2, a capacitor C3, a capacitor C4, a diode D1, a diode D2, a diode D3, an input terminal Vin, an output terminal Vout and a ground terminal; One end of the switch tube S1 is connected to the input end Vin, the other end of the switch tube S1 is simultaneously connected to one end of the switch tube S2, one end of the capacitor C3, and the cathode of the diode D3, the other end of the capacitor C3 is simultaneously connected to the cathode of the diode D1 and the anode of the diode D2, the cathode of the diode D2 is simultaneously connected to the anode of the diode D3 and one end of the capacitor C4, the other end of the switch tube S2 is simultaneously connected to the output end Vout, one end of the switch tube S3, and one end of the capacitor C2, the other end of the switch tube S3 is simultaneously connected to one end of the switch tube S4, the anode of the diode D1, and the other end of the capacitor C4, the other end of the switch tube S4 and the other end of the capacitor C2 are simultaneously connected to the ground end; When the switched capacitor converter is operating, the duty cycles of the switches S1, S2, S3, and S4 are all 50%, the driving waveforms of the switches S1 and S3 are the same, the driving waveforms of the switches S2 and S4 are the same, and the driving waveforms of the switches S1 and S3 are complementary to the driving waveforms of the switches S2 and S4.

2. The switched capacitor converter according to claim 1, wherein: The switch tube S1 , the switch tube S2 , the switch tube S3 , and the switch tube S4 are all MOS tubes.

3. The switched capacitor converter according to claim 1, wherein: When the switched capacitor converter is in operation, a dead time is set between the driving waveforms of the switch tubes S1 and S3 and the driving waveforms of the switch tubes S2 and S4.

4. The switched capacitor converter according to claim 1, wherein: The switched capacitor converter further comprises at least one extended switch module; The extended switch module includes: a capacitor C7_i, a diode D7_i, a diode D8_i, and a diode D9_i, where i is a natural number greater than or equal to 1; The cathode of the diode D7_i is connected to the other end of the switch tube S1, the anode of the diode D7_i and one end of the capacitor C7_i are connected together as the input end of the extended switch module, the other end of the capacitor C7_i is connected to the cathode of the diode D8_i and the anode of the diode D9_i, the anode of the diode D8_i is connected to the other end of the switch tube S3, and the cathode of the diode D9_i serves as the output end of the extended switch module; When there is one extended switch module, the input end of the extended switch module is connected to the cathode of the diode D2, and the output end of the extended switch module is connected to the connection point between the anode of the diode D3 and one end of the capacitor C4; When there are two or more expansion switch modules, the input end of the first expansion switch module is connected to the cathode of the diode D2, the output end of the previous expansion switch module is connected to the input end of the next expansion switch module, and the output end of the last expansion switch module is connected to the connection point between the anode of the diode D3 and one end of the capacitor C4.

5. The switched capacitor converter according to claim 1, wherein: The switched capacitor converter further includes a diode D4, a diode D5, a diode D6, and a capacitor C6; the cathode of the diode D6 is connected to one end of the capacitor C2, the anode of the diode D6 is simultaneously connected to the cathode of the diode D5 and one end of the capacitor C6, the anode of the diode D5 is simultaneously connected to the other end of the capacitor C2 and the cathode of the diode D4, and the anode of the diode D4 and the other end of the capacitor C6 are simultaneously connected to the ground end.

6. The switched capacitor converter according to claim 1, 4 or 5, wherein: The switched capacitor converter further includes a Buck circuit; the Buck circuit includes a switch tube S5, a switch tube S6, an inductor L1, and an output capacitor Co; the other end of the switch tube S5 is connected to one end of the switch tube S3, the other end of the switch tube S5 is simultaneously connected to one end of the switch tube S6 and one end of the inductor L1, the other end of the inductor L1 and one end of the output capacitor Co are simultaneously connected to the output terminal Vout, and the other end of the switch tube S6 and the other end of the output capacitor Co are simultaneously connected to the ground terminal; When the switched capacitor converter is operating, the driving waveforms of the switch tube S5 and the switch tube S6 are complementary; when the switch tube S1 and the switch tube S3 are turned on, the switch tube S5 is turned off; when the switch tube S2 and the switch tube S4 are turned on, the switch tube S5 can be turned on.

7. The switched capacitor converter according to claim 6, wherein: When the switched capacitor converter is operating, the driving waveforms of the switch tube S5 and the switch tube S6 are provided with a dead time.

8. The switched capacitor converter according to claim 6, wherein: When the switched capacitor converter is operating, the duty cycles of the switch tubes S1 , S2 , S3 and S4 are determined by the duty cycle of the closed-loop regulation of the Buck circuit.

9. The switched capacitor converter according to claim 6, wherein: When the switched capacitor converter is operating, the on-time of the switch tube S2 and the switch tube S4 must be greater than or equal to the on-time of the switch tube S5.

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