A storage system based on an NVMe interface

By using an NVMe-based storage system, employing an NVMe controller module to manage the disk array, and utilizing a 10 Gigabit Ethernet network and a host switching module for task scheduling, the system addresses the 100TB-level storage requirements of the airborne data platform and achieves data security and integrity management.

CN115344200BActive Publication Date: 2026-02-10SHAANXI QIANSHAN AVIONICS
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Patent Information

Application Number
CN202210815090.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-07-11
Publication Date
2026-02-10
Estimated Expiration
2042-07-11

AI Technical Summary

Technical Problem

Existing technologies cannot meet the massive data storage needs of airborne data platforms, especially for storage and management at the 100TB level.

Method used

It adopts an NVMe-based storage system, manages the disk array through the NVMe master control module, realizes data interconnection through 10 Gigabit network, performs task scheduling in conjunction with the host switching module, and directly moves data to the virtualized disk array through remote DMA, supporting data storage and management at the hundreds of terabyte level.

Benefits of technology

It has achieved 100TB-level data storage and management for airborne data platforms, solved the problems of data file management and hot-swapping, and ensured the security and integrity of data under abnormal conditions.

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Abstract

The application provides a storage system based on an NVMe interface, comprising a data acquisition module, a host exchange module and an NVMe host control module; after the data acquisition module acquires data to be stored, the data acquisition module sends a data storage command to the host exchange module; the host exchange module sends a write command to the NVMe host control module according to the storage command; the NVMe host control module is mounted with an NVMe ssd disk array, the NVMe host control module determines a data write address according to the write command, and then sends a response signal back to the host exchange module; the host exchange module sends a write instruction to the data acquisition module according to the response signal, the data acquisition module sends the cached data to be stored to the NVMe host control module, and the NVMe host control module stores the data to be stored in a fixed logical sector in the NVMe ssd disk array storage area according to the write address. The application can realize virtualization management of disk space, and effectively solve the problems of data storage, management and application of an aviation airborne data application platform.
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Description

Technical Field

[0001] This invention relates to the field of avionics technology, and more specifically to a storage system based on the NVMe interface. Background Technology

[0002] In recent years, with the continuous upgrading of airborne data application platforms, the storage speed and capacity of existing technologies using NAND flash and SATA storage modules can no longer meet the needs of these platforms. Flight operations increasingly demand higher storage and processing capabilities for data application platforms, necessitating the adoption of terabyte-level data storage and management solutions. Therefore, current storage systems cannot meet the massive data storage requirements of aviation airborne data platforms. Summary of the Invention

[0003] In view of this, this application provides a storage system based on the NVMe interface. This system supports the storage of large amounts of airborne flight parameter data in the aviation field and realizes the array management of hundreds of terabytes of disks in an airborne embedded data application center. Data interconnection between the NVMe (Non-Volatile Memory express) main control module is achieved through a 10 Gigabit Ethernet network. The host switching module completes the task scheduling of the entire NVMe module. Data is directly moved from the data acquisition module to the memory space corresponding to the NVMe main control module via remote DMA, realizing the virtualization of the storage disk sequence and effectively solving the data storage, management, and application problems of the airborne data application platform.

[0004] This application provides the following technical solution: a storage system based on the NVMe interface, comprising: a data acquisition module, a host switching module, and an NVMe master control module;

[0005] The data acquisition module is connected to the host switching module and is used to acquire the data to be stored and then send a data storage command to the host switching module.

[0006] The host switching module is connected to the NVMe master control module and is used to receive the storage command and send a write command to the NVMe master control module according to the data type in the storage command.

[0007] The NVMe master control module is equipped with an NVMe SSD disk array. The NVMe master control module is connected to the data acquisition module and the host switching module respectively. After receiving the write command, the NVMe master control module determines the data write address according to the write command and then sends an acknowledgment signal back to the host switching module.

[0008] After receiving the response signal, the host switching module sends a write command to the data acquisition module to complete the task scheduling of the NVMe master control module; after receiving the write command, the data acquisition module sends the cached data to be stored to the NVMe master control module, and the NVMe master control module stores the data to be stored in a fixed logical sector in the storage area of ​​the NVMe SSD disk array according to the write address.

[0009] The data acquisition module, the host switching module, and the NVMe master control module communicate with each other via a 10 Gigabit Ethernet network.

[0010] Furthermore, the NVMe host control module includes a 10G Ethernet PCS / PMA module, an ARM core, a DMA module, a DDR3 module, and an NVMe_host module;

[0011] The 10G Ethernet PCS / PMA module is used to interact with the data acquisition module and the host switching module through the photoelectric conversion module;

[0012] The ARM core is used to parse the write commands sent by the host switching module. The DMA module is used to move the data to be stored sent by the data acquisition module to the corresponding data cache area of ​​NVMe. The ARM core is also used to notify the DMA module of the data moving time and moving location. The DDR module is used to perform data caching. The NVMe_host module is used to move the data in the DDR module to a fixed logical sector in the NVMe SSD disk array storage area.

[0013] Further, after receiving the write command, the NVMe master control module first identifies whether data is to be written to the current module. Upon confirming the write command for the current module, the NVMe master control module constructs a commit queue and a corresponding completion queue in memory, and writes the command to the tail of the commit queue. The master control terminal of the NVMe master control module updates the tail pointer of the commit queue and the DB register, notifying the NVMe SSD disk array to retrieve the new command. The NVMe SSD disk array queries the updated value of the DB register, retrieves the command from the head of the NVMe master control module's commit queue, and updates the head pointer of the commit queue internally in real time. The NVMe SSD disk array parses and executes the command, performing corresponding read and write operations. After completing an instruction, the NVMe SSD disk array encapsulates the execution result into a completion packet and writes it to the completion queue of the NVMe master control module. The SSD disk array sends an interrupt message to the NVMe master module to notify the NVMe master module that the command execution has been completed. After receiving the interrupt message, the NVMe master module parses the command completion packet in the completion queue and processes it. After processing, it releases the completion queue position and updates the completion queue head pointer DB register.

[0014] Furthermore, the write command sent by the host switching module to the NVMe master control module includes: the data type of the data, the virtual space to be written, and the logical sector to which it is mapped.

[0015] Furthermore, before sending the cached data to be stored to the NVMe master control module, the data acquisition module sends the data type of the data to be stored, the corresponding virtual space, and the logical sector of the corresponding virtual space to the host switching module.

[0016] Furthermore, it includes four NVMe master control modules, each of which is equipped with eight NVMe SSD disks, and each NVMe SSD disk has a storage capacity of 1600TB.

[0017] Furthermore, the host switching module adopts a switch module, which is based on SOC design and completes data distribution, packaging and transfer based on the standard ExFat file system.

[0018] Compared with the prior art, the beneficial effects that can be achieved by at least one of the above-mentioned technical solutions adopted in the embodiments of this specification include at least the following: the embodiments of this invention use an NVMe master control module to manage the disk array, use a 10 Gigabit Ethernet interconnection method to complete the data interconnection of the NVMe master control module, realize the virtualization management of disk space, complete the design of the host switching module based on SOC, realize the task scheduling from the data acquisition module to the NVMe master control module, determine the direction of data transmission according to the data type of the transmission, and finally directly move the data of the data acquisition module to the virtualized disk array through remote DMA, while solving the data file management problem and hot-swapping problem of airborne 100TB-level storage devices. Attached Figure Description

[0019] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a diagram of the virtualized storage system architecture according to an embodiment of the present invention;

[0021] Figure 2 This is the internal architecture of the NVMe master controller in this embodiment of the invention. Detailed Implementation

[0022] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0023] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The present invention will now be described in detail with reference to the accompanying drawings and embodiments, providing a clear and complete description of the technical solutions of the present invention. Obviously, the described embodiments are merely some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0024] like Figures 1-2 As shown, this embodiment of the invention provides a storage system based on an NVMe interface, including: a data acquisition module, a host switching module, and an NVMe master control module;

[0025] The data acquisition module is connected to the host switching module and is used to acquire the data to be stored and then send a data storage command to the host switching module.

[0026] The host switching module is connected to the NVMe master control module and is used to receive the storage command and send a write command to the NVMe master control module according to the data type in the storage command.

[0027] The host switching module is mainly used for task scheduling before data transfer. After receiving the data storage command sent by the data acquisition module, the module notifies the NVMe master control module that the data is about to be written, the data type, the virtual space to be written, and the specific logical sector to which it is mapped.

[0028] The NVMe master control module is equipped with an NVMe SSD disk array. The NVMe master control module is connected to the data acquisition module and the host switching module respectively. After receiving the write command, the NVMe master control module determines the data write address according to the write command and then sends an acknowledgment signal back to the host switching module.

[0029] After receiving the response signal, the host switching module sends a write command to the data acquisition module to complete the task scheduling of the NVMe master control module; after receiving the write command, the data acquisition module sends the cached data to be stored to the NVMe master control module, and the NVMe master control module stores the data to be stored in a fixed logical sector in the storage area of ​​the NVMe SSD disk array according to the write address.

[0030] Specifically, after receiving a write command from the host switching module, the NVMe master control module first identifies whether data is to be written to the current module. Upon confirming the write command, the NVMe master control module constructs an SQ (submission queue) and a corresponding CQ (completion queue) in its own memory and writes the command to the tail of the SQ. The master control terminal updates the SQ tail pointer and the DB register, notifying the SSD storage array to retrieve the new command. The SSD storage array queries the updated value of the DB, retrieves the command from the SQ header of the NVMe master control module, and updates the internal SQ header pointer in real time. The SSD storage array parses and executes the command, performing corresponding read and write operations. After completing an instruction, the SSD storage array encapsulates the execution result into a completion packet and writes it to the NVMe master control module's CQ. The SSD storage array sends an interrupt message corresponding to the acknowledgment information to the NVMe master control module, notifying it that the command execution is complete. Upon receiving the interrupt, the NVMe master control module parses the command completion packet in the CQ and processes it accordingly. After processing, the NVMe master control module releases the completion queue position and updates the CQ header pointer DB register.

[0031] The data acquisition module, the host switching module, and the NVMe master control module communicate with each other via a 10 Gigabit Ethernet network.

[0032] This invention employs an NVMe master control module to manage a 100TB-level disk array in an airborne embedded data application center through virtualized storage. Data interconnection between the NVMe master control modules is achieved via 10 Gigabit Ethernet, enabling the storage and distribution of airborne flight parameter data. A host switching module is designed based on a System-on-a-Chip (SoC) to schedule tasks from the data acquisition module to the NVMe master control module. The direction of data transmission is determined according to the data type, and data is ultimately moved directly from the data acquisition module to the virtualized disk array of the NVMe master control module via remote DMA. Each NVMe master control module is managed through namespaces, effectively ensuring data security and integrity under abnormal conditions.

[0033] In one specific implementation, the system platform supports the storage of large amounts of airborne flight parameter data in the aviation field, and realizes the array management of millions of TB-level disks in the aviation airborne embedded data application center through virtualized storage. Specifically, the system uses the NVMe protocol to manage the disk array. For the data acquisition module, each NVMe master module provides a virtual storage space, each virtual storage space being 128 TB in size. Typically, each embedded NVMe master module can mount eight NVMe interface storage disks, each NVMe storage disk supporting a storage capacity of 16 TB. The NVMe_host end is based on a V7 series Xilinx development board. This module completes the networking via 10 Gigabit Ethernet, which includes four networking modules for data storage. The four NVMe master modules correspond to four virtual storage spaces with a total size of 512 TB. Users can directly move data to the specific storage area of ​​each virtual space according to the data type. For users, four 128 TB virtual storage spaces constitute a 512 TB storage area that can be manipulated at will. Before sending data, the data acquisition module informs the host switching module of the data type, which virtual space the data is located in, and the specific logical sector of the corresponding virtual space. The four NVMe networking modules are networked through a 10 Gigabit Ethernet network, and the upstream data source can access any storage space through the 10 Gigabit Ethernet switch to complete data reading and writing.

[0034] Based on this hardware platform, massive amounts of data can be stored and managed. The entire data and task scheduling process is handled by the switch module, which is based on a SOC design and uses the standard ExFat file system for data distribution, packaging, and transfer. Each NVMe SSD uses a standard NVMe interface, allowing for easy data recovery by simply inserting it into a computer after it's full.

[0035] The system architecture of the entire system in this embodiment of the invention is as follows: Figure 1 As shown, the NVMe host storage unit of the airborne data application platform is designed as the main control terminal based on an embedded SOC platform. It controls the storage array through NVMe technology. The ARM in the embedded SOC platform completes data interaction with the data acquisition module and the host switching module through a 10 Gigabit Ethernet fiber optic interface. The NVMe main control module is interconnected through a 10 Gigabit Ethernet network. The host switching module completes the task scheduling of the entire NVMe module. Data is moved directly from the data acquisition module to the memory space corresponding to the NVMe main control module through remote DMA, realizing the virtualization of the storage disk sequence.

[0036] The internal workings of the entire NVMe controller module are as follows: Figure 2 As shown: The NVMe main control module mainly interacts with the data acquisition module and the host switching module. The entire NVMe main control module is designed and developed based on the SOC. It sends data to the photoelectric conversion module through the 10GEthernet PCS / PMA module, and then transmits it to the data acquisition module and the host switching module through optical fiber. The ARM core is used to parse the instructions sent by the host switching module. The DMA module moves the data sent by the data acquisition module to the corresponding data buffer area of ​​the NVMe. The ARM core is used to notify the DMA module when to move the data and the specific location of the move. The DDR3 module is used for data caching.

[0037] The operating mechanism of the entire module is as follows: Figure 2 As shown: After the data acquisition module acquires data, it transmits the information to the host switching module via optical fiber. The host switching module distributes instructions to the ARM core of the specific NVMe host controller according to the data type acquired. After receiving the instruction to send data, the ARM core informs the DMA controller of the initial address for writing data and then sends an acknowledgment signal to the host switching module, notifying the module that it is ready. After receiving the acknowledgment signal, the host switching module notifies the data acquisition module to start writing the data stream. At this time, the data acquisition module sends the data in the buffer to the optical fiber receiving data buffer area corresponding to the NVMe host controller through optical fiber. Then, after the DMA controller recognizes that there is data in the optical fiber receiving data buffer area, it begins to move the data to the DDR cache area corresponding to the NVMe data writing. Then, the NVMe_host module moves the data in DDR to the fixed logical sector in the NVMe SSD disk array storage area.

[0038] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A storage system based on an NVMe interface, characterized in that, include: Data acquisition module, host switching module, and NVMe main control module; The data acquisition module is connected to the host switching module and is used to send a data storage command to the host switching module after acquiring the data to be stored. The host switching module is connected to the NVMe master control module and is used to receive the storage command and send a write command to the NVMe master control module according to the data type in the storage command. The NVMe master control module is equipped with an NVMe SSD disk array. The NVMe master control module is connected to the data acquisition module and the host switching module respectively. After receiving the write command, the NVMe master control module determines the data write address according to the write command and then sends an acknowledgment signal back to the host switching module. After receiving the response signal, the host switching module sends a write command to the data acquisition module to complete the task scheduling of the NVMe master control module; after receiving the write command, the data acquisition module sends the cached data to be stored to the NVMe master control module, and the NVMe master control module stores the data to be stored in a fixed logical sector in the storage area of ​​the NVMe SSD disk array according to the write address. The data acquisition module, the host switching module, and the NVMe master control module communicate with each other via a 10 Gigabit Ethernet network. The NVMe host module includes a 10G Ethernet PCS / PMA module, an ARM core, a DMA module, a DDR module, and an NVMe_host module; The 10G Ethernet PCS / PMA module is used to interact with the data acquisition module and the host switching module through the photoelectric conversion module; The ARM core is used to parse the write commands sent by the host switching module, the DMA module is used to move the data to be stored sent by the data acquisition module to the corresponding data cache area of ​​NVMe, and the ARM core is also used to notify the DMA module of the data moving time and moving location; the DDR module is used to perform data caching, and the NVMe_host module is used to move the data in the DDR module to a fixed logical sector in the NVMe SSD disk array storage area; After receiving the write command, the NVMe master control module first identifies whether data is to be written to the current module. Upon confirming the write command, the NVMe master control module constructs a commit queue and a corresponding completion queue in memory and writes the command to the tail of the commit queue. The master control terminal of the NVMe master control module updates the tail pointer of the commit queue and the DB register, notifying the NVMe SSD disk array to retrieve the new command. The NVMe SSD disk array queries the updated value of the DB register, retrieves the command from the head of the NVMe master control module's commit queue, and updates the head pointer of the commit queue internally in real time. The NVMe SSD disk array parses and executes the command, performing corresponding read and write operations. After completing an instruction, the NVMe SSD disk array encapsulates the execution result into a completion packet and writes it to the completion queue of the NVMe master control module. The NVMe SSD disk array sends an interrupt message to the NVMe master control module, notifying it that the command execution is complete. Upon receiving the interrupt message, the NVMe master control module parses and processes the command completion packet in the completion queue. After processing, it releases the completion queue position and updates the DB register, the head pointer of the completion queue.

2. The storage system based on the NVMe interface according to claim 1, characterized in that, The write command sent by the host switching module to the NVMe master control module includes: the data type of the data, the virtual space to be written, and the logical sector to which it is mapped.

3. The storage system based on the NVMe interface according to claim 1, characterized in that, Before sending the cached data to be stored to the NVMe master control module, the data acquisition module sends the data type of the data to be stored, the corresponding virtual space, and the logical sector of the corresponding virtual space to the host switching module.

4. The storage system based on the NVMe interface according to claim 1, characterized in that, It includes four NVMe master control modules, each of which is equipped with eight NVMe SSD disks, and each NVMe SSD disk has a storage capacity of 1600TB.

5. The storage system based on the NVMe interface according to claim 1, characterized in that, The host switching module adopts a switch module, which is based on SOC design and uses the standard ExFat file system to complete data distribution, packaging and transfer.

Citation Information

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