Semiconductor structure and method of forming the same
By forming openings and discrete structures within the mask material layer of the semiconductor structure and using a harder material for patterning, the problem of the photolithographic pattern layer being prone to bending and falling is solved, thereby improving the performance and reliability of semiconductor devices and achieving high-precision pattern transfer.
Patent Information
- Application Number
- CN202110533845.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-05-14
- Publication Date
- 2025-11-18
- Estimated Expiration
- 2041-05-14
AI Technical Summary
Existing technologies have poor device performance and reliability when forming semiconductor structures, especially in advanced process nodes, where photolithographic pattern layers are prone to bending and falling, making it difficult to achieve high-precision pattern transfer.
Several openings are formed in the mask material layer of the first region, and a first mask structure is formed in each opening. Several independent second mask structures are formed on the second region. Higher hardness materials, such as silicon nitride and silicon oxide, are used. The mask structure is patterned by anisotropic etching process to reduce the risk of bending and collapse.
It improves the performance and reliability of semiconductor structures, ensures the accuracy and stability of pattern transfer, reduces the formation of mask structures with large aspect ratios, and improves the integration of semiconductor devices.
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Figure CN115346875B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and in particular to a semiconductor structure and a method for forming the same. Background Technology
[0002] With the continuous advancement of semiconductor integrated circuit manufacturing technology, performance is constantly improving, accompanied by the miniaturization and micro-miniaturization of devices. In increasingly advanced processes, the goal is to realize as many devices as possible within the smallest possible area.
[0003] In advanced process nodes, by employing shorter wavelength light sources and multiple patterning processes, smaller semiconductor structures with smaller critical dimensions are formed, enabling the integration of more devices in a smaller area, thereby improving the integration of semiconductor devices.
[0004] However, the performance of semiconductor devices still needs improvement. Summary of the Invention
[0005] The technical problem solved by this invention is to provide a semiconductor structure and a method for forming the same, so as to improve the performance of semiconductor devices.
[0006] To solve the above-mentioned technical problems, the present invention provides a method for forming a semiconductor structure, comprising: providing a layer to be etched, the layer to be etched comprising a first region and a second region; forming a first mask material layer on the layer to be etched; forming a plurality of openings in the first mask material layer on the first region; forming a first mask structure in each opening, and forming a plurality of mutually discrete second mask structures on the first mask material layer on the second region; and patterning the first mask material layer and the layer to be etched according to the first mask structure and the second mask structure.
[0007] Optionally, the material of the first mask structure includes silicon or germanium.
[0008] Optionally, the method of forming a first mask structure within each opening and forming a plurality of mutually discrete second mask structures on a first mask material layer in the second region includes: forming a plurality of mutually discrete first sacrificial structures on a first mask material layer in the second region before forming the opening; forming a second mask material film on the surfaces of the first sacrificial structures and the first mask material layer; forming a third mask material layer within the opening and on the surface of the second mask material film after forming the opening, the third mask material layer being higher than or flush with the top surface of the first sacrificial structure; etching the first sacrificial structure and the third mask material layer until the surface of the first mask material layer is exposed to form the first mask structure; and after forming the first mask structure, using an anisotropic etching process to remove the second mask material film on the surface of the first mask material layer to form the second mask structure.
[0009] Optionally, the material of the third mask material layer is the same as the material of the first sacrificial structure, and the material of the third mask material layer is different from the material of the second mask material film.
[0010] Optionally, the formation process of the first sacrificial structure includes a multi-patterning process.
[0011] Optionally, the method of forming a plurality of openings in the first mask material layer on the first region includes: forming an opening mask layer on the second mask material film, the opening mask layer exposing the second mask material film on the first region; using the opening mask layer as a mask, etching the second mask material film and the first mask material layer to form the openings.
[0012] Optionally, the method of patterning the first mask material layer and the layer to be etched according to the first mask structure and the second mask structure includes: etching the first mask material layer with the second mask structure as a mask until the surface of the layer to be etched is exposed, and forming a plurality of mutually independent third mask structures on the second region.
[0013] Optionally, the first mask material layer includes: a lower first mask material layer and an upper first mask material layer located on the surface of the lower first mask material layer. The material of the lower first mask material layer includes silicon nitride. The opening is located inside the upper first mask material layer, and the bottom of the opening exposes the lower first mask material layer.
[0014] Optionally, the method for patterning the first mask material layer and the layer to be etched based on the first mask structure and the second mask structure further includes: simultaneously etching the first mask material layer using the second mask structure as a mask, and also etching the first mask material layer using the first mask structure as a mask, thereby forming a fourth mask structure between the first mask structure and the layer to be etched.
[0015] Optionally, the layer to be etched includes: a substrate and a second sacrificial material layer located on the substrate.
[0016] Optionally, the method for patterning the first mask material layer and the layer to be etched according to the first mask structure and the second mask structure further includes: etching the second sacrificial material layer using the first mask structure and the third mask structure as masks, forming a plurality of mutually independent second sacrificial structures in the first region, and forming a plurality of mutually independent third sacrificial structures in the second region.
[0017] Optionally, the method of patterning the first mask material layer and the layer to be etched according to the first mask structure and the second mask structure further includes: forming a first sidewall on the sidewall of the second sacrificial structure, and forming a second sidewall on the sidewall of the third sacrificial structure; after forming the first sidewall and the second sidewall, removing the second sacrificial structure and the third sacrificial structure; after removing the second sacrificial structure and the third sacrificial structure, patterning the substrate of the first region with the first sidewall, and patterning the substrate of the second region with the second sidewall, forming a plurality of mutually discrete first fins in the first region, and forming a plurality of mutually discrete second fins in the second region.
[0018] Optionally, the layer to be etched further includes a second mask material layer located between the substrate and the second sacrificial material layer.
[0019] Optionally, the method of patterning the substrate of the first region with the first sidewall and the substrate of the second region with the second sidewall includes: etching a second mask material layer of the first region using the first sidewall as a mask, and etching a second mask material layer of the second region using the second sidewall as a mask until the substrate surface is exposed, forming a plurality of mutually discrete first fin mask structures in the first region and a plurality of mutually discrete second fin mask structures in the second region; etching the substrate of the first region using the first fin mask structure as a mask, and etching the substrate of the second region using the second fin mask structure as a mask to form the first fin and the second fin.
[0020] Accordingly, the present invention also provides a semiconductor structure formed by the above method, comprising: a layer to be etched, the layer to be etched comprising a first region and a second region, and the layer to be etched comprising a substrate, a second mask material layer located on the substrate, and a second sacrificial material layer located on the second mask material layer; a first mask material layer located on the layer to be etched; a plurality of openings in the first mask material layer located on the first region; a first mask structure located in each opening; and a plurality of mutually discrete second mask structures on the first mask material layer located on the second region.
[0021] Accordingly, the technical solution of the present invention also provides another semiconductor structure formed by the above method, comprising: a substrate, the substrate comprising a first region and a second region, the substrate in the first region having a plurality of mutually discrete first fins, the substrate in the second region having a plurality of mutually discrete second fins, and the spacing between the sidewalls of adjacent first fins being smaller than the spacing between the sidewalls of adjacent second fins; a first fin mask structure located on the first fins; and a second fin mask structure located on the second fins.
[0022] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:
[0023] In the semiconductor structure formation method provided by the present invention, since a plurality of openings are formed within the first mask material layer on the first region, and a first mask structure is formed within each opening, it is not necessary to form a mask structure with a large aspect ratio to transfer the pattern during the pattern transfer process of forming the first mask structure. Therefore, the risk of bending, deformation, or collapse of the first mask structure is reduced, the morphology of the first mask structure is improved, and pattern transfer to the layer to be etched is better achieved, thereby improving the performance and reliability of the formed semiconductor structure. Furthermore, by forming the first mask structure within the openings, the material selection for the first mask structure is highly flexible. Therefore, by using a harder mask material as the material for the first mask structure, pattern transfer to the layer to be etched can also be better achieved, thereby improving the performance and reliability of the formed semiconductor structure. Attached Figure Description
[0024] Figures 1 to 3 This is a cross-sectional structural diagram of each step in a semiconductor structure formation method.
[0025] Figures 4 to 15 This is a cross-sectional structural schematic diagram of each step in a method for forming a semiconductor structure according to an embodiment of the present invention. Detailed Implementation
[0026] As described in the background section, the performance and reliability of existing semiconductor structures still need to be improved. The following analysis and explanation will be provided in conjunction with specific embodiments.
[0027] Figures 1 to 3 This is a cross-sectional schematic diagram of the various steps in a semiconductor structure formation method.
[0028] Please refer to Figure 1 A layer 100 to be etched is provided, the layer 100 to be etched includes a first region I and a second region II.
[0029] Please continue to refer to this. Figure 1 A first sacrificial material layer 110 is formed on the layer to be etched 100.
[0030] Please continue to refer to this. Figure 1 Several mutually independent first mask structures 120 are formed on the first sacrificial material layer 110 in the first region I.
[0031] Please refer to Figure 2After forming the first mask structure 120, a second mask patterning layer (not shown) is formed on the first sacrificial material layer 110. The second mask patterning layer includes a second mask material layer and a photolithographic pattern layer on the surface of the second mask material layer located in the second region II. The second mask material layer is etched using the photolithographic pattern layer as a mask until the surface of the first sacrificial material layer 110 is exposed, and a second mask structure 130 is formed in the second region II.
[0032] By forming a first mask structure 120 in the first region I and a second mask structure 130 in the second region II, different patterns are transmitted to the first region I and the second region II respectively. Thus, device structures with different sizes or different spacings can be formed in the first region I and the second region II according to design requirements.
[0033] Please refer to Figure 3 Using the first mask structure 120 and the second mask structure 130 as masks, the first sacrificial material layer 110 is etched until the surface of the layer to be etched 100 is exposed, forming the first sacrificial layer 121 on the first region I and the second sacrificial layer 131 on the second region II.
[0034] The first sacrificial layer 121 and the second sacrificial layer 131 serve as core structures for multiple patterning processes, enabling the transfer of patterns with smaller critical dimensions to the layer to be etched 100, thereby improving the integration of the semiconductor structure.
[0035] However, in the above method, in order to ensure the accuracy of the photolithographic pattern layer, the formed second mask structure 130 is prone to bending and falling, resulting in poor morphology of the formed second sacrificial layer 131 or difficulty in transferring the pattern to form the second sacrificial layer 131, resulting in poor performance and reliability of the formed semiconductor structure.
[0036] Specifically, on the one hand, to avoid the pattern morphology of the photolithographic pattern layer being affected by the already formed first mask structure 120, the surface of the second mask material layer needs to be higher than the top surface of the first mask structure 120. Therefore, in advanced process nodes, i.e., process nodes that require the formation of patterns with smaller critical dimensions, the formed second mask structure 130 tends to have a large aspect ratio, making it prone to bending and collapse. On the other hand, due to the limitations of the photolithography process for forming the photolithographic pattern layer in advanced process nodes, and the need to form the photolithographic pattern layer on a relatively flat surface, the material of the second mask material layer is limited. Spin-coated organic carbon (SOC) is typically used as the material for the second mask material layer. Since spin-coated organic carbon (SOC) has low hardness, this further exacerbates the risk of the second mask structure 130 bending and collapsing.
[0037] To address the aforementioned technical problem, embodiments of the present invention provide a semiconductor structure and a method for forming the same. By forming a plurality of openings in a first mask material layer on a first region, and forming a first mask structure in each opening, and forming a plurality of mutually discrete second mask structures on a first mask material layer on a second region, the formed semiconductor structure can be improved.
[0038] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
[0039] It should be noted that the term "surface" in this specification is used to describe the relative spatial relationship and is not limited to whether there is direct contact.
[0040] Figures 4 to 15 This is a cross-sectional structural schematic diagram of each step in a method for forming a semiconductor structure according to an embodiment of the present invention.
[0041] Please refer to Figure 4 A layer 200 to be etched is provided, the layer 200 to be etched includes a first region I and a second region II.
[0042] In this embodiment, the etchable layer 200 includes a substrate 201 and a second sacrificial material layer 220 located on the substrate 201.
[0043] The substrate 201 is made of semiconductor materials.
[0044] In this embodiment, the substrate 201 is made of silicon.
[0045] In other embodiments, the substrate material includes silicon carbide, silicon germanium, a multi-element semiconductor material composed of group III-V elements, silicon-on-insulator (SOI), or germanium-on-insulator (GOI), etc. The multi-element semiconductor material composed of group III-V elements includes InP, GaAs, GaP, InAs, InSb, InGaAs, or InGaAsP, etc.
[0046] In this embodiment, the substrate 201 of the first region I has a fin epitaxial layer 202, and the material of the fin epitaxial layer 202 is different from the material of the substrate 201, so that different types of devices can be formed in the first region I and the second region II.
[0047] In this embodiment, the material of the fin epitaxial layer 202 includes silicon and germanium. Region I is used to form a P-type device, and Region II is used to form an N-type device.
[0048] In other embodiments, the substrate of the second region has a fin epitaxial layer made of a different material than the substrate, thereby enabling the formation of different types of devices in the first and second regions.
[0049] In other embodiments, the substrate in the first or second region has a doped region, the doped region having an opposite conductivity type to the substrate. This allows for the provision of materials for forming a P-type device in the first region and an N-type device in the second region. Alternatively, it allows for the provision of materials for forming an N-type device in the first region and a P-type device in the second region.
[0050] In this embodiment, the second sacrificial material layer 220 provides material for the subsequent formation of the second and third sacrificial structures.
[0051] In this embodiment, the material of the second sacrificial material layer 220 includes silicon.
[0052] In this embodiment, the layer to be etched 200 further includes a second mask material layer 210 located between the substrate 201 and the second sacrificial material layer 220.
[0053] The second mask material layer 210 provides material for the subsequent formation of the first fin mask structure and the second fin mask structure.
[0054] The second mask material layer 210 helps to increase the stability of the pattern during the subsequent pattern transfer process, thereby forming a pattern with higher precision and better morphology.
[0055] In this embodiment, the second mask material layer 210 includes: a second hard mask material layer 211, and a second oxide material layer 212 located on the surface of the second hard mask material layer 211.
[0056] The second hard mask material layer 211 is made of a hard mask material, such as silicon nitride, silicon carbide, or silicon carbonitride. In this embodiment, the material of the second hard mask material layer 211 includes silicon nitride. Because the second hard mask material layer 211 is made of a hard mask material, the stability of the transmitted pattern can be better improved when forming the first fin mask structure and the second fin mask structure.
[0057] The material of the second oxide material layer 212 is, for example, an oxide such as silicon oxide or silicon carbide. In this embodiment, the material of the second oxide material layer 212 includes silicon oxide. The second oxide material layer 212 can improve the surface flatness of the second mask material layer 210, thereby improving the accuracy of the pattern shape during pattern transfer.
[0058] Please continue to refer to this. Figure 4 A first mask material layer 230 is formed on the layer to be etched 200.
[0059] On the one hand, the first mask material layer 230 provides support for the subsequent formation of the first mask structure, thereby reducing the risk of the first mask structure bending, deforming, or collapsing. On the other hand, the first mask material layer 230 provides material for the subsequent formation of the third mask structure.
[0060] The first mask material layer 230 includes: a lower first mask material layer 231 and an upper first mask material layer 232 located on the surface of the lower first mask material layer 231.
[0061] The lower first mask material layer 231 is made of a hard mask material, such as silicon nitride, silicon carbide, or silicon carbonitride. In this embodiment, the lower first mask material layer 231 is made of silicon nitride. Because the lower first mask material layer 231 is made of a hard mask material, the stability of the transmitted pattern can be improved more effectively when forming the third mask structure.
[0062] The material of the upper first mask material layer 232 is, for example, an oxide such as silicon oxide or silicon carbide. In this embodiment, the material of the upper first mask material layer 232 is silicon oxide. The upper first mask material layer 232 can improve the surface flatness of the first mask material layer 230, thereby improving the accuracy of the pattern shape during the pattern transfer process.
[0063] Next, a plurality of openings are formed within the first mask material layer 230 on the first region I; a first mask structure is formed within each opening; and a plurality of mutually independent second mask structures are formed on the first mask material layer 230 on the second region II. For detailed methods of forming the openings, the first mask structures, and the second mask structures, please refer to [reference needed]. Figures 5 to 9 .
[0064] Please refer to Figure 5 Several mutually independent first sacrificial structures 240 are formed on the first mask material layer 230 in the second region II.
[0065] In this embodiment, the material of the first sacrificial structure 240 includes silicon.
[0066] In this embodiment, the method for forming the first sacrificial structure 240 includes: forming a first sacrificial structure material layer (not shown) on the surface of the first mask material layer 230 on the first region I and the second region II; forming a plurality of mutually independent first sacrificial structure mask structures (not shown) on the first sacrificial structure material layer on the first region I; and etching the first sacrificial structure material layer using the first sacrificial structure mask structure as a mask until the first mask material layer 230 is exposed.
[0067] In this embodiment, the process for forming the first sacrificial structural material layer includes a deposition process, which includes at least one of chemical vapor deposition, physical vapor deposition, or atomic layer deposition.
[0068] In this embodiment, the process of etching the first sacrificial structure material layer includes at least one of dry etching and wet etching.
[0069] In other embodiments, the formation process of the first sacrificial structure includes a multiple patterning process.
[0070] Please continue to refer to this. Figure 5 A second masking material film 250 is formed on the surface of the first sacrificial structure 240 and the first masking material layer 230.
[0071] The second mask material film 250 provides material for the subsequent formation of the second mask structure.
[0072] In this embodiment, the process for forming the second mask material film 250 includes at least one of chemical vapor deposition or atomic layer deposition.
[0073] In this embodiment, the material of the second mask material film 250 includes silicon nitride.
[0074] In other embodiments, the material of the second mask material film includes hard mask materials such as silicon carbide and silicon carbonitride.
[0075] Please refer to Figure 6 Several openings 241 are formed in the first mask material layer 230 on the first region I.
[0076] The opening 241 provides space for the subsequent formation of the first mask structure.
[0077] In this embodiment, the method of forming a plurality of openings 241 in the first mask material layer 230 on the first region I includes: forming an opening mask layer 260 on the second mask material film 250, the opening mask layer 260 exposing the second mask material film 250 on the first region I; using the opening mask layer 260 as a mask, etching the second mask material film 250 and the first mask material layer 230 to form the openings 241.
[0078] In this embodiment, the method of etching the second mask material film 250 and the first mask material layer 230 to form the opening 241 using the opening mask layer 260 as a mask includes: etching the second mask material film 250 using the opening mask layer 260 as a mask until the first mask material layer 230 is exposed; after exposing the first mask material layer 230, etching the upper first mask material layer 232 using the opening mask layer 260 as a mask until the surface of the lower first mask material layer 231 is exposed, thereby forming the opening 241.
[0079] Because the lower first mask material layer 231 is retained while the opening 241 is formed, it not only provides support for the first mask structure by forming it within the opening 241, but also improves the accuracy and stability of the transferred pattern shape when transferring the pattern through the lower first mask material layer 231 of the hard mask material. Furthermore, the lower first mask material layer 231 protects the surface of the second sacrificial material layer 220 during the etching process of forming the opening 241, thereby reducing the etching load during pattern transfer and enabling the subsequent formation of a second sacrificial structure with lower top surface roughness and more uniform height.
[0080] In this embodiment, the etching process of the second mask material film 250 and the first mask material layer 230 includes at least one of dry etching process and wet etching process.
[0081] In other embodiments, using the opening mask layer as a mask, the second mask material film and the first mask material layer are etched until the surface of the second sacrificial material layer is exposed to form an opening.
[0082] In this embodiment, after the opening 241 is formed, the opening mask layer 260 is removed.
[0083] Please refer to Figure 7 After the opening 241 is formed, a third mask material layer 270 is formed inside the opening 241 and on the surface of the second mask material film 250, the third mask material layer 270 being higher than the top surface of the first sacrificial structure 240.
[0084] In this embodiment, the method of forming the third mask material layer 270 includes: forming an initial third mask material layer (not shown) in the opening 241 and on the surface of the second mask material film 250, wherein the surface of the initial third mask material layer is higher than the surface of the second mask material film 250; planarizing the initial third mask material layer until the top surface of the second mask material film 250 is exposed.
[0085] In this embodiment, the process for forming the initial third mask material layer includes a deposition process, which includes at least one of chemical vapor deposition, physical vapor deposition, and atomic layer deposition.
[0086] In this embodiment, the process for planarizing the initial third mask material layer includes a chemical mechanical polishing process.
[0087] In another embodiment, the third masking material layer is flush with the top surface of the first sacrificial structure. A method for forming the third masking material layer includes: forming an initial third masking material layer (not shown) within an opening and on the surface of a second masking material film, the surface of the initial third masking material layer being higher than the surface of the second masking material film; and planarizing the initial third masking material layer until the top surface of the first sacrificial structure is exposed.
[0088] The third mask material layer 270 provides material for forming the first mask structure.
[0089] In this embodiment, the material of the third mask material layer 270 is the same as the material of the first sacrificial structure 240. Therefore, the first sacrificial structure 240 can be etched simultaneously during the etching process of forming the first mask structure to remove the first sacrificial structure 240, thereby reducing the number of semiconductor structure formation steps and improving the efficiency of semiconductor structure formation.
[0090] In this embodiment, the material of the third mask material layer 270 is different from the material of the second mask material film 250. Therefore, during the subsequent etching process to form the first mask structure, the materials of the third mask material layer 270 and the second mask material film 250 can be etched at different rates to reduce the wear of the second mask material film 250 on the sidewall of the first sacrificial structure 240, thereby forming a second mask structure with a better morphology.
[0091] Please refer to Figure 8 The first sacrificial structure 240 and the third mask material layer 270 are etched until the surface of the first mask material layer 230 is exposed, forming the first mask structure 271 in the opening 241.
[0092] Specifically, in this embodiment, during the etching of the third mask material layer 270, the etching process consumes the second mask material film 250 on the top surface of the first sacrificial structure 240, thereby exposing the top surface of the first sacrificial structure 240, thus achieving the etching of the first sacrificial structure 240 while etching the third mask material layer 270.
[0093] In this embodiment, the material of the first mask structure 271 includes silicon.
[0094] In other embodiments, the material of the first mask structure includes germanium.
[0095] In this embodiment, etching the first sacrificial structure 240 and the third mask material layer 270 includes at least one of dry etching process and wet etching process.
[0096] Please refer to Figure 9 After the first mask structure 271 is formed, an anisotropic etching process is used to remove the second mask material film 250 on the surface of the first mask material layer 230, and a plurality of mutually discrete second mask structures 251 are formed on the first mask material layer 230 in the second region II.
[0097] Since a plurality of openings 241 are formed in the first mask material layer 230 on the first region I, and a first mask structure 271 is formed in each opening 241, it is not necessary to form a mask structure with a large aspect ratio to transfer the pattern during the pattern transfer process of forming the first mask structure 271. Therefore, the risk of bending, deformation or falling of the first mask structure 271 is reduced, the morphology of the first mask structure 271 is improved, and the pattern transfer to the layer to be etched 200 is better performed, thereby improving the performance and reliability of the formed semiconductor structure.
[0098] Furthermore, by forming the first mask structure 271 within the opening 241, the material selection for the first mask structure 271 becomes highly flexible. Therefore, by using a harder mask material (such as silicon or germanium) as the material for the first mask structure 271, the pattern transfer to the layer to be etched 200 can be improved, thereby enhancing the performance and reliability of the formed semiconductor structure.
[0099] Specifically, the second mask material film 250 is etched by the anisotropic etching process to remove the second mask material film 250 in the horizontal direction and retain the second mask material film 250 in the vertical direction to form the second mask structure 251.
[0100] In this embodiment, the anisotropic etching process includes a plasma etching process.
[0101] Next, the first mask material layer 230 and the layer to be etched 200 are patterned according to the first mask structure 271 and the second mask structure 251. For specific steps on patterning the first mask material layer 230 and the layer to be etched 200, please refer to [link to documentation]. Figures 10 to 15 .
[0102] Please refer to Figure 10 Using the second mask structure 251 as a mask, the first mask material layer 230 is etched until the surface of the layer to be etched 200 is exposed, forming a plurality of mutually independent third mask structures 233 on the second region II.
[0103] In this embodiment, while etching the first mask material layer 230 using the second mask structure 251 as a mask, the lower first mask material layer 231 in the first mask material layer 230 is also etched using the first mask structure 271 as a mask, thereby forming a fourth mask structure 234 between the first mask structure 271 and the layer to be etched 200.
[0104] Since the material of the fourth mask structure 234 is provided by the lower first mask material layer 231, that is, the fourth mask structure 234 is a hard mask material, it is beneficial to improve the accuracy and stability of the pattern shape of the transmitted first mask structure.
[0105] In this embodiment, after the third mask structure 233 is formed, the second mask structure 251 is removed.
[0106] Please refer to Figure 11 Using the first mask structure 271 and the third mask structure 233 as masks, the second sacrificial material layer 220 is etched until the surface of the second mask material layer 210 is exposed, forming a plurality of mutually independent second sacrificial structures 221 in the first region I and a plurality of mutually independent third sacrificial structures 222 in the second region II.
[0107] In this embodiment, the second sacrificial material layer 220 is etched using the first mask structure 271 and the third mask structure 233 as masks in the same etching step. This improves the formation efficiency of the semiconductor structure. Simultaneously, since a fourth mask structure 234 is located between the first mask structure 271 and the layer to be etched 200, and the material of the fourth mask structure 234 is the same hard mask material as the third mask structure 233, the second sacrificial structure 221 and the third sacrificial structure 222 can be formed in the same etching step while reducing the etching load. This results in a more uniform height for the formed second sacrificial structure 221 and the third sacrificial structure 222, thereby improving the performance and reliability of the semiconductor structure.
[0108] In other embodiments, the second and third sacrificial structures are not formed in the same etching step. Specifically, using the first mask structure as a mask, the second sacrificial material layer in the first region is etched separately until the surface of the second mask material layer in the first region is exposed, forming several mutually independent second sacrificial structures in the first region. Using the third mask structure as a mask, the second sacrificial material layer in the second region is etched separately until the surface of the second mask material layer in the second region is exposed, forming several mutually independent third sacrificial structures in the second region.
[0109] Please refer to Figure 12 A first sidewall 281 is formed on the sidewall of the second sacrificial structure 221, and a second sidewall 282 is formed on the sidewall of the third sacrificial structure 222.
[0110] In this embodiment, the method for forming the first sidewall 281 and the second sidewall 282 includes: forming a sidewall film (not shown) on the surface of the second sacrificial structure 221, the third sacrificial structure 222 and the first mask material layer 210; and etching the sidewall film using an anisotropic etching process until the top surface of the second sacrificial structure 221, the top surface of the third sacrificial structure 222 and the surface of the first mask material layer 210 are exposed.
[0111] In this embodiment, the materials of the first sidewall 281 and the second sidewall 282 are different from the material of the second sacrificial material layer 220. Therefore, in the subsequent etching process to remove the second sacrificial structure 221 and the third sacrificial structure 222, different etching rates can be applied to the materials of the second sacrificial structure 221 and the third sacrificial structure 222, as well as the materials of the first sidewall 281 and the second sidewall 282. This allows for the removal of the second sacrificial structure 221 and the third sacrificial structure 222 while retaining the first sidewall 281 and the second sidewall 282, reducing wear on the first sidewall 281 and the second sidewall 282, and improving the accuracy of pattern transfer.
[0112] In this embodiment, the material of the first sidewall 281 and the second sidewall 282 includes silicon nitride.
[0113] In this embodiment, after the first sidewall 281 and the second sidewall 282 are formed, the second sacrificial structure 221 and the third sacrificial structure 222 are removed.
[0114] The process for removing the second sacrificial structure 221 and the third sacrificial structure 222 includes at least one of dry etching process and wet etching process.
[0115] In this embodiment, after removing the second sacrificial structure 221 and the third sacrificial structure 222, the substrate 201 of the first region I is patterned with the first sidewall 281, and the substrate 201 of the second region II is patterned with the second sidewall 282. A plurality of mutually discrete first fins are formed in the first region I, and a plurality of mutually discrete second fins are formed in the second region II. For the specific steps of patterning the substrate of the first region with the first sidewall and the substrate of the second region with the second sidewall, please refer to [reference needed]. Figures 13 to 15 .
[0116] Please refer to Figure 13 Using the first sidewall 281 as a mask, the second mask material layer 210 of the first region I is etched, and using the second sidewall 282 as a mask, the second mask material layer 210 of the second region II is etched until the surface of the substrate 201 is exposed, forming a plurality of mutually independent first fin mask structures 291 in the first region I and a plurality of mutually independent second fin mask structures 292 in the second region II.
[0117] In this embodiment, the etching process of the second mask material layer 210 includes at least one of dry etching and wet etching.
[0118] In this embodiment, after forming the first fin mask structure 291 and the second fin mask structure 292, the first sidewall 281 and the second sidewall 282 are removed.
[0119] Please refer to Figure 14 and Figure 15 , Figure 15 for Figure 14 A three-dimensional structural diagram of a semiconductor. Figure 14 for Figure 15 A cross-sectional structural diagram along the X1-X2 direction is shown. The substrate 201 of the first region I and the fin epitaxial layer 202 within the substrate 201 are etched using the first fin mask structure 291 as a mask. The substrate 201 of the second region II is etched using the second fin mask structure 292 as a mask, so as to form a plurality of mutually independent first fins 203 in the first region I and a plurality of mutually independent second fins 204 in the second region II.
[0120] In this embodiment, the first fin 203 and the second fin 204 are used to form a P-type device and an N-type device, respectively.
[0121] It needs to be understood that, due to the different openings of the mask layer 260 (e.g., ... Figure 6 As shown), the first sacrificial structure 240 (as shown) Figure 6 As shown, the pattern is transferred, so the independence between the pattern of the first fin 203 in the first region I and the pattern of the second fin 204 in the first region II is high, that is, the pattern of the first fin 203 in the first region I and the pattern of the second fin 204 in the second region II can be different.
[0122] In this embodiment, the spacing between the sidewalls of adjacent first fins 203 is greater than the spacing between the sidewalls of adjacent second fins 204. In other embodiments, the substrate does not have a fin epitaxial layer. Based on this, the substrate in the first region is etched using the first fin mask structure as a mask, and the substrate in the second region is etched using the second fin mask structure as a mask, so as to form a plurality of mutually discrete first fins in the first region and a plurality of mutually discrete second fins in the second region, so as to transfer different patterns in the first region and the second region.
[0123] In other embodiments, the spacing between the sidewalls of adjacent first fins is smaller than the spacing between the sidewalls of adjacent second fins.
[0124] In this embodiment, after forming the first fin 203 and the second fin 204, the first fin mask structure 291 (e.g., ...) is removed. Figure 13(as shown) and the second fin mask structure 292 (as shown) Figure 13 (As shown).
[0125] Accordingly, one embodiment of the present invention also provides a semiconductor structure formed by the above method. Please refer to [further details]. Figure 9 It includes: a layer to be etched 200, the layer to be etched 200 including a first region I and a second region II; a first mask material layer 210 located on the layer to be etched 200; and a plurality of openings 241 (e.g., in the first mask material layer 210 located on the first region I) within the first mask material layer 210. Figure 6 (as shown); a first mask structure 271 located within each opening 241; and several mutually independent second mask structures 251 located on the first mask material layer 210 on the second region II.
[0126] The layer to be etched 200 includes: a substrate 201, a second mask material layer 210 located on the substrate 201, and a second sacrificial material layer 220 located on the second mask material layer 210.
[0127] The substrate 201 is made of semiconductor materials.
[0128] In this embodiment, the substrate 201 is made of silicon.
[0129] In other embodiments, the substrate material includes silicon carbide, silicon germanium, a multi-element semiconductor material composed of group III-V elements, silicon-on-insulator (SOI), or germanium-on-insulator (GOI), etc. The multi-element semiconductor material composed of group III-V elements includes InP, GaAs, GaP, InAs, InSb, InGaAs, or InGaAsP, etc.
[0130] In this embodiment, the substrate 201 of the first region I has a fin epitaxial layer 202, and the material of the fin epitaxial layer 202 is different from the material of the substrate 201, so that different types of devices can be formed in the first region I and the second region II.
[0131] In this embodiment, the material of the fin epitaxial layer 202 includes silicon and germanium. Region I is used to form a P-type device, and Region II is used to form an N-type device.
[0132] In other embodiments, the substrate of the second region has a fin epitaxial layer made of a different material than the substrate, thereby enabling the formation of different types of devices in the first and second regions.
[0133] In other embodiments, the substrate in the first or second region has a doped region, the doped region having an opposite conductivity type to the substrate. This allows for the provision of materials for forming a P-type device in the first region and an N-type device in the second region. Alternatively, it allows for the provision of materials for forming an N-type device in the first region and a P-type device in the second region.
[0134] In this embodiment, the material of the second sacrificial material layer 220 includes silicon.
[0135] In this embodiment, the second mask material layer 210 includes: a second hard mask material layer 211, and a second oxide material layer 212 located on the surface of the second hard mask material layer 211.
[0136] The material of the second hard mask material layer 211 is a hard mask material, such as silicon nitride, silicon carbide, or silicon carbonitride. In this embodiment, the material of the second hard mask material layer 211 includes silicon nitride.
[0137] The material of the second oxide material layer 212 is, for example, an oxide such as silicon oxide or silicon carbide.
[0138] In this embodiment, the material of the second oxide material layer 212 includes silicon oxide.
[0139] The first mask material layer 230 includes: a lower first mask material layer 231 and an upper first mask material layer 232 located on the surface of the lower first mask material layer 231.
[0140] The material of the lower first mask material layer 231 is a hard mask material, such as silicon nitride, silicon carbide, or silicon carbonitride.
[0141] The material of the upper first mask material layer 232 is, for example, an oxide such as silicon oxide or silicon carbide. In this embodiment, the material of the upper first mask material layer 232 is silicon oxide.
[0142] In this embodiment, the material of the first mask structure 271 includes silicon. In other embodiments, the material of the first mask structure includes germanium.
[0143] In this embodiment, the material of the second mask material film 250 includes silicon nitride. In other embodiments, the material of the second mask material film includes hard mask materials such as silicon carbide and silicon carbonitride.
[0144] Accordingly, another embodiment of the present invention also provides a semiconductor structure formed by the above method. Please refer to [the original text]. Figures 14 to 15The system includes: a substrate 201, which comprises a first region I and a second region II. The substrate 201 in the first region I has a plurality of mutually discrete first fins 203, and the substrate 201 in the second region II has a plurality of mutually discrete second fins 204. The spacing between the sidewalls of adjacent first fins 203 is smaller than the spacing between the sidewalls of adjacent second fins 204. A first fin mask structure 291 (e.g., ...) is located on the first fins 203. Figure 13 (as shown); the second fin mask structure 292 located on the second fin 204 (as shown) Figure 13 (As shown).
[0145] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.
Claims
1. A method for forming a semiconductor structure, characterized in that, include: A layer to be etched is provided, the layer to be etched comprising a first region and a second region; A first mask material layer is formed on the layer to be etched; Several openings are formed within the first mask material layer in the first region; A first mask structure is formed in each opening, and a plurality of mutually independent second mask structures are formed on the first mask material layer in the second region; The first mask material layer and the layer to be etched are patterned according to the first mask structure and the second mask structure; The method of forming a first mask structure within each opening and forming a plurality of mutually discrete second mask structures on a first mask material layer in a second region includes: forming a plurality of mutually discrete first sacrificial structures on a first mask material layer in a second region before forming the opening; forming a second mask material film on the surfaces of the first sacrificial structures and the first mask material layer; forming a third mask material layer within the opening and on the surface of the second mask material film after forming the opening, the third mask material layer being higher than or flush with the top surface of the first sacrificial structures and filling the opening; etching the first sacrificial structures and the third mask material layer until the surface of the first mask material layer is exposed, the remaining third mask material layer within the opening forming the first mask structure; after forming the first mask structure, using an anisotropic etching process to remove the second mask material film on the surface of the first mask material layer to form the second mask structure; the first mask material layer covering the sidewalls of the first mask structure.
2. The method for forming a semiconductor structure as described in claim 1, characterized in that, The material of the first mask structure includes silicon or germanium.
3. The method for forming a semiconductor structure as described in claim 1, characterized in that, The material of the third mask material layer is the same as the material of the first sacrificial structure, but the material of the third mask material layer is different from the material of the second mask material film.
4. The method for forming a semiconductor structure as described in claim 1, characterized in that, The formation process of the first sacrificial structure includes multiple patterning processes.
5. The method for forming a semiconductor structure as described in claim 1, characterized in that, The method for forming a plurality of openings in a first mask material layer on a first region includes: forming an opening mask layer on a second mask material film, the opening mask layer exposing the second mask material film on the first region; and etching the second mask material film and the first mask material layer using the opening mask layer as a mask to form the openings.
6. The method for forming a semiconductor structure as described in claim 1, characterized in that, The method for patterning the first mask material layer and the layer to be etched according to the first mask structure and the second mask structure includes: etching the first mask material layer with the second mask structure as a mask until the surface of the layer to be etched is exposed, and forming a plurality of mutually independent third mask structures on the second region.
7. The method for forming a semiconductor structure as described in claim 6, characterized in that, The first mask material layer includes: a lower first mask material layer and an upper first mask material layer located on the surface of the lower first mask material layer. The material of the lower first mask material layer includes silicon nitride. The opening is located inside the upper first mask material layer, and the bottom of the opening exposes the lower first mask material layer.
8. The method for forming a semiconductor structure as described in claim 7, characterized in that, The method for patterning the first mask material layer and the layer to be etched based on the first mask structure and the second mask structure further includes: simultaneously etching the first mask material layer using the second mask structure as a mask, and also etching the first mask material layer using the first mask structure as a mask, thereby forming a fourth mask structure between the first mask structure and the layer to be etched.
9. The method for forming a semiconductor structure as described in claim 6, characterized in that, The layer to be etched includes: a substrate and a second sacrificial material layer located on the substrate.
10. The method for forming a semiconductor structure as described in claim 9, characterized in that, The method for patterning the first mask material layer and the layer to be etched according to the first mask structure and the second mask structure further includes: etching the second sacrificial material layer using the first mask structure and the third mask structure as masks, forming a plurality of mutually independent second sacrificial structures in the first region, and forming a plurality of mutually independent third sacrificial structures in the second region.
11. The method for forming a semiconductor structure as described in claim 10, characterized in that, The method for patterning the first mask material layer and the layer to be etched according to the first mask structure and the second mask structure further includes: forming a first sidewall on the sidewall of the second sacrificial structure, and forming a second sidewall on the sidewall of the third sacrificial structure; after forming the first sidewall and the second sidewall, removing the second sacrificial structure and the third sacrificial structure; after removing the second sacrificial structure and the third sacrificial structure, patterning the substrate of the first region with the first sidewall, and patterning the substrate of the second region with the second sidewall, forming a plurality of mutually discrete first fins in the first region, and forming a plurality of mutually discrete second fins in the second region.
12. The method for forming a semiconductor structure as described in claim 11, characterized in that, The layer to be etched further includes a second mask material layer located between the substrate and the second sacrificial material layer.
13. The method for forming a semiconductor structure as described in claim 12, characterized in that, The method of patterning a substrate in a first region with a first sidewall and patterning a substrate in a second region with a second sidewall includes: etching a second mask material layer in the first region using the first sidewall as a mask, and etching a second mask material layer in the second region using the second sidewall as a mask until the substrate surface is exposed, forming a plurality of mutually discrete first fin mask structures in the first region and a plurality of mutually discrete second fin mask structures in the second region; etching the substrate in the first region using the first fin mask structure as a mask, and etching the substrate in the second region using the second fin mask structure as a mask to form the first fin and the second fin.
14. A semiconductor structure, characterized in that, include: The etchable layer includes a first region and a second region, and the etchable layer includes a substrate, a second mask material layer on the substrate, and a second sacrificial material layer on the second mask material layer; The first mask material layer is located on the layer to be etched; Several openings located within the first mask material layer on the first region; A first mask structure located within each opening, wherein the first mask material layer covers the sidewalls of the first mask structure; Several mutually independent second mask structures located on the upper surface of the first mask material layer in the second region; The first mask structure is formed by first forming an opening in a first mask material layer, filling the opening with a third mask material layer formed on the surface of a second mask material film, and then removing the third mask material layer; after forming the first mask structure, the second mask material film is etched to form the second mask structure.
15. A semiconductor structure, characterized in that, The semiconductor structure is formed using the semiconductor structure forming method according to any one of claims 1 to 13; the semiconductor structure includes: The substrate includes a first region and a second region. The substrate in the first region has a plurality of mutually independent first fins, and the substrate in the second region has a plurality of mutually independent second fins. The spacing between the sidewalls of adjacent first fins is smaller than the spacing between the sidewalls of adjacent second fins. A mask structure for the first fin portion located on the first fin; The second fin mask structure located on the second fin.
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