Light detecting element, laminated light detecting element, light detecting device, and driving method

Abstract

The present application relates to a light detecting element, a stacked light detecting imaging element, and a light detecting solid-state imaging device and a driving method. Among others, the light detecting element can include a photoelectric conversion unit including a first electrode, a photoelectric conversion layer, and a second electrode stacked, wherein the photoelectric conversion unit further includes a charge storage electrode arranged to be separated from the first electrode and arranged to face the photoelectric conversion layer via an insulating layer, and a charge movement control electrode is formed in a region facing the photoelectric conversion layer via the insulating layer in a region between the light detecting element and an adjacent light detecting element.

Description

[0001] This application is a divisional application of patent application No. 201880039926.8, filed on June 21, 2018, entitled "Imaging Element, Stacked Imaging Element and Solid-State Imaging Device". Technical Field

[0002] This invention relates to imaging elements, stacked imaging elements, and solid-state imaging devices. Background Technology

[0003] Imaging elements comprising organic semiconductor materials in the photoelectric conversion layer are capable of photoelectric conversion of specific colors (wavelengths). Furthermore, when used in solid-state imaging devices, this feature allows for structures including stacked subpixels (stacked imaging elements), which are impossible in conventional solid-state imaging devices. In this structure, the subpixels comprise a combination of an on-chip color filter (OCCF) and an imaging element, and the subpixels are arranged two-dimensionally (see, for example, Japanese Patent Application Laid-Open No. 2011-138927). Another advantage is that desaicing is unnecessary and false colors are not produced. Note that in the following description, for convenience, an imaging element including a photoelectric conversion unit disposed on or above a semiconductor substrate may be referred to as a "first type of imaging element." For convenience, a photoelectric conversion element included in a first type of imaging element may be referred to as a "first type of photoelectric conversion unit." For convenience, an imaging element disposed in a semiconductor substrate may be referred to as a "second type of imaging element." For convenience, a photoelectric conversion unit included in a second type of imaging element may be referred to as a "second type of photoelectric conversion unit."

[0004] Figure 102 An example of the structure of a conventional stacked imaging element (stacked solid-state imaging device) is shown. Figure 102 In the example shown, third photoelectric conversion unit 331 and second photoelectric conversion unit 321, which are second-type photoelectric conversion units included in third imaging element 330 and second imaging element 320, are stacked and formed in semiconductor substrate 370. Additionally, a first photoelectric conversion unit 311, which is a first-type photoelectric conversion unit, is disposed on the upper side of semiconductor substrate 370 (specifically, on the upper side of second imaging element 320). Here, the first photoelectric conversion unit 311 includes a first electrode 311, a photoelectric conversion layer 313 containing organic material, and a second electrode 312. The first photoelectric conversion unit 311 is included in first imaging element 310, which is a first-type imaging element. Based on the difference in absorption coefficients, the second photoelectric conversion unit 321 and the third photoelectric conversion unit 331 photoelectricly convert blue light and red light, respectively. Furthermore, the first photoelectric conversion unit 311 photoelectricly converts, for example, green light.

[0005] The charge generated by photoelectric conversion in the second photoelectric conversion unit 321 and the third photoelectric conversion unit 331 is temporarily stored in the second photoelectric conversion unit 321 and the third photoelectric conversion unit 331. A vertical transistor (gate portion 322 shown) and a transfer transistor (gate portion 332 shown) transfer the charge to the second floating diffusion layer FD2 and the third floating diffusion layer FD3, respectively. The charge is further output to an external readout circuit (not shown). The transistor and the floating diffusion layers FD2 and FD3 are also formed on the semiconductor substrate 370.

[0006] The charge generated by photoelectric conversion in the first photoelectric conversion unit 311 is stored in the first floating diffusion layer FD1 formed on the semiconductor substrate 370 through the contact hole portion 361 and the wiring layer 362. Furthermore, the first photoelectric conversion unit 311 is also connected to the gate portion 318 of the amplifying transistor through the contact hole portion 361 and the wiring layer 362, and the amplifying transistor converts the charge into voltage. In addition, the first floating diffusion layer FD1 includes a portion of the reset transistor (gate portion 317 is shown). Note that reference numeral 371 indicates a component separation region. Reference numeral 372 indicates an oxide film formed on the surface of the semiconductor substrate 370. Reference numerals 376 and 381 indicate interlayer insulating layers. Reference numeral 383 indicates a protective layer. Reference numeral 390 indicates an on-chip microlens.

[0007] Reference List

[0008] Patent documents

[0009] Patent Document 1: Japanese Patent Application Publication No. 2011-138927 Summary of the Invention

[0010] The technical problem to be solved by the present invention

[0011] Meanwhile, in imaging elements with this structure, the charge generated by photoelectric conversion can flow into adjacent imaging elements. This can lead to a phenomenon known as blooming, and the quality of the captured video (images) may degrade.

[0012] Therefore, the object of this disclosure is to provide an imaging element having a construction and structure that is unlikely to cause a degradation in the quality of the captured video (image), a stacked imaging element including the imaging element, and a solid-state imaging device including the imaging element or the stacked imaging element.

[0013] Solutions to technical problems

[0014] Each imaging element according to the first to ninth aspects of the present disclosure for achieving this purpose includes a photoelectric conversion unit, the photoelectric conversion unit including a stacked first electrode, a photoelectric conversion layer and a second electrode, wherein the photoelectric conversion unit further includes a charge storage electrode arranged separately from the first electrode and arranged to face the photoelectric conversion layer via an insulating layer.

[0015] Furthermore, in the imaging element according to the first aspect, when light enters the photoelectric conversion layer and photoelectric conversion occurs in the photoelectric conversion layer, the absolute value of the potential applied to the portion of the photoelectric conversion layer facing the charge storage electrode is greater than the absolute value of the potential applied to the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element.

[0016] Furthermore, in the imaging element according to the second aspect of this disclosure, the width of the region of the photoelectric conversion layer located between the first electrode and the charge storage electrode is narrower than the width of the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element.

[0017] Furthermore, in the imaging element according to the third aspect of the invention, a charge motion control electrode is formed in a region located between the imaging element and an adjacent imaging element via an insulating layer to the photoelectric conversion layer.

[0018] Furthermore, in the imaging element according to the fourth aspect of this disclosure, instead of the second electrode, a charge motion control electrode is formed in the region of the photoelectric conversion layer located between the imaging element and an adjacent imaging element.

[0019] Furthermore, in the imaging element according to the fifth aspect of this disclosure, the dielectric constant of the insulating material included in the region between the first electrode and the charge storage electrode is higher than the dielectric constant of the insulating material included in the region between the imaging element and the adjacent imaging element.

[0020] Furthermore, in the imaging element according to the sixth aspect of this disclosure, the thickness of the region of the insulating layer between the first electrode and the charge storage electrode is thinner than the thickness of the region of the insulating layer between the imaging element and the adjacent imaging element.

[0021] Furthermore, in the imaging element according to the seventh aspect of this disclosure, the thickness of the region of the photoelectric conversion layer located between the first electrode and the charge storage electrode is greater than the thickness of the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element.

[0022] Furthermore, in the imaging element according to the eighth aspect of this disclosure, the amount of fixed charge in the region between the first electrode and the charge storage electrode at the interface between the photoelectric conversion layer and the insulating layer is less than the amount of fixed charge in the region between the imaging element and the adjacent imaging element at the interface between the photoelectric conversion layer and the insulating layer.

[0023] Furthermore, in the imaging element according to the ninth aspect of the present invention, the charge mobility value of the photoelectric conversion layer in the region between the first electrode and the charge storage electrode is greater than the charge mobility value of the photoelectric conversion layer in the region between the imaging element and the adjacent imaging element.

[0024] The stacked imaging element of this disclosure for achieving the stated purpose includes at least one imaging element according to the first to ninth aspects of this disclosure.

[0025] A solid-state imaging apparatus according to a first aspect of the present disclosure for achieving the stated purpose includes a plurality of imaging elements according to the first to ninth aspects of the present disclosure. Additionally, a solid-state imaging apparatus according to a second aspect of the present invention for achieving the stated purpose includes a plurality of stacked imaging elements according to the present invention.

[0026] Beneficial effects of the present invention

[0027] In each of the imaging elements according to the first to ninth aspects of this disclosure, the imaging elements according to the first to ninth aspects of this disclosure included in a stacked imaging element, and the imaging elements according to the first to ninth aspects of this disclosure included in a solid-state imaging apparatus according to the first and second aspects of this disclosure (hereinafter, in some cases, the imaging elements are collectively referred to as "imaging elements and the like of this disclosure"), a charge storage electrode is provided, which is arranged separately from the first electrode and arranged to extend into the photoelectric conversion layer via an insulating layer. When light is applied to the photoelectric conversion unit and photoelectrically converted by the photoelectric conversion unit, the charge can be stored in the photoelectric conversion layer. Therefore, the charge storage portion can be completely depleted at the start of exposure to eliminate the charge. This can suppress the degradation of image quality caused by the deterioration of random noise due to the increase of kTC noise.

[0028] Furthermore, in each of the imaging element according to the first aspect of this disclosure, the imaging element according to the first aspect of this disclosure included in a stacked imaging element, and the imaging element according to the first aspect of this disclosure included in a solid-state imaging device according to the first and second aspects of this disclosure (hereinafter, in some cases, the imaging elements are collectively referred to as "imaging elements and the like according to the first aspect of this disclosure"), when light enters the photoelectric conversion layer and photoelectric conversion occurs in the photoelectric conversion layer, the absolute value of the potential applied to the portion of the photoelectric conversion layer facing the charge storage electrode is greater than the absolute value of the potential applied to the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element. Therefore, the charge generated by the photoelectric conversion is strongly attracted to the portion of the photoelectric conversion layer facing the charge storage electrode. This prevents the charge generated by the photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) is not degraded.

[0029] Furthermore, in each of the imaging element according to the second aspect of this disclosure, the imaging element according to the second aspect of this disclosure included in a stacked imaging element, and the imaging element according to the second aspect of this disclosure included in a solid-state imaging device according to the first and second aspects of this disclosure (hereinafter, in some cases, the imaging elements are collectively referred to as "imaging elements and the like according to the second aspect of this disclosure"), the width of the region of the photoelectric conversion layer located between the first electrode and the charge storage electrode is narrower than the width of the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element. Furthermore, in this case, the region between the first electrode and the charge storage electrode is less likely to be affected by the voltage of the second electrode (upper electrode) compared to the portion located between the imaging element and the adjacent imaging element. Therefore, the potential increases, and this prevents the charge generated by photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) is not degraded.

[0030] Furthermore, in each of the imaging element according to the third aspect of this disclosure, the imaging element according to the third aspect of this disclosure included in a stacked imaging element, and the imaging element according to the third aspect of this disclosure included in a solid-state imaging device according to the first and second aspects of this disclosure (hereinafter, in some cases, the imaging elements are collectively referred to as "imaging elements and the like according to the third aspect of this disclosure"), a charge motion control electrode is formed in a region that extends via an insulating layer to a region of the photoelectric conversion layer located between the imaging element and an adjacent imaging element. This enables control of the electric field and potential of the region of the photoelectric conversion layer located above the charge motion control electrode. As a result, the charge motion control electrode can prevent the charge generated by photoelectric conversion from flowing into adjacent imaging elements, and the quality of the captured video (image) is not degraded.

[0031] Furthermore, in each of the imaging element according to the fourth aspect of this disclosure, the imaging element according to the fourth aspect of this disclosure included in a stacked imaging element, and the imaging element according to the fourth aspect of this disclosure included in a solid-state imaging device according to the first and second aspects of this disclosure (hereinafter, in some cases, the imaging elements are collectively referred to as "imaging elements and the like according to the fourth aspect of this disclosure"), a charge motion control electrode is formed instead of a second electrode in the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element. Therefore, the charge motion control electrode is able to prevent the charge generated by photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) is not degraded.

[0032] Furthermore, in each of the imaging element according to the fifth aspect of this disclosure, the imaging element according to the fifth aspect of this disclosure included in a stacked imaging element, and the imaging element according to the fifth aspect of this disclosure included in a solid-state imaging device according to the first and second aspects of this disclosure (hereinafter, in some cases, the imaging elements are collectively referred to as "imaging elements and the like according to the fifth aspect of this disclosure"), the dielectric constant of the insulating material contained in the region between the first electrode and the charge storage electrode is higher than the dielectric constant of the insulating material contained in the region between the imaging element and the adjacent imaging element. Therefore, the capacitance of a capacitor formed in the region between the first electrode and the charge storage electrode (for convenience, referred to as "capacitor A") is greater than the capacitance of a capacitor formed in the region between the imaging element and the adjacent imaging element (for convenience, referred to as "capacitor B"). More charge is attracted to the region between the first electrode and the charge storage electrode compared to the region between the imaging element and the adjacent imaging element. This prevents the charge generated by photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) is not degraded.

[0033] Furthermore, in each of the imaging element according to the sixth aspect of this disclosure, the imaging element according to the sixth aspect of this disclosure included in a stacked imaging element, and the imaging element according to the sixth aspect of this disclosure included in a solid-state imaging device according to the first and second aspects of this disclosure (hereinafter, in some cases, the imaging elements are collectively referred to as "imaging elements and the like according to the sixth aspect of this disclosure"), the thickness of the region of the insulating layer between the first electrode and the charge storage electrode is thinner than the thickness of the region of the insulating layer between the imaging element and the adjacent imaging element. Therefore, the capacitance of capacitor A is greater than the capacitance of capacitor B, and more charge is attracted to the region of the insulating layer between the first electrode and the charge storage electrode compared to the region facing the insulating layer between the imaging element and the adjacent imaging element. This prevents the charge generated by photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) is not degraded.

[0034] Furthermore, in each of the imaging element according to the seventh aspect of this disclosure, the imaging element according to the seventh aspect of this disclosure included in a stacked imaging element, and the imaging element according to the seventh aspect of this disclosure included in a solid-state imaging device according to the first and second aspects of this disclosure (hereinafter, in some cases, the imaging elements are collectively referred to as "the imaging element according to the seventh aspect of this disclosure and the like"), the thickness of the region of the photoelectric conversion layer located between the first electrode and the charge storage electrode is greater than the thickness of the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element. Furthermore, in this case, the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element is more significantly affected by the voltage of the second electrode (upper electrode), and the potential is smaller. This prevents the charge generated by photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) is not degraded.

[0035] Furthermore, in each of the imaging element according to the eighth aspect of this disclosure, the imaging element according to the eighth aspect of this disclosure included in a stacked imaging element, and the imaging element according to the eighth aspect of this disclosure included in a solid-state imaging device according to the first and second aspects of this disclosure (hereinafter, in some cases, the imaging elements are collectively referred to as "the imaging element and the like according to the eighth aspect of this disclosure"), the amount of fixed charge in the region between the first electrode and the charge storage electrode at the interface between the photoelectric conversion layer and the insulating layer is less than the amount of fixed charge in the region between the imaging element and the adjacent imaging element at the interface between the photoelectric conversion layer and the insulating layer. Moreover, in this case, the potential of the region of the photoelectric conversion layer between the imaging element and the adjacent imaging element varies more according to the amount of fixed charge. This prevents the charge generated by photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) is not degraded.

[0036] Furthermore, in each of the imaging element according to the ninth aspect of this disclosure, the imaging element according to the ninth aspect of this disclosure included in a stacked imaging element, and the imaging element according to the ninth aspect of this disclosure included in a solid-state imaging device according to the first and second aspects of this disclosure (hereinafter, in some cases, the imaging elements are collectively referred to as "imaging elements and the like according to the ninth aspect of this disclosure"), the value of the charge mobility in the region of the photoelectric conversion layer located between the first electrode and the charge storage electrode is greater than the value of the charge mobility in the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element. In this case, the charge flows more easily toward the first electrode than toward the adjacent imaging element. This prevents the charge generated by photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) is not degraded.

[0037] Note that the beneficial effects described in this specification are exemplary only and are not limiting. Other beneficial effects may also exist. Attached Figure Description

[0038] Figure 1A and Figure 1B These are schematic cross-sectional views of a portion of the imaging element (two imaging elements arranged side by side) of Embodiment 1 and a schematic cross-sectional view of a variant of the imaging element (two imaging elements arranged side by side) of Embodiment 1 (Variant 6 of Embodiment 1).

[0039] Figure 2 This is a schematic partial cross-sectional view of the imaging element and the stacked imaging element of Embodiment 1.

[0040] Figure 3 This is an equivalent circuit diagram of the imaging element and the stacked imaging element in Embodiment 1.

[0041] Figure 4 This is an equivalent circuit diagram of the imaging element and the stacked imaging element in Embodiment 1.

[0042] Figure 5 This is a schematic layout diagram of the first electrode, charge storage electrode, and transistor of the control unit included in the imaging element of Embodiment 1.

[0043] Figure 6 This is a schematic layout diagram of the first electrode and charge storage electrode included in the imaging element of Embodiment 1.

[0044] Figure 7 This is a schematic layout diagram of a variant of the imaging element of Embodiment 1, which includes a first electrode and a charge storage electrode (a variant of Embodiment 1).

[0045] Figure 8 This is a schematic diagram illustrating the state of the potential in each part of the imaging element during operation of Embodiment 1.

[0046] Figure 9A , 9B 9C is an equivalent circuit diagram of the imaging element and the stacked imaging element of Embodiments 1, 11, and 12, used to describe Figure 8 (Example 1) Figure 51 (Example 11), and Figure 58 Each part of (Example 12).

[0047] Figure 10 This is a conceptual diagram of the solid-state imaging device of Embodiment 1.

[0048] Figure 11 This is an equivalent circuit diagram of the imaging element of Embodiment 1 and a variant of the stacked imaging element (Variant 2 of Embodiment 1).

[0049] Figure 12 yes Figure 11 A schematic layout diagram of the first electrode, charge storage electrode, and transistor of the control unit included in a variant of the imaging element of Embodiment 1 (Variation 2 of Embodiment 1).

[0050] Figure 13 This is a schematic layout diagram of a variant of the imaging element of Embodiment 1, which includes a first electrode and a charge storage electrode (Variant 3 of Embodiment 1).

[0051] Figure 14A and 14B This is a schematic layout diagram of a variant of the imaging element of Embodiment 1, which includes a first electrode and a charge storage electrode (Variation 4 of Embodiment 1).

[0052] Figure 15A and 15B This is a schematic layout diagram of a variant of the imaging element of Embodiment 1, which includes a first electrode and a charge storage electrode (Variant 5 of Embodiment 1).

[0053] Figure 16A yes Figure 15B Along in variant 5 of embodiment 1 shown Figure 15B A schematic cross-sectional view of the single-dash line BB, and Figure 16B It is when the charge movement control electrode is Figure 15A The discharge electrode replacement in Variation 5 of Example 1 shown below, along with Figure 15A A schematic cross-sectional view taken by a single-dotted line AA.

[0054] Figure 17A and 17BThis is a schematic cross-sectional view of part of the imaging element (two imaging elements arranged side by side) of Embodiment 2.

[0055] Figure 18A and 18B This is a schematic cross-sectional view of part of the imaging element (two imaging elements arranged side by side) of Embodiment 3.

[0056] Figure 19 This is a schematic plan view of part of the imaging element (2×2 imaging elements arranged side by side) of Embodiment 3.

[0057] Figure 20 This is a schematic plan view of a portion of a variant of the imaging element (2×2 imaging elements arranged side by side) of Embodiment 3 (Variation 1 of Embodiment 3).

[0058] Figure 21A and 21B The illustrations schematically depict the potential change within the photoelectric conversion layer of the imaging element in Embodiment 1, where a charge storage electrode is disposed on the lower side of the photoelectric conversion layer, and the potential change within the photoelectric conversion layer of the imaging element in Embodiment 3, where a charge storage electrode is disposed on the upper side of the photoelectric conversion layer.

[0059] Figure 22A and 22B This is a schematic plan view of a portion of a variant of the imaging element of Embodiment 3 (Variant 2 of Embodiment 3).

[0060] Figure 23A , 23B 23C is a schematic plan view of a variant of the imaging element of Embodiment 3 (Variant 3 of Embodiment 3).

[0061] Figure 24A and 24B This is a schematic cross-sectional view of a portion of a variant of the imaging element (two imaging elements arranged side by side) of Embodiment 3 (Variation 4A and Variation 4B of Embodiment 3).

[0062] Figure 25A and 25B This is a schematic plan view of a variant of the imaging element of Embodiment 3 (Variation 4A of Embodiment 3).

[0063] Figure 26A and 26B This is a schematic plan view of a variant of the imaging element of Embodiment 3 (Variant 4B of Embodiment 3).

[0064] Figure 27A and 27B This is a schematic plan view of a variant of the imaging element of Embodiment 3 (Variant 4C of Embodiment 3).

[0065] Figure 28A and 28B This is a schematic plan view of a variant of the imaging element of Embodiment 3 (Variant 4D of Embodiment 3).

[0066] Figure 29A , 29B 29C and 29C are schematic diagrams illustrating the potential states of various parts in variants 4B, 4C, and 4D of Example 3, respectively.

[0067] Figure 30 This is a schematic cross-sectional view of part of the imaging element (two imaging elements arranged side by side) of Embodiment 4.

[0068] Figure 31 This is a schematic cross-sectional view of a portion of a variant of the imaging element (two imaging elements arranged side by side) of Embodiment 4.

[0069] Figure 32 This is a schematic cross-sectional view of a portion of another variation of the imaging element (two imaging elements arranged side by side) of Embodiment 4.

[0070] Figure 33 This is a schematic cross-sectional view of a portion of another variation of the imaging element (two imaging elements arranged side by side) of Embodiment 4.

[0071] Figure 34 This is a schematic cross-sectional view of part of the imaging element (two imaging elements arranged side by side) of Embodiment 5.

[0072] Figure 35 This is a schematic cross-sectional view of a portion of a variant of the imaging element (two imaging elements arranged side by side) of Embodiment 5.

[0073] Figure 36 This is a schematic cross-sectional view of a portion of another variation of the imaging element (two imaging elements arranged side by side) of Embodiment 5.

[0074] Figure 37 This is a schematic cross-sectional view of part of the imaging element (two imaging elements arranged side by side) of Embodiment 6.

[0075] Figure 38 This is a schematic cross-sectional view of a portion of a variant of the imaging element (two imaging elements arranged side by side) of Embodiment 6.

[0076] Figure 39 This is a schematic cross-sectional view of part of the imaging element (two imaging elements arranged side by side) of Embodiment 7.

[0077] Figure 40This is a schematic cross-sectional view of part of the imaging element (two imaging elements arranged side by side) of Embodiment 8.

[0078] Figure 41 This is a schematic cross-sectional view of a portion of a variant of the imaging element (two imaging elements arranged side by side) of Embodiment 8.

[0079] Figure 42 This is a schematic partial cross-sectional view of the imaging element and the stacked imaging element of Embodiment 9.

[0080] Figure 43 This is a schematic partial cross-sectional view of the imaging element and the stacked imaging element of Embodiment 10.

[0081] Figure 44 This is a schematic partial cross-sectional view of the imaging element and a variant of the stacked imaging element in Embodiment 10.

[0082] Figure 45 This is a schematic partial cross-sectional view of another variation of the imaging element and the stacked imaging element of Embodiment 10.

[0083] Figure 46 This is a schematic partial cross-sectional view of another variation of the imaging element and the stacked imaging element of Embodiment 10.

[0084] Figure 47 This is a schematic partial cross-sectional view of the imaging element and the stacked imaging element of Embodiment 11.

[0085] Figure 48 This is an equivalent circuit diagram of the imaging element and the stacked imaging element in Embodiment 11.

[0086] Figure 49 This is an equivalent circuit diagram of the imaging element and the stacked imaging element in Embodiment 11.

[0087] Figure 50 This is a schematic layout diagram of the transistors of the first electrode, the transmission control electrode, the charge storage electrode, and the control unit included in the imaging element of Embodiment 11.

[0088] Figure 51 This is a schematic diagram illustrating the state of the potential in each part during operation of the imaging element of Embodiment 11.

[0089] Figure 52 This is a schematic illustration of the potential state in various parts during another operation of the imaging element of Embodiment 11.

[0090] Figure 53This is a schematic layout diagram of the transistors of the first electrode, the transmission control electrode, the charge storage electrode, and the control unit included in a variant of the imaging element of Embodiment 11.

[0091] Figure 54 This is a schematic partial cross-sectional view of the imaging element and the stacked imaging element of Embodiment 12.

[0092] Figure 55 This is an equivalent circuit diagram of the imaging element and the stacked imaging element of Embodiment 12.

[0093] Figure 56 This is an equivalent circuit diagram of the imaging element and the stacked imaging element of Embodiment 12.

[0094] Figure 57 This is a schematic layout diagram of the first electrode, charge storage electrode, and transistor of the control unit included in the imaging element of Embodiment 12.

[0095] Figure 58 This is a schematic diagram illustrating the state of the potential in each part during operation of the imaging element of Embodiment 12.

[0096] Figure 59 This is a schematic illustration of the potential state in various parts during another operation period (charge transport period) of the imaging element of Embodiment 12.

[0097] Figure 60 This is a schematic layout diagram of the first electrode and charge storage electrode included in a variant of the imaging element of Embodiment 12.

[0098] Figure 61 This is a schematic partial cross-sectional view of the imaging element and the stacked imaging element of Embodiment 13.

[0099] Figure 62 This is a schematic, partially enlarged cross-sectional view of the portion of the imaging element in Embodiment 13 in which a charge storage electrode, a photoelectric conversion layer, and a second electrode are stacked.

[0100] Figure 63 This is a schematic layout diagram of the first electrode, charge storage electrode, and transistor of the control unit included in a variant of the imaging element of Embodiment 13.

[0101] Figure 64 This is a schematic, partially enlarged cross-sectional view of the portion of the imaging element in Embodiment 14 in which a charge storage electrode, a photoelectric conversion layer, and a second electrode are stacked.

[0102] Figure 65 This is a schematic partial cross-sectional view of the imaging element and the stacked imaging element of Embodiment 15.

[0103] Figure 66 These are schematic partial cross-sectional views of the imaging elements and stacked imaging elements of Embodiments 16 and 17.

[0104] Figure 67A and 67B This is a schematic plan view of the charge storage electrode section in Example 17.

[0105] Figure 68A and 68B This is a schematic plan view of the charge storage electrode section in Example 17.

[0106] Figure 69 This is a schematic layout diagram of the first electrode, charge storage electrode, and transistor of the control unit included in the imaging element of Embodiment 17.

[0107] Figure 70 This is a schematic layout diagram of the first electrode and charge storage electrode included in a variant of the imaging element of Embodiment 17.

[0108] Figure 71 These are schematic partial cross-sectional views of the imaging elements and stacked imaging elements of embodiments 18 and 17.

[0109] Figure 72A and 72B This is a schematic plan view of the charge storage electrode section in Example 18.

[0110] Figure 73 This is a schematic plan view of the first electrode and charge storage electrode section in the solid-state imaging device of Embodiment 19.

[0111] Figure 74 This is a schematic plan view of the first electrode and charge storage electrode section in a first variant of the solid-state imaging device of Embodiment 19.

[0112] Figure 75 This is a schematic plan view of the first electrode and charge storage electrode section in a second variant of the solid-state imaging device of Embodiment 19.

[0113] Figure 76 This is a schematic plan view of the first electrode and charge storage electrode section in the third variant of the solid-state imaging device of Embodiment 19.

[0114] Figure 77 This is a schematic plan view of the first electrode and charge storage electrode section in the fourth variant of the solid-state imaging device of Embodiment 19.

[0115] Figure 78 This is a schematic plan view of the first electrode and charge storage electrode section in the fifth variant of the solid-state imaging device of Embodiment 19.

[0116] Figure 79 This is a schematic plan view of the first electrode and charge storage electrode section in the sixth variant of the solid-state imaging device of Embodiment 19.

[0117] Figure 80 This is a schematic plan view of the first electrode and charge storage electrode section in the seventh variant of the solid-state imaging device of Embodiment 19.

[0118] Figure 81 This is a schematic plan view of the first electrode and charge storage electrode section in the eighth variant of the solid-state imaging device of Embodiment 19.

[0119] Figure 82 This is a schematic plan view of the first electrode and charge storage electrode section in the ninth variant of the solid-state imaging device of Embodiment 19.

[0120] Figure 83A , 83B Figures 83C and 83C are examples illustrating reading and driving in the imaging element block of Embodiment 19.

[0121] Figure 84 This is a schematic plan view of the first electrode and charge storage electrode section of the solid-state imaging device of Embodiment 20.

[0122] Figure 85 This is a schematic plan view of the first electrode and charge storage electrode section in a variant of the solid-state imaging device of Embodiment 20.

[0123] Figure 86 This is a schematic plan view of the first electrode and charge storage electrode section in a variant of the solid-state imaging device of Embodiment 20.

[0124] Figure 87 This is a schematic plan view of the first electrode and charge storage electrode section in a variant of the solid-state imaging device of Embodiment 20.

[0125] Figure 88 This is a schematic partial cross-sectional view of the imaging element of Embodiment 1 and another variant of the stacked imaging element.

[0126] Figure 89 This is a schematic partial cross-sectional view of another variation of the imaging element and the stacked imaging element of Embodiment 1.

[0127] Figure 90A , 90B 90C is a schematic partial enlarged cross-sectional view of the various parts of the first electrode, etc., in another variation of the imaging element and the stacked imaging element of Embodiment 1.

[0128] Figure 91This is a schematic partial cross-sectional view of another variation of the imaging element and the stacked imaging element of Embodiment 1.

[0129] Figure 92 This is a schematic partial cross-sectional view of another variation of the imaging element and the stacked imaging element of Embodiment 1.

[0130] Figure 93 This is a schematic partial cross-sectional view of another variation of the imaging element and the stacked imaging element of Embodiment 1.

[0131] Figure 94 This is a schematic partial cross-sectional view of another variation of the imaging element and the stacked imaging element of Embodiment 11.

[0132] Figure 95 This is a schematic partial cross-sectional view of another variation of the imaging element and the stacked imaging element of Embodiment 1.

[0133] Figure 96 This is a schematic partial cross-sectional view of another variation of the imaging element and the stacked imaging element of Embodiment 1.

[0134] Figure 97 This is a schematic, partially enlarged cross-sectional view of the portion of the imaging element in a variant of Embodiment 13 in which a charge storage electrode, a photoelectric conversion layer, and a second electrode are stacked.

[0135] Figure 98 This is a schematic, partially enlarged cross-sectional view of the portion of the imaging element in a variant of Embodiment 14 in which a charge storage electrode, a photoelectric conversion layer, and a second electrode are stacked.

[0136] Figure 99A and 99B This is an equivalent circuit diagram of a variant of a transistor that drives charge storage electrodes.

[0137] Figure 100A and 100B The driver is illustrated schematically. Figure 99A and 99B The diagram shows the pulse waveform of the transistor in the equivalent circuit.

[0138] Figure 101 This is a conceptual diagram of an example of a solid-state imaging device that uses imaging elements and stacked imaging elements included in this disclosure in an electronic device (camera).

[0139] Figure 102 This is a conceptual diagram of a traditional stacked imaging element (stacked solid-state imaging device).

[0140] Description of the embodiments

[0141] In the following description, this disclosure will be illustrated with reference to the accompanying drawings and embodiments. However, this disclosure is not limited to the embodiments, and the various values ​​and materials in the embodiments are illustrative. Note that this disclosure will be described in the following order.

[0142] 1. General description of imaging elements and stacked imaging elements according to the first to ninth aspects of this disclosure, and solid-state imaging apparatus according to the first and second aspects of this disclosure.

[0143] 2. Embodiment 1 (Imaging element according to the first to third aspects of this disclosure, stacked imaging element according to this disclosure, and solid-state imaging device according to the second aspect of this disclosure)

[0144] 3. Example 2 (Imaging element according to the second aspect of this disclosure)

[0145] 4. Example 3 (Imaging element according to the fourth aspect of this disclosure)

[0146] 5. Example 4 (Imaging element according to the fifth aspect of this disclosure)

[0147] 6. Example 5 (Imaging element according to the sixth aspect of this disclosure)

[0148] 7. Example 6 (Imaging element according to the seventh aspect of this disclosure)

[0149] 8. Example 7 (Imaging element according to the eighth aspect of this disclosure)

[0150] 9. Example 8 (Imaging element according to the ninth aspect of this disclosure)

[0151] 10. Example 9 (Variation of the imaging element in Examples 1 to 8)

[0152] 11. Example 10 (a variation of Examples 1 to 9, a solid-state imaging apparatus according to the first aspect of this disclosure)

[0153] 12. Example 11 (a variation of Examples 1 to 10, including an imaging element with transmission control electrodes)

[0154] 13. Example 12 (a variation of Examples 1 to 11, including an imaging element with multiple charge storage electrode segments)

[0155] 14. Example 13 (Imaging element of the first and sixth configurations)

[0156] 15. Example 14 (Imaging elements of the second and sixth configurations of this disclosure)

[0157] 16. Example 15 (Imaging element of the third construction)

[0158] 17. Example 16 (Imaging element of the fourth construction)

[0159] 18. Example 17 (Imaging element of the fifth construction)

[0160] 19. Example 18 (Imaging element of the sixth construction)

[0161] 20. Example 19 (Solid-state imaging device with first and second structures)

[0162] 21. Example 20 (a variation of Example 19)

[0163] 22. Other Detailed Implementation

[0164] <General description of the imaging elements and stacked imaging elements of the first to ninth aspects of this disclosure, and the solid-state imaging apparatus of the first to second aspects of this disclosure>

[0165] In the following description, for convenience, the region of the photoelectric conversion layer located between the first electrode and the charge storage electrode is referred to as "region A of the photoelectric conversion layer," and the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element is referred to as "region B of the photoelectric conversion layer." Furthermore, for convenience, the region of the insulating layer located between the first electrode and the charge storage electrode is referred to as "region A of the insulating layer," and the region of the insulating layer located between the imaging element and the adjacent imaging element is referred to as "region B of the insulating layer." Region B of the photoelectric conversion layer corresponds to region B of the insulating layer. Furthermore, for convenience, the region between the first electrode and the charge storage electrode is referred to as "region a," and the region between the imaging element and the adjacent imaging element is referred to as "region b." In region a, region A of the photoelectric conversion layer corresponds to region A of the insulating layer. In region b, region B of the photoelectric conversion layer corresponds to region B of the insulating layer.

[0166] In imaging elements and the like according to the first and second aspects of the present invention, in other words, region B of the photoelectric conversion layer refers to a portion of the photoelectric conversion layer that is positioned on the portion of the insulating layer located in the region (region b) between the charge storage electrode and the charge storage electrode included in the adjacent imaging element (region B of the insulating layer).

[0167] In an imaging element or the like according to a third aspect of the invention, a charge movement control electrode is formed in region B of the photoelectric conversion layer via an insulating layer. In other words, the charge movement control electrode is formed below a portion of the insulating layer located in region b (of the insulating layer) between the charge storage electrode and a charge storage electrode included in an adjacent imaging element. The charge movement control electrode is disposed away from the charge storage electrode. Alternatively, in other words, the charge movement control electrode is disposed around and separated from the charge storage electrode, and the charge movement control electrode is arranged to extend through the insulating layer to region B of the photoelectric conversion layer.

[0168] In an imaging element or the like according to a fourth aspect of the present invention, instead of a second electrode, a charge movement control electrode is formed in a region of the photoelectric conversion layer located between the imaging element and an adjacent imaging element. The charge movement control electrode is disposed separately from the second electrode. In other words:

[0169] [A] A second electrode may be provided for each imaging element, and the charge motion control electrode may be configured to surround at least a portion of the second electrode in region B of the photoelectric conversion layer and be separate from the second electrode.

[0170] [B] A second electrode may be provided for each imaging element, the charge motion control electrode may be configured to surround at least a portion of the second electrode and be separate from the second electrode, and a portion of the charge storage electrode may be present below the charge motion control electrode, or

[0171] [C] A second electrode may be provided for each imaging element. A charge motion control electrode may be configured to surround at least a portion of the second electrode and be separate from it. A portion of the charge storage electrode may be present below the charge motion control electrode. Furthermore, according to the third aspect, the charge motion control electrode in the imaging element, etc., may be formed below the charge motion control electrode. The potential generated by the coupling between the charge motion control electrode and the second electrode is, in some cases, applied to a region of the photoelectric conversion layer located below the region between the charge motion control electrode and the second electrode.

[0172] In an imaging element or the like according to a fifth aspect of the invention, the insulating material included in region a (referred to as "insulating material A" for convenience) may fill all of region a on a plane, or fill a portion of region a, may include region a to the edge portion (facing the edge portion of region a) of the charge storage electrode, or may be formed on part or all of the charge storage electrode. Alternatively, the insulating material may fill all of region a or a portion of region a along the thickness direction of the insulating layer. The insulating material included in region B (region b) of the insulating layer (referred to as "insulating material B" for convenience) may fill all of region B of the insulating layer on a plane, a portion of region B (region b) of the insulating layer, or may include region B (region b) of the insulating layer to the edge portion (facing the edge portion of region B (region b) of the charge storage electrode. Alternatively, the insulating material may fill all of region B (region b) of the insulating layer or a portion of region B (region b) of the insulating layer along the thickness direction of the insulating layer.

[0173] In an imaging element or the like according to a sixth aspect of the present invention, the thickness of region A of the insulating layer is thinner than the thickness of region B of the insulating layer. All regions of both regions A and B of the insulating layer can meet the requirements, or only a portion of those regions can meet the requirements.

[0174] In an imaging element or the like according to the seventh aspect of the present invention, the thickness of region A of the photoelectric conversion layer is greater than the thickness of region B of the photoelectric conversion layer. All regions of both region A and region B of the photoelectric conversion layer may satisfy the stated requirement, or only a portion of the regions may satisfy the stated requirement. The thickness of region B of the photoelectric conversion layer may be "0". That is, depending on the situation, the region of the photoelectric conversion layer located between the imaging element and an adjacent imaging element may not exist.

[0175] In an imaging element or the like according to the eighth aspect of the present invention, the amount of fixed charge in the region of the interface between region A of the photoelectric conversion layer and region A of the insulating layer is less than the amount of fixed charge in the region of the interface between region B of the photoelectric conversion layer and region B of the insulating layer. The entirety of the region of the interface between region A of the photoelectric conversion layer and region A of the insulating layer, and the entirety of the region of the interface between region B of the photoelectric conversion layer and region B of the insulating layer, can satisfy the requirement, or a portion of the region can satisfy the requirement.

[0176] In an imaging element or the like according to the ninth aspect of the present invention, the charge mobility value (referred to as "charge mobility A" for convenience) in region A of the photoelectric conversion layer is greater than the charge mobility value (referred to as "charge mobility B" for convenience) in region B of the photoelectric conversion layer. All regions of region A and region B of the photoelectric conversion layer may satisfy the stated requirement, or a portion of the regions may satisfy the stated requirement. Alternatively, the region of the photoelectric conversion layer having charge mobility A may extend over a portion or all of the charge storage electrode.

[0177] The imaging element according to the third aspect of the present invention may further include a control unit, which is disposed on a semiconductor substrate and includes a driving circuit, wherein

[0178] The first electrode, the second electrode, the charge storage electrode, and the charge motion control electrode are connected to the drive circuit.

[0179] During charge storage, the drive circuit will apply potential V 11 Applying a potential V to the first electrode 12 Apply to the charge storage electrode and apply a potential V 13 The charge is applied to the charge motion control electrode, and the charge is stored in the photoelectric conversion layer.

[0180] During charge transfer, the driving circuit will convert the potential V 21 Applying a potential V to the first electrode 22 Apply to the charge storage electrode and apply a potential V 23 The charge is applied to the charge motion control electrode, and the charge stored in the photoelectric conversion layer is read out to the control unit through the first electrode, wherein...

[0181] When the potential of the first electrode is higher than the potential of the second electrode,

[0182] V 12 ≥V 11 V 12 >V 13 and V 21 >V 22 >V 23 It was able to be maintained, and

[0183] When the potential of the first electrode is lower than the potential of the second electrode,

[0184] V 12 ≤V 11 V 12 <V 13 and V 21 <V 22 <V 23This allows it to be maintained. The charge movement control electrode can be formed at the same level as the first electrode or the charge storage electrode, or it can be formed at a different level.

[0185] The imaging element according to the fourth aspect of the present invention may further include a control unit disposed on a semiconductor substrate and comprising a driving circuit, wherein

[0186] The first electrode, the second electrode, the charge storage electrode, and the charge motion control electrode are connected to the drive circuit.

[0187] During charge storage, the drive circuit applies a potential V2' to the second electrode and a potential V to the charge movement control electrode. 13 ', and the charge is stored in the photoelectric conversion layer, and

[0188] During charge transfer, the drive circuit applies a potential V2” to the second electrode and a potential V” to the charge motion control electrode. 23 "and the charge stored in the photoelectric conversion layer is read out to the control unit through the first electrode, wherein..."

[0189] When the potential of the first electrode is higher than the potential of the second electrode

[0190] V2'≥V 13 'and V2"≥V 23 "It was able to be maintained, and

[0191] When the potential of the first electrode is lower than the potential of the second electrode

[0192] V2'≤V 13 'and V2"≤V 23 "This is maintained. The charge movement control electrode is formed at the same level as the second electrode."

[0193] Each of the imaging elements and the like of the present disclosure, including the preferred mode described above, may further include a semiconductor substrate, wherein the photoelectric conversion unit is arranged on the upper side of the semiconductor substrate. Note that the first electrode, the charge storage electrode, the second electrode, and various electrodes are connected to the driving circuit described later.

[0194] Furthermore, each of the imaging elements of this disclosure, including the various preferred modes described above, may further include a transport control electrode (charge transport electrode) disposed between the first electrode and the charge storage electrode, arranged separately from the first electrode and the charge storage electrode, and arranged to pass through the insulating layer to the photoelectric conversion layer. Note that, for convenience, in some cases, the imaging elements of this disclosure in this mode are referred to as "imaging elements of this disclosure including a transport control electrode." Furthermore, the imaging elements of this disclosure including a transport control electrode may also include:

[0195] A control unit disposed on a semiconductor substrate and including a drive circuit, wherein

[0196] The first electrode, the charge storage electrode, and the transfer control electrode are connected to the drive circuit.

[0197] During charge storage, the drive circuit will apply potential V 11 Applying a potential V to the first electrode 12 Apply to the charge storage electrode and apply a potential V 14 When applied to the transport control electrode, charge is stored in the photoelectric conversion layer, and

[0198] During charge transfer, the driving circuit will convert the potential V 21 Applying a potential V to the first electrode 22 Apply to the charge storage electrode and apply a potential V 24 The charge stored in the photoelectric conversion layer is read out to the control unit through the first electrode after being applied to the transmission control electrode.

[0199] When the potential of the first electrode is higher than the potential of the second electrode

[0200] V 12 >V 14 and V 22 ≤V 24 ≤V 21 It was able to be maintained, and

[0201] When the potential of the first electrode is lower than the potential of the second electrode

[0202] V 12 <V 14 And V 22 ≥V 24 ≥V 21 It was thus preserved.

[0203] Furthermore, in each of the imaging elements of this disclosure including the various preferred modes described above, the charge storage electrode may include multiple charge storage electrode segments. Note that, for convenience, in some cases, the imaging element of this disclosure in the described mode is referred to as "the imaging element of this disclosure including multiple charge storage electrode segments." The number of charge storage electrode segments may be equal to or greater than 2. Furthermore, when different potentials are applied to each of the N charge storage electrode segments in the imaging element of this disclosure including multiple charge storage electrode segments,

[0204] When the potential of the first electrode is higher than the potential of the second electrode, during charge transport, the potential applied to the charge storage electrode segment (first photoelectric conversion unit segment) located closest to the first electrode can be higher than the potential applied to the charge storage electrode segment (Nth photoelectric conversion unit segment) located furthest from the first electrode.

[0205] When the potential of the first electrode is lower than that of the second electrode, during charge transfer, the potential applied to the charge storage electrode segment (first photoelectric conversion unit segment) located closest to the first electrode can be lower than the potential applied to the charge storage electrode segment (Nth photoelectric conversion unit segment) located furthest from the first electrode.

[0206] Furthermore, in each of the imaging elements S, etc., of this disclosure including the various preferred modes described above, the size of the charge storage electrode can be larger than the size of the first electrode. While not a limitation, it is preferred that the following conditions are met...

[0207] 4≤S1' / S1,

[0208] Where S1' is the area of ​​the charge storage electrode and S1 is the area of ​​the first electrode.

[0209] In the imaging element according to the second aspect of the invention, the width W of region A of the photoelectric conversion layer is... A The width W of region B of the photoelectric conversion layer B Narrow, and (W) A / W B Examples of values ​​for ) include

[0210] 1 / 2≤(W A / W B )<1.

[0211] In the imaging element according to the fifth aspect of the invention, a specific example of insulating material A includes SiN, and a specific example of insulating material B includes SiO2.

[0212] In the imaging element according to the sixth aspect of the invention, the thickness t of region A of the insulating layer In-A The thickness t of region B of the insulating layer In-B Thin, and (t) In-A / t In-B Examples of values ​​for ) include

[0213] 1 / 2≤(t In-A / t In-B )<1.

[0214] In the imaging element according to the seventh aspect of the invention, the thickness t of region A of the photoelectric conversion layer Pc-AThe thickness t of region B of the photoelectric conversion layer Pc-B Thick, and (t) Pc-A / t Pc-B Examples of values ​​for ) include

[0215] 1<(t Pc-A / t Pc-B )≤2.

[0216] In the imaging element according to the eighth aspect of the present invention, the fixed charge FC in the region of the interface between region A of the photoelectric conversion layer and region A of the insulating layer is... A The fixed charge FC in the region smaller than the interface between region B of the photoelectric conversion layer and region B of the insulating layer B .

[0217] 1 / 10≤(FC A / FC B )<1.

[0218] Here, the amount of fixed charge in the region at the interface between the photoelectric conversion layer and the insulating layer can be controlled based on, for example, depositing a thin film with a fixed charge.

[0219] In the imaging element according to the ninth aspect of the present invention, the charge mobility value CT in region A of the photoelectric conversion layer A The charge mobility value CT in region B of the photoelectric conversion layer is greater than that in region B. B .

[0220] 1<(CT A / CT B )≤1×10 2 .

[0221] The materials contained in region A of the photoelectric conversion layer and the materials contained in region B of the photoelectric conversion layer can be appropriately selected from the materials contained in the photoelectric conversion layer. Alternatively, a portion of the photoelectric conversion layer can have an upper / lower layer double-layer structure. The upper layer of region A of the photoelectric conversion layer, the upper layer of region B of the photoelectric conversion layer, and the portion of the photoelectric conversion layer positioned above the charge storage electrode can contain the same material (referred to as the "upper layer constituent material" for convenience). The lower layer of region A of the photoelectric conversion layer and the lower layer of the portion of the photoelectric conversion layer positioned above the charge storage electrode can contain the same material (referred to as the "lower layer constituent material" for convenience). The upper layer constituent material and the lower layer constituent material can be different.

[0222] In this way, a lower layer (in some cases referred to as the "lower semiconductor layer") can be provided to prevent, for example, recombination during charge storage. This can also improve the charge transfer efficiency from the photoelectric conversion layer to the first electrode. Furthermore, the charge generated in the photoelectric conversion layer can be temporarily held to control the timing of transport, etc. Additionally, the generation of dark current can be suppressed. Note that in some cases, the upper layer of the photoelectric conversion layer is referred to as the "upper photoelectric conversion layer".

[0223] In addition to the imaging element according to the fourth aspect of this disclosure, the second electrode located on the light incident side can be shared by multiple imaging elements. That is, the second electrode can be a so-called solid electrode. In the imaging element of this disclosure, the photoelectric conversion layer is shared by multiple imaging elements. That is, a photoelectric conversion layer is formed in multiple imaging elements.

[0224] Furthermore, in the imaging elements of this disclosure, including the various preferred modes described above, the first electrode may extend in an opening provided in the insulating layer and may be connected to the photoelectric conversion layer. Alternatively, the photoelectric conversion layer may extend in an opening provided in the insulating layer and may be connected to the first electrode. In this case,

[0225] The edge portion of the top surface of the first electrode can be covered by an insulating layer.

[0226] The first electrode can be exposed on the bottom surface of the opening, and

[0227] The side surface of the opening can be inclined to extend from the first surface to the second surface, wherein the first surface is the surface of the insulating layer that contacts the top surface of the first electrode, and the second surface is the surface of the insulating layer that contacts a portion of the photoelectric conversion layer facing the charge storage electrode. Furthermore, the side surface of the opening extending inclined from the first surface to the second surface can be located on the charge storage electrode side. Note that another layer can also be formed between the photoelectric conversion layer and the first electrode (e.g., a material layer suitable for charge storage can be formed between the photoelectric conversion layer and the first electrode).

[0228] Furthermore, in the imaging elements of this disclosure, including the various preferred modes described above,

[0229] The control unit, including at least a floating diffusion layer and an amplifying transistor, can be disposed on a semiconductor substrate, and

[0230] The first electrode can be connected to the floating diffusion layer and the gate portion of the amplifying transistor. Furthermore, in this case,

[0231] The reset transistor and select transistor included in the control unit can be further disposed on the semiconductor substrate.

[0232] The floating diffusion layer can be connected to a source / drain region of the reset transistor.

[0233] One source / drain region of the amplifying transistor can be connected to one source / drain region of the selecting transistor, and the other source / drain region of the selecting transistor can be connected to a signal line.

[0234] Alternatively, variations of the imaging elements of this disclosure, including the various preferred modes described above, include imaging elements with the first to sixth configurations described below. That is, in each of the first to sixth configurations of the imaging elements of this disclosure, including the various preferred modes described above,

[0235] The photoelectric conversion unit comprises N (where N≥2) photoelectric conversion unit segments.

[0236] The photoelectric conversion layer consists of N photoelectric conversion layer segments.

[0237] The insulation layer consists of N insulation layer segments.

[0238] In each of the first to third constructed imaging elements, the charge storage electrode comprises N charge storage electrode segments.

[0239] In each imaging element of the fourth and fifth configurations, the charge storage electrode comprises N charge storage electrode segments arranged separately from each other.

[0240] The nth (where n = 1, 2, 3, ..., N) photoelectric conversion unit segment includes the nth charge storage electrode segment, the nth insulating layer segment, and the nth photoelectric conversion layer segment, and

[0241] The larger the value of n in the photoelectric conversion unit segment, the farther the photoelectric conversion unit segment is from the first electrode.

[0242] Furthermore, in the first constructed imaging element, the thickness of the photoelectric conversion layer segment gradually changes from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. Furthermore, in the second constructed imaging element, the thickness of the photoelectric conversion layer segment gradually changes from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. Furthermore, in the third constructed imaging element, the material contained in the insulating layer segment varies between adjacent photoelectric conversion unit segments. Furthermore, in the fourth constructed imaging element, the material contained in the charge storage electrode segment varies between adjacent photoelectric conversion unit segments. Furthermore, in the fifth constructed imaging element, the area of ​​the charge storage electrode segment gradually decreases from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. Note that the area can decrease continuously or in a step-like manner.

[0243] Alternatively, in the imaging element of the sixth configuration of this disclosure, which includes the various preferred modes described above, the cross-sectional area of ​​the stacked portion of the charge storage electrode, insulating layer, and photoelectric conversion layer (when the stacked portion is cut in the YZ virtual plane) varies with distance from the first electrode, where the Z direction is the stacking direction of the charge storage electrode, insulating layer, and photoelectric conversion layer, and the X direction is the direction away from the first electrode. Note that the change in cross-sectional area can be continuous or gradual.

[0244] In each imaging element of the first and second structures, N photoelectric conversion layer segments, N insulating layer segments, and N charge storage electrode segments are continuously disposed. In each imaging element of the third to fifth structures, N photoelectric conversion layer segments are continuously disposed. Furthermore, in each imaging element of the fourth and fifth structures, N insulating layer segments are continuously disposed. On the other hand, in the imaging element of the third structure, N insulating layer segments are disposed to correspond to photoelectric conversion unit segments respectively. Furthermore, in each imaging element of the fourth and fifth structures, and in the imaging element of the third structure, N charge storage electrode segments are disposed, depending on the situation, to correspond to photoelectric conversion unit segments respectively. Furthermore, in each imaging element of the first to sixth structures, the same potential is applied to all charge storage electrode segments. Alternatively, in each imaging element of the fourth and fifth structures, and in the imaging element of the third structure, depending on the situation, different potentials may be applied to each of the N charge storage electrode segments.

[0245] In each of the imaging elements constructed in the first to sixth configurations and the stacked imaging elements and solid-state imaging devices of this disclosure, the thickness of the insulating layer segment is defined, the thickness of the photoelectric conversion layer segment is defined, the materials contained in each insulating layer segment are different, the materials contained in each charge storage electrode segment are different, the area of ​​the charge storage electrode segment is defined, or the cross-sectional area of ​​the stacked portion is defined. Thus, a charge transport gradient is formed, and the charge generated by photoelectric conversion can be more easily and definitively transported to the first electrode. Furthermore, as a result, the generation of image retention or charge transfer leftover can be prevented.

[0246] Variations of the stacked imaging element disclosed herein include a stacked imaging element comprising at least one of the first to sixth constructed imaging elements. Furthermore, variations of the solid-state imaging apparatus according to the first aspect of this disclosure include a solid-state imaging apparatus comprising a plurality of first to sixth constructed imaging elements. Variations of the solid-state imaging apparatus according to the second aspect of this disclosure include a solid-state imaging apparatus comprising a plurality of stacked imaging elements, each stacked imaging element comprising at least one of the first to sixth constructed imaging elements.

[0247] In each of the first to fifth configurations of the imaging element, the larger the value of n for the photoelectric conversion unit segment, the farther the photoelectric conversion unit segment is from the first electrode. The location of the photoelectric conversion unit segment, whether it is far from the first electrode, is determined based on the X direction. Furthermore, in the sixth configuration of the imaging element, the direction far from the first electrode is the X direction, which is defined as follows: That is, a pixel region comprising multiple array imaging elements or stacked imaging elements includes multiple pixels arranged in a two-dimensional array (i.e., systematically arranged along the X and Y directions). When the planar shape of the pixel is rectangular, the extending direction of the side closest to the first electrode is the Y direction, and the direction orthogonal to the Y direction is the X direction. Alternatively, when the planar shape of the pixel is arbitrary, the overall direction including the straight line segment or curve closest to the first electrode is the Y direction, and the direction orthogonal to the Y direction is the X direction.

[0248] In the following text, the case where the potential of the first electrode is higher than that of the second electrode will be described for the imaging elements of the first to sixth configurations. When the potential of the first electrode is lower than that of the second electrode, it is only necessary to reverse the high and low potentials.

[0249] In the first imaging element, the thickness of the insulating layer segment gradually varies from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. The thickness of the insulating layer segment can gradually increase or decrease, thereby forming a charge transport gradient.

[0250] When the charge to be stored is electrons, the thickness of the insulating layer segment can be gradually increased. When the charge to be stored is electron-hole, the thickness of the insulating layer segment can be gradually decreased. Furthermore, in these cases, when the state changes to |V| during charge storage... 12 |≥|V 11 At that time, the nth photoelectric conversion unit segment can store more charge than the (n+1)th photoelectric conversion unit segment. Applying a strong electric field can, of course, prevent charge from flowing from the first photoelectric conversion unit segment to the first electrode. Furthermore, when the state changes to |V| during the charge transport cycle... 22 |<|V 21 | At that time, it is certain that the charge flow from the first photoelectric conversion unit segment to the first electrode and the charge flow from the (n+1)th photoelectric conversion unit segment to the nth photoelectric conversion unit segment can be guaranteed.

[0251] In the second-structured imaging element, the thickness of the photoelectric conversion layer segment gradually varies from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. The thickness of the photoelectric conversion layer segment can gradually increase or decrease, thereby forming a charge transport gradient.

[0252] When the charge to be stored is electrons, the thickness of the photoelectric conversion layer segment can be gradually increased. When the charge to be stored is holes, the thickness of the photoelectric conversion layer segment can be gradually decreased. Furthermore, when the thickness of the photoelectric conversion layer segment is gradually increased, the state changes to V during charge storage. 12 ≥V 11 At that time, or when the thickness of the photoelectric conversion layer gradually decreases, the state changes to V during charge storage. 12 ≤V 11 At that time, the electric field applied to the nth photoelectric conversion unit segment is stronger than the electric field applied to the (n+1)th photoelectric conversion unit segment. This must prevent charge flow from the first photoelectric conversion unit segment to the first electrode. Furthermore, as the thickness of the photoelectric conversion layer segment gradually increases, when the state changes to V during charge storage... 22 <V 21 At that time, or when the thickness of the photoelectric conversion layer gradually decreases, when the state changes to V 22 >V 21 At that time, it is certain that the charge flow from the first photoelectric conversion unit segment to the first electrode and the charge flow from the (n+1)th photoelectric conversion unit segment to the nth photoelectric conversion unit segment can be guaranteed.

[0253] In the third imaging element configuration, the material contained in the insulating layer segment differs from that in adjacent photoelectric conversion unit segments, thereby creating a charge transport gradient. Preferably, the dielectric constant of the material contained in the insulating layer segment gradually decreases from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. Furthermore, by employing this configuration, when the state changes to V during charge storage... 12 ≥V 11 At that time, the nth photoelectric conversion unit segment can store more charge than the (n+1)th photoelectric conversion unit segment. Furthermore, when the state changes to V during the charge transport cycle... 22 <V 21 At that time, it is certain that the charge flow from the first photoelectric conversion unit segment to the first electrode and the charge flow from the (n+1)th photoelectric conversion unit segment to the nth photoelectric conversion unit segment can be guaranteed.

[0254] In the fourth imaging element configuration, the material contained in the charge storage electrode segment differs from that in adjacent photoelectric conversion unit segments. This creates a charge transport gradient. Preferably, the work function of the material contained in the insulating layer segment gradually increases from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. Furthermore, by employing this configuration, a potential gradient favorable for signal charge transport can be formed regardless of whether the voltage is positive or negative.

[0255] In the fifth imaging element, the area of ​​the charge storage electrode segment gradually decreases from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. This creates a charge transport gradient. Therefore, when the state changes to V during the charge storage period... 12 ≥V 11 At that time, the nth photoelectric conversion unit segment can store more charge than the (n+1)th photoelectric conversion unit segment. Additionally, when the state changes to V during charge transfer... 22 <V 21 At that time, it is certain that the charge flow from the first photoelectric conversion unit segment to the first electrode and the charge flow from the (n+1)th photoelectric conversion unit segment to the nth photoelectric conversion unit segment can be guaranteed.

[0256] In the sixth configuration of the imaging element, the cross-sectional area of ​​the stacked components varies according to the distance from the first electrode. This creates a charge transport gradient. Specifically, the thickness of the cross-section of the stacked components can be constant, and the width of the cross-section of the stacked components can decrease as the distance from the first electrode increases. By employing this configuration, as described in the fifth configuration of the imaging element, when the state changes to V during the charge storage cycle... 12 ≥V 11 At that time, the region closer to the first electrode can store more charge than the region farther away from the first electrode. Therefore, when the state changes to V during the charge transport cycle... 22 <V 21 At this time, charge flow from the region near the first electrode to the first electrode and charge flow from the region away from the first electrode to the region near the first electrode can be guaranteed. On the other hand, the width of the cross-section of the stacked components can be constant, while the thickness of the cross-section of the stacked portion, especially the thickness of the insulating layer section, can be gradually increased. By adopting this structure, as described in the imaging element of the first structure, when the state changes to V during the charge storage cycle... 12 ≥V 11 At this time, the region closer to the first electrode stores more charge than the region farther from the first electrode. Applying a strong electric field will certainly prevent the flow of charge from the region closer to the first electrode to the first electrode. Furthermore, when the state changes to V during the charge transport cycle... 22 <V 21 At this time, charge flow from the region near the first electrode to the first electrode and charge flow from the region far from the first electrode to the region near the first electrode can be guaranteed. Furthermore, the thickness of the photoelectric conversion layer segment can be gradually increased. By employing this structure, as described in the imaging element of the second structure, when the state changes to V during the charge storage cycle... 12 ≥V 11At this time, the electric field applied to the region near the first electrode is stronger than the electric field applied to the region far from the first electrode. This, of course, prevents charge flow from the region near the first electrode to the first electrode. Furthermore, when the state changes to V during the charge transport cycle... 22 <V 21 At that time, it is certain that charge flow from the region near the first electrode to the first electrode and charge flow from the region far from the first electrode to the region near the first electrode can be guaranteed.

[0257] Another variation of the solid-state imaging apparatus according to the first aspect of the present invention includes:

[0258] A solid-state imaging apparatus comprising a plurality of imaging elements according to the first to ninth aspects of this disclosure or imaging elements constructed according to the first to sixth aspects, wherein

[0259] Multiple imaging elements are included in the imaging element block, and

[0260] The first electrode is shared by a plurality of imaging elements included in the imaging element block. Note that, for convenience, a solid-state imaging device constructed in this manner is referred to as a "solid-state imaging device of the first construction". Alternatively, another variation of the solid-state imaging device according to the second aspect of this disclosure includes:

[0261] A solid-state imaging apparatus includes a plurality of stacked imaging elements, each stacked imaging element including at least one of the imaging elements according to the first to ninth aspects of this disclosure or the imaging elements constructed according to the first to sixth aspects, wherein

[0262] Multiple stacked imaging elements are included in the imaging element block, and

[0263] The first electrode is shared by multiple stacked imaging elements included in the imaging element block. Note that, for convenience, a solid-state imaging device constructed in this way will be referred to as a "second-construction solid-state imaging device". Furthermore, in this way, the first electrode can be shared by multiple imaging elements included in the imaging element block to simplify and miniaturize the construction and structure of pixel regions including multiple array imaging elements.

[0264] In both the first and second constructed solid-state imaging devices, a floating diffusion layer is provided for a plurality of imaging elements (an imaging element block). The plurality of imaging elements provided for the floating diffusion layer may include a plurality of imaging elements of a first type, described later, or may include at least one imaging element of the first type and one or two or more imaging elements of a second type, described later. Furthermore, the timing of the charge transport cycle can be suitably controlled to allow the plurality of imaging elements to share a single floating diffusion layer. The plurality of imaging elements operate together and are connected as an imaging element block to a drive circuit, described later. That is, the plurality of imaging elements included in the imaging element block are connected to a single drive circuit. However, a charge storage electrode is controlled for each imaging element. Additionally, the plurality of imaging elements may share a single contact aperture. Regarding the arrangement relationship between the first electrode shared by the plurality of imaging elements and the charge storage electrode of each imaging element, the first electrode may be arranged near the charge storage electrode of each imaging element. Alternatively, the first electrode may be arranged adjacent to the charge storage electrode of a portion of the plurality of imaging elements, but not adjacent to the charge storage electrodes of the remaining portions of the plurality of imaging elements. In this case, the movement of charge from the remaining portions of the plurality of imaging elements to the first electrode is through the movement of said portion of the plurality of imaging elements. Preferably, the distance between the charge storage electrodes included in the imaging element (referred to as "distance A" for convenience) is longer than the distance between the first electrode and the charge storage electrodes in the imaging element adjacent to the first electrode (referred to as "distance B" for convenience), to ensure that charge is moved from each imaging element to the first electrode. Furthermore, it is preferable that the value of distance A is larger the farther the imaging element is from the first electrode.

[0265] Furthermore, in each of the imaging elements of this disclosure, including the various preferred modes described above, light can be incident from the second electrode side, and a light-shielding layer can be formed on the light-incident side closer to the second electrode. Alternatively, light can be incident from the second electrode side, but the light may not be incident on the first electrode (depending on the situation, the first electrode and the transmission control electrode). In this case, the light-shielding layer can be formed on the light-incident side closer to the second electrode and on the upper side of the first electrode (depending on the situation, the first electrode and the transmission control electrode). Alternatively, an on-chip microlens can be disposed on the upper side of the charge storage electrode and the second electrode, and the light incident on the on-chip microlens can be collected by the charge storage electrode. Here, the light-shielding layer can be disposed on the upper side of the surface of the second electrode on the light-incident side, or it can be disposed on the surface of the second electrode on the light-incident side. Depending on the situation, the light-shielding layer can be formed on the second electrode. Examples of materials included in the light-shielding layer include chromium (Cr), copper (Cu), aluminum (Al), tungsten (W), and light-shielding resins (e.g., polyimide resins).

[0266] Specific examples of imaging elements disclosed herein include: a blue light-sensitive imaging element (referred to for convenience as a "first type of blue light imaging element") comprising a photoelectric conversion layer (referred to for convenience as a "first type of blue light photoelectric conversion layer") that absorbs blue light (light from 425 to 495 nm); a green light-sensitive imaging element (referred to for convenience as a "first type of green light imaging element") comprising a photoelectric conversion layer (referred to for convenience as a "first type of green light photoelectric conversion layer") that absorbs green light (light from 495 to 570 nm); and a red light-sensitive imaging element (referred to for convenience as a "first type of red light imaging element") comprising a photoelectric conversion layer (referred to for convenience as a "first type of red light photoelectric conversion layer") that absorbs red light (light from 620 to 750 nm). Furthermore, for convenience, the blue light-sensitive imaging element, which is a conventional imaging element excluding charge storage electrodes, is referred to as a "second type of blue light imaging element." For convenience, conventional imaging elements sensitive to green light will be referred to as "Type II green imaging elements." For convenience, conventional imaging elements sensitive to red light will be referred to as "Type II red imaging elements." For convenience, the photoelectric conversion layer included in Type II blue imaging elements will be referred to as "Type II blue photoelectric conversion layer." For convenience, the photoelectric conversion layer included in Type II green imaging elements will be referred to as "Type II green photoelectric conversion layer." For convenience, the photoelectric conversion layer included in Type II red imaging elements will be referred to as "Type II red photoelectric conversion layer."

[0267] The stacked imaging element disclosed herein includes at least one imaging element (photoelectric conversion element) of this disclosure, and specific examples of its construction and structure include:

[0268] [A] A structure and configuration in which the first type of blue light photoelectric conversion unit, the first type of green light photoelectric conversion unit, and the first type of red light photoelectric conversion unit are stacked in the vertical direction, and

[0269] A control unit having a first type of blue light imaging element, a first type of green light imaging element, and a first type of red light imaging element disposed on a semiconductor substrate;

[0270] [B] The structure and configuration of the first type of blue light photoelectric conversion unit and the first type of green light photoelectric conversion unit stacked in the vertical direction.

[0271] The second type of red light photoelectric conversion unit is arranged below the two layers of the first type of photoelectric conversion unit, and

[0272] A control unit having a first type of blue light imaging element, a first type of green light imaging element, and a second type of red light imaging element disposed on a semiconductor substrate;

[0273] [C] The second type of blue light photoelectric conversion unit and the second type of red light photoelectric conversion unit are arranged below the first type of green light photoelectric conversion unit, and

[0274] A control unit having a first type of green light imaging element, a second type of blue light imaging element, and a second type of red light imaging element disposed on a semiconductor substrate;

[0275] [D] The second type of green light photoelectric conversion unit and the second type of red light photoelectric conversion unit are arranged below the first type of blue light photoelectric conversion unit, and the structure and configuration are as follows:

[0276] A control unit comprising a first type of blue light imaging element, a second type of green light imaging element, and a second type of red light imaging element is disposed on a semiconductor substrate. Note that, preferably, the photoelectric conversion units of the imaging elements are arranged in the vertical direction in the following order: from the light incident direction, blue light photoelectric conversion unit, green light photoelectric conversion unit, and red light photoelectric conversion unit; or from the light incident direction, green light photoelectric conversion unit, blue light photoelectric conversion unit, and red light photoelectric conversion unit. This is because shorter wavelength light is effectively absorbed at the incident surface. Of the three colors, red has the longest wavelength, and preferably, from the light incident surface, the red light photoelectric conversion unit is located in the lowest layer. The stacked structure of the imaging elements provides one pixel. Furthermore, a first type of infrared photoelectric conversion unit may also be included. Here, preferably, the photoelectric conversion layer of the first type of infrared photoelectric conversion unit comprises, for example, an organic material and is disposed in the lowest layer of the stacked structure of the first type of imaging element and above the second type of imaging element. Alternatively, the second type of infrared photoelectric conversion unit may also be included below the first type of photoelectric conversion unit.

[0277] In the first type of imaging element, a first electrode is formed on, for example, an interlayer insulating layer disposed on a semiconductor substrate. The imaging element formed on the semiconductor substrate can be either a rear-illuminated type or a front-illuminated type.

[0278] When the photoelectric conversion layer includes organic materials, the photoelectric conversion layer can be one of the following four modes.

[0279] (1) The photoelectric conversion layer includes a P-type organic semiconductor.

[0280] (2) The photoelectric conversion layer includes n-type organic semiconductors.

[0281] (3) The photoelectric conversion layer comprises a stacked structure of p-type organic semiconductor layers and n-type organic semiconductor layers. The photoelectric conversion layer comprises a stacked structure of p-type organic semiconductor layers, a mixed layer of p-type and n-type organic semiconductors (bulk heterostructure), and an n-type organic semiconductor layer. The photoelectric conversion layer comprises a stacked structure of p-type organic semiconductor layers, a mixed layer of p-type and n-type organic semiconductors (bulk heterostructure), and an n-type organic semiconductor layer, a mixed layer of p-type and n-type organic semiconductors (bulk heterostructure).

[0282] (4) The photoelectric conversion layer includes a mixture of p-type organic semiconductors and n-type organic semiconductors (bulk heterostructure).

[0283] Here, the order of stacking can be changed arbitrarily.

[0284] Examples of p-type organic semiconductors include naphthalene derivatives, anthracene derivatives, phenanthrene derivatives, pyrene derivatives, perylene derivatives, tetraphenylene derivatives, pentaphenyl derivatives, quinacridone derivatives, thiophene derivatives, thiophene-thiophene derivatives, benzothiophene derivatives, benzothiophene-benzothiophene derivatives, triallylamine derivatives, carbazole derivatives, perylene derivatives, and styrene derivatives. Derivatives, fluoranthene derivatives, phthalocyanine derivatives, phthalocyanine derivatives, porphyrin derivatives, metal complexes including heterocyclic compounds as ligands, polythiophene derivatives, polybenzothiadiazole derivatives, and polyfluorene derivatives. Examples of n-type organic semiconductors include fullerenes and fullerene derivatives (e.g., fullerenes such as C60, C70, and C74 (higher fullerenes) or endohedral fullerenes, etc.) or fullerene derivatives (e.g., fullerene fluorides, PCBM fullerene compounds, or fullerene polymers, etc.), organic semiconductors having larger (deeper) HOMO and LUMO than p-type organic semiconductors, and transparent inorganic metal oxides. Specific examples of n-type organic semiconductors include organic molecules containing heterocyclic compounds as part of a molecular framework, the heterocyclic compounds comprising nitrogen, oxygen, and sulfur atoms, such as pyridine derivatives, pyrazine derivatives, pyrimidine derivatives, triazine derivatives, quinoline derivatives, quinoxaline derivatives, isoquinoline derivatives, acridine derivatives, phenazine derivatives, phenanthroline derivatives, tetrazolium derivatives, pyrazole derivatives, imidazole derivatives, thiazole derivatives, oxazole derivatives, imidazole derivatives, benzimidazole derivatives, benzotriazole derivatives, benzoxazole derivatives, benzoxazole derivatives, carbazole derivatives, benzofuran derivatives, dibenzofuran derivatives, porphyrin derivatives, polystyrene derivatives, polybenzothiazole derivatives, polyfluorene derivatives, organometallic complexes, and phthalocyanine derivatives. Examples of groups included in fullerene derivatives include: halogen atoms; straight-chain, branched, or cycloalkyl or phenyl groups; groups including straight-chain or condensed aromatic compounds; groups including halides; partially fluoroalkyl groups; perfluoroalkyl groups; silylalkyl groups; silylalkoxy groups; arylsilalkyl groups; arylsulfanyl groups; alkylsulfanyl groups; arylsulfonyl groups; alkylsulfonyl groups; aryl sulfide groups; alkyl sulfide groups; amino groups; alkylamino groups; arylamino groups; hydroxyl groups; alkoxy groups; acylamino groups; acyloxy groups; carbonyl groups; carboxyl groups; carboxamide groups; alkoxycarboxyl groups; acyl groups; sulfonyl groups; cyano groups; nitro groups; groups including sulfide compounds; phosphine groups; phosphonic acid groups; and their derivatives. While the thickness of the photoelectric conversion layer (in some cases referred to as the "organic photoelectric conversion layer") including organic materials is not limited, the thickness can be, for example, 1 × 10⁻⁶. -8 m to 5×10 -7 m, preferably 2.5 × 10 -8 m to 3×10 -7 m, more preferably 2.5 × 10 m -8 m to 2×10 -7 m, more preferably 1×10 -7 m to 1.8×10 -7m. Note that organic semiconductors are generally classified as p-type and n-type. p-type indicates that holes are easily transported, and n-type indicates that electrons are easily transported. Organic semiconductors are not limited to the following interpretation: holes or electrons are included in inorganic semiconductors as thermally excited majority carriers.

[0285] Alternatively, examples of materials included in the organic photoelectric conversion layer for green light photoelectric conversion include rhodamine dyes, phthalocyanine dyes, quinacridone derivatives, and phthalocyanine dyes (phthalocyanine derivatives). Examples of materials included in the organic photoelectric conversion layer for blue light photoelectric conversion include coumaric acid dyes, tris(8-hydroxyquinoline)aluminum (Alq3), and phthalocyanine dyes. Examples of materials included in the organic photoelectric conversion layer for red light photoelectric conversion include phthalocyanine dyes and phthalocyanine dyes (phthalocyanine derivatives).

[0286] Alternatively, examples of inorganic materials included in the photoelectric conversion layer include crystalline silicon, amorphous silicon, microcrystalline silicon, crystalline selenium, amorphous selenium, chalcopyrite compounds such as CIGS (CuInGaSe), cis (CuInSe2), CuInS2, CuAlS2, CuAlSe2, CuGaS2, CuGaSe2, AgAlS2, AgAlSe2, AgInS2, and AgInSe2, III-V group compounds such as GaAs, InP, AlGaAs, InGaP, AlGaInP, and InGaAsP, as well as CdSe, Cds, and In2S. e3 Compound semiconductors such as In2S3, Bi2Se3, Bi2S3, ZnSe, ZnS, PbSe, and PbS are used. Furthermore, quantum dots containing these materials can also be used in photoelectric conversion layers.

[0287] Alternatively, the photoconversion layer can have a stacked structure of a lower semiconductor layer and an upper photoconversion layer as described above. The lower semiconductor layer can be arranged in such a way that recombination, for example, during charge storage, can be prevented. Furthermore, the charge transfer efficiency from the charge stored in the photoconversion layer to the first electrode can be improved. Additionally, the charge generated in the photoconversion layer can be temporarily held to control the timing of transport, etc. Furthermore, the generation of dark current can be suppressed. The material contained in the upper photoconversion layer can be appropriately selected from various materials contained in the photoconversion layer. On the other hand, it is preferred that the material used for the lower semiconductor layer is a material with a large bandgap energy value (e.g., a bandgap energy value equal to or greater than 3.0 eV) and a mobility higher than that of the material contained in the photoconversion layer. Specific examples of such materials include: oxide semiconductor materials, such as IGZO; transition metal dihalides; silicon carbide; diamond; graphene; carbon nanotubes; and organic semiconductor materials, such as fused polycyclic hydrocarbon compounds and fused heterocyclic compounds. Alternatively, other examples of materials included in the lower semiconductor layer include: materials having an ionization potential greater than that of the material included in the photoelectric conversion layer when the charge to be stored is electrons; and materials having an electron affinity less than that of the material included in the photoelectric conversion layer when the charge to be stored is holes. Alternatively, preferably, the impurity concentration of the material included in the lower semiconductor layer is equal to or less than 1 × 10⁻⁶. 18 cm -3 The lower semiconductor layer can have a single-layer structure or a multi-layer structure. Furthermore, the material contained in the lower semiconductor layer above the charge storage electrode can be different from the material contained in the lower semiconductor layer above the first electrode.

[0288] The solid-state imaging apparatus according to the first and second aspects of this disclosure and the solid-state imaging apparatus of the first and second configurations can provide a single-panel color solid-state imaging apparatus.

[0289] In the solid-state imaging apparatus according to the second aspect of this disclosure, or in a solid-state imaging apparatus of a second configuration including stacked imaging elements, unlike in a solid-state imaging apparatus including a Bayer array (i.e., without using color filters to separate blue, green, and red), imaging elements sensitive to multiple wavelength types of light are stacked within the same pixel in the light incident direction to provide a single pixel. Therefore, sensitivity can be improved, and pixel density per unit volume can be increased. Furthermore, organic materials have high absorption coefficients, and the film thickness of the organic photoelectric conversion layer can be thinner than that of conventional Si-based photoelectric conversion layers. This reduces light leakage from adjacent pixels and alleviates the limitation on the light incident angle. Moreover, in conventional Si-based imaging elements, interpolation is performed on pixels of the three colors to generate color signals, thus producing false colors. In the solid-state imaging apparatus according to the second aspect of this disclosure, or in a solid-state imaging apparatus of a second configuration including stacked imaging elements, false color generation is suppressed. The organic photoelectric conversion layer also acts as a color filter, and colors can be separated without the need for color filters.

[0290] On the other hand, in the solid-state imaging apparatus or the solid-state imaging apparatus of the first construction according to the first aspect of this disclosure, color filters can be used to alleviate the requirements on the spectral characteristics of blue, green, and red, and are highly mass-producible. Examples of arrays of imaging elements in the solid-state imaging apparatus or the solid-state imaging apparatus of the first construction according to the first aspect of this disclosure include Bayer arrays, as well as interline arrays, G-strip RB lattice arrays, G-strip RB full lattice arrays, lattice complementary color arrays, stripe arrays, diagonal stripe arrays, principal chromatic aberration arrays, field chromatic aberration sequence arrays, frame chromatic aberration sequence arrays, MOS arrays, improved MOS arrays, frame interleaving arrays, and field interleaving arrays. Here, an imaging element provides a pixel (or sub-pixel).

[0291] A pixel region comprising multiple array imaging elements or multiple array-stacked imaging elements of this disclosure includes multiple pixels systematically arranged in a two-dimensional array. The pixel region typically includes: an effective pixel region where light is actually received, thereby generating a signal charge through photoelectric conversion, the signal charge being amplified and read out to a driving circuit; and a black reference pixel region for outputting optical black as a standard for black level. The black reference pixel region is typically arranged around the effective pixel region.

[0292] In the imaging elements and the like of this disclosure, including the various preferred modes and structures described above, light is applied, and photoelectric conversion occurs in the photoelectric conversion layer. Electron-hole (hole) carrier separation is performed. Furthermore, the electrode from which holes are extracted is the anode, and the electrode from which electrons are extracted is the cathode. There exists a mode in which the first electrode provides the anode and the second electrode provides the cathode. Conversely, there also exists a mode in which the first electrode provides the cathode and the second electrode provides the anode.

[0293] In the case of a stacked imaging element, the first electrode, charge storage electrode, charge motion control electrode, transport control electrode, and second electrode can comprise a transparent conductive material. Note that in some cases, the first electrode, charge storage electrode, charge motion control electrode, and transport control electrode are collectively referred to as the "first electrode, etc." Alternatively, in the case of the imaging element, etc., of this disclosure arranged on a plane, for example, in a Bayer array, the second electrode can comprise a transparent conductive material, and the first electrode, etc., can comprise a metallic material. In this case, specifically, the second electrode located on the light incident side can comprise a transparent conductive material, and the first electrode, etc., can comprise, for example, Al-Nd (an alloy of aluminum and neodymium) or ASC (an alloy of aluminum, samarium, and copper). Note that in some cases, the electrode comprising the transparent conductive material is referred to as a "transparent electrode." Here, it is desirable that the band gap energy of the transparent conductive material is equal to or greater than 2.5 eV, preferably equal to or greater than 3.1 eV. Examples of transparent conductive materials comprised in the transparent electrode include conductive metal oxides. Specifically, examples of transparent conductive materials include indium oxide, indium tin oxide (including ITO, indium tin oxide, Sn-doped In₂O₃, crystalline ITO, and amorphous ITO), indium zinc oxide (IZO, indium zinc oxide) obtained by adding indium as a dopant to zinc oxide, indium gallium oxide (IGO) obtained by adding indium as a dopant to gallium oxide, indium-gallium-zinc oxide (IGZO, In-GaZnO₄) obtained by adding indium and gallium as dopant to zinc oxide, and indium-tin-zinc oxide (IGZO, In-GaZnO₄) obtained by adding indium and tin as dopant to zinc oxide. The transparent electrode can contain various metals and materials, including: ITZO, IFO (fluorine-doped In₂O₃), tin dioxide (SnO₂), ATO (antimony-doped SnO₂), FTO (fluorine-doped SnO₂), zinc oxide (including zinc oxide doped with other elements), aluminum zinc oxide (AZO) obtained by adding aluminum as a dopant to zinc oxide, gallium zinc oxide (GZO) obtained by adding gallium as a dopant to zinc oxide, titanium oxide (TiO₂), niobium titanium oxide (TNO) obtained by adding niobium as a dopant to titanium oxide, antimony oxide, spinel oxide, and oxides with a YbFe₂O₄ structure. Alternatively, the transparent electrode may contain gallium oxide, titanium oxide, niobium oxide, nickel oxide, etc., as a mother layer. Examples of transparent electrode thicknesses include 2 × 10⁻⁶.-8 m to 2×10 -7 m, preferably 3×10 -8 m to 1×10 -7 m. Where the first electrode needs to be transparent, from the perspective of simplifying the manufacturing process, it is preferable that the other electrodes also contain transparent conductive materials.

[0294] Alternatively, where transparency is not required, it is preferable to use a device with a high work function (e.g., A conductive material with a work function up to 5.5 eV is used as the conductive material contained in the anode, which functions as an electrode for extracting holes. Specifically, examples of such conductive materials include gold (Au), silver (Ag), chromium (Cr), nickel (Ni), palladium (Pd), platinum (Pt), iron (Fe), iridium (Ir), germanium (Ge), osmium (Os), rhenium (Re), and tellurium (Te). On the other hand, it is preferable to use materials with a low work function (e.g., 5.5 eV). Conductive materials with a voltage up to 4.5 eV are included as conductive materials in a cathode having an electrode for extracting electrons. Specifically, examples of such conductive materials include alkali metals (e.g., Li, Na, K, etc.) and fluorides or oxides of alkali metals, alkaline earth metals (e.g., Mg, Ca, etc.) and fluorides or oxides of alkaline earth metals, aluminum (Al), zinc (Zn), tin (Sn), thallium (Tl), sodium-potassium alloys, aluminum-lithium alloys, magnesium-silver alloys, indium, rare earth metals (such as ytterbium), and alloys thereof. Alternatively, examples of materials contained in the anode or cathode include metals such as platinum (Pt), gold (Au), palladium (PD), chromium (Cr), nickel (Ni), aluminum (Al), silver (Ag), tantalum (Ta), tungsten (W), copper (Cu), titanium (Ti), indium (In), tin (Sn), iron (Fe), cobalt (Co), and molybdenum (Mo); alloys containing these metals; conductive particles containing these metals; conductive particles of alloys containing these metals; polycrystalline silicon containing impurities; carbon materials; oxide semiconductor materials; carbon nanotubes; and conductive materials such as graphene. The anode or cathode may also have a multilayered structure containing these elements. Furthermore, examples of materials contained in the anode or cathode include organic materials (conductive polymers), such as poly(3,4-ethylenedioxythiophene-poly(styrene sulfonate)) [PEDOT / PSS]. Additionally, these conductive materials can be mixed with a binder (polymer) to obtain a paste or ink, which can be cured and used as an electrode.

[0295] Dry or wet deposition methods can be used as the deposition method for the first electrode or the second electrode (cathode or anode). Examples of dry methods include physical vapor deposition (PVD) and chemical vapor deposition (CVD). Examples of deposition methods using the principles of PVD include vacuum evaporation using resistance heating or radio frequency heating, EB (electron beam) evaporation, various sputtering methods (magnetron sputtering, RF-DC coupled bias sputtering, ECR sputtering, target sputtering, and RF sputtering), ion plating, laser ablation, molecular beam epitaxy, and laser transfer. Furthermore, examples of CVD methods include plasma CVD, thermal CVD, metal-organic (MO) CVD, and optical CVD. On the other hand, examples of wet methods include various methods such as electroplating, electroless plating, spin coating, inkjet printing, spray coating, embossing, microcontact printing, flexographic printing, offset printing, gravure printing, and immersion printing. Examples of patterning methods include chemical etching, such as shadow masking, laser transfer, and photolithography, as well as physical etching using ultraviolet light or lasers. Examples of planarization methods for the first and second electrodes include laser planarization, reflow, and CMP (chemical mechanical polishing).

[0296] In addition to the insulating layer in the imaging element according to the fifth aspect of this disclosure, examples of materials included in the insulating layer include not only inorganic insulating materials similar to high-dielectric insulating materials like metal oxides, but also silicon oxide materials, silicon nitride (SiN) materials, etc. y The invention includes, but also, organic insulating materials (organic polymers), such as: polymethyl methacrylate (PMMA); polyvinylphenol (PVP); polyvinyl alcohol (PVA); polyimide; polycarbonate (PC); polyethylene terephthalate (PET); polystyrene; silanol derivatives (silane coupling agents), such as N-(2-aminoethyl)-3-aminopropyltrimethoxysilane (AEAPTMS), 3-mercaptopropyltrimethoxysilane (MPTMS) and octadecyltrichlorosilane (OTS); phenolic resins; fluoropolymers; and linear hydrocarbons, such as octadecyl mercaptan and dodecyl isocyanate, which include a functional group at one end that can bind to a control electrode. Note that examples of silicon oxide materials include silicon oxide (SiOx), BPSG, PSG, BSG, AsSG, PbSG, silicon oxynitride (SiON), SOG (spin on glass), and low-dielectric insulating materials (e.g., polyarylethers, cyclofluorocarbon polymers, benzocyclobutene, cyclofluoropolymers, polytetrafluoroethylene, fluorinated aryl ethers, fluorinated polyimides, amorphous carbon, and organic SOG). These materials can also be suitably selected for inclusion in various interlayer and insulating films.

[0297] The floating diffusion layer, amplifying transistor, reset transistor, and selector transistor included in the control unit can have a construction and structure similar to those of conventional floating diffusion layers, amplifying transistors, reset transistors, and selector transistors. The drive circuit can also have a known construction and structure.

[0298] The first electrode is connected to the floating diffusion layer and the gate portion of the amplifying transistor, and a contact hole may be formed for connecting the first electrode to the floating diffusion layer and the gate portion of the amplifying transistor. Examples of materials included in the contact hole include doped polycrystalline silicon, high-melting-point metals and metal silicides such as tungsten, Ti, Pt, Pd, Cu, TiW, TiN, TiNW, WSi2 and MoSi2, and stacked structures including these materials (e.g., Ti / TiN / W).

[0299] A first carrier blocking layer may be disposed between the organic photoelectric conversion layer and the first electrode, and a second carrier blocking layer may be disposed between the organic photoelectric conversion layer and the second electrode. Furthermore, a first charge injection layer may be disposed between the first carrier blocking layer and the first electrode, and a second charge injection layer may be disposed between the second carrier blocking layer and the second electrode. Examples of materials comprising the electron injection layer include alkali metals such as lithium (Li), sodium (Na), and potassium (K), fluorides or oxides of alkali metals, alkaline earth metals such as magnesium (Mg) and calcium (Ca), and fluorides or oxides of alkaline earth metals.

[0300] Examples of various organic layer deposition methods include dry deposition and wet deposition. Examples of dry deposition methods include vacuum evaporation using resistance heating, radio frequency heating, or electron beam heating; flash evaporation; plasma deposition; EB evaporation; various sputtering methods (bipolar sputtering, DC sputtering, DC magnetron sputtering, RF sputtering, magnetron sputtering, RF-DC coupled bias sputtering, ECR sputtering, target sputtering, RF sputtering, and ion beam sputtering); DC (direct current) methods; RF methods; multi-cathode methods; activated reaction methods; electric field evaporation; various ion plating methods (e.g., RF ion plating and reactive ion plating); laser ablation; molecular beam epitaxy; laser transfer; and molecular beam epitaxy (MBE). Furthermore, examples of CVD methods include plasma CVD, thermal CVD, MOCVD, and optical CVD. On the other hand, specific examples of wet coating methods include: spin coating; dip coating; casting; micro-contact printing; drop coating; various printing methods such as screen printing, inkjet printing, offset printing, gravure printing, flexographic printing, stamping, and spraying; and various coating methods such as air knife coating, doctor blade coating, bar coating, knife coating, extrusion coating, reverse roller coating, transfer roller coating, gravure coating, coincidence coating, casting coating, spray coating, slotted hole coating, and calender coating. Note that examples of solvents used in coating methods include non-polar or low-polarity organic solvents such as toluene, chloroform, hexane, and ethanol. Examples of patterning methods include chemical etching, such as shadow masking, laser transfer, and photolithography, as well as physical etching using ultraviolet light, lasers, etc. Laser planarization, reflow, etc., can be used as planarization techniques for various organic layers.

[0301] Imaging elements of two or more types according to the first to ninth aspects of this disclosure, and imaging elements of the first to sixth structures including the above-described preferred modes and structures, can be appropriately combined as needed.

[0302] As described above, on-chip microlenses and light-shielding layers can be provided on the imaging element or solid-state imaging device as needed, along with driving circuitry and wiring for driving the imaging element. A shutter for controlling the light incident on the imaging element can be arranged as needed, and an optical cutoff filter can be configured according to the purpose of the solid-state imaging device.

[0303] Furthermore, the first and second solid-state imaging devices can be configured such that an on-chip microlens is disposed above an imaging element. Alternatively, two imaging elements can be included in an imaging element block, and an on-chip microlens can be disposed above the imaging element block.

[0304] For example, in the case of stacked solid-state imaging devices and readout integrated circuits (ROICs), a drive substrate having a readout integrated circuit and copper (Cu) connectors and an imaging element having connectors can be stacked together such that the connectors contact each other. The connectors can be combined to stack the solid-state imaging device and the readout integrated circuit, or solder bumps or the like can be used to join the connectors.

[0305] Furthermore, the driving method for driving the solid-state imaging apparatus according to the first and second aspects of this disclosure can be a driving method for a solid-state imaging apparatus that repeats the following steps:

[0306] In all imaging elements, charge is stored in the photoelectric conversion layer, and all the charge in the first electrode is discharged to the outside of the system at once; subsequently,

[0307] In all imaging elements, the charge stored in the photoelectric conversion layer is transferred to the first electrode all at once, and after the transfer is completed, the charge transferred to the first electrode in each imaging element is read sequentially.

[0308] In the driving method of the solid-state imaging device, light incident from the second electrode side does not strike the first electrode in each imaging element. Charge is stored in the photoelectric conversion layer of all imaging elements, and the charge in the first electrode is released to the outside of the system all at once. Therefore, the first electrode can be reset simultaneously in all imaging elements. Furthermore, subsequently, the charge stored in the photoelectric conversion layer of all imaging elements is transferred to the first electrode all at once. After the transfer is complete, the imaging elements sequentially read the charge transferred to the first electrode. Therefore, a so-called global shutter function can be easily implemented.

[0309] Example 1

[0310] Example 1 relates to an imaging element according to a first aspect of the present disclosure, an imaging element according to a third aspect of the present disclosure, a stacked imaging element of the present disclosure, and a solid-state imaging device according to a second aspect of the present disclosure.

[0311] Figure 1A A schematic cross-sectional view of a portion of the imaging elements (two imaging elements arranged side by side) of Embodiment 1 is shown. Note that the following will be described... Figure 1A or Figure 1B A schematic cross-sectional view is similar to, for example, along... Figure 15A A schematic cross-sectional view taken by a single-dotted line AA. Furthermore, Figure 2 A schematic partial cross-sectional view of the imaging element and the stacked imaging element of Embodiment 1 is shown. Figure 3 and Figure 4 The equivalent circuit diagrams of the imaging element and the stacked imaging element of Embodiment 1 are shown. Figure 5A schematic layout diagram of the first electrode, charge storage electrode, and transistors of the control unit included in the imaging element of Embodiment 1 is shown. Furthermore, Figure 6 and Figure 7 A schematic layout diagram of the first electrode and charge storage electrode included in the imaging element of Embodiment 1 is shown. Figure 8 The potential states of various parts of the imaging element during operation of Embodiment 1 are schematically illustrated. Figure 9A A description is shown Figure 8 Equivalent circuit diagrams of the imaging elements and stacked imaging elements of Embodiment 1 for each part. Figure 10 A conceptual diagram of the solid-state imaging device of Embodiment 1 is shown. Note that, for convenience, the various components of the imaging element located on the underside of the interlayer insulating layer 81 can be collectively represented by reference numeral 91 to simplify the diagram.

[0312] Each of the imaging element of Embodiment 1 (e.g., the green light imaging element described later) and the imaging elements of Embodiments 2 to 8 described later includes a photoelectric conversion unit comprising a stacked first electrode 11, a photoelectric conversion layer 13, and a second electrode 12. The photoelectric conversion unit also includes a charge storage electrode 14 disposed away from the first electrode 11 and arranged to face the photoelectric conversion layer 13 through an insulating layer 82.

[0313] Note that in Figure 6 In the example shown, an imaging element is provided with a charge storage electrode 14 corresponding to a first electrode 11. On the other hand, in Figure 7 In the example shown (Variation 1 of Embodiment 1), the two imaging elements are provided with a common first electrode 11 corresponding to the two charge storage electrodes 14. Figure 1A A schematic cross-sectional view of a portion of the imaging element (two imaging elements arranged side by side) of Embodiment 1 shown corresponds to Figure 7 .

[0314] In addition to the imaging elements of Embodiment 3 described later, the second electrode 12 located on the light incident side is shared by multiple imaging elements; that is, the second electrode 12 is a so-called solid electrode. The photoelectric conversion layer 13 is shared by multiple imaging elements. That is, one photoelectric conversion layer 13 is formed in multiple imaging elements.

[0315] The stacked imaging element of Embodiment 1 includes at least one of the imaging elements of Embodiment 1 and the imaging elements of Embodiments 2 to 8, which are described later. In Embodiment 1, the stacked imaging element includes one of the imaging elements of Embodiment 1 and one of the imaging elements of Embodiments 2 to 8, which are described later.

[0316] Furthermore, the solid-state imaging device of Embodiment 1 includes a plurality of stacked imaging elements of the imaging elements of Embodiment 1 and Embodiments 2 to 8 described later.

[0317] Furthermore, when light is incident on the photoelectric conversion layer 13, and photoelectric conversion occurs in the photoelectric conversion layer 13 of the imaging element in Embodiment 1, the portion 13 facing the charge storage electrode 14 of the photoelectric conversion layer 13 is applied. C The absolute value of the potential is greater than that applied to the photoelectric conversion layer 13 in the region 13 between the imaging element and the adjacent imaging element. B The absolute value of the potential of (region B of the photoelectric conversion layer).

[0318] Alternatively, in the imaging element of Embodiment 1, the charge motion control electrode 21 is formed in the region 13 located between the imaging element and adjacent imaging elements, facing the photoelectric conversion layer 13 via the insulating layer 82. B In the region of (region B of the photoelectric conversion layer). In other words, the charge movement control electrode 21 is located in part 82 of the insulating layer 82. B Region B of the insulating layer 82 is formed below the region (region b) between the charge storage electrode 14 and the charge storage electrode 14 of the adjacent imaging element. The charge motion control electrode 21 is configured to be separate from the charge storage electrode 14. Or, in other words, the charge motion control electrode 21 is disposed around and separate from the charge storage electrode 14, and the charge motion control electrode 21 is configured to face the photoelectric conversion layer region B (13) via the insulating layer 82. B Note that, although Figure 2 The charge motion control electrode 21 is not shown in the diagram; it is formed in the direction of arrow "A". The charge motion control electrode 21 is arranged in... Figure 5 Imaging elements in the left and right directions are shared and arranged in Figure 5 A pair of imaging elements in the vertical direction are shared.

[0319] For simplicity, the charge movement control electrode 21 (not shown), the connection hole 23, the pad portion 22, and the wiring V (described later) are shown. 0B The imaging element is referred to as "an imaging element having the basic structure of this disclosure". Figure 2 This is a schematic partial cross-sectional view of an imaging element having the basic structure of this disclosure.

[0320] Figure 42 , 43 Numbers 44, 45, 46, 47, 54, 61, 62, 64, 65, 66, 71, 88, 89, 91, 92, 93, 94, 95, 96, 97, and 98 are... Figure 2The diagram shows a schematic partial cross-sectional view of various variations of an imaging element having the basic structure of this disclosure, but does not show the charge motion control electrode 21, etc.

[0321] In addition, a semiconductor substrate (more specifically, a silicon semiconductor layer) is included, and a photoelectric conversion unit is disposed on the upper side of the semiconductor substrate 70. Furthermore, a control unit is included, which is disposed on the semiconductor substrate 70 and includes a drive circuit connected to the first electrode 11 and the second electrode 12. Here, the light incident surface in the semiconductor substrate 70 is the upper side, and the opposite side of the semiconductor substrate 70 is the lower side. A wiring layer 62 including multiple wirings is disposed on the lower side of the semiconductor substrate 70.

[0322] The semiconductor substrate 70 is provided with at least one floating diffusion layer FD1 and an amplifying transistor TR1, which are included in the control unit. amp The first electrode 11 is connected to the floating diffusion layer FD1 and the amplification transistor TR1. amp The gate portion. The semiconductor substrate 70 is also provided with a reset transistor TR1 included in the control unit. rst and select transistor TR1 set The floating diffusion layer FD1 is connected to the reset transistor TR1. rst A source / drain region. Amplifying transistor TR1 amp Another source / drain region is connected to the select transistor TR1. set A source / drain region. Select transistor TR1. set Another source / drain region is connected to signal line VSL1. Amplifying transistor TR1 amp Reset transistor TR1 rst and select transistor TR1 set Included in the drive circuit.

[0323] Specifically, the imaging element and the stacked imaging element of Embodiment 1 are back-illuminated imaging elements and back-illuminated stacked imaging elements. The imaging element and the stacked imaging element have a stacked structure of three imaging elements, including: a first type of green light imaging element (hereinafter referred to as the "first imaging element") sensitive to green light, which includes a first type of green light photoelectric conversion layer for absorbing green light; a conventional second type of blue light imaging element (hereinafter referred to as the "second imaging element") sensitive to blue light, which includes a second type of blue light photoelectric conversion layer for absorbing blue light; and a conventional second type of red light imaging element (hereinafter referred to as the "third imaging element") sensitive to red light, which includes a second type of red light photoelectric conversion layer for absorbing red light. Here, the red light imaging element (third imaging element) and the blue light imaging element (second imaging element) are disposed in the semiconductor substrate 70, and the second imaging element is located on the light incident side relative to the third imaging element. Furthermore, the green light imaging element (first imaging element) is disposed above the blue light imaging element (second imaging element). The stacked structure of the first, second, and third imaging elements is contained within a single pixel. No color filter is provided.

[0324] In the first imaging element, a first electrode 11 and a charge storage electrode 14 are formed separately on an interlayer insulating layer 81. Furthermore, a charge movement control electrode 21 is formed separately from the charge storage electrode 14 on the interlayer insulating layer 81. The interlayer insulating layer 81, the charge storage electrode 14, and the charge movement control electrode 21 are covered by an insulating layer 82. A photoelectric conversion layer 13 is formed on the insulating layer 82, and a second electrode 12 is formed on the photoelectric conversion layer 13. A protective layer 83 is formed on the entire surface including the second electrode 12, and an on-chip microlens 90 is disposed on the protective layer 83. For example, the first electrode 11, the charge storage electrode 14, the charge movement control electrode 21, and the second electrode 12 include a transparent electrode containing ITO (work function: approximately 4.4 eV). The photoelectric conversion layer 13 includes a layer containing at least a known organic photoelectric conversion material sensitive to green light (e.g., organic substances such as rhodamine dyes, cyanine dyes, and quinacridones). Furthermore, the photoelectric conversion layer 13 may also include a material layer suitable for charge storage. That is, a material layer suitable for charge storage can be further formed between the photoelectric conversion layer 13 and the first electrode 11 (e.g., in the connection portion 67). The interlayer insulating layer 81, the insulating layer 82, and the protective layer 83 include known insulating materials (e.g., SiO2 or SiN). The photoelectric conversion layer 13 and the first electrode 11 are connected by a connection portion 67 provided on the insulating layer 82. The photoelectric conversion layer 13 extends in the connection portion 67. That is, the photoelectric conversion layer 13 extends in the opening 84 provided in the insulating layer 82 and is connected to the first electrode 11.

[0325] The charge storage electrode 14 is connected to the drive circuit. Specifically, the charge storage electrode 14 is connected via a connection hole 66, a pad portion 64, and a wire V disposed in the interlayer insulating layer 81. 0A Connected to the vertical drive circuit 112 included in the drive circuit.

[0326] The charge movement control electrode 21 is also connected to the drive circuit. Specifically, the charge movement control electrode 21 is connected via a connection hole 23, a pad portion 22, and a wiring V disposed in the interlayer insulating layer 81. 0B Connected to the vertical drive circuit 112 included in the drive circuit. More specifically, the charge movement control electrode 21 is formed in region B(13) facing the photoelectric conversion layer 13 via the insulating layer 82. B ) area (region B of the insulation layer (82) B In other words, the charge movement control electrode 21 is located in part 82 of the insulating layer 82. B Below, it is formed in the region (region b) between the charge storage electrode 14 and the charge storage electrode 14 included in the adjacent imaging element. The charge motion control electrode 21 is disposed separately from the charge storage electrode 14. Or, in other words, the charge motion control electrode 21 is disposed around the charge storage electrode 14 and is separated from the charge storage electrode 14, and the charge motion control electrode 21 is arranged to face the photoelectric conversion layer 13 via the insulating layer 82 towards region B (13). B ).

[0327] The charge storage electrode 14 is larger than the first electrode 11. While not limited, it is preferred that it meets the following requirements:

[0328] 4≤S1′ / S1

[0329] Wherein, S1′ is the area of ​​charge storage electrode 14, and S1 is the area of ​​first electrode 11. Although not limited, for example, this can be set in the imaging elements of Embodiment 1 and Embodiments 2 to 8 described later.

[0330] S1′ / S1=8

[0331] Note that in embodiments 13 to 16 described later, the three photoelectric conversion unit segments (101, 102 and 103) are the same size and have the same planar shape.

[0332] A component separation region 71 is formed on the first surface (front surface) 70A side of the semiconductor substrate 70, and an oxide film 72 is formed on the first surface 70A of the semiconductor substrate 70. Furthermore, a reset transistor TR1 is included in the control unit of the first imaging element. rst Amplifying transistor TR1 amp and select transistor TR1 selA first floating diffusion layer FD1 is further disposed on the first surface side of the semiconductor substrate 70.

[0333] Reset transistor TR1 rst Includes gate portion 51, channel formation region 51A, source / drain regions 51B and 51C. Reset transistor TR1 rst The gate portion 51 is connected to the reset line RST1, and the reset transistor TR1 rst The source / drain region 51C also serves as the first floating diffusion layer FD1, and the other source / drain region 51B is connected to the power supply V. DD .

[0334] The first electrode 11 is connected to the reset transistor TR1 through a connection hole 65 and a pad portion 63 provided in the interlayer insulating layer 81, through a contact hole portion 61 formed on the semiconductor substrate 70 and the interlayer insulating layer 76, and through a wiring layer 62 formed on the interlayer insulating layer 76. rst The source / drain region 51C (first floating diffusion layer FD1).

[0335] Amplifying transistor TR1 amp It includes a gate portion 52, a channel formation region 52A, and source / drain regions 52B and 52C. The gate portion 52 is connected to the first electrode 11 and the reset transistor TR1 via a wiring layer 62. rst The source / drain region 51C (first floating diffusion layer FD1) is included. Additionally, a source / drain region 52B is connected to the power supply V. DD .

[0336] Select transistor TR1 sel It includes a gate portion 53, a channel forming region 53A, and source / drain regions 53B and 53C. The gate portion 53 is connected to the select line SEL1. Furthermore, a source / drain region 53B is connected to the amplifying transistor TR1. amp Another source / drain region 52C shares this region, and another source / drain region 53C is connected to the signal line (data output line) VSL1 (117).

[0337] The second imaging element includes an n-type semiconductor region 41, which serves as a photoelectric conversion layer disposed on a semiconductor substrate 70. It also includes a transmission transistor TR2, which is a vertical transistor. trs The gate portion 45 extends into the n-type semiconductor region 41 and connects to the transmission gate line TG2. Furthermore, a second floating diffusion layer FD2 is disposed in region 45C of the semiconductor substrate 70, which is close to the transmission transistor TR2. trs The gate portion 45. The charge stored in the n-type semiconductor region 41 is read out to the second floating diffusion layer FD2 through the transport channel formed along the gate portion 45.

[0338] On the first surface side of the semiconductor substrate 70, the second imaging element is further provided with a reset transistor TR2 included in the control unit of the second imaging element. rst Amplifying transistor TR2 amp and select transistor TR2 sel .

[0339] Reset transistor TR2 rst This includes the gate portion, channel formation region, and source / drain regions. Reset transistor TR2 rst The gate of the reset transistor TR2 is connected to the reset line RST2. rst One source / drain region is connected to the power supply V. DD Another source / drain region is also used as a second floating diffusion layer FD2.

[0340] Amplifying transistor TR2 amp It includes the gate portion, the channel formation region, and the source / drain region. The gate portion is connected to the reset transistor TR2. rst Another source / drain region (second floating diffusion layer FD2). Additionally, one source / drain region is connected to the power supply V. DD .

[0341] Select transistor TR2 sel It includes a gate portion, a channel formation region, and a source / drain region. The gate portion is connected to the select line SEL2. Additionally, a source / drain region is included in the amplification transistor TR2. amp Another source / drain region shares this region, while another source / drain region is connected to the signal line (data output line) VSL2.

[0342] The third imaging element includes an n-type semiconductor region 43 disposed on a semiconductor substrate 70 as a photoelectric conversion layer. Transmission transistor TR3 trs The gate portion 46 is connected to the transmission gate line TG3. Furthermore, a third floating diffusion layer FD3 is disposed in region 46C of the semiconductor substrate 70, which is close to the transmission transistor TR3. trs The gate portion 46. The charge stored in the n-type semiconductor region 43 is read out to the third floating diffusion layer FD3 through the transport channel 46A formed along the gate portion 46.

[0343] In the third imaging element, a reset transistor TR3, which is included in the control unit of the third imaging element, is further disposed on the first surface side of the semiconductor substrate 70. rst Amplifying transistor TR3 amp and select transistor TR3 sel .

[0344] Reset transistor TR3 rst This includes the gate portion, channel formation region, and source / drain regions. Reset transistor TR3 rst The gate of the transistor is connected to the reset line RST3. Reset transistor TR3 rst One source / drain region is connected to the power supply V. DD Another source / drain region is also used as a third floating diffusion layer, FD3.

[0345] Amplifying transistor TR3 amp It includes the gate portion, the channel formation region, and the source / drain region. The gate portion is connected to the reset transistor TR3. rst Another source / drain region (third floating diffusion layer FD3). Additionally, one source / drain region is connected to the power supply V. DD .

[0346] Select transistor TR3 sel It includes a gate portion, a channel formation region, and a source / drain region. The gate portion is connected to the select line SEL3. Additionally, a source / drain region is included in the amplification transistor TR3. amp Another source / drain region shares this region, while another source / drain region is connected to the signal line (data output line) VSL3.

[0347] Reset lines RST1, RST2, and RST3, select lines SEL1, SEL2, and SEL3, and transmit gate lines TG2 and TG3 are connected to the vertical drive circuit 112 included in the drive circuit. Signal lines (data output lines) VSL1, VSL2, and VSL3 are connected to the column signal processing circuit 113 included in the drive circuit.

[0348] A p-type semiconductor region 43 is disposed between the n-type semiconductor region 43 and the front surface 70A of the semiconductor substrate 70. + Layer 44 is used to suppress the generation of dark current. A p-type semiconductor region is formed between n-type semiconductor region 41 and n-type semiconductor region 43. + Layer 42, and furthermore, a portion of the side surface of the n-type semiconductor region 43 is p + Layer 42 surrounds the semiconductor substrate 70. p is formed on the rear surface 70B side of the semiconductor substrate 70. + Layer 73, and from p + An HfO2 film 74 and an insulating film 75 are formed at the portion of layer 73 where a contact hole 61 should be formed inside the semiconductor substrate 70. Wiring is formed in the interlayer insulating layer 76 across multiple layers, but this wiring is not shown in the diagram.

[0349] HfO2 film 74 is a film with a negative fixed charge, which can be used to suppress the generation of dark current. Note that alternatives to HfO2 film can be alumina (Al2O3) film, zirconium oxide (ZrO2) film, tantalum oxide (Ta2O5) film, titanium dioxide (TiO2) film, lanthanum oxide (La2O3) film, praseodymium oxide (Pr2O3) film, cerium oxide (CeO2) film, neodymium oxide (Nd2O3) film, praseodymium oxide (Pm2O3) film, and samarium oxide (Sm2O3) film. Europium oxide (Eu₂O₃) films, gadolinium oxide (Gd₂O₃) films, terbium oxide (Tb₂O₃) films, dysprosium oxide (Dy₂O₃) films, holmium oxide (Ho₂O₃) films, thulium oxide (Tm₂O₃) films, ytterbium oxide (Yb₂O₃) films, lutetium oxide (Lu₂O₃) films, yttrium oxide (Y₂O₃) films, hafnium nitride films, aluminum nitride films, hafnium oxide nitride films, or aluminum oxide nitride films. Examples of deposition methods for these films include CVD, PVD, and ALD.

[0350] In the following text, reference will be made to Figure 8 and 9A The operation of the imaging element (first imaging element) of Embodiment 1 is described. The imaging element of Embodiment 1 also includes a control unit disposed on a semiconductor substrate 70 and including a driving circuit, and a first electrode 11, a second electrode 12, a charge storage electrode 14, and a charge movement control electrode 21 are connected to the driving circuit. Here, the potential of the first electrode 11 is higher than the potential of the second electrode 12. That is, for example, the first electrode 11 is set to a positive potential, while the second electrode 12 is set to a negative potential. Electrons generated by photoelectric conversion in the photoelectric conversion layer 13 are read out to the floating diffusion layer. This also applies to other embodiments. Note that in the mode where the first electrode 11 is set to a negative potential, the second electrode is set to a positive potential, and electrons and holes generated by photoelectric conversion in the photoelectric conversion layer 13 are read out to the floating diffusion layer, it is only necessary to reverse the high and low potentials described below.

[0351] exist Figure 8 Example 11, which will be described later Figure 51 and 52 and Example 12 Figure 58 and 59 The notation used is as follows. Note that... Figure 9A , 9B 9C is used to describe Figure 8 (Example 1) Figure 51 (Example 11) and Figure 58 Equivalent circuit diagrams of imaging elements and stacked imaging elements for each part of Examples 1, 11 and 12 in (Example 12).

[0352] P A...point P of the photoelectric conversion layer 13, which is located between the charge storage electrode 14 and the first electrode 11, or between the transport control electrode (charge transport electrode) 15 and the first electrode 11. A electric potential at

[0353] P B ...point P in the region of the photoelectric conversion layer 13 facing the charge motion control electrode 21 B electric potential at

[0354] P C ...point P in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 C electric potential at

[0355] P C1 ...point P in the region facing the charge storage electrode segment 14A of the photoelectric conversion layer 13 C1 electric potential at

[0356] P C2 ...point P in the region facing the charge storage electrode segment 14B of the photoelectric conversion layer 13 C2 electric potential at

[0357] P C3 ...point P in the region facing the charge storage electrode segment 14C of the photoelectric conversion layer 13 C3 electric potential at

[0358] P D ...point P in the region of the photoelectric conversion layer 13 facing the transport control electrode (charge transport electrode) 15 D electric potential at

[0359] FD····· Potential of the first floating diffusion layer FD1

[0360] V 0A The potential of charge storage electrode 14

[0361] V 0A-A The potential of the charge storage electrode section is 14A.

[0362] V 0A-B The potential of charge storage electrode section 14B

[0363] V 0A-C The potential of the charge storage electrode section 14C

[0364] V 0T The potential of the charge transfer control electrode (charge transfer electrode) 15

[0365] RST·····Reset transistor TR1 rst The potential of the gate portion 51

[0366] V DD The potential of the power source

[0367] VSL1 signal line (data output line) VSL1

[0368] TR1 rst Reset transistor TR1 rst

[0369] TR1 amp Amplifying transistor TR1 amp

[0370] TR1 sel ...Select transistor TR1 sel

[0371] During charge storage, the drive circuit will apply potential V 11 Applying a potential V to the first electrode 11 12 The potential V is applied to the charge storage electrode 14 and the potential V is applied to the charge storage electrode 14. 13 Light is applied to the charge movement control electrode 21. Light incident on the photoelectric conversion layer 13 causes photoelectric conversion within the photoelectric conversion layer 13. Electrons and holes generated by the photoelectric conversion travel through wiring V... 0U The voltage is transmitted from the second electrode 12 to the drive circuit. On the other hand, the potential of the first electrode 11 is higher than the potential of the second electrode 12. That is, for example, a positive potential is applied to the first electrode 11, while a negative potential is applied to the second electrode 12. Therefore, the potential is set such that V 12 ≥V 11 Preferably, V 12 >V 11 , thus maintained, and V 12 >V 13 This is maintained. Therefore, electrons generated by photoelectric conversion are attracted to the charge storage electrode 14, and the electrons remain in the region 13 of the photoelectric conversion layer 13 facing the charge storage electrode 14. C That is, the charge is stored in the photoelectric conversion layer 13. 12 Greater than V 11 Therefore, electrons generated within the photoelectric conversion layer 13 do not move towards the first electrode 11. Furthermore, V 12 Greater than V 13Therefore, electrons generated within the photoelectric conversion layer 13 do not move toward the charge movement control electrode 21. In other words, this prevents the charge generated by photoelectric conversion from flowing into adjacent imaging elements. During the photoelectric conversion process, the potential in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 becomes a larger negative value.

[0372] A reset operation is then performed during charge storage. This resets the potential of the first floating diffusion layer FD1, and the potential of the first floating diffusion layer FD1 becomes the potential V of the power source. DD .

[0373] After the reset operation is complete, the charge is read out. That is, during charge transfer, the drive circuit converts the potential V... 21 Applying a potential V to the first electrode 11 22 The potential V is applied to the charge storage electrode 14 and the potential V is applied to the charge storage electrode 14. 23 An electric potential is applied to the charge motion control electrode 21. Here, the potential is set such that V 21 >V 22 >V 23 This is maintained. Therefore, electrons that have stopped in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 are read out to the first electrode 11 and further read out to the first floating diffusion layer FD1. That is, the charge stored in the photoelectric conversion layer 13 is read out to the control unit. Furthermore, V 22 Greater than V 23 Therefore, electrons generated within the photoelectric conversion layer 13 do not move toward the charge movement control electrode 21. In other words, this prevents the charge generated by photoelectric conversion from flowing into adjacent imaging elements.

[0374] This completes a series of operations, including charge storage, reset, and charge transfer.

[0375] The amplifying transistor TR1 is located after electrons are read out into the first floating diffusion layer FD1. amp and select transistor TR1 sel The operation is the same as that of a conventional transistor. Furthermore, the series of operations including charge storage, reset, and charge transport of the second and third imaging elements are similar to those of conventional series of operations including charge storage, reset, and charge transport. Additionally, as in conventional techniques, the reset noise of the first floating diffusion layer FD1 can be removed during correlated double sampling (CDS).

[0376] As described above, a charge storage electrode, arranged separately from the first electrode and positioned via an insulating layer toward the photoelectric conversion layer, is disposed in the imaging element of Embodiment 1 or Embodiments 2 to 8 described later. Therefore, in the photoelectric conversion within the photoelectric conversion unit after light is applied, the photoelectric conversion layer, the insulating layer, and the charge storage electrode constitute a capacitor. Charge can be stored in the photoelectric conversion layer. Thus, the charge storage portion can be completely depleted to remove the charge at the start of exposure. This suppresses the degradation in image quality caused by random noise degradation due to increased KTC noise. Furthermore, all pixels can be reset at once, achieving a so-called global shutter function.

[0377] Furthermore, when light enters the photoelectric conversion layer in the imaging element of Embodiment 1 and photoelectric conversion occurs within the photoelectric conversion layer, the absolute value of the potential applied to the portion of the photoelectric conversion layer facing the charge storage electrode is greater than the absolute value of the potential applied to region B of the photoelectric conversion layer. Therefore, the charge generated by photoelectric conversion is strongly attracted to the portion of the photoelectric conversion layer facing the charge storage electrode. This prevents the charge generated by photoelectric conversion from flowing into adjacent imaging elements, and the quality of the captured video (image) is not degraded. Alternatively, a charge movement control electrode is formed in the region facing region B of the photoelectric conversion layer via an insulating layer, and the electric field and potential of region B of the photoelectric conversion layer located above the charge movement control electrode can be controlled. Therefore, the charge movement control electrode can prevent the charge generated by photoelectric conversion from flowing into adjacent imaging elements, and the quality of the captured video (image) is not degraded.

[0378] Figure 10 A conceptual diagram of a solid-state imaging device according to Embodiment 1 is shown. Embodiment 1 of the solid-state imaging device 100 includes an imaging region 111, which includes stacked imaging elements 101 arranged in a two-dimensional array, a vertical drive circuit 112 serving as a drive circuit (peripheral circuit) for the stacked imaging elements 101, a column signal processing circuit 113, a horizontal drive circuit 114, an output circuit 115, a drive control circuit 116, and so on. Note that the circuits may include known circuits or other circuit configurations (e.g., various circuits used in conventional CCD solid-state imaging devices or CMOS solid-state imaging devices). Note that in Figure 10 In the image, reference numeral "101" is shown only in one row of stacked imaging elements 101.

[0379] The drive control circuit 116 generates clock and control signals based on the vertical synchronization signal, the horizontal synchronization signal, and the master clock, which serve as references for the operation of the vertical drive circuit 112, the column signal processing circuit 113, and the horizontal drive circuit 114. Furthermore, the generated clock and control signals are input to the vertical drive circuit 112, the column signal processing circuit 113, and the horizontal drive circuit 114.

[0380] The vertical drive circuit 112 includes, for example, a shift register, and sequentially selects and scans the stacked imaging elements 101 of the imaging region 111 row by row in the vertical direction. Furthermore, pixel signals (image signals) based on the current (signal) generated according to the amount of light received in each stacked imaging element 101 are transmitted to the column signal processing circuit 113 via signal lines (data output lines) 117 and VSL.

[0381] For example, column signal processing circuit 113 is arranged for each column of, for example, stacked imaging elements 101, and is configured to use signals from black reference pixels (although not shown, formed around the effective pixel area) to perform signal processing, such as noise removal and signal amplification, on the image signal output from a row of stacked imaging elements 101 for each imaging element. A horizontal selection switch (not shown) is connected and disposed between the output stage of column signal processing circuit 113 and horizontal signal line 118.

[0382] The horizontal drive circuit 114 includes, for example, a shift register, and sequentially outputs horizontal scan pulses to sequentially select column signal processing circuits 113. The horizontal drive circuit 114 outputs signals from each column signal processing circuit 113 to the horizontal signal line 118.

[0383] The output circuit 115 processes the signals sequentially provided by the slave signal processing circuit 113 through the horizontal signal line 118 and outputs the signals.

[0384] Figure 11 Equivalent circuit diagrams of the imaging element of Embodiment 1 and a variant of the stacked imaging element (Variation 2 of Embodiment 1) are shown. Figure 12 A schematic layout diagram of the first electrode, charge storage electrode, and transistor of the control unit included in a variant of the imaging element of Embodiment 1 (Variation 2 of Embodiment 1) is shown. Thus, the reset transistor TR1... rst The other source / drain region 51B can be grounded, instead of connecting the other source / drain region 51B to the power supply V. DD .

[0385] For example, the imaging element and the stacked imaging element of Example 1 can be produced by the following method: First, an SOI substrate is prepared. Then, a first silicon layer is formed on the surface of the SOI substrate based on an epitaxial growth method, and p is formed on the first silicon layer. + Layer 73 and n-type semiconductor region 41. Next, a second silicon layer is formed on the first silicon layer using an epitaxial growth method, and a device separation region 71, an oxide film 72, and a p-type semiconductor region 41 are formed on the second silicon layer. + Layer 42, n-type semiconductor region 43 and p +Layer 44. Furthermore, various transistors, including those in the control unit of the imaging element, are formed on the second silicon layer, and a wiring layer 62, an interlayer insulating layer 76, and various wirings are further formed on top of it. The interlayer insulating layer 76 and a support substrate (not shown) are then bonded together. Subsequently, the SOI substrate is removed to expose the first silicon layer. Note that the surface of the second silicon layer corresponds to the front surface 70A of the semiconductor substrate 70, and the surface of the first silicon layer corresponds to the rear surface 70B of the semiconductor substrate 70. Furthermore, the first and second silicon layers are collectively referred to as the semiconductor substrate 70. Next, an opening for forming a contact hole 61 is formed on the rear surface 70B side of the semiconductor substrate 70, and an HfO2 film 74, an insulating film 75, and the contact hole 61 are formed. In addition, pads 63, 64, and 22, an interlayer insulating layer 81, connection holes 65, 66, and 23, a first electrode 11, a charge storage electrode 14, a charge movement control electrode 21, and an insulating layer 82 are formed. Next, the connection portion 67 is opened, and the photoelectric conversion layer 13, the second electrode 12, the protective layer 83, and the on-chip microlens 90 are formed. In this way, the imaging element and the stacked imaging element of Embodiment 1 can be obtained.

[0386] Figure 13 (Variation 3 of Example 1) Figure 14A (Variation 4 of Example 1) Figure 14B , Figure 15A (Variation 5 of Example 1) and Figure 15B Schematic layout diagrams of other variations of the first electrode and charge storage electrode included in the imaging element of Embodiment 1 are shown. In the examples shown in these figures, a common first electrode 11 is provided to correspond to the four charge storage electrodes 14 in the four imaging elements. Furthermore, in Figure 13 In the example shown, the charge movement control electrode 21 is formed in a portion 82 of the insulating layer 82 located in the region (region b) between the charge storage electrode 14 and the charge storage electrode 14. B Below. On the other hand, in Figure 14A In the example shown, the charge movement control electrode 21 is formed below a portion of the region of the insulating layer 82 surrounded by the four charge storage electrodes 14. Figure 15A The example shown is Figure 13 and Figure 14A The combination of the examples shown, Figure 15B The example shown is Figure 14B and Figure 15A The combination of examples shown. Note that... Figure 13 , 14A The examples shown in 14B, 15A and 15B also represent solid-state imaging devices of the first and second configurations.

[0387] exist Figure 14BIn the example shown, a common first electrode 11 is provided to correspond to the four charge storage electrodes 14 in the four imaging elements, and a charge movement control electrode 21 is formed below a portion of the region of the insulating layer 82 surrounded by the four charge storage electrodes 14. Furthermore, a discharge electrode 25 is formed below a portion of the region of the insulating layer 82 surrounded by the four charge storage electrodes 14. The discharge electrode 25 can serve as, for example, a floating diffusion region or overflow port of the photoelectric conversion layer 13. The discharge electrode 25 and the photoelectric conversion layer 13 are connected through an opening provided in the insulating layer 82. That is, similar to the relationship between the photoelectric conversion layer 13 and the first electrode 11, the photoelectric conversion layer 13 extends in the opening provided in the insulating layer 82, and the extended portion of the photoelectric conversion layer 13 contacts the discharge electrode 25. The discharge electrode 25 is connected to the vertical drive circuit 112 included in the drive circuit through a connection hole 25A, a pad portion 25B, and wiring (not shown) provided in the interlayer insulating layer 81. The discharge electrode 25 can also be applied in other embodiments. Note that, for reference, Figure 16B It shows when Figure 15A When the discharge electrode 25 replaces the charge movement control electrode 21 in variant 5 of embodiment 1 shown, it moves along... Figure 15A A schematic cross-sectional view taken by a single-dotted line AA.

[0388] Or, in Figure 15B In the example shown, a common first electrode 11 is provided to correspond to the four charge storage electrodes 14 in the four imaging elements, and a charge movement control electrode 21 is formed below a portion of the insulating layer located in the region between the charge storage electrodes 14. Furthermore, a discharge electrode 25 is formed below a portion of the insulating layer 82 in the region surrounded by the four charge storage electrodes 14. The discharge electrode 25 and the photoelectric conversion layer 13 are connected through an opening provided in the insulating layer 82. That is, similar to the relationship between the photoelectric conversion layer 13 and the first electrode 11, the photoelectric conversion layer 13 extends in the opening provided in the insulating layer 82, and the extended portion of the photoelectric conversion layer 13 contacts the discharge electrode 25. Figure 16A It shows Figure 15B In the variant 5 of embodiment 1 shown, along Figure 15B A schematic cross-sectional view taken by a single-dash line BB.

[0389] or, Figure 1B A schematic cross-sectional view of a portion of a variant of the imaging element (two imaging elements arranged side by side) of Embodiment 1 is shown, and the photoelectric conversion layer may have a lower semiconductor layer 13. DN and photoelectric conversion layer 13 UP The layered structure. Upper photoelectric conversion layer 13 UP and the lower semiconductor layer 13 DNIt is shared by multiple imaging elements. That is, a photoelectric conversion layer 13 is formed among multiple imaging elements. UP and a lower semiconductor layer 13 DN This allows for the provision of the lower semiconductor layer 13 in this manner. DN This prevents, for example, recombination during charge storage. It also improves the charge transfer efficiency from the photoelectric conversion layer 13 to the first electrode 11. Furthermore, the charge generated in the photoelectric conversion layer 13 can be temporarily held to control the timing of transport, etc. Additionally, the generation of dark current can be suppressed. Upper photoelectric conversion layer 13 UP The materials contained in the lower semiconductor layer 13 can be appropriately selected from various materials contained in the photoelectric conversion layer 13. Alternatively, it is preferable that the lower semiconductor layer 13... DN The material contained therein is a material with a large bandgap energy value (e.g., a bandgap energy value equal to or greater than 3.0 eV) and higher fluidity than the material contained in the photoelectric conversion layer. Specifically, an example of such a material includes oxide semiconductor materials, such as IGZO. Alternatively, the lower semiconductor layer 13 DN Another example of materials included includes materials having an ionization potential greater than that of materials included in the photoelectric conversion layer when the charge to be stored is electrons. Alternatively, preferably, the impurity concentration of the material included in the lower semiconductor layer is preferably equal to or less than 1 × 10⁻⁶. 18 cm -3 Note that the construction and structure of Variation 6 of Example 1 can be applied to other examples.

[0390] Example 2

[0391] Example 2 relates to an imaging element, etc., according to a second aspect of the present invention. Figure 17A A schematic cross-sectional view of a portion of the imaging element (two imaging elements arranged side by side) of Embodiment 2 is shown. In the imaging element of Embodiment 2, the region 13 of the photoelectric conversion layer 13 located between the first electrode 11 and the charge storage electrode 14 is shown. A The width W of (region A of the photoelectric conversion layer) A The region 13 of the photoelectric conversion layer 13 located between the imaging element and the adjacent imaging element B The width W of (region B of the photoelectric conversion layer) B Narrow. (W) A / W B An example of a value includes

[0392] 1 / 2≤(W A / W B )<1

[0393] Specifically, in Example 2, the value is

[0394] (W A / W B ) = 2 / 3

[0395] In addition, the construction and structure of the imaging element in Embodiment 2 may be similar to those of an imaging element having the basic structure of this disclosure, and details will not be described further.

[0396] Thus, in the imaging element of Embodiment 2, the width of the region of the photoelectric conversion layer located between the first electrode and the charge storage electrode is greater than the width W of the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element. B Narrow. This prevents the charge generated by photoelectric conversion from flowing into adjacent imaging elements, and the quality of the captured video (image) is not degraded.

[0397] Example 3

[0398] Example 3 relates to an imaging element, etc., according to the fourth aspect of the present invention. Figure 17B A schematic cross-sectional view of a portion of the imaging elements (two imaging elements arranged side by side) of Embodiment 3 is shown. Figure 19 and Figure 20 A schematic plan view of a portion of the imaging element (a 2×2 imaging element arranged side-by-side) of Embodiment 3 is shown. In the imaging element of Embodiment 3, instead of the second electrode 12, in the region 13 of the photoelectric conversion layer 13 located between the imaging element and the adjacent imaging element. B A charge movement control electrode 24 is formed on the surface. The charge movement control electrode 24 is disposed separately from the second electrode 12. In other words, the second electrode 12 is provided for each imaging element, and the charge movement control electrode 24 is disposed separately from the second electrode 12 in region B of the photoelectric conversion layer 13, surrounding at least a portion of the second electrode 12. The charge movement control electrode 24 is formed at the same level as the second electrode 12.

[0399] In addition, such as Figure 18A As shown, a schematic cross-sectional view of a portion of the imaging element (two imaging elements arranged side by side) of Embodiment 3 is presented. The second electrode 12 can be divided into multiple second electrodes 12, and different potentials can be applied individually to the divided second electrodes 12. Furthermore, as shown in 18B, a charge motion control electrode 24 can be disposed between the divided second electrodes 12 and the second electrode 12.

[0400] Note that in Figure 19 In the example shown, a charge storage electrode 14 is provided to correspond to a first electrode 11 in an imaging element. On the other hand, in Figure 20 In the example shown in (Variant Example 1 of Embodiment 3), a common first electrode 11 is provided to correspond to the two charge storage electrodes 14 in the two imaging elements. Figure 17B A schematic cross-sectional view of a portion of the imaging element (two imaging elements arranged side by side) of Embodiment 3 shown corresponds to Figure 20 .

[0401] In embodiment 3, the second electrode 12 located on the light incident side is arranged in... Figure 19 The imaging elements in the left and right directions are shared, and are arranged in Figure 19 A pair of imaging elements in the vertical direction share the same space. Furthermore, the charge motion control electrode 24 is also arranged in... Figure 19 The imaging elements in the left and right directions are shared, and are arranged in Figure 19 A pair of imaging elements in the vertical direction share the same space. The second electrode 12 and the charge motion control electrode 24 can be obtained by depositing a material layer of the second electrode 12 and the charge motion control electrode 24 on the photoelectric conversion layer 13 and then patterning the material layer. The second electrode 12 and the charge motion control electrode 24 are respectively connected to wiring (not shown), and the wiring is connected to the driving circuit. The wiring connected to the second electrode 12 is shared by multiple imaging elements. The wiring connected to the charge motion control electrode 24 is also shared by multiple imaging elements.

[0402] In the imaging element of Embodiment 3, the driving circuit applies a potential V2' to the second electrode 12 and a potential V to the charge motion control electrode 24. 13 The charge is stored in the photoelectric conversion layer 13 during charge storage. During charge transport, the driving circuit applies a potential V2” to the second electrode 12 and a potential V” to the charge movement control electrode 24. 23 The charge stored in the photoelectric conversion layer 13 is read out to the control unit via the first electrode 11. Here, the potential of the first electrode 11 is higher than the potential of the second electrode 12, and therefore...

[0403] V2'≥V 13 'and V2"≥V 23 "It was able to be maintained."

[0404] Meanwhile, in the configuration shown in Figure 1, where a charge movement control electrode 21 is disposed adjacent to the first electrode 11, the following problem may occur: During charge storage, the drive circuit may cause the potential V to... 11 Applying a potential V to the first electrode 11 12 Applying a potential V to the charge storage electrode 14 13 A charge motion control electrode 21 is applied, and a potential V2 is applied to the second electrode 12. For example, here, V 12 >V 11 V2 and V 12 >V 13 V2 was retained. Figure 21A and Figure 21B In this context, "A" represents the potential within the photoelectric conversion layer 13 located above the first electrode 11. On the other hand, at potential V... 13 When the potential is applied to the charge movement control electrode 21 but not to the charge storage electrode 14, the potential within the photoelectric conversion layer 13 located above the charge movement control electrode 21 will be as follows: Figure 21A It changes as simply as indicated by "B" in the diagram. However, the potential V... 12 A potential is applied to the charge storage electrode 14, and due to the influence of the charge storage electrode 14, the potential is as follows: Figure 21A The change is as indicated by "C". That is, within the insulating layer 82, the potential decreases toward the charge movement control electrode 21. Therefore, during charge storage, electrons and holes are stored in the region of the insulating layer 82 located above the charge storage electrode 14, and the charge generated by photoelectric conversion can be weakly attracted to the portion of the photoelectric conversion layer facing the charge storage electrode.

[0405] On the other hand, in embodiment 3, the charge motion control electrode 24 is formed at the same level as the second electrode 12, and the potential V 13 'Applied to the charge movement control electrode 24. Therefore, the potential within the photoelectric conversion layer 13 located on the lower side of the charge movement control electrode 24 is as follows...' Figure 21B The increase is as simple as indicated by "B" in the diagram. Furthermore, there is no charge movement control electrode 21 below the photoelectric conversion layer 13 located below the charge movement control electrode 24, and the potential increases even more simply within the insulating layer 82. Therefore, during charge storage, electrons and holes are not stored in the region of the insulating layer 82 located below the charge movement control electrode 24, and this prevents the phenomenon where charges generated by photoelectric conversion are weakly attracted to the portion of the photoelectric conversion layer facing the charge storage electrode. This more definitively prevents degradation of the quality of the captured video (image).

[0406] In this way, in the imaging element of Embodiment 3, instead of a second electrode, a charge motion control electrode is formed in the region of the photoelectric conversion layer located between the imaging element and adjacent imaging elements. Therefore, the charge motion control electrode can prevent the charge generated by photoelectric conversion from flowing into adjacent imaging elements, and the quality of the captured video (image) is not degraded.

[0407] Figure 22A and 22B A schematic plan view of a portion of a variant of the imaging element of Embodiment 3 (Variation 2 of Embodiment 3) is shown. Note that... Figure 22A , 23AExamples 25A, 26A, 27A, and 28A illustrate where a common first electrode 11 is provided to correspond to the four charge storage electrodes 14 in the four imaging elements. Furthermore, as... Figure 22B As shown, the second electrode 12 is disposed above the charge storage electrode 14 with substantially the same dimensions. The second electrode 12 is surrounded by the charge motion control electrode 24. The charge motion control electrode 24 is shared by the imaging element. An insulating film (not shown) is formed on the photoelectric conversion layer 13 including the second electrode 12 and the charge motion control electrode 24, and a contact hole (not shown) connecting to the second electrode 12 is formed on the insulating film above the second electrode 12. A wiring V connected to the contact hole is provided on the insulating film. 0U (Not shown). Note the second electrode 12, insulating film, contact hole, and wiring V. 0U The construction and structure are similar in the following variations. Furthermore, Figure 22A , 22B The examples shown in 23A, 23B, 23C, 25A, 25B, 26A, 26B, 27A, 27B, 28A and 28B also represent solid-state imaging devices of the first and second configurations.

[0408] Figure 23A , 23B Figures 23C and 23C show a schematic plan view of a portion of a variant of Example 3. (As shown) Figure 23B and 23C As shown, the second electrode 12 is disposed above the charge storage electrode 14 with substantially the same dimensions. The second electrode 12 is surrounded by the charge motion control electrode 24. The charge motion control electrode 24 is shared by the four imaging elements. The shared portion is formed on the photoelectric conversion layer 13. Note that in Figure 23C In the example shown, the second electrode 12 extends to the second electrode of the adjacent imaging element.

[0409] Figure 24A A schematic cross-sectional view of a portion of a variant of the imaging element (two imaging elements arranged side by side) of Embodiment 3 is shown. Figure 25A and 25B A schematic plan view of this part is shown. In a variant 4A of embodiment 3, a second electrode 12 is provided for each imaging element, and a charge motion control electrode 24 is disposed around at least a portion of the second electrode 12 and separated from the second electrode 12. A portion of the charge storage electrode 14 is located on the underside of the charge motion control electrode 24. The second electrode 12 is disposed on the upper side of the charge storage electrode 14 with a smaller size than the charge storage electrode 14.

[0410] Figure 24BA schematic cross-sectional view of a portion of a variant of the imaging element (two imaging elements arranged side by side) of Embodiment 3 is shown. Figure 26A and 26B A schematic plan view of this part is shown. In Variation 4B, a second electrode 12 is provided for each imaging element, and a charge motion control electrode 24 surrounds at least a portion of the second electrode 12 and is separated from the second electrode 12. A portion of the charge storage electrode 14 is located below the charge motion control electrode 24, and furthermore, a charge motion control electrode (lower charge motion control electrode) 21 is located below the charge motion control electrode (upper charge motion control electrode 24). The size of the second electrode 12 is smaller than that in Variation 4A. That is, the area of ​​the second electrode 12 facing the charge motion control electrode 24 is closer to the first electrode 11 than the area of ​​the second electrode 12 facing the charge motion control electrode 24 in Variation 4A. The charge storage electrode 14 is surrounded by the charge motion control electrode 21.

[0411] Figure 27A and Figure 27B A schematic plan view of a portion of a variant of the imaging element of Embodiment 3 (Variation 4C of Embodiment 3) is shown. In Variation 4C, as in Variation 4B of Embodiment 3, a portion of the charge storage electrode 14 is located below the charge movement control electrode 24. The size of the second electrode 12 is smaller than that in Variation 4A. That is, the region of the second electrode 12 facing the charge movement control electrode 24 is closer to the first electrode 11 than the region of the second electrode 12 facing the charge movement control electrode 24 in Variation 4A. Furthermore, the charge movement control electrode 24 includes an external charge movement control electrode 241 and an internal charge movement control electrode 242 disposed between the external charge movement control electrode 241 and the second electrode 12. The charge storage electrode 14 is surrounded by the charge movement control electrode 21. During charge transfer, the relationship (potential applied to the external charge movement control electrode 241) < (potential applied to the internal charge movement control electrode 242) < (potential applied to the second electrode 12) can be satisfied to transfer charge more efficiently.

[0412] Figure 28A and Figure 28BA schematic plan view of a portion of a variant of the imaging element of Embodiment 3 (Variation 4D of Embodiment 3) is shown. In Embodiment 4D, as in Variation 4B of Embodiment 3, the charge motion control electrode (lower charge motion control electrode) 21 is disposed below the charge motion control electrode (upper charge motion control electrode) 24. The size of the second electrode 12 is smaller than that in Variation 4B. That is, the region of the second electrode 12 facing the charge motion control electrode 24 is closer to the first electrode 11 than the region of the second electrode 12 facing the charge motion control electrode 24 in Variation 4B. Furthermore, the spacing between the charge motion control electrode 24 and the second electrode 12 is wider than in Variation 4B. The charge storage electrode 14 is surrounded by the charge motion control electrode 21. The potential generated by the coupling of the charge motion control electrode 24 and the second electrode 12 is applied to the region of the photoelectric conversion layer 13 located below the region between the charge motion control electrode 24 and the second electrode 12.

[0413] Figure 29A , 29B The potential states in each part (during charge transport) of each of the variants 4B, 4C and 4D of Example 3 are schematically illustrated, respectively.

[0414] Example 4

[0415] Example 4 relates to an imaging element, etc., according to the fifth aspect of this disclosure. Figure 30 A schematic cross-sectional view of a portion of the imaging element (two imaging elements arranged side by side) of Embodiment 4 is shown. In the imaging element of Embodiment 4, region (region a) 82 is located between the first electrode 11 and the charge storage electrode 14. A (Specifically, the region 82 of the insulating layer 82 located between the first electrode 11 and the charge storage electrode 14) A The insulating material (insulating material A) contained in ) 82 A The value of the dielectric constant ε′ A Higher than the region located between the imaging element and the adjacent imaging element (region b) 82 B (Specifically, the insulating layer 82 is located in the region 82 between the imaging element and the adjacent imaging element.) B The insulating material (insulating material B) included in ) 82 B The value of the dielectric constant ε′ B Insulating material A (82) A ′) and insulating material B(82) BThe insulating material A(82) is formed at the level of the insulating layer 82 covering the charge storage electrode 14. That is, when the insulating layer 82 is represented by two layers including a lower insulating layer filling the gap between the charge storage electrode 14 and the charge storage electrode 14, and an upper insulating layer covering the charge storage electrode 14 and formed on the lower insulating layer, the insulating material A(82) is formed in the horizontal plane of the insulating layer 82 covering the charge storage electrode 14. A ′) and insulating material B(82) B A portion of the upper insulating layer is filled (specifically, the region 82 of the upper insulating layer located between the first electrode 11 and the charge storage electrode 14). A A portion of the middle and the upper insulating layer in the region between the imaging element and the adjacent imaging element (region b) 82 B (part of the text).

[0416] The imaging element of Embodiment 4 and the stacked imaging element can also be further improved by forming an insulating material A (82) during the manufacturing process of the imaging element and the stacked imaging element of Embodiment 1. A ′) and insulating material B(82) B Region 82 of the insulating layer 82 of ′) A and 82 B To obtain.

[0417] In the imaging element of Embodiment 4, the dielectric constant of the insulating material contained in the region between the first electrode and the charge storage electrode is higher than that of the insulating material contained in the region between the imaging element and adjacent imaging elements. Therefore, the capacitance of capacitor A is greater than that of capacitor B, and more charge is attracted to the region between the first electrode and the charge storage electrode compared to the region between the imaging element and adjacent imaging elements. This prevents charge generated by photoelectric conversion from flowing into adjacent imaging elements, and the quality of the captured video (image) is not degraded.

[0418] Figure 31 A schematic cross-sectional view of a portion of the imaging elements (two imaging elements arranged side by side) of Embodiment 4 is shown, and Figure 32 and 33 A schematic cross-sectional view of a portion of another variant example is shown. Note that... Figure 30 , 31 Insulating material A (82) shown in 32 and 33 A ′) and insulating material B(82) B The formation positions of ′) can be appropriately combined.

[0419] exist Figure 31 In the example shown, insulating material A (82 A From the region 82 of the insulating layer 82 located between the first electrode 11 and the charge storage electrode 14 AA portion of the charge storage electrode 14 begins to be filled with an insulating layer, the insulating material B (82) B ′) The region between the imaging element and the adjacent imaging element filled with an insulating layer (region b) 82 B Part of it.

[0420] exist Figure 32 In the example shown, insulating material A (82 A The region 82 between the first electrode 11 and the charge storage electrode 14 filled with insulating layer 82 A Part of the lower insulating layer, and insulating material B (82) B ′) Fill the region between the imaging element and the adjacent imaging element (region b) 82 B Part of the lower insulating layer.

[0421] exist Figure 33 In the example shown, insulating material A (82 A ′) The region 82 of the interlayer insulation layer 81 located in the insulation layer 82 A The lower part, area 82 A Located between the first electrode 11 and the charge storage electrode 14, and with insulating material B (82 B ′) The region (region b) 82 of the interlayer insulating layer 81 located between the imaging element and the adjacent imaging element. B The part below.

[0422] Example 5

[0423] Example 5 relates to an imaging element, etc., according to the sixth aspect of this disclosure. Figure 34 A schematic cross-sectional view of a portion of the imaging element (two imaging elements arranged side by side) of Embodiment 5 is shown. In the imaging element of Embodiment 5, the region 82 of the insulating layer 82 located between the first electrode 11 and the charge storage electrode 14 is shown. A The thickness t of (region A of the insulating layer) In-A The region 82 of the insulating layer 82 located between the imaging element and the adjacent imaging element B The thickness t of (region B of the insulating layer) In-B Thin. (t) In-A / t In-B Examples of values ​​include

[0424] 1 / 2≤(t In-A / t In-B )<1,

[0425] Specifically, the value is

[0426] (t In-A / t In-B= 0.9.

[0427] The imaging element and the stacked imaging element of Embodiment 5 can control the region 82 of the insulating layer 82 during the formation of the insulating layer 82 in the manufacturing process of the imaging element and the stacked imaging element of Embodiment 1. A and 82 B The thickness is obtained from the etching control thickness (e.g., based on the etching control thickness).

[0428] In the imaging element of Embodiment 5, the thickness of the insulating layer in the region between the first electrode and the charge storage electrode is thinner than the thickness of the insulating layer in the region between the imaging element and adjacent imaging elements. Therefore, the capacitance of capacitor A is greater than that of capacitor B, and more charge is attracted to the region of the insulating layer between the first electrode and the charge storage electrode compared to the region attracted to the insulating layer between the imaging element and adjacent imaging elements. This prevents charge generated by photoelectric conversion from flowing into adjacent imaging elements, and the quality of the captured video (image) is not degraded.

[0429] Figure 35 A schematic cross-sectional view of a portion of a variant of the imaging elements (two imaging elements arranged side by side) of Embodiment 5 is shown, and Figure 36 A schematic cross-sectional view of a portion of another variant example is shown.

[0430] exist Figure 35 In the variant shown, the region 82 of the insulating layer 82 located between the first electrode 11 and the charge storage electrode 14 A The thickness t of (region A of the insulating layer) In-A The region 82 of the insulating layer 82 located between the imaging element and the adjacent imaging element B The thickness t of (region B of the insulating layer) In-B Thin. However, the top surface of the insulating layer 82 above the charge storage electrode 14 is at the same level as the top surface of the insulating layer 82 in region B of the insulating layer.

[0431] exist Figure 36 In the variant shown, the top surface of the insulating layer 82 in region B of the insulating layer is horizontal with that included in an imaging element (located in... Figure 36 The top surface of the insulating layer 82 above the charge storage electrode 14 in the imaging element on the right is at the same level as that in another imaging element (located in...). However, this top surface is at a lower level than that included in another imaging element (located in...). Figure 36The top surface of the insulating layer 82 above the charge storage electrode 14 in the left imaging element is at a higher level than the top surface of the insulating layer 82 in region A of the insulating layer. Furthermore, the top surface of the insulating layer 82 in region A of the insulating layer is at the same level as the top surface of the insulating layer 82 above the charge storage electrode 14 included in another imaging element. However, this top surface is at a lower level than the top surface of the insulating layer 82 above the charge storage electrode 14 included in one imaging element.

[0432] Example 6

[0433] Example 6 relates to an imaging element, etc., according to the seventh aspect of this disclosure. Figure 37 A schematic cross-sectional view of a portion of the imaging element (two imaging elements arranged side by side) of Embodiment 6 is shown. In the imaging element of Embodiment 6, the region 13 of the photoelectric conversion layer 13 located between the first electrode 11 and the charge storage electrode 14 is shown. A The thickness t of region A of photoelectric conversion layer 13 Pc-A The region 13 of the photoelectric conversion layer 13 located between the imaging element and the adjacent imaging element B The thickness t of region B of photoelectric conversion layer 13 Pc-B Thick. (t) Pc-A / t Pc-B Examples of values ​​include

[0434] 1<(t Pc-A / t Pc-B )≤2

[0435] Specifically, this value is

[0436] (t Pc-A / t Pc-B =1.25.

[0437] The imaging element and the stacked imaging element of Embodiment 6 can control the region 13 of the photoelectric conversion layer 13 during the formation of the photoelectric conversion layer 13 in the manufacturing process of the imaging element and the stacked imaging element of Embodiment 1. A and 13 B The thickness is obtained from the etching control thickness (e.g., based on the etching control thickness).

[0438] In the imaging element of Embodiment 6, the thickness of the region of the photoelectric conversion layer between the first electrode and the charge storage electrode is greater than the thickness of the region of the photoelectric conversion layer between the imaging element and adjacent imaging elements. This prevents the charge generated by photoelectric conversion from flowing into adjacent imaging elements, and the quality of the captured video (image) is not degraded.

[0439] Figure 38A schematic cross-sectional view of a portion of a variant of the imaging element (two imaging elements arranged side by side) of Embodiment 6 is shown, and, depending on the circumstances, t Pc-B The value can be 0. That is, depending on the situation, the region of the photoelectric conversion layer between the imaging element and the adjacent imaging element may not exist.

[0440] Example 7

[0441] Example 7 relates to an imaging element, etc., according to the eighth aspect of this disclosure. Figure 39 A schematic cross-sectional view of a portion of the imaging element (two imaging elements arranged side by side) of Embodiment 7 is shown. In the imaging element of Embodiment 7, a photoelectric conversion layer 13 is located between the first electrode 11 and the charge storage electrode 14. A (Region A of photoelectric conversion layer 13) and insulating layer 82 A The fixed charge FC in the region of the interface between (region A of insulating layer 82) and the region of the interface A Smaller than the photoelectric conversion layer 13 located between the imaging element and the adjacent imaging element B (Region B of photoelectric conversion layer 13) and insulating layer 82 B The fixed charge FC in the region of the interface between (region B of insulating layer 82) and the region of the interface B (FC) A / FC B Examples of values ​​for ) include

[0442] 1 / 10≤(FC A / FC B )<1.

[0443] exist Figure 39 In the diagram, the black circles represent the charges (electrons and holes) generated at the interface of the insulating layer. The amount of fixed charge in the region at the interface between the photoelectric conversion layer 13 and the insulating layer 82 can be controlled, for example, by depositing a thin film with a fixed charge.

[0444] In the imaging element of Embodiment 7, the amount of fixed charge in the region between the photoelectric conversion layer and the insulating layer located between the first electrode and the charge storage electrode is less than the amount of fixed charge in the region between the photoelectric conversion layer and the insulating layer located between the imaging element and the adjacent imaging element. This prevents the charge generated by photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) is not degraded.

[0445] Example 8

[0446] Example 8 relates to an imaging element, etc., according to the ninth aspect of the present invention. Figure 40A schematic cross-sectional view of a portion of the imaging element (two imaging elements arranged side by side) of Embodiment 8 is shown. In the imaging element of Embodiment 8, the region 13 of the photoelectric conversion layer is located between the first electrode 11 and the charge storage electrode 14. A Charge mobility CT in region A of photoelectric conversion layer 13 A The value is greater than that of the region 13 of the photoelectric conversion layer 13 located between the imaging element and the adjacent imaging element. B Charge mobility CT of region B of photoelectric conversion layer 13 B The value of . (CT) A / CT B Examples of values ​​include

[0447] 1<(CT A / CT B )≤1×10 2 .

[0448] Specifically, this value is

[0449] (CT A / CT B =2.

[0450] The imaging element and the stacked imaging element of Embodiment 8 can form the region 13 of the photoelectric conversion layer 13 by using materials having the following relationship. A and 13 B To obtain, the relationship is related to the region 13 of the photoelectric conversion layer 13 during the formation of the photoelectric conversion layer 13 in the manufacturing process of the imaging element and the stacked imaging element of Embodiment 1. A and 13 B The materials contained are the same as those described above, with the same charge mobility CT. A and charge mobility CT B The relationship.

[0451] In the imaging element of Embodiment 8, the charge mobility of the photoelectric conversion layer in the region between the first electrode and the charge storage electrode is greater than the charge mobility of the photoelectric conversion layer in the region between the imaging element and the adjacent imaging element. This prevents the charge generated by photoelectric conversion from flowing into the adjacent imaging element, and the quality of the captured video (image) is not degraded.

[0452] Figure 41 A schematic cross-sectional view of a portion of a variant of the imaging elements (two imaging elements arranged side by side) of Embodiment 8 is shown. Figure 41 In the variant shown, a portion of the photoelectric conversion layer 13 has an upper layer (upper photoelectric conversion layer) 13. UP ′ / lower layer (lower semiconductor layer) 13 DNThe two-layer structure of the photoelectric conversion layer 13. Region A(13) of the photoelectric conversion layer 13. A Region B(13) of the upper layer and photoelectric conversion layer 13 B ) on the upper layer 13 UP The portion of the photoelectric conversion layer 13 located above the charge storage electrode 14 contains the same material (upper layer composition material). Furthermore, region A(13) of the photoelectric conversion layer... A The lower layer 13 DN The lower layer 13 of the photoelectric conversion layer 13 located above the charge storage electrode 14. DN It contains the same material (lower layer constituent material). However, the upper layer constituent material and the lower layer constituent material are different. It is possible to provide the lower layer 13 in this way. DN This prevents, for example, recombination during charge storage. It also improves the charge transfer efficiency from the photoelectric conversion layer 13 to the first electrode 11. Furthermore, the charge generated in the photoelectric conversion layer 13 can be temporarily held to control the timing of transport, etc. Additionally, the generation of dark current can be suppressed.

[0453] Example 9

[0454] Example 9 is a modification of Examples 1 to 8. Figure 42 The imaging element and stacked imaging element of Embodiment 9 shown in the schematic partial cross-sectional view are front-illuminated imaging elements and stacked imaging elements. The imaging element and stacked imaging element have a stacked structure of three imaging elements, including: a first type of green light imaging element (first imaging element) sensitive to green light, as in Embodiment 1, which includes a first type of green light photoelectric conversion layer for absorbing green light; a second type of conventional blue light imaging element (second imaging element) sensitive to blue light, which includes a second type of blue light photoelectric conversion layer for absorbing blue light; and a second type of conventional red light imaging element (third imaging element) sensitive to red light, which includes a second type of red light photoelectric conversion layer for absorbing red light. Here, the red light imaging element (third imaging element) and the blue light imaging element (second imaging element) are disposed in the semiconductor substrate 70, and the second imaging element is located on the light incident side relative to the third imaging element. Additionally, the green light imaging element (first imaging element) is disposed above the blue light imaging element (second imaging element).

[0455] As in Embodiment 1, various transistors included in the control unit are disposed on the front surface 70A side of the semiconductor substrate 70. Each transistor may have a configuration and structure substantially similar to that described in Embodiment 1. Furthermore, a second imaging element and a third imaging element are disposed in the semiconductor substrate 70, and the imaging elements may also have a configuration and structure substantially similar to those described in Embodiment 1.

[0456] Interlayer insulating layers 77 and 78 are formed on the front surface 70A of the semiconductor substrate 70, and photoelectric conversion unit (first electrode 11, photoelectric conversion layer 13 and second electrode 12) and charge storage electrode 14, etc., including the imaging element of Embodiment 1, are disposed on the interlayer insulating layer 78.

[0457] Thus, except that the imaging element and the stacked imaging element are front-illuminated imaging elements and stacked imaging elements, the construction and structure of the imaging element and the stacked imaging element of Embodiment 9 can be similar to the construction and structure of the imaging element and the stacked imaging element of Embodiment 1, and details will not be described further.

[0458] Example 10

[0459] Example 10 is a modification of Examples 1 to 9.

[0460] Figure 43 The imaging element and stacked imaging element of Embodiment 10 shown in the schematic partial cross-sectional view are back-illuminated imaging elements and stacked imaging elements. This imaging element and stacked imaging element have a stacked structure of two imaging elements, including a first imaging element of the first type and a second imaging element of the second type as described in Embodiment 1. Furthermore, Figure 44 The schematic partial cross-sectional view of Embodiment 10 shows a variation of the imaging element and stacked imaging element, providing a front-illuminated imaging element and a stacked imaging element. The imaging element and stacked imaging element have a stacked structure of two imaging elements, including a first imaging element of the first type and a second imaging element of the second type as described in Embodiment 1. Here, the first imaging element absorbs primary color light, and the second imaging element absorbs complementary color light. Alternatively, the first imaging element absorbs white light, and the second imaging element absorbs infrared light.

[0461] Figure 45 The schematic partial cross-sectional view shows a variant of the imaging element of Embodiment 10, which is a back-illuminated imaging element. This imaging element includes the first imaging element of the first type in Embodiment 1. Furthermore, Figure 46 The schematic partial cross-sectional view shows a variant of the imaging element of Embodiment 10, which is a front-illuminated imaging element. This imaging element includes a first imaging element of the first type in Embodiment 1. Here, the first imaging element includes three types of imaging elements, including an imaging element that absorbs red light, an imaging element that absorbs green light, and an imaging element that absorbs blue light.

[0462] Furthermore, the solid-state imaging apparatus according to the first aspect of this disclosure includes a plurality of imaging elements. An example of the arrangement of the plurality of imaging elements includes a Bayer array. Color filters for separating blue, green, and red are arranged as needed on the light incident side of the imaging elements.

[0463] Note that, as an alternative to providing one first-type imaging element in Embodiment 1, two imaging elements (i.e., two photoelectric conversion units are stacked, and control units for the two imaging elements are provided on the semiconductor substrate) or three imaging elements (i.e., three photoelectric conversion units are stacked, and control units for the three imaging elements are provided on the semiconductor substrate) can be stacked. The following table illustrates the stacking structures of the first-type and second-type imaging elements.

[0464]

[0465]

[0466] Example 11

[0467] Example 11 is a modification of Examples 1 to 10, and Example 11 relates to an imaging element of the present disclosure including a transport control electrode (charge transport electrode). Figure 47 A schematic partial cross-sectional view of the imaging element and a portion of the stacked imaging element of Embodiment 11 is shown. Figure 48 and 49 Equivalent circuit diagrams of the imaging element and the stacked imaging element of Embodiment 11 are shown. Figure 50 A schematic layout diagram of the transistors of the first electrode, the transport control electrode, the charge storage electrode, and the control unit included in the imaging element of Embodiment 11 is shown. Figure 51 and 52 The potential state in each segment during operation of the imaging element in Embodiment 11 is schematically illustrated. Furthermore, Figure 53 A schematic layout diagram of the first electrode, the transport control electrode, and the charge storage electrode included in the imaging element of Embodiment 11 is shown. Figure 9B A description is shown Figure 51 and 52 Equivalent circuit diagrams of the imaging elements and stacked imaging elements of each segment of Embodiment 11.

[0468] The imaging element and the stacked imaging element of Embodiment 11 further include a transport control electrode (charge transport electrode) 15 disposed between the first electrode 11 and the charge storage electrode 14, separately disposed from the first electrode 11 and the charge storage electrode 14, and arranged to face the photoelectric conversion layer 13 via the insulating layer 82. The transport control electrode 15 passes through a connection hole 68B and a pad portion 68A provided in the interlayer insulating layer 81 and through a wiring V. 0T Connected to the pixel driving circuit included in the driving circuit.

[0469] In the following text, reference will be made to Figure 51 and 52The operation of the imaging element (first imaging element) of Embodiment 11 is described. Note, in particular, the potential applied to the charge storage electrode 14 and point P. D The potential value at is Figure 51 and 52 The changes between them.

[0470] During charge storage, the drive circuit will apply potential V 11 Applying a potential V to the first electrode 11 12 The potential V is applied to the charge storage electrode 14 and the potential V is applied to the charge storage electrode 14. 14 Light is applied to the transmission control electrode 15. Light incident on the photoelectric conversion layer 13 causes photoelectric conversion within the photoelectric conversion layer 13. Electrons and holes generated by the photoelectric conversion pass through wiring V... 0U The voltage is transmitted from the second electrode 12 to the drive circuit. On the other hand, the potential of the first electrode 11 is higher than the potential of the second electrode 12. That is, for example, a positive potential is applied to the first electrode 11, while a negative potential is applied to the second electrode 12. Therefore, the potential is set such that V... 12 >V 14 (For example, V) 12 >V 11 >V 14 or V 11 >V 12 >V 14 The charge is thus retained. Therefore, electrons generated by photoelectric conversion are attracted to the charge storage electrode 14, and the electrons remain in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14. That is, charge is stored in the photoelectric conversion layer 13. 12 Greater than V 14 This, of course, prevents electrons generated within the photoelectric conversion layer 13 from moving toward the first electrode 11. During the photoelectric conversion process, the potential in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 becomes a larger negative value.

[0471] Subsequently, a reset operation is performed during charge storage. This resets the potential of the first floating diffusion layer FD1, and the potential of the first floating diffusion layer FD1 becomes the potential V of the power source. DD .

[0472] After the reset operation is complete, the charge is read out. That is, during charge transfer, the drive circuit converts the potential V... 21 Applying a potential V to the first electrode 11 22 The potential V is applied to the charge storage electrode 14 and the potential V is applied to the charge storage electrode 14. 24 An application is made to the transmission control electrode 15. Here, the potential is set such that V 22 ≤V 24 ≤V 21This is maintained. Therefore, electrons that have stopped in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 must be read out to the first electrode 11 and further to the first floating diffusion layer FD1. In other words, the charge stored in the photoelectric conversion layer 13 is read out to the control unit.

[0473] This completes a series of operations including charge storage, reset, and charge transfer.

[0474] The amplifying transistor TR1 reads out electrons after the first floating diffusion layer FD1. amp and select transistor TR1 sel The operation is the same as that of a conventional transistor. Furthermore, for example, the series of operations including charge storage, reset, and charge transport of the second and third imaging elements are similar to a conventional series of operations including charge storage, reset, and charge transport.

[0475] like Figure 53 The diagram shows a schematic layout of the first electrode, charge storage electrode, and transistor of the control unit included in a variant of the imaging element of Embodiment 11, with reset transistor TR1. rst The other source / drain region 51B can be grounded, instead of connecting the other source / drain region 51B to the power supply V. DD .

[0476] Example 12

[0477] Example 12 is a modification of Examples 1 to 11, and Example 12 relates to an imaging element of the present disclosure including multiple charge storage electrode segments.

[0478] Figure 54 A schematic partial cross-sectional view of a portion of the imaging element of Embodiment 12 is shown.

[0479] Figure 55 and 56 Equivalent circuit diagrams of the imaging element and the stacked imaging element of Embodiment 12 are shown. Figure 57 A schematic layout diagram of the first electrode, charge storage electrode, and transistor of the control unit included in the imaging element of Embodiment 12 is shown. Figure 58 and 59 The potential states in each part of the imaging element of Embodiment 12 during operation are schematically illustrated. Furthermore, Figure 9C A description is shown Figure 58 Equivalent circuit diagrams of the imaging elements and stacked imaging elements of each part of Embodiment 12.

[0480] In Embodiment 12, the charge storage electrode 14 includes multiple charge storage electrode segments 14A, 14B, and 14C. The number of charge storage electrode segments can be equal to or greater than two; in Embodiment 12, the number is "3". Furthermore, different potentials are applied to each of the N charge storage electrode segments in the imaging element and the stacked imaging element of Embodiment 12. The potential of the first electrode 11 is higher than the potential of the second electrode 12. That is, for example, a positive potential is applied to the first electrode 11, while a negative potential is applied to the second electrode 12. Therefore, during charge transport, the potential applied to the charge storage electrode segment (first photoelectric conversion unit segment) 14A located closest to the first electrode 11 is higher than the potential applied to the charge storage electrode segment (Nth photoelectric conversion unit segment) 14C located furthest from the first electrode 11. In this way, a potential gradient is provided to the charge storage electrode 14. Therefore, electrons that have stopped in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 are more definitively read out to the first electrode 11 and further to the first floating diffusion layer FD1. That is, the charge stored in the photoelectric conversion layer 13 is read out to the control unit.

[0481] exist Figure 58 In the example shown, during charge transport, the potential of charge storage electrode section 14C < the potential of charge storage electrode section 14B < the potential of charge storage electrode section 14A is maintained. Thus, electrons stopped in the region of photoelectric conversion layer 13 are simultaneously read out to the first floating diffusion layer FD1. On the other hand, in Figure 59 In the example shown, during charge transport, the potentials of charge storage electrode section 14C, charge storage electrode section 14B, and charge storage electrode section 14A gradually change (i.e., stepwise or in a tilted shape). In this way, electrons that have stopped in the region of photoconversion layer 13 facing charge storage electrode section 14C move to the region of photoconversion layer 13 facing charge storage electrode section 14B. Then, electrons that have stopped in the region of photoconversion layer 13 facing charge storage electrode section 14B move to the region of photoconversion layer 13 facing charge storage electrode section 14A. Subsequently, the electrons that have stopped in the region of photoconversion layer 13 facing charge storage electrode section 14A are necessarily read out to the first floating diffusion layer FD1.

[0482] like Figure 60 The diagram shows a schematic layout of the first electrode, charge storage electrode, and transistor of the control unit included in a variant of the imaging element of Embodiment 12, with reset transistor TR1. rst The other source / drain region 51B can be grounded, instead of connecting the other source / drain region 51B to the power supply V. DD .

[0483] Example 13

[0484] Example 13 is a modification of Examples 1 to 12, and relates to a first and a sixth configuration of the imaging element.

[0485] Figure 61 A schematic partial cross-sectional view of the imaging element and the stacked imaging element of Embodiment 13 is shown. Figure 62 An enlarged schematic partial cross-sectional view of the charge storage electrode, photoelectric conversion layer, and second electrode stack is shown. The equivalent circuit diagram of the imaging element and the stacked imaging element in Embodiment 13 is similar to that of the other two. Figure 3 and 4 The equivalent circuit diagram of the imaging element of Embodiment 1 described herein. The schematic layout diagram of the first electrode, charge storage electrode, and transistor of the control unit included in the imaging element of Embodiment 13 is similar to... Figure 5 The imaging element of Embodiment 1 is described in the text. Furthermore, the operation of the imaging element (first imaging element) of Embodiment 13 is substantially similar to the operation of the imaging element of Embodiment 1.

[0486] Here, in the imaging element of Embodiment 13 or the imaging elements of Embodiments 14 to 18 described later,

[0487] The photoelectric conversion unit comprises N (where N≥2) photoelectric conversion unit segments (specifically, three photoelectric conversion unit segments 101, 102, and 103).

[0488] The photoelectric conversion layer 13 includes N photoelectric conversion layer segments (specifically, three photoelectric conversion layer segments 131, 132, and 133), and

[0489] The insulating layer 82 comprises N insulating layer segments (specifically, three insulating layer segments 821, 822, and 823).

[0490] In embodiments 13 to 15, the charge storage electrode 14 includes N charge storage electrode segments (specifically, in each embodiment there are three charge storage electrode segments 141, 142 and 143).

[0491] In embodiments 16 and 17 and in embodiment 15 (as the case may be), the charge storage electrode 14 comprises N charge storage electrode segments arranged separately from each other (specifically, three charge storage electrode segments 141, 142, and 143).

[0492] The nth (where n = 1, 2, 3...N) photoelectric conversion unit segment 10 n Including the nth charge storage electrode segment 14 n Section 82 of the nth insulation layer n and the nth photoelectric conversion layer segment 13n ,and

[0493] The larger the value of n in the photoelectric conversion unit segment, the farther the photoelectric conversion unit segment is from the first electrode 11.

[0494] Alternatively, the imaging element of Embodiment 13 or the imaging elements of Embodiments 14 and 17, described later, include

[0495] The photoelectric conversion unit includes a stacked first electrode 11, a photoelectric conversion layer 13, and a second electrode 12, wherein...

[0496] The photoelectric conversion unit also includes a charge storage electrode 14, which is separately arranged from the first electrode 11 and positioned to face the photoelectric conversion layer 13 via the insulating layer 82.

[0497] The cross-sectional area of ​​the stacked portion of charge storage electrode 14, insulating layer 82 and photoelectric conversion layer 13 when cut in the YZ virtual plane varies with the distance from the first electrode, where the Z direction is the stacking direction of charge storage electrode 14, insulating layer 82 and photoelectric conversion layer 13, and the X direction is the direction away from the first electrode 11.

[0498] Furthermore, in the imaging element of Embodiment 13, the thickness of the insulating layer segment extends from the first photoelectric conversion unit segment 101 to the Nth photoelectric conversion unit segment 10. N The thickness gradually increases. Specifically, the thickness of the insulating layer segment gradually increases. Alternatively, in the imaging element of embodiment 13, the width of the cross-section of the stacked portion is constant, and the thickness of the cross-section of the stacked portion, specifically the thickness of the insulating layer segment, gradually increases according to the distance from the first electrode 11. Note that the thickness of the insulating layer segment increases in a stepwise manner. nth photoelectric conversion unit segment 10 n Insulation layer section 82 n The thickness is constant. Assume the nth photoelectric conversion unit segment 10... n The nth insulating layer segment 82 n If the thickness is "1", then the (n+1)th photoelectric conversion unit segment 10 (n+1) Insulation layer section 82 (n+1) The thickness can be from 2 to 10. However, the values ​​are not limited to these. In embodiment 13, the thickness of the charge storage electrode segments 141, 142, and 143 gradually decreases so that the thickness of the insulating layer segments 821, 822, and 823 gradually increases. The thickness of the photoelectric conversion layer segments 131, 132, and 133 is constant.

[0499] The operation of the imaging element of Example 13 will be described below.

[0500] During charge storage, the drive circuit will apply potential V 11Applying a potential V to the first electrode 11 and applying a potential V 12 Light is applied to the charge storage electrode 14. Light incident on the photoelectric conversion layer 13 causes photoelectric conversion within the photoelectric conversion layer 13. Electrons and holes generated by the photoelectric conversion pass through wiring V... 0U The voltage is transmitted from the second electrode 12 to the drive circuit. On the other hand, the potential of the first electrode 11 is higher than the potential of the second electrode 12. That is, for example, a positive potential is applied to the first electrode 11, while a negative potential is applied to the second electrode 12. Therefore, the potential is set such that V 12 ≥V 11 Preferably, V 12 >V 11 Thus, electrons generated by photoelectric conversion are attracted to the charge storage electrode 14, and the electrons remain in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14. That is, charge is stored in the photoelectric conversion layer 13. 12 Greater than V 11 Therefore, the electrons generated within the photoelectric conversion layer 13 do not move toward the first electrode 11. During the photoelectric conversion process, the potential in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 becomes a larger negative value.

[0501] In the construction of the imaging element in Example 13, the thickness of the insulating layer section gradually increases. Therefore, when the state changes to V during charge storage... 12 ≥V 11 At that time, the nth photoelectric conversion unit segment 10 n It can store 10 more photoelectric conversion unit segments than the (n+1)th segment. (n+1) More charge. Apply a strong electric field, and it will certainly prevent the charge from flowing from the first photoelectric conversion unit section 101 to the first electrode 11.

[0502] A reset operation is then performed during charge storage. This resets the potential of the first floating diffusion layer FD1, and the potential of the first floating diffusion layer FD1 becomes the potential V of the power source. DD .

[0503] After the reset operation is complete, the charge is read out. That is, during charge transfer, the drive circuit converts the potential V... 21 Applying a potential V to the first electrode 11 and applying a potential V 22 An electric potential is applied to the charge storage electrode 14. Here, the potential is set such that V 21 >V 22 This is maintained. Therefore, electrons that have stopped in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 are read out to the first electrode 11 and further read out to the first floating diffusion layer FD1. In other words, the charge stored in the photoelectric conversion layer 13 is read out to the control unit.

[0504] More specifically, when the state changes to V during charge transport 21 >V 22 At that time, it is certain that the charge flow from the first photoelectric conversion unit segment 101 to the first electrode 11 and from the (n+1)th photoelectric conversion unit segment 10 can be guaranteed. (n+1) up to the nth photoelectric conversion unit segment 10 n The flow of charge.

[0505] This completes a series of operations including charge storage, reset, and charge transfer.

[0506] In the imaging element of Embodiment 13, the thickness of the insulating layer segment gradually varies from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. Alternatively, the cross-sectional area of ​​the stacked portion of the charge storage electrode, insulating layer, and photoelectric conversion layer when the stacked portion is cut in the YZ virtual plane varies according to the distance from the first electrode. Thus, a charge transport gradient is formed, and the charge generated by photoelectric conversion can be transported more easily and definitively.

[0507] The imaging element and the stacked imaging element of Embodiment 13 can be produced by a method substantially similar to that of the imaging element of Embodiment 1, and details will not be described further.

[0508] Note that when forming the first electrode 11, charge storage electrode 14, and insulating layer 82 in the imaging element of Embodiment 13, a conductive material layer for forming the charge storage electrode 143 is first deposited on the interlayer insulating layer 81. The conductive material layer is patterned and left in the regions where photoelectric conversion unit segments 101, 102, and 103 and the first electrode 11 will be formed. In this way, a portion of the first electrode 11 and the charge storage electrode 143 can be obtained. Next, an insulating layer for forming the insulating layer segment 823 is deposited over the entire surface. The insulating layer is patterned and planarized. In this way, the insulating layer segment 823 can be obtained. Then, a conductive material layer for forming the charge storage electrode 142 is deposited over the entire surface and patterned. The conductive material layer is left in the regions where photoelectric conversion unit segments 101 and 102 and the first electrode 11 will be formed. In this way, a portion of the first electrode 11 and the charge storage electrode 142 can be obtained. Next, an insulating layer for forming insulating layer segment 822 is deposited across the entire surface. The insulating layer is patterned and planarized. This yields insulating layer segment 822. Next, a conductive material layer for forming charge storage electrode 141 is deposited across the entire surface. The conductive material layer is patterned and left in the region where photoelectric conversion unit segment 101 and first electrode 11 will be formed. In this way, first electrode 11 and charge storage electrode 141 are obtained. Next, an insulating layer is deposited across the entire surface and planarized. In this way, insulating layer segment 821 (insulating layer 82) is obtained. Furthermore, photoelectric conversion layer 13 is formed on insulating layer 82. In this way, photoelectric conversion unit segments 101, 102, and 103 are obtained.

[0509] like Figure 63 As shown, it illustrates a schematic layout of the first electrode, charge storage electrode, and transistor of the control unit included in a variant of the imaging element of Embodiment 13, with reset transistor TR1. rst The other source / drain region 51B can be grounded instead of being connected to the power supply V. DD .

[0510] Example 14

[0511] The imaging element of Embodiment 14 relates to the imaging elements of the second and sixth configurations of this disclosure. As in Figure 64 The image shows an enlarged schematic partial cross-sectional view of a portion of the stacked charge storage electrode, photoelectric conversion layer, and second electrode. In the imaging element of Embodiment 14, the thickness of the photoelectric conversion layer segment extends from the first photoelectric conversion unit segment 101 to the Nth photoelectric conversion unit segment 10. NGradually changing. Alternatively, in the imaging element of embodiment 14, the width of the cross-section of the stacked components is constant, and the thickness of the cross-section of the stacked portion, particularly the thickness of the photoelectric conversion layer segment, gradually increases according to the distance from the first electrode 11. Specifically, the thickness of the photoelectric conversion layer segment gradually increases. Note that the thickness of the photoelectric conversion layer segment increases in a stepwise manner. The nth photoelectric conversion unit segment 10 n Photoelectric conversion layer segment 13 n The thickness is constant. Assume the nth photoelectric conversion unit segment 10... n Photoelectric conversion layer segment 13 n If the thickness is "1", then the (n+1)th photoelectric conversion unit segment 10 (n+1) Photoelectric conversion layer segment 13 (n+1) The thickness can be from 2 to 10. However, the values ​​are not limited to these. In Example 14, the thickness of the charge storage electrode segments 141, 142, and 143 gradually decreases so that the thickness of the photoelectric conversion layer segments 131, 132, and 133 gradually increases. The thickness of the insulating layer segments 821, 822, and 823 is constant.

[0512] In the imaging element of Example 14, the thickness of the photoelectric conversion layer gradually increases. Therefore, when the state changes to V during the charge storage cycle... 12 ≥V 11 At that time, applied to the nth photoelectric conversion unit segment 10 n The electric field ratio applied to the (n+1)th photoelectric conversion unit segment 10 (n+1) The electric field strength is high. This will certainly prevent charge from flowing from the first photoelectric conversion unit section 101 to the first electrode 11. Furthermore, when the state changes to V during charge transfer... 22 <V 21 At that time, it can be ensured that the charge flow from the first photoelectric conversion unit segment 101 to the first electrode 11 and from the (n+1)th photoelectric conversion unit segment 10... (n+1) up to the nth photoelectric conversion unit segment 10 n The flow of charge.

[0513] In this way, in the imaging element of Embodiment 14, the thickness of the photoelectric conversion layer segment gradually varies from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. Alternatively, when the stacked portion is cut in the YZ virtual plane, the cross-sectional area of ​​the stacked portion of the charge storage electrode, insulating layer, and photoelectric conversion layer varies according to the distance from the first electrode. Thus, a charge transport gradient is formed, and the charge generated by photoelectric conversion can be transported more easily and definitively.

[0514] In forming the first electrode 11, charge storage electrode 14, insulating layer 82, and photoelectric conversion layer 13 in the imaging element of Embodiment 14, a conductive material layer for forming the charge storage electrode 143 is first deposited on the interlayer insulating layer 81. The conductive material layer is patterned, leaving the conductive material layer in the regions where photoelectric conversion unit segments 101, 102, and 103 and the first electrode 11 will be formed. In this way, a portion of the first electrode 11 and the charge storage electrode 143 can be obtained. Next, a conductive material layer for forming the charge storage electrode 142 is deposited across the entire surface, and the conductive material layer is patterned. The conductive material layer is left in the regions where photoelectric conversion unit segments 101 and 102 and the first electrode 11 will be formed. In this way, a portion of the first electrode 11 and the charge storage electrode 142 can be obtained. Next, a conductive material layer for forming the charge storage electrode 141 is deposited across the entire surface, and the conductive material layer is patterned. The conductive material layer is left in the regions where photoelectric conversion unit segments 101 and the first electrode 11 will be formed. In this way, the first electrode 11 and the charge storage electrode 141 can be obtained. Next, the insulating layer 82 is conformally deposited over the entire surface. Furthermore, a photoelectric conversion layer 13 is formed on the insulating layer 82, and a planarization process is applied to the photoelectric conversion layer 13. In this way, photoelectric conversion unit segments 101, 102, and 103 can be obtained.

[0515] Example 15

[0516] Example 15 relates to an imaging element with a third construction. Figure 65 A schematic partial cross-sectional view of the imaging element and the stacked imaging element of Embodiment 15 is shown. In the imaging element of Embodiment 15, the material contained in the insulating layer segment varies between adjacent photoelectric conversion unit segments. Here, the dielectric constant of the material contained in the insulating layer segment ranges from the first photoelectric conversion unit segment 101 to the nth photoelectric conversion unit segment 10. n The potential gradually decreases. In the imaging element of Embodiment 15, the same potential can be applied to all N charge storage electrode segments, or different potentials can be applied to each of the N charge storage electrode segments. In the latter case, as described in Embodiment 16, the charge storage electrode segments 141, 142, and 143, which are arranged separately from each other, can be connected to the vertical drive circuit 112 included in the drive circuit via pads 641, 642, and 643.

[0517] Furthermore, by employing this construction, a charge transport gradient is formed. When the state changes to V during charge storage... 12 ≥V 11 At that time, the nth photoelectric conversion unit segment can store more charge than the (n+1)th photoelectric conversion unit segment. Furthermore, when the state changes to V during the charge transport cycle... 22<V 21 At that time, it can be guaranteed that the charge flow from the first photoelectric conversion unit section to the first electrode and the charge flow from the (n+1)th photoelectric conversion unit section to the nth photoelectric conversion unit section are guaranteed.

[0518] Example 16

[0519] Example 16 relates to an imaging element constructed in a fourth manner. Figure 66 A schematic partial cross-sectional view of the imaging element and the stacked imaging element of Embodiment 16 is shown. In the imaging element of Embodiment 16, the material contained in the charge storage electrode segment varies between adjacent photoelectric conversion unit segments. Here, the work function value of the material contained in the insulating layer segment varies from the first photoelectric conversion unit segment 101 to the Nth photoelectric conversion unit segment 10. N The potential gradually increases. In the imaging element of Embodiment 16, the same potential can be applied to all N charge storage electrode segments, or different potentials can be applied to each of the N charge storage electrode segments. In the latter case, the charge storage electrode segments 141, 142, and 143 are connected to the vertical drive circuit 112 included in the drive circuit via pad portions 641, 642, and 643.

[0520] Example 17

[0521] The imaging element of Example 17 relates to an imaging element of a fifth construction. Figure 67A , 67B Figures 68A and 68B show schematic plan views of the charge storage electrode section in Example 17. Figure 69 A schematic layout diagram of the first electrode, charge storage electrode, and transistors of the control unit included in the imaging element of Embodiment 17 is shown. The schematic partial cross-sectional view of the imaging element of Embodiment 17 and the stacked imaging element is similar. Figure 66 Or the schematic partial cross-sectional view shown in 71. In the imaging element of Embodiment 17, the area of ​​the charge storage electrode segment extends from the first photoelectric conversion unit segment 101 to the Nth photoelectric conversion unit segment 10. N The potential gradually decreases. In the imaging element of Embodiment 17, the same potential can be applied to all N charge storage electrode segments, or different potentials can be applied to each of the N charge storage electrode segments. Specifically, as described in Embodiment 16, the charge storage electrode segments 141, 142, and 143, which are arranged separately from each other, can be connected to the vertical drive circuit 112 included in the drive circuit via pads 641, 642, and 643.

[0522] In Embodiment 17, the charge storage electrode 14 includes a plurality of charge storage electrode segments 141, 142, and 143. The number of charge storage electrode segments can be equal to or greater than two; in Embodiment 17, the number is "3". Furthermore, in the imaging element and stacked imaging element of Embodiment 17, the potential of the first electrode 11 is higher than the potential of the second electrode 12. That is, for example, a positive potential is applied to the first electrode 11, while a negative potential is applied to the second electrode 12. Therefore, during charge transport, the potential applied to the charge storage electrode segment 141 located closest to the first electrode 11 is higher than the potential applied to the charge storage electrode segment 143 located furthest from the first electrode 11. In this way, a potential gradient is provided to the charge storage electrode 14. Therefore, electrons that have stopped in the region of the photoelectric conversion layer 13 facing the charge storage electrode 14 are more definitively read out to the first electrode 11 and further read out to the first floating diffusion layer FD1. That is, the charge stored in the photoelectric conversion layer 13 is read out to the control unit.

[0523] Furthermore, during charge transport, the potential of charge storage electrode section 143 < the potential of charge storage electrode section 142 < the potential of charge storage electrode section 141 is maintained. In this way, electrons stopped in the region of photoelectric conversion layer 13 can be simultaneously read out to the first floating diffusion layer FD1. Alternatively, during charge transport, the potentials of charge storage electrode section 143, charge storage electrode section 142, and charge storage electrode section 141 are gradually changed (i.e., stepped or with a tilted shape). In this way, electrons stopped in the region of photoelectric conversion layer 13 facing charge storage electrode section 143 move to the region of photoelectric conversion layer 13 facing charge storage electrode section 142. Then, electrons stopped in the region of photoelectric conversion layer 13 facing charge storage electrode section 142 move to the region of photoelectric conversion layer 13 facing charge storage electrode section 141. Next, the electrode that stops in the region of the charge storage electrode segment 141 of the photoelectric conversion layer 13 can be read out to the first floating diffusion layer FD1.

[0524] like Figure 70 The diagram shows a schematic layout of the first electrode, charge storage electrode, and transistors of the control unit included in a variant of the imaging element of Embodiment 17, with reset transistor TR3. rst The other source / drain region 51B can be grounded, instead of connecting the other source / drain region 51B to the power supply V. DD .

[0525] In the imaging element of Embodiment 17, a charge transport gradient is also formed by employing this structure. That is, the area of ​​the charge storage electrode segment extends from the first photoelectric conversion unit segment 101 to the Nth photoelectric conversion unit segment 10.N It gradually decreases. Therefore, when the state changes to V during the charge storage period... 12 ≥V 11 At that time, the nth photoelectric conversion unit segment can store more charge than the (n+1)th photoelectric conversion unit segment. Furthermore, when the state changes to V during charge transfer... 22 <V 21 At that time, it is certain that the charge flow from the first photoelectric conversion unit segment to the first electrode and the charge flow from the (n+1)th photoelectric conversion unit segment to the nth photoelectric conversion unit segment can be guaranteed.

[0526] Example 18

[0527] Example 18 relates to an imaging element of a sixth construction. Figure 71 A schematic partial cross-sectional view of the imaging element and the stacked imaging element of Embodiment 18 is shown. Figure 72A and 72B A schematic plan view of the charge storage electrode section in Embodiment 18 is shown. The imaging element of Embodiment 18 includes a photoelectric conversion unit comprising a stacked first electrode 11, a photoelectric conversion layer 13, and a second electrode 12. The photoelectric conversion unit also includes a charge storage electrode 14 disposed separately from the first electrode 11 and arranged to face the photoelectric conversion layer 13 via an insulating layer 82. Furthermore, the cross-sectional area of ​​the stacked portion of the charge storage electrode 14, the insulating layer 82, and the photoelectric conversion layer 13 when the stacked portion is cut in the YZ virtual plane varies according to the distance from the first electrode 11, where the Z direction is the stacking direction of the charge storage electrode 14, the insulating layer 82, and the photoelectric conversion layer 13, and the X direction is the direction away from the first electrode 11.

[0528] Specifically, in the imaging element of embodiment 18, the thickness of the cross-section of the stacked portion is constant, and the width of the cross-section of the stacked portion decreases as the distance from the first electrode 11 increases. Note that the width can decrease continuously (see...). Figure 72A Alternatively, it can be reduced in steps (see...). Figure 72B ).

[0529] Thus, in the imaging element of Embodiment 18, the cross-sectional area of ​​the stacked portion of the charge storage electrode 14, insulating layer 82, and photoelectric conversion layer 13 when the stacked portion is cut on the YZ virtual plane changes according to the distance from the first electrode. Therefore, a charge transport gradient is formed, and the charge generated by photoelectric conversion can be transported more easily and definitively.

[0530] Example 19

[0531] Example 19 relates to a solid-state imaging device with a first structure and a second structure.

[0532] Solid-state imaging device embodiment 19 includes

[0533] The photoelectric conversion unit includes a stacked first electrode 11, a photoelectric conversion layer 13, and a second electrode 12, wherein...

[0534] The photoelectric conversion unit also includes multiple imaging elements, each including a charge storage electrode 14 arranged separately from the first electrode 11 and facing the photoelectric conversion layer 13 via the insulating layer 82.

[0535] Multiple imaging elements are included in the imaging element block, and

[0536] The first electrode 11 is shared by multiple imaging elements included in the imaging element block.

[0537] Alternatively, the solid-state imaging device of Embodiment 19 includes a plurality of imaging elements described in Embodiments 1 to 18.

[0538] In Example 19, a floating diffusion layer is provided for multiple imaging elements. Furthermore, the timing of the charge transport cycle can be appropriately controlled to allow multiple imaging elements to share a single floating diffusion layer. Additionally, in this case, multiple imaging elements can share a single contact aperture.

[0539] Note that, apart from the fact that the multiple solid-state imaging devices included in the embodiment block share the first electrode 11, the solid-state imaging device of embodiment 19 has a structure and configuration that are substantially similar to those of the solid-state imaging devices described in embodiments 1 to 18.

[0540] Figure 73 (Example 19) Figure 74 (First variant of Example 19) Figure 75 (Second variant of Example 19), Variant 76 (third variant of Example 19), and Example 77 (fourth variant of Example 19) schematically illustrate the arrangement of the first electrode 11 and the charge storage electrode 14 in the solid-state imaging device of Example 19. Figure 73 , 74 Figures 77 and 78 show 16 imaging elements. Figure 75 and 76 Twelve imaging elements are shown. Additionally, two imaging elements are included within an imaging element block. The imaging element block is surrounded and shown by dashed lines. Subscripts attached to the first electrode 11 and the charge storage electrode 14 are used to distinguish between the first electrode 11 and the charge storage electrode 14. This also applies to the description below. Furthermore, an on-chip microlens is arranged on the upper side of one imaging element. Figures 73 to 82 (Not shown in the image). Furthermore, in one imaging element block, two charge storage electrodes 14 are disposed on either side of the first electrode 11 (see [reference]). Figure 73 and 74Alternatively, a first electrode 11 may be arranged to face two charge storage electrodes 14 arranged side-by-side (see...). Figure 77 and 78 That is, the first electrode is arranged adjacent to the charge storage electrodes of each imaging element. Alternatively, the first electrode is arranged adjacent to the charge storage electrodes of a portion of the multiple imaging elements, but not adjacent to the charge storage electrodes of the remaining portions of the multiple imaging elements (see [link to documentation]). Figure 75 and 76 In this case, the movement of charge from the remainder of the plurality of imaging elements to the first electrode is achieved through the movement of said portion of the plurality of imaging elements. Preferably, the distance A between the charge storage electrode included in the imaging element and the charge storage electrode included in the imaging element is longer than the distance B between the first electrode and the charge storage electrode in the imaging element adjacent to the first electrode, so as to deterministically allow charge to move from each imaging element to the first electrode. Furthermore, it is preferred that the value of distance A is larger the farther the imaging element is from the first electrode. Furthermore, in Figure 74 , 76 In the example shown in 78, the charge motion control electrode 21 is arranged between multiple imaging elements included in the imaging element block. Arranging the charge motion control electrode 21 enables the deterministic suppression of charge movement within the imaging element block located on either side of the charge motion control electrode 21. Note that the potential can be set such that V 12 >V 13 (For example, V) 12-2 >V 13 ) is maintained, of which V 13 It is the potential applied to the charge motion control electrode 21.

[0541] The charge movement control electrode 21 can be formed at the same level as the first electrode 11 or the charge storage electrode 14, or it can be formed at a different level on the side of the first electrode (specifically, at a level below the first electrode 11 or the charge storage electrode 14). In the former case, the distance between the charge movement control electrode 21 and the photoelectric conversion layer can be reduced, and the potential can be easily controlled. On the other hand, in the latter case, the distance between the charge movement control electrode 21 and the charge storage electrode 14 can be reduced, which is beneficial for miniaturization.

[0542] The following description will include a first electrode 112 and two charge storage electrodes 14. 21 and 14 22 The operation of the imaging element block.

[0543] During charge storage, the drive circuit will apply potential V a The potential V is applied to the first electrode 112 and is applied to the first electrode 112. A Applied to charge storage electrode 1421 and 14 22 Light incident on the photoelectric conversion layer 13 causes photoelectric conversion within the layer. Electrons and holes generated by the photoelectric conversion travel through wiring V... 0U The voltage is transmitted from the second electrode 22 to the drive circuit. On the other hand, the potential of the first electrode 112 is higher than the potential of the second electrode 12. That is, for example, a positive potential is applied to the first electrode 112, while a negative potential is applied to the second electrode 12. Therefore, the potential is set such that V A ≥V a This is maintained. Therefore, electrons generated by photoelectric conversion are attracted to the charge storage electrode 14. 21 and 14 22 And electrons stop at the charge storage electrode 14 facing the photoelectric conversion layer 13. 21 and 14 22 In the region where charge is stored, specifically in the photoelectric conversion layer 13. A Equal to or greater than V a Therefore, electrons generated within the photoelectric conversion layer 13 do not move towards the first electrode 112. During the photoelectric conversion process, the photoelectric conversion layer 13 faces the charge storage electrode 14. 21 and 14 22 The potential in the region becomes a larger negative value.

[0544] A reset operation is then performed during charge storage. This resets the potential of the first floating diffusion layer, and the potential of the first floating diffusion layer becomes the potential V of the power source. DD .

[0545] After the reset operation is complete, the charge is read out. That is, during charge transfer, the drive circuit converts the potential V... b Applying a potential V to the first electrode 112 21-B Applied to charge storage electrode 14 21 and the potential V 22-B Applied to charge storage electrode 14 22 Here, the potential is set such that V 21-B <V b <V 22-B This is maintained. Therefore, the charge storage electrode 14 facing the photoelectric conversion layer 13 is stopped. 21 Electrons in the region are read out to the first electrode 112 and further read out to the first floating diffusion layer FD1. That is, they are stored in the charge storage electrode 14 facing the photoelectric conversion layer 13. 21 The charge in the region is read out to the control unit. Once the reading is complete, the potential is set such that V 22-B ≤V 21-B <V b It was thus preserved. Note that in Figure 77 and Figure 78 In the example shown in the diagram, the potential can be set such that V 22-B <V b <V 21-B This is maintained. Therefore, the charge storage electrode 14 facing the photoelectric conversion layer 13 is stopped. 22 Electrons in the region are read out to the first electrode 112 and further read out to the first floating diffusion layer FD1. Furthermore, in Figure 75 and 76 In the example shown, the charge storage electrode 14 is stopped at the photoelectric conversion layer 13. 22 Electrons in the region can interact with charge storage electrode 14 22 The adjacent first electrode 113 is read out to the first floating diffusion layer FD1. In this way, the charge storage electrode 14, which is oriented towards the photoelectric conversion layer 13, is stored. 22 The charge in the region is read out to the control unit. Note that this is done when the charge storage electrode 14 facing the photoelectric conversion layer 13 is completed. 21 When the charge in the region is read out to the control unit, the potential of the first floating diffusion layer can be reset.

[0546] Figure 83A An example of reading and driving in the imaging element block of Embodiment 19 is shown.

[0547] [Step A]

[0548] The auto zero signal is sent to the comparator input.

[0549] [Step B]

[0550] Reset operation of a shared floating diffusion layer

[0551] [Step C]

[0552] The imaging element corresponds to the charge storage electrode 14 21 The reading of the P phase and the movement of charge to the first electrode 112

[0553] [Step D]

[0554] The imaging element corresponds to the charge storage electrode 14 21 The reading of phase D and the movement of charge to the first electrode 112

[0555] [Step E]

[0556] Reset operation of a shared floating diffusion layer

[0557] [Step F]

[0558] Automatic zeroing signal to comparator input

[0559] [Step G]

[0560] The imaging element corresponds to the charge storage electrode 14 22 The reading of the P phase and the movement of charge to the first electrode 112

[0561] [Step H]

[0562] The imaging element corresponds to the charge storage electrode 14 22 The reading of phase D and the movement of charge to the first electrode 112

[0563] In this process, data is read from the charge storage electrode 14. 21 and charge storage electrode 14 22 The signals from the two imaging elements. Based on correlated double sampling (CDS) processing, the difference between the P-phase readout in [step C] and the D-phase readout in [step D] is the signal from the charge storage electrode 14. 21 The signal from the imaging element. The difference between the P-phase readout in [Step G] and the D-phase readout in [Step H] comes from the signal corresponding to the charge storage electrode 14. 22 The signal from the imaging element.

[0564] Note that step [E] can be skipped (see [Step E]). Figure 83B Furthermore, step F can be skipped, in which case step G can be further skipped (see [Step F]). Figure 83C The difference between the reading of phase P in [Step C] and the reading of phase D in [Step D] comes from the charge storage electrode 14. 21 The signal from the imaging element. The difference between the D-phase readout in [Step D] and the D-phase readout in [Step H] comes from the signal corresponding to the charge storage electrode 14. 22 The signal from the imaging element.

[0565] The arrangement of the first electrode 11 and the charge storage electrode 14 is schematically shown. Figure 79 The variant example (the sixth variant example of Example 19) and Figure 80 In the seventh variation of Example 19, four imaging elements are included in the imaging element block. The operation of the solid-state imaging device can be substantially similar to... Figures 73 to 78 The operation of the solid-state imaging device is shown in the figure.

[0566] The arrangement of the first electrode 11 and the charge storage electrode 14 is schematically illustrated. Figure 81 and 82 In the eighth and ninth variations, the imaging element block includes 16 imaging elements. For example... Figure 81 and 82As shown, charge movement control electrodes 21A1, 21A2, and 21A3 are arranged on charge storage electrode 14. 11 and charge storage electrode 14 12 Between, charge storage electrode 14 12 and charge storage electrode 14 13 Between and charge storage electrodes 14 13 and charge storage electrode 14 14 Between. Furthermore, such as Figure 82 As shown, charge motion control electrodes 21B1, 21B2, and 21B3 are arranged on charge storage electrode 14. 21 14 31 and 14 41 With charge storage electrode 14 22 14 32 and 14 42 Between, charge storage electrode 14 22 14 32 and 14 42 With charge storage electrode 14 23 14 33 and 14 43 Between years and charge storage electrodes 14 23 14 33 and 14 43 With charge storage electrode 14 24 14 34 and 14 44 Between. Furthermore, a charge movement control electrode 21C is disposed between the imaging element block and the imaging element block. Additionally, in each solid-state imaging device, sixteen charge storage electrodes 14 can be controlled to read the charge stored in the photoelectric conversion layer 13 from the first electrode 11.

[0567] [Step 10]

[0568] Specifically, firstly, the charge storage electrode 14 stored in the photoelectric conversion layer 13 is read from the first electrode 11. 11 The charge in the region. Then, through the charge storage electrode 14 facing the photoelectric conversion layer 13. 11 The region reads the charge storage electrode 14 stored in the photoelectric conversion layer 13 from the first electrode 11. 12 The charge in the region. Then, through the charge storage electrode 14 facing the photoelectric conversion layer 13. 12 and charge storage electrode 14 11 The region reads the charge storage electrode 14 stored in the photoelectric conversion layer 13 from the first electrode 11. 13 The charge in the region.

[0569] [Step 20]

[0570] Subsequently, the charge storage electrode 14 stored in the photoelectric conversion layer 13 is oriented towards the charge storage electrode 14. 21 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 11 In the region. This allows the charge storage electrode 14, which is oriented towards the photoelectric conversion layer 13, to be stored. 22 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 12 In the region. This allows the charge storage electrode 14, which is oriented towards the photoelectric conversion layer 13, to be stored. 23 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 13 In the region. This allows the charge storage electrode 14, which is oriented towards the photoelectric conversion layer 13, to be stored. 24 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 14 In the region.

[0571] [Step 21]

[0572] The charge storage electrode 14 of the photoelectric conversion layer 13 is oriented towards the charge storage electrode. 31 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 21 In the region. This allows the charge storage electrode 14, which is oriented towards the photoelectric conversion layer 13, to be stored. 32 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 22 In the region. This allows the charge storage electrode 14, which is oriented towards the photoelectric conversion layer 13, to be stored. 33 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 23 In the region. This allows the charge storage electrode 14, which is oriented towards the photoelectric conversion layer 13, to be stored. 34 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 24 In the region.

[0573] [Step 22]

[0574] The charge storage electrode 14 of the photoelectric conversion layer 13 is oriented towards the charge storage electrode. 41 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 31 In the region. The charge storage electrode 14, which is stored in the photoelectric conversion layer 13, is oriented towards the charge storage electrode 14. 42 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 32 In the region. This allows the charge storage electrode 14, which is oriented towards the photoelectric conversion layer 13, to be stored. 43Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 33 In the region. This allows the charge storage electrode 14, which is oriented towards the photoelectric conversion layer 13, to be stored. 44 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 34 In the region.

[0575] [Step 30]

[0576] Furthermore, step 10 can be performed again to read the charge storage electrode 14 stored in the photoelectric conversion layer 13 via the first electrode 11. 21 The charge in the region, stored in the photoelectric conversion layer 13 facing the charge storage electrode 14 22 The charge in the region, stored in the photoelectric conversion layer 13 facing the charge storage electrode 14 23 The charge in the region and the charge storage electrode 14 stored in the photoelectric conversion layer 13. 24 The charge in the region.

[0577] [Step 40]

[0578] Subsequently, the charge storage electrode 14 stored in the photoelectric conversion layer 13 is oriented towards the charge storage electrode 14. 21 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 11 In the region. This allows the charge storage electrode 14, which is oriented towards the photoelectric conversion layer 13, to be stored. 22 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 12 In the region. This allows the charge storage electrode 14, which is oriented towards the photoelectric conversion layer 13, to be stored. 23 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 13 In the region. This allows the charge storage electrode 14, which is oriented towards the photoelectric conversion layer 13, to be stored. 24 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 14 In the region.

[0579] [Step 41]

[0580] The charge storage electrode 14 of the photoelectric conversion layer 13 is oriented towards the charge storage electrode. 31 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 21 In the region. This allows the charge storage electrode 14, which is oriented towards the photoelectric conversion layer 13, to be stored. 32 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 22In the region. This allows the charge storage electrode 14, which is oriented towards the photoelectric conversion layer 13, to be stored. 33 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 23 In the region. This allows the charge storage electrode 14, which is oriented towards the photoelectric conversion layer 13, to be stored. 34 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 24 In the region.

[0581] [Step 50]

[0582] Furthermore, step 10 can be performed again to read the charge storage electrode 14 stored in the photoelectric conversion layer 13 via the first electrode 11. 31 The charge in the region, stored in the photoelectric conversion layer 13 facing the charge storage electrode 14 32 The charge in the region, stored in the photoelectric conversion layer 13 facing the charge storage electrode 14 33 The charge in the region and the charge storage electrode 14 stored in the photoelectric conversion layer 13. 34 The charge in the region.

[0583] [Step 60]

[0584] Subsequently, the charge storage electrode 14 stored in the photoelectric conversion layer 13 is oriented towards the charge storage electrode 14. 21 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 11 In the region. This allows the charge storage electrode 14, which is oriented towards the photoelectric conversion layer 13, to be stored. 22 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 12 In the region. This allows the charge storage electrode 14, which is oriented towards the photoelectric conversion layer 13, to be stored. 23 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 13 In the region. This allows the charge storage electrode 14, which is oriented towards the photoelectric conversion layer 13, to be stored. 24 Charge in the region moves to the charge storage electrode 14 facing the photoelectric conversion layer 13. 14 In the region.

[0585] [Step 70]

[0586] Furthermore, step 10 can be performed again to read the charge storage electrode 14 stored in the photoelectric conversion layer 13 via the first electrode 11. 41 The charge in the region, stored in the photoelectric conversion layer 13 facing the charge storage electrode 14 42 The charge in the region, stored in the photoelectric conversion layer 13 facing the charge storage electrode 1443 The charge in the region and the charge storage electrode 14 stored in the photoelectric conversion layer 13. 44 The charge in the region.

[0587] In embodiment 19 of the solid-state imaging device, the first electrode is shared by a plurality of imaging elements included in the imaging element block. This simplifies and miniaturizes the construction and configuration in the pixel region where a plurality of imaging elements are arranged. Note that the plurality of imaging elements provided for a floating diffusion layer may include a plurality of first-type imaging elements, or may include at least one first-type imaging element or one or two or more second-type imaging elements.

[0588] Example 20

[0589] Example 20 is a modification of Example 19. The arrangement of the first electrode 11 and the charge storage electrode 14 is schematically illustrated. Figure 84 , 85 In the solid-state imaging apparatus of Embodiment 20 in 86 and 87, two imaging elements are included in an imaging element block. Furthermore, an on-chip microlens 90 is disposed on the upper side of the imaging element block. Note that in Figure 85 and Figure 87 In the example shown, charge motion control electrode 21 is arranged between multiple imaging elements contained in the imaging element block.

[0590] For example, with charge storage electrode 14 included in the imaging element block. 11 14 21 14 31 and 14 41 The corresponding photoelectric conversion layer is highly sensitive to incident light from the upper right of the attached figure. Furthermore, it is compatible with the charge storage electrode 14 included in the imaging element block. 12 14 22 14 32 and 14 42 The corresponding photoelectric conversion layer is highly sensitive to incident light from the upper left of the attached figure. Therefore, for example, it can be combined with charge storage electrode 14. 11 Imaging element and including charge storage electrode 14 12 The imaging element is used to acquire the phase difference signal of the image plane. Additionally, the signal originates from the charge storage electrode 14. 11 Signals from the imaging element and from the charge storage electrode 14 12 The signals from the imaging elements can be added together, and a combination of imaging elements can provide an imaging element. Although in Figure 84 In the example shown, the first electrode 111 is arranged on the charge storage electrode 14. 11 and charge storage electrode 14 12However, a first electrode 111 can be arranged to face two charge storage electrodes 14 arranged side by side. 11 and 14 12 ,like Figure 86 The example shown further enhances sensitivity.

[0591] Although this disclosure has been described based on preferred embodiments, it is not limited to these embodiments. The structures, configurations, manufacturing conditions, manufacturing methods, and materials used for the imaging elements, stacked imaging elements, and solid-state imaging devices described in the embodiments are illustrative and may be suitably modified. The imaging elements of the embodiments may be suitably combined. For example, the imaging elements of Embodiment 13, Embodiment 14, Embodiment 15, Embodiment 16, and Embodiment 17 may be arbitrarily combined, as may the imaging elements of Embodiment 13, Embodiment 14, Embodiment 15, Embodiment 16, and Embodiment 18.

[0592] Floating diffusion layers FD1, FD 21 FD3, 51C, 45C and 46C can also be shared depending on the situation.

[0593] For example, in Figure 88 In the variant of the imaging element and the stacked imaging element described in Embodiment 1 shown, the first electrode 11 may extend in the opening 84A provided in the insulating layer 82, and the first electrode 11 may be connected to the stacked photoelectric conversion layer 13.

[0594] Or, for example, in Figure 89 In the examples of the imaging element and the variant of the stacked imaging element described in Embodiment 1 shown, and as in Figure 90A In the enlarged schematic partial cross-sectional view of a portion of the first electrode shown, the edge portion of the top surface of the first electrode 11 is covered by the insulating layer 82, and the first electrode 11 is exposed on the bottom surface of the opening 84B. The side surface of the opening 84B has a slope extending from the first surface 82a to the second surface 82b, where the first surface 82a is the surface of the insulating layer 82 that contacts the top surface of the first electrode 11, and the second surface 82b is the surface of the insulating layer 82 that contacts the portion of the photoelectric conversion layer 13 facing the charge storage electrode 14. Thus, the side surface of the opening 84B is sloped, allowing charge to move more smoothly from the photoelectric conversion layer 13 to the first electrode 11. Note that although in Figure 90A In the example shown, the side surface of the opening 84B has rotational symmetry with respect to the axis of the opening 84B, but as... Figure 90BAs shown, the opening 84C can be configured such that the side surface of the opening 84C, which extends obliquely from the first surface 82a to the second surface 82b, is closer to the charge storage electrode 14. This makes it difficult for charge to move from the portion of the photoelectric conversion layer 13 located on the opposite side of the opening 84C relative to the charge storage electrode 14. Furthermore, although the side surface of the opening 84B extends obliquely from the first surface 82a to the second surface 82b, the edge portion of the side surface of the opening 84B in the second surface 82b can be as follows: Figure 90A As shown, it is located outside the edge portion of the first electrode 11, or it can be as follows: Figure 90C The portion shown is located within the edge of the first electrode 11. The former configuration allows for easier charge transfer, while the latter configuration reduces shape changes during the opening formation process.

[0595] The reflow of an etch mask, which is formed from a resist material used to form openings in an insulating layer based on an etching method, can create a ramp on the opening-side surface of the etch mask, and the etch mask can be used to etch the insulating layer to form openings 84B and 84C.

[0596] Furthermore, such as in, for example, in Figure 91 In the variant of the imaging element and the stacked imaging element described in Embodiment 1 shown, light can be incident from the second electrode 12 side, and a light-shielding layer 92 can be formed on the light-incident side closer to the second electrode 12. Note that various wirings disposed on the light-incident side relative to the photoelectric conversion layer can also be used as a light-shielding layer.

[0597] Note that, although in Figure 91 In the example shown, the light-shielding layer 92 is formed on the upper side of the second electrode 12. That is, although the light-shielding layer 92 is formed closer to the light incident side of the second electrode 12 and on the upper side of the first electrode 11, the light-shielding layer 92 can be as follows: Figure 92 The second electrode 12 is arranged on the surface of the light incident side as shown. Furthermore, as... Figure 93 As shown, depending on the circumstances, the light-shielding layer 92 may be formed on the second electrode 12.

[0598] Alternatively, light can enter from the side of the second electrode 12, and the light may not enter the first electrode 11. Specifically, as follows: Figure 91 As shown, the light-shielding layer 92 is formed closer to the light-incident side of the second electrode 12 and above the first electrode 11. Alternatively, as... Figure 95As shown, the on-chip microlens 90 can be disposed above the charge storage electrode 14 and the second electrode 12. Light incident on the on-chip microlens 90 can be collected by the charge storage electrode 14, and the light may not reach the first electrode 11. Note that, in the case where a transmission control electrode 15 is provided as described in Embodiment 11, light may not be incident on the first electrode 11 and the transmission control electrode 15. Specifically, as... Figure 94 As shown, the light-shielding layer 92 may be formed on the upper side of the first electrode 11 and the transmission control electrode 15. Alternatively, light incident on the on-chip microlens 90 may not reach the first electrode 11, or may not reach the first electrode 11 and the transmission control electrode 15.

[0599] These constructions and structures can be adopted. Alternatively, the light-shielding layer 92 can be configured such that light only incident on the portion of the photoelectric conversion layer 13 located above the charge storage electrode 14. Alternatively, an on-chip microlens 90 can be designed. In this way, the portion of the photoelectric conversion layer 13 located above the first electrode 11 (or above the first electrode 11 and the transmission control electrode 15) does not contribute to photoelectric conversion. Therefore, all pixels can be more definitively and simultaneously reset, and a global shutter function can be more easily implemented. That is, in the driving method of a solid-state imaging device including multiple imaging elements with constructions and structures, the following steps are repeated:

[0600] In all imaging elements, all the charge in the first electrode 11 is simultaneously released to the outside of the system and stored in the photoelectric conversion layer 13; subsequently,

[0601] In all imaging elements, all the charge stored in the photoelectric conversion layer 13 is simultaneously transferred to the first electrode 11, and after the transfer is completed, the imaging elements sequentially read the charge transferred to the first electrode 11.

[0602] In the driving method of the solid-state imaging device, in each imaging element, light from the second electrode side does not incident on the first electrode. In all imaging elements, the charge in the first electrode is simultaneously and completely released to the outside of the system, and the charge is stored in the photoelectric conversion layer. Therefore, the first electrode can be simultaneously reset in all imaging elements. Furthermore, subsequently, in all imaging elements, the charge stored in the photoelectric conversion layer is simultaneously and completely transferred to the first electrode. After the transfer is completed, the imaging elements sequentially read the charge transferred to the first electrode. Therefore, a so-called global shutter function can be easily implemented.

[0603] Furthermore, in a variant of Example 11, such as Figure 95 As shown, multiple transfer control electrodes can be positioned from the position closest to the first electrode 11 toward the charge storage electrode 14. Note that... Figure 96An example of two transmission control electrodes 15A and 15B is shown. Furthermore, an on-chip microlens 90 can be disposed above the charge storage electrode 14 and the second electrode 12. Light incident on the on-chip microlens 90 can be collected by the charge storage electrode 14, and the light may not reach the first electrode 11 and the transmission control electrodes 15A and 15B.

[0604] exist Figure 61 and 62 In the illustrated embodiment 13, the thickness of the charge storage electrode segments 141, 142, and 143 gradually decreases, so that the thickness of the insulating layer segments 821, 822, and 823 gradually increases. On the other hand, as in... Figure 97 The diagram shows an enlarged schematic partial cross-sectional view of the stacked portion of the charge storage electrode, photoelectric conversion layer, and second electrode in a variant of Embodiment 13. The thicknesses of the charge storage electrode sections 141, 142, and 143 can be constant, while the thicknesses of the insulating layer sections 821, 822, and 823 can gradually increase. Note that the thicknesses of the photoelectric conversion layer sections 131, 132, and 133 are constant.

[0605] In addition, Figure 64 In the illustrated embodiment 14, the thickness of the charge storage electrode segments 141, 142, and 143 gradually decreases, thereby gradually increasing the thickness of the photoelectric conversion layer segments 131, 132, and 133. On the other hand, as in... Figure 98 The diagram shows an enlarged schematic partial cross-sectional view of the stacked portion of the charge storage electrode, photoelectric conversion layer, and second electrode in a variant of Embodiment 14. The thickness of the charge storage electrode segments 141, 142, and 143 can be constant, and the thickness of the insulating layer segments 821, 822, and 823 can be gradually reduced so that the thickness of the photoelectric conversion layer segments 131, 132, and 133 gradually increases.

[0606] It is obvious that the above-described variations can also be applied to embodiments other than Embodiment 1.

[0607] Although electrons are signal charges, and the conductivity type of the photoelectric conversion layer formed on the semiconductor substrate in the embodiment is n-type, the embodiment can also be applied to solid-state imaging devices in which holes are signal charges. In this case, the semiconductor regions can be semiconductor regions of opposite conductivity types, and the conductivity type of the photoelectric conversion layer formed on the semiconductor substrate can be p-type.

[0608] Furthermore, in the above examples, the embodiments are applied to CMOS solid-state imaging devices, where unit pixels, which are detected as signal charges based on the amount of incident light, are arranged in a matrix. However, the embodiments are not limited to CMOS solid-state imaging devices; they can also be applied to CCD solid-state imaging devices. In the latter case, the vertical transfer register of the CCD structure transfers signal charges vertically, and the horizontal transfer register transfers signal charges horizontally. The charges are amplified, and pixel signals (image signals) are output. Furthermore, the embodiments are not limited to typical column-type solid-state imaging devices, where pixels are formed in a two-dimensional matrix and column signal processing circuitry is provided for each pixel column. Additionally, depending on the specific circumstances, selection transistors may not be included.

[0609] Furthermore, the imaging elements and stacked imaging elements disclosed herein are not limited to solid-state imaging devices used to detect the distribution of incident visible light to obtain an image of that distribution. The imaging elements and stacked imaging elements can also be used in solid-state imaging devices to capture images of the distribution of incident infrared rays, X-rays, particles, etc. In a broader sense, the imaging elements and stacked imaging elements can generally be used in solid-state imaging devices (physical quantity distribution detection devices), such as fingerprint detection sensors, which detect the distribution of other physical quantities (such as pressure and capacitance) to obtain an image of that distribution.

[0610] Furthermore, imaging elements and stacked imaging elements are not limited to solid-state imaging devices that sequentially scan the unit pixels of the imaging region line by line to read pixel signals from each unit pixel. Imaging elements and stacked imaging elements can also be applied to XY-addressable solid-state imaging devices, which select arbitrary pixels one by one and read pixel signals from the selected pixels pixel by pixel. Solid-state imaging devices can be formed as a single chip, or they can be in the form of a module with imaging capabilities, in which the imaging region and driving circuitry or optical system are packaged together.

[0611] Furthermore, imaging elements and stacked imaging elements are not limited to applications in solid-state imaging devices, and can also be applied to imaging equipment. Here, imaging equipment refers to camera systems, such as digital cameras and camcorders, or electronic devices with imaging capabilities, such as mobile phones. In some cases, imaging equipment takes the form of a module mounted on an electronic device, i.e., a camera module.

[0612] Figure 99A and 99B The diagram shows an equivalent circuit of a variant of a transistor that drives a charge storage electrode. Figure 100A and 100B The schematic diagram illustrates the use of driving in Figure 99A and 99B The pulse waveform of the transistor in the equivalent circuit shown in the figure. Figure 100A and Figure 100B The horizontal axis represents time, and the vertical axis represents the potential of the charge storage electrode 14. A transistor typically applies a potential to the charge storage electrode 14. Note that the operation of a transistor applying a potential to the charge storage electrode 14 is expressed as "charge storage electrode 14 is driven by a transistor". On the other hand, in Figure 99A and 100A In the example shown, two transistors (FET-1, FET-2) drive the charge storage electrode 14. Furthermore, during the initial stage of charge transfer, the charge storage electrode 14 is driven by one transistor (FET-1), and during the later stage of charge transfer, the charge storage electrode 14 is driven simultaneously by both transistors (FET-1, FET-2). Note that the reference numeral "FET-0" indicates the transistor used for control. Figure 99B and Figure 100B In the example shown, charge storage electrode 14 is driven by a transistor with high drive capability (FET-5) and a transistor with low drive capability (FET-3). Specifically, in the early stages of charge transfer, charge storage electrode 14 is driven by the transistor with low drive capability (FET-3), and in the later stages of charge transfer, charge storage electrode 14 is driven by the transistor with high drive capability (FET-5). Note that reference numeral "FET-4" indicates a MOS diode. The drive capability of a transistor is defined by, for example, the channel width of the transistor. Based on the configuration, when a large amount of charge needs to be transferred, charge storage electrode 14 can be driven by a single transistor or by a transistor with low drive capability. This suppresses blooming. When blooming is no longer a concern, charge storage electrode 14 can be driven by two transistors or by a transistor with high drive capability (or by a transistor with high drive capability and a transistor with low drive capability). This increases the charge transfer speed (reduces the charge transfer time).

[0613] Figure 101A conceptual diagram illustrating an example of a solid-state imaging device 201 using imaging elements and stacked imaging elements disclosed herein in an electronic device (camera) 200 is shown. The electronic device 200 includes a solid-state imaging device 201, an optical lens 210, a shutter device 211, a drive circuit 212, and a signal processing circuit 213. The optical lens 210 uses image light (incident light) from an object to form an image on the imaging surface of the solid-state imaging device 201. Therefore, signal charges are stored in the solid-state imaging device 201 for a certain period of time. The shutter device 211 controls the illumination period and the shading period of the solid-state imaging device 201. The drive circuit 212 provides drive signals for controlling the transmission operation of the solid-state imaging device 201 and the shutter operation of the shutter device 211. Signals from the solid-state imaging device 201 are transmitted based on the drive signals (timing signals) provided from the drive circuit 212. The signal processing circuit 213 performs various types of signal processing. The processed video signal is stored in a storage medium such as a memory or output to a monitor. In electronic device 200, the pixel size in solid-state imaging device 201 can be miniaturized, and transmission efficiency can be improved. Therefore, the pixel characteristics in electronic device 200 can be improved. Electronic device 200 capable of using solid-state imaging device 201 is not limited to cameras. Solid-state imaging device 201 can be applied to digital cameras, camera modules for mobile devices (e.g., mobile phones), and other imaging devices.

[0614] Note that this disclosure can also be constructed as follows.

[0615] [A01] <<Imaging Element: First Aspect>

[0616] An imaging element, comprising:

[0617] The photoelectric conversion unit includes a stacked first electrode, a photoelectric conversion layer, and a second electrode, wherein...

[0618] The photoelectric conversion unit also includes a charge storage electrode, which is arranged separately from the first electrode and positioned to face the photoelectric conversion layer via an insulating layer.

[0619] When light undergoes photoelectric conversion in the photoelectric conversion layer after entering it, the absolute value of the potential applied to a portion of the photoelectric conversion layer facing the charge storage electrode is greater than the absolute value of the potential applied to the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element.

[0620] [A02] <<Imaging Elements: Second Aspect>>

[0621] An imaging element, comprising:

[0622] The photoelectric conversion unit includes a stacked first electrode, a photoelectric conversion layer, and a second electrode, wherein...

[0623] The photoelectric conversion unit also includes a charge storage electrode, which is arranged separately from the first electrode and positioned to extend into the photoelectric conversion layer via an insulating layer.

[0624] The width of the region of the photoelectric conversion layer between the first electrode and the charge storage electrode is narrower than the width of the region of the photoelectric conversion layer between the imaging element and the adjacent imaging element.

[0625] [A03] <<Imaging Element: Third Aspect>>

[0626] An imaging element, comprising:

[0627] The photoelectric conversion unit includes a stacked first electrode, a photoelectric conversion layer, and a second electrode, wherein...

[0628] The photoelectric conversion unit also includes a charge storage electrode, which is arranged separately from the first electrode and positioned to extend into the photoelectric conversion layer via an insulating layer.

[0629] The charge movement control electrode is formed in the region between the imaging element and the adjacent imaging element, which is located via an insulating layer to the photoelectric conversion layer.

[0630] [A04] <<Imaging Elements: The Fourth Aspect>>

[0631] An imaging element, comprising:

[0632] The photoelectric conversion unit includes a stacked first electrode, a photoelectric conversion layer, and a second electrode, wherein...

[0633] The photoelectric conversion unit also includes a charge storage electrode, which is arranged separately from the first electrode and positioned to extend into the photoelectric conversion layer via an insulating layer.

[0634] As an alternative to the second electrode, a charge motion control electrode is formed in the region of the photoelectric conversion layer located between the imaging element and the adjacent imaging element.

[0635] [A05] <<Imaging Elements: The Fifth Aspect>>

[0636] An imaging element, comprising:

[0637] The photoelectric conversion unit includes a stacked first electrode, a photoelectric conversion layer, and a second electrode, wherein...

[0638] The photoelectric conversion unit also includes a charge storage electrode, which is arranged separately from the first electrode and positioned to extend into the photoelectric conversion layer via an insulating layer.

[0639] The dielectric constant of the insulating material contained in the region between the first electrode and the charge storage electrode is higher than that of the insulating material contained in the region between the imaging element and the adjacent imaging element.

[0640] [A06] <<Imaging Elements: The Sixth Aspect>>

[0641] An imaging element, comprising:

[0642] The photoelectric conversion unit includes a stacked first electrode, a photoelectric conversion layer, and a second electrode, wherein...

[0643] The photoelectric conversion unit also includes a charge storage electrode, which is arranged separately from the first electrode and positioned to extend into the photoelectric conversion layer via an insulating layer.

[0644] The thickness of the insulating layer in the region between the first electrode and the charge storage electrode is thinner than the thickness of the insulating layer in the region between the imaging element and the adjacent imaging element.

[0645] [A07] <<Imaging Elements: The Seventh Aspect>>

[0646] An imaging element, comprising:

[0647] The photoelectric conversion unit includes a stacked first electrode, a photoelectric conversion layer, and a second electrode, wherein...

[0648] The photoelectric conversion unit also includes a charge storage electrode, which is arranged separately from the first electrode and positioned to extend into the photoelectric conversion layer via an insulating layer.

[0649] The thickness of the region of the photoelectric conversion layer between the first electrode and the charge storage electrode is greater than the thickness of the region of the photoelectric conversion layer between the imaging element and the adjacent imaging element.

[0650] [A08] <<Imaging Elements: The Eighth Aspect>>

[0651] An imaging element includes:

[0652] The photoelectric conversion unit includes a stacked first electrode, a photoelectric conversion layer, and a second electrode, wherein...

[0653] The photoelectric conversion unit also includes a charge storage electrode, which is arranged separately from the first electrode and positioned to extend into the photoelectric conversion layer via an insulating layer.

[0654] The amount of fixed charge in the region between the photoelectric conversion layer and the insulating layer between the first electrode and the charge storage electrode is less than the amount of fixed charge in the region between the photoelectric conversion layer and the insulating layer between the imaging element and the adjacent imaging element.

[0655] [A09] <<Imaging Elements: Ninth Aspect>>

[0656] An imaging element includes:

[0657] The photoelectric conversion unit includes a stacked first electrode, a photoelectric conversion layer, and a second electrode, wherein...

[0658] The photoelectric conversion unit also includes a charge storage electrode, which is arranged separately from the first electrode and positioned to extend into the photoelectric conversion layer via an insulating layer.

[0659] The charge mobility of the photoelectric conversion layer in the region between the first electrode and the charge storage electrode is greater than the charge mobility of the photoelectric conversion layer in the region between the imaging element and the adjacent imaging element.

[0660] [A10]

[0661] The imaging element according to [A03] further includes:

[0662] A control unit disposed on a semiconductor substrate and including a drive circuit, wherein

[0663] The first electrode, the second electrode, the charge storage electrode, and the charge motion control electrode are connected to the drive circuit.

[0664] During charge storage, the drive circuit will apply potential V 11 Applying a potential V to the first electrode 12 Apply to the charge storage electrode and apply a potential V 13 The charge is applied to the charge motion control electrode, and the charge is stored in the photoelectric conversion layer.

[0665] During charge transfer, the driving circuit will convert the potential V 21 Applying a potential V to the first electrode 22 Apply to the charge storage electrode and apply a potential V 23 The charge is applied to the charge motion control electrode, and the charge stored in the photoelectric conversion layer is read out to the control unit through the first electrode, wherein...

[0666] When the potential of the first electrode is higher than the potential of the second electrode

[0667] Keep V 12 ≥V 11 V 12 >V 13 and V 21 >V 22 >V 23 ,and

[0668] When the potential of the first electrode is lower than the potential of the second electrode

[0669] Keep V 12 ≤V 11 V 12 <V 13 and V 21 <V 22 <V 23 .

[0670] [A11]

[0671] The imaging element according to [A04] further includes:

[0672] A control unit disposed on a semiconductor substrate and including a drive circuit, wherein

[0673] The first electrode, the second electrode, the charge storage electrode, and the charge motion control electrode are connected to the drive circuit.

[0674] During charge storage, the driving circuit applies a potential V2' to the second electrode and converts the potential V... 13 'The charge is applied to the charge motion control electrode, and the charge is stored in the photoelectric conversion layer, and...'

[0675] During charge transfer, the driving circuit applies a potential V2” to the second electrode and converts the potential V 23 "The charge is applied to the charge motion control electrode, and the charge stored in the photoelectric conversion layer is read out to the control unit through the first electrode, wherein..."

[0676] When the potential of the first electrode is higher than the potential of the second electrode

[0677] Keep V2'≥V 13 'and V2"≥V 23 ",and

[0678] When the potential of the first electrode is lower than the potential of the second electrode

[0679] Keep V2'≤V 13 'and V2"≤V 23 ".

[0680] [A12]

[0681] The imaging element according to any one of [A01] to [A11] further includes:

[0682] Semiconductor substrate, wherein

[0683] The photoelectric conversion unit is arranged on the upper side of the semiconductor substrate.

[0684] [A13]

[0685] The imaging element according to any one of [A01] to [A12] further includes:

[0686] A transmission control electrode is disposed between the first electrode and the charge storage electrode, is disposed separately from the first electrode and the charge storage electrode, and is arranged to be directed toward the photoelectric conversion layer via an insulating layer.

[0687] [A14]

[0688] According to the imaging element of any one of [A01] to [A13], wherein

[0689] The charge storage electrode comprises multiple charge storage electrode segments.

[0690] [A15]

[0691] According to the imaging element of any one of [A01] to [A14], wherein

[0692] The size of the charge storage electrode is larger than the size of the first electrode.

[0693] [A16]

[0694] According to the imaging element of any one of [A01] to [A15], wherein

[0695] The first electrode extends through an opening in the insulating layer and connects to the photoelectric conversion layer.

[0696] [A17]

[0697] According to the imaging element of any one of [A01] to [A15], wherein

[0698] The photoelectric conversion layer extends through an opening in the insulating layer and is connected to the first electrode.

[0699] [A18]

[0700] According to the imaging element of [A17], where,

[0701] The edge portion of the top surface of the first electrode is covered by an insulating layer.

[0702] The first electrode is exposed on the bottom surface of the opening, and

[0703] The side surface of the opening is inclined to extend from the first surface to the second surface, wherein the first surface is the surface of the insulating layer that contacts the top surface of the first electrode, and the second surface is the surface of the insulating layer that contacts the portion of the photoelectric conversion layer facing the charge storage electrode.

[0704] [A19]

[0705] According to the imaging element of [A18], where,

[0706] The side surface of the opening, which extends obliquely from the first surface toward the second surface, is located on the charge storage electrode side.

[0707] [A20] <<Control of the potential of the first electrode and the charge storage electrode>>

[0708] The imaging element according to any one of [A01] to [A19] further includes:

[0709] A control unit disposed on a semiconductor substrate and including a drive circuit, wherein

[0710] The first electrode and the charge storage electrode are connected to the driving circuit.

[0711] During charge storage, the drive circuit will apply potential V 11 Apply to the first electrode and apply a potential V 12 The charge is applied to the charge storage electrode, and the charge is stored in the photoelectric conversion layer.

[0712] During charge transfer, the driving circuit will convert the potential V 21 Apply to the first electrode and apply a potential V 22 The charge is applied to the charge storage electrode, and the charge stored in the photoelectric conversion layer is read out to the control unit through the first electrode, wherein...

[0713] When the potential of the first electrode is higher than the potential of the second electrode

[0714] Keep V 12 ≥V 11 and V 22 <V 21 ,and

[0715] When the potential of the first electrode is lower than the potential of the second electrode

[0716] Keep V 12 ≤V 11 and V 22 >V 21 .

[0717] [A21] <<Charge Storage Electrode Section>>

[0718] According to the imaging element of any one of [A01] to [A13], wherein

[0719] The charge storage electrode comprises multiple charge storage electrode segments.

[0720] [A22]

[0721] According to the imaging element of [A21], where

[0722] When the potential of the first electrode is higher than the potential of the second electrode, during charge transport, the potential applied to the charge storage electrode section located closest to the first electrode is higher than the potential applied to the charge storage electrode section located furthest from the first electrode.

[0723] When the potential of the first electrode is lower than the potential of the second electrode, during charge transfer, the potential applied to the charge storage electrode section located closest to the first electrode is lower than the potential applied to the charge storage electrode section located furthest from the first electrode.

[0724] [A23]

[0725] According to the imaging element of any one of [A01] to [A22], wherein

[0726] The control unit includes at least a floating diffusion layer and an amplifying transistor disposed on a semiconductor substrate, and

[0727] The first electrode is connected to the floating diffusion layer and the gate portion of the amplifying transistor.

[0728] [A24]

[0729] According to the imaging element of [A23], where

[0730] The reset transistor and select transistor included in the control unit are further disposed on the semiconductor substrate.

[0731] The floating diffusion layer is connected to one source / drain region of the reset transistor.

[0732] One source / drain region of the amplifying transistor is connected to one source / drain region of the select transistor, and the other source / drain region of the select transistor is connected to the signal line.

[0733] [A25]

[0734] According to the imaging element of any one of [A01] to [A24], wherein

[0735] Light is incident from the second electrode side, and a light-shielding layer is formed on the light-incident side closer to the second electrode.

[0736] [A26]

[0737] According to the imaging element of any one of [A01] to [A24], wherein

[0738] Light enters from the second electrode side, but does not enter the first electrode.

[0739] [A27]

[0740] According to the imaging element of [A26], where

[0741] On the upper side of the first electrode, a light-shielding layer is formed on the light-incident side closer to the second electrode.

[0742] [A28]

[0743] According to the imaging element...

Claims

1. A photodetector element, comprising: A photoelectric conversion unit, comprising a stacked first electrode, a photoelectric conversion layer, and a second electrode, wherein... The photoelectric conversion unit further includes a charge storage electrode, which is arranged separately from the first electrode and positioned to extend into the photoelectric conversion layer via an insulating layer. A charge movement control electrode is formed in the region between the photodetector element and an adjacent photodetector element, extending from the insulating layer to the photoelectric conversion layer, and the charge movement control electrode is disposed between the charge storage electrode and the charge storage electrode of the adjacent photodetector element. The first electrode is configured to be shared by the photodetector element and the adjacent photodetector element. Specifically, the charge storage electrodes of the photodetector element and the adjacent photodetector element are controlled. The first electrode is connected to the gate portion of the amplifying transistor of the photodetector element. The charge storage electrode included in the photodetector element is configured to transfer the charge generated within the photoelectric conversion layer included in the photodetector element to the first electrode, and The charge storage electrode included in the adjacent photodetector element is configured to transfer the charge generated within the photoelectric conversion layer included in the adjacent photodetector element to the first electrode.

2. The optical detection element according to claim 1, further comprising: The control unit, which is disposed on a semiconductor substrate and includes a drive circuit, wherein The first electrode, the second electrode, the charge storage electrode, and the charge movement control electrode are connected to the driving circuit. During charge storage, the drive circuit applies a potential V 11 to the first electrode, a potential V 12 to the charge storage electrode, and a potential V 13 to the charge movement control electrode, and charge is stored in the photoelectric conversion layer, and During the charge transfer, the drive circuit applies a potential V 21 to the first electrode, a potential V 22 to the charge storage electrode, and a potential V 23 to the charge movement control electrode, and the charge stored in the photoelectric conversion layer is read out to the control unit through the first electrode. When the potential of the first electrode is higher than the potential of the second electrode, V 12 ≥V 11 V 12 >V 13 and V 21 >V 22 >V 23 It was able to be maintained, and When the potential of the first electrode is lower than the potential of the second electrode, V 12 ≤V 11 V 12 <V 13 and V 21 <V 22 <V 23 It was thus preserved.

3. The optical detection element according to claim 1, further comprising: Semiconductor substrate, wherein The photoelectric conversion unit is disposed on the upper side of the semiconductor substrate.

4. The optical detection element according to claim 1 or 2, further comprising: A transmission control electrode is disposed between the first electrode and the charge storage electrode, is disposed separately from the first electrode and the charge storage electrode, and is arranged to pass through the insulating layer to the photoelectric conversion layer.

5. The optical detection element according to claim 1 or 2, wherein... The charge storage electrode includes multiple charge storage electrode segments.

6. The optical detection element according to claim 1 or 2, wherein... The charge storage electrode is larger than the first electrode.

7. A stacked optical detection element, comprising at least one optical detection element according to any one of claims 1 to 6.

8. A light detection device comprising a plurality of light detection elements according to any one of claims 1 to 6.

9. A light detection device comprising a plurality of stacked imaging elements according to claim 7.

10. A light detection device, comprising: Multiple optical detection elements according to any one of claims 1 to 6, wherein, Multiple optical detection elements are included in the optical detection element block, and The first electrode is shared by the plurality of photodetectors included in the photodetector block.

11. A light detection device, comprising: A plurality of stacked optical detection elements, each stacked optical detection element comprising at least one optical detection element according to any one of claims 1 to 6, wherein, Multiple stacked optical detection elements are included in the optical detection element block, and The first electrode is shared by the plurality of stacked photodetectors included in the photodetector block.

12. The light detection device according to any one of claims 8 to 11, in, An on-chip microlens is positioned above a photodetector element.

13. The light detection device according to any one of claims 8 to 11, wherein, Two optical detection elements are included in the optical detection element block, and An on-chip microlens is arranged on the upper side of the photodetector block.

14. The light detection device according to any one of claims 8 to 11, wherein, A floating diffusion layer is set for multiple photodetectors.

15. The light detection device according to any one of claims 8 to 11, wherein, The first electrode is arranged adjacent to the charge storage electrode of each photodetector element.

16. The light detection device according to any one of claims 8 to 11, wherein, The first electrode is arranged adjacent to the charge storage electrode of a portion of the plurality of photodetectors, and is arranged not adjacent to the charge storage electrode of the remaining photodetectors.

17. The optical detection device according to claim 16, wherein, The distance between the charge storage electrode included in the photodetector element and the charge storage electrode included in the photodetector element is longer than the distance between the first electrode and the charge storage electrode in the photodetector element adjacent to the first electrode.

18. A light detection device, comprising: The optical detection element and the adjacent optical detection element according to any one of claims 1 to 6, wherein, The optical detection element and the adjacent optical detection element are included in the optical detection element block.

19. The optical detection device according to claim 18, wherein, The optical detection element block includes four optical detection elements, and The first electrode is shared by the four photodetectors.

Images