A bipolar transistor, a manufacturing method and a detection circuit

Abstract

This invention discloses a bipolar transistor, its fabrication method, and a detection circuit, applicable to the field of transistor technology. Using a piezoelectric thin film as the n-type doped layer in the transistor, a bipolar transistor with an n-p-n structure is formed by two n-type piezoelectric layers sandwiching a p-type polymer. When any mechanical stress is applied to the top of the transistor, a charge is generated in the piezoelectric layer, polarizing the upper and lower surfaces of the piezoelectric layer, with opposite charges accumulating on different surfaces. Furthermore, due to the formation of two pn junctions, the passivation of free carriers amplifies the output signal, thereby enhancing the induced piezoelectric potential by applying pressure. This achieves a combination of sensing and energy harvesting functions in the bipolar transistor, allowing simultaneous energy harvesting during sensing operation without the need for external power supplies or signal amplification circuits.

Description

Technical Field

[0001] This invention relates to the field of transistor technology, and in particular to a bipolar transistor, a method for fabricating a bipolar transistor, and a detection circuit. Background Technology

[0002] Wearable electronic applications with functions such as human-computer interaction, sensory skin-like features, energy harvesting, and health monitoring have attracted widespread attention, leading to a proliferation of various device designs. Different structural designs can enhance sensing performance under various detection modes, such as pressure, strain, temperature, and humidity. However, the energy and power management of these devices have been somewhat neglected, but the energy footprint of such sensors should also be a consideration for designers. Therefore, achieving a combination of sensing and energy harvesting functions would represent a significant innovation and advancement for these devices.

[0003] In such devices, the output signal of the sensing unit is actually powered by a specific energy harvesting system. Realizing such a small hybrid system requires overcoming several key challenges. First, how to extract the output signal from the sensing / energy harvesting device; second, how to amplify the signal amplitude to achieve the functions designed for wearable systems. Therefore, providing a transistor that integrates sensor operation and energy harvesting is a problem urgently needing to be solved by those skilled in the art. Summary of the Invention

[0004] The purpose of this invention is to provide a bipolar transistor that combines sensing and energy harvesting functions; another purpose of this invention is to provide a method for fabricating a bipolar transistor and a detection circuit that combines sensing and energy harvesting functions.

[0005] To solve the above-mentioned technical problems, the present invention provides a bipolar transistor, comprising:

[0006] The first n-type piezoelectric layer and the second n-type piezoelectric layer are set opposite to each other;

[0007] A p-type polymer layer located between the first n-type piezoelectric layer and the second n-type piezoelectric layer;

[0008] The first electrode is located on the surface of the first n-type piezoelectric layer on the side opposite to the p-type polymer layer;

[0009] The second electrode is located on the surface of the second n-type piezoelectric layer on the side opposite to the p-type polymer layer.

[0010] Optionally, the first n-type piezoelectric layer includes a first n-type ZnO layer, and the second n-type piezoelectric layer includes a second n-type ZnO layer.

[0011] Optionally, the orientation of the first n-type ZnO layer is

[002] , and the orientation of the second n-type ZnO layer is

[002] .

[0012] Optionally, the p-type polymer layer includes any one of the following:

[0013] P-type P3HT layer, P-type PTAA layer, P-type PEDOT:PSS layer.

[0014] Optionally, the first electrode includes an ITO electrode, and the second electrode includes a copper electrode.

[0015] Optionally, the substrate located on the surface of the first electrode facing away from the p-type polymer layer is a flexible substrate.

[0016] Optionally, it may also include a passivation layer covering the exposed surfaces of the first n-type piezoelectric layer and the second n-type piezoelectric layer.

[0017] The present invention also provides a method for fabricating a bipolar transistor, comprising:

[0018] A first n-type piezoelectric layer is disposed on one side surface of the first electrode;

[0019] A p-type polymer layer is formed by depositing a p-type polymer material on the surface of the first n-type piezoelectric layer;

[0020] A second n-type piezoelectric layer is disposed on the surface of the p-type polymer layer;

[0021] A second electrode is disposed on the surface of the second n-type piezoelectric layer to form the bipolar transistor.

[0022] Optionally, the provision of a first n-type piezoelectric layer on one side surface of the first electrode includes:

[0023] An n-type piezoelectric material is deposited on the surface of the first electrode;

[0024] The n-type piezoelectric material is annealed to form the first n-type piezoelectric layer;

[0025] The step of forming a second n-type piezoelectric layer on the surface of the p-type polymer layer includes:

[0026] An n-type piezoelectric material is deposited on the surface of the p-type polymer layer;

[0027] The n-type piezoelectric material is annealed to form the second n-type piezoelectric layer.

[0028] The present invention also provides a detection circuit comprising a plurality of bipolar transistors as described in any of the preceding claims, wherein the plurality of bipolar transistors are arranged in an array.

[0029] The present invention provides a bipolar transistor comprising: a first n-type piezoelectric layer and a second n-type piezoelectric layer disposed opposite to each other; a p-type polymer layer located between the first n-type piezoelectric layer and the second n-type piezoelectric layer; a first electrode located on the surface of the first n-type piezoelectric layer facing away from the p-type polymer layer; and a second electrode located on the surface of the second n-type piezoelectric layer facing away from the p-type polymer layer.

[0030] Using piezoelectric thin films as the n-type doped layer in a transistor, a bipolar transistor with an npn structure is formed by two n-type piezoelectric layers sandwiching a p-type polymer. When any mechanical stress is applied to the top of the transistor, a charge is generated in the piezoelectric layer, polarizing the upper and lower surfaces of the piezoelectric layer. Opposite charges accumulate on different surfaces. Furthermore, due to the formation of two pn junctions, the passivation of free carriers amplifies the output signal. Applying pressure can enhance the induced piezoelectric potential, thus combining sensing and energy harvesting functions in the bipolar transistor. Energy harvesting can occur simultaneously with sensing operation, without the need for any external power supply or signal amplification circuitry.

[0031] The present invention also provides a method for fabricating a bipolar transistor and a detection circuit, which have the same beneficial effects as described above, and will not be described in detail here. Attached Figure Description

[0032] To more clearly illustrate the technical solutions of the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 This is a schematic diagram of the structure of a bipolar transistor provided in an embodiment of the present invention;

[0034] Figure 2 An equivalent circuit diagram of a bipolar transistor provided in an embodiment of the present invention;

[0035] Figure 3 The equivalent circuit diagram of the npn structure;

[0036] Figures 4 to 5 The input-output characteristic curves of a bipolar transistor provided in an embodiment of the present invention are shown.

[0037] Figure 6 The dynamic response curve of a bipolar transistor during mouth breathing;

[0038] Figure 7 The graph shows the dynamic response of a bipolar transistor during nasal breathing.

[0039] Figure 8 Dynamic response curve of wrist pulse for bipolar transistor applications;

[0040] Figure 9 Dynamic response curve of neck pulse for bipolar transistor applications;

[0041] Figure 10 The graph shows the dynamic response of the detection circuit when the object moves.

[0042] Figure 11 The dynamic response curves of the detection circuit under different pressures are shown.

[0043] Figure 12 This is a flowchart illustrating a method for fabricating a bipolar transistor according to an embodiment of the present invention.

[0044] In the figure: 1. First n-type piezoelectric layer, 2. Second n-type piezoelectric layer, 3. P-type polymer layer, 4. First electrode, 5. Second electrode, 6. Substrate. Detailed Implementation

[0045] The core of this invention is to provide a bipolar transistor. In the prior art, the output signal of the sensing unit is actually powered by a specific energy harvesting system. To realize such a small hybrid system device, several key challenges need to be overcome. First, how to extract the output signal from the sensing / energy harvesting device; second, how to amplify the signal amplitude to achieve the functions designed for the wearable system.

[0046] The bipolar transistor provided by the present invention includes: a first n-type piezoelectric layer and a second n-type piezoelectric layer disposed opposite to each other; a p-type polymer layer located between the first n-type piezoelectric layer and the second n-type piezoelectric layer; a first electrode located on the surface of the first n-type piezoelectric layer facing away from the p-type polymer layer; and a second electrode located on the surface of the second n-type piezoelectric layer facing away from the p-type polymer layer.

[0047] Using piezoelectric thin films as the n-type doped layer in a transistor, a bipolar transistor with an npn structure is formed by two n-type piezoelectric layers sandwiching a p-type polymer. When any mechanical stress is applied to the top of the transistor, a charge is generated in the piezoelectric layer, polarizing the upper and lower surfaces of the piezoelectric layer. Opposite charges accumulate on different surfaces. Furthermore, due to the formation of two pn junctions, the passivation of free carriers amplifies the output signal. Applying pressure can enhance the induced piezoelectric potential, thus combining sensing and energy harvesting functions in the bipolar transistor. Energy harvesting can occur simultaneously with sensing operation, without the need for any external power supply or signal amplification circuitry.

[0048] To enable those skilled in the art to better understand the present invention, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are merely some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0049] Please refer to Figures 1 to 3 , Figure 1 This is a schematic diagram of the structure of a bipolar transistor provided in an embodiment of the present invention; Figure 2 An equivalent circuit diagram of a bipolar transistor provided in an embodiment of the present invention; Figure 3 The equivalent circuit diagram is for the npn structure.

[0050] See Figure 1 In this embodiment of the invention, the bipolar transistor includes: a first n-type piezoelectric layer 1 and a second n-type piezoelectric layer 2 disposed opposite to each other; a p-type polymer layer 3 located between the first n-type piezoelectric layer 1 and the second n-type piezoelectric layer 2; a first electrode 4 located on the surface of the first n-type piezoelectric layer 1 facing away from the p-type polymer layer 3; and a second electrode 5 located on the surface of the second n-type piezoelectric layer 2 facing away from the p-type polymer layer 3.

[0051] The aforementioned bipolar transistor is specifically an npn-type transistor, wherein the n-type doped layer is an n-type piezoelectric layer, including a first n-type piezoelectric layer 1 and a second n-type piezoelectric layer 2. An n-type piezoelectric layer is a film formed by n-doping a piezoelectric material. In this embodiment of the invention, the material of the piezoelectric layer can be ZnO, that is, the first n-type piezoelectric layer 1 includes a first n-type ZnO layer, and the second n-type piezoelectric layer 2 includes a second n-type ZnO layer. Of course, in this embodiment of the invention, other materials can also be used as the n-type piezoelectric layer, such as AZO and GaN, etc., and no specific limitation is made here.

[0052] Specifically, in this embodiment of the invention, the first n-type piezoelectric layer 1 and the second n-type piezoelectric layer 2, besides being ZnO blocks, can also be transformed into nanotubes or nanowires. Nanowire / nanotube-shaped ZnO exhibits a higher piezoelectric response than bulk ZnO because it has better polarization under mechanical stress. However, these structures present some interface problems when forming npn transistors. Similarly, in this form, crosstalk between each pixel unit in the pixelated array becomes critical and requires appropriate passivation.

[0053] In the manufacturing process, the thickness of the p-type organic P3HT layer is 1-2 µm, enabling the device to be driven under mechanical stress and to become a two-terminal device with an appropriate rectification ratio. As a transistor device, in order to improve the amplification factor of the device while reducing the rectification ratio, the thickness of the p-type layer can be reduced to the range of 100-500 nm.

[0054] The aforementioned p-type polymer layer 3 is located between the first n-type piezoelectric layer 1 and the second n-type piezoelectric layer 2. Specifically, the p-type polymer layer 3 is a p-doped polymer material, forming a pn junction with both the first n-type piezoelectric layer 1 and the second n-type piezoelectric layer 2, for a total of two pn junctions. The aforementioned p-type polymer layer 3 can serve as the base of a bipolar transistor, while one of the first n-type piezoelectric layer 1 and the second n-type piezoelectric layer 2 is used as the emitter, and the other as the collector.

[0055] In this embodiment of the invention, a p-type polymer layer 3 is selected as the base of the bipolar transistor. The pn junction composed of the p-type polymer layer 3 and the n-type piezoelectric layer can have better signal rectification and signal amplification effects, while also introducing a larger capacitance into the system. Specifically, the p-type polymer layer 3 includes any one of the following: a p-type P3HT layer, a p-type PTAA layer, or a p-type PEDOT:PSS layer. Wherein P3HT (Poly(3-hexylthiophene-2,5-diyl)) is poly(3-hexylthiophene), PEDOT:PSS (Poly(3,4-ethylenedioxythiophene)) is poly(3,4-ethylenedioxythiophene)-polystyrene sulfonic acid, and PTAA (Poly[bis(4-phenyl)(2,4,6-triMethylphenyl)aMine]) is poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine]. Of course, other p-type polymer materials can also be used as the p-type polymer layer 3 in this embodiment of the invention, and no specific limitation is made here.

[0056] Specifically, as a transistor device, to improve the amplification factor while reducing the rectification ratio, the thickness of the p-type polymer layer 3 can be reduced to the range of 100nm-500nm. Among the various materials for the p-type polymer layer 3 mentioned above, P3HT, as a p-type organic polymer, is more suitable for the sensing mode of the device, but it can also be replaced by some other materials. In the case of energy harvesting, PEDOT:PSS can effectively increase the output current and achieve a higher power generation rate, making it a more suitable choice.

[0057] The first electrode 4 needs to be located on the surface of the first n-type piezoelectric layer 1 facing away from the p-type polymer layer 3, and the second electrode 5 needs to be located on the surface of the second n-type piezoelectric layer 2 facing away from the p-type polymer layer 3, in order to transmit electrical signals outward. Specifically, the first electrode 4 includes an ITO electrode, and the second electrode 5 includes a copper electrode. Of course, the specific materials of the first electrode 4 and the second electrode 5 are not specifically limited in this embodiment of the invention, but depend on the specific circumstances.

[0058] Typically, a substrate 6 is disposed on the surface of the first electrode 4 facing away from the p-type polymer layer 3. This substrate 6 is preferably a flexible substrate 6 to increase the applicability of the bipolar transistor provided in this embodiment of the invention. Furthermore, the bipolar transistor may also include a passivation layer covering the exposed surfaces of the first n-type piezoelectric layer 1 and the second n-type piezoelectric layer 2 to increase the durability of the bipolar transistor. Specifically, this passivation layer can be a PET passivation layer or a passivation layer of other materials, and is not specifically limited here.

[0059] In this embodiment of the invention, the orientation of the first n-type ZnO layer is

[002] , and the orientation of the second n-type ZnO layer is

[002] . That is, when selecting an n-type piezoelectric layer in a bipolar transistor, it is necessary to select as many

[002] oriented ZnO polycrystalline materials as possible to improve the induced piezoelectric potential.

[0060] When any mechanical stress is applied to the surface of the bipolar transistor, the first n-type piezoelectric layer 1 and the second n-type piezoelectric layer 2 generate charges. The charges generated by each piezoelectric layer are polarized on its upper and lower surfaces, and opposite charges accumulate on different surfaces, for example, negative charges concentrate on the upper surface and positive charges concentrate on the lower surface. Since the n-type piezoelectric layer in this embodiment of the invention, i.e., the piezoelectric n-type semiconductor, selects as many

[002] oriented ZnO polycrystalline materials as possible, it has a high induced piezoelectric potential.

[0061] Since two pn junctions are formed on the surfaces where the first n-type piezoelectric layer 1 contacts the p-type polymer layer 3 and the surfaces where the p-type polymer layer 3 contacts the second n-type piezoelectric layer 2, the passivation of their free carriers amplifies the output signal, thereby enhancing the induced piezoelectric potential by increasing the applied pressure. In this embodiment of the invention, the introduction of the npn structure increases the series capacitance of the device, thereby achieving a higher voltage.

[0062] Figure 2 illustrates a typical npn structure consistent with the above theory, where the capacitance of the two pn junction diodes is simplified to two capacitors connected in parallel, specifically the diffusion capacitance of the pn junction (C). d ) and the junction capacitance (C) of each pn diode j The ohmic electrode contacts the corresponding ohmic resistance R. SThe capacitor and resistor are also connected in series. The parallel connection of the two capacitors and the resistor is equivalent to an n-type piezoelectric layer (R) in this embodiment of the invention. j C ZnO R ZnO The equivalent circuit of the bipolar transistor provided in this embodiment of the invention is obtained by connecting two such circuits in series. Figure 3 shows the equivalent circuit of the npn structure, which is theoretically equivalent to two piezoelectric diodes placed back to back, with their emitters, bases and collectors also located in the same position. Figure 3 The bid was successful.

[0063] The bipolar transistor provided in this invention uses a piezoelectric thin film as the n-type doped layer in the transistor. Two n-type piezoelectric layers sandwich a p-type polymer to form an npn structure bipolar transistor. When any mechanical stress is applied to the top of the transistor, a charge is generated in the piezoelectric layer, polarizing the upper and lower surfaces of the piezoelectric layer. Opposite charges accumulate on different surfaces. Furthermore, due to the formation of two pn junctions, free carrier passivation amplifies the output signal. Applying pressure enhances the induced piezoelectric potential, thus combining sensing and energy harvesting functions in the bipolar transistor. Energy harvesting can be performed simultaneously during sensing operation without the need for any external power supply or signal amplification circuitry.

[0064] Please refer to Figures 4 to 11 , Figures 4 to 5 The input-output characteristic curves of a bipolar transistor provided in an embodiment of the present invention are shown. Figure 6 The dynamic response curve of a bipolar transistor during mouth breathing; Figure 7 The graph shows the dynamic response of a bipolar transistor during nasal breathing. Figure 8 Dynamic response curve of wrist pulse for bipolar transistor applications; Figure 9 Dynamic response curve of neck pulse for bipolar transistor applications; Figure 10 The graph shows the dynamic response of the detection circuit when the object moves. Figure 11 The graph shows the dynamic response curves of the detection circuit under different pressures.

[0065] Regarding the electrical characteristics of the bipolar transistor provided by this invention, its input / output characteristics have been described in detail below. Figure 4 and Figure 5This is described in the text. Generally, bipolar junction transistors (BJTs) are three-terminal devices with three connection methods: common-base, common-collector, and common-emitter. The specific connection depends on which of the three terminals—base, collector, and emitter—is grounded. Since in practice, two terminals are used as inputs and two as outputs, there is a common port for both input and output. In a common-emitter configuration, the emitter terminal is assumed to be the common input and output path. The base-emitter terminal should be the input, and the collector-emitter terminal should be the output. From an electronic device perspective, the common-emitter configuration is the most commonly used connection method because it allows for current and voltage amplification.

[0066] In this embodiment of the invention, the base-emitter region is composed of V BE Bias, and V CE This corresponds to the emitter-collector electrode. Then, observe the collector current at the emitter-collector electrode; the output current can be denoted as I. C Typically, the output junction is reverse-biased, and the input junction is forward-biased. In this case, the emitter-base junction acts like a forward-biased diode, and its depletion region should be very narrow. Conversely, the collector-base junction acts like a reverse-biased diode, and its depletion region should be very wide. The input characteristics of a bipolar transistor can be understood as the relationship between input current and input voltage.

[0067] from Figure 4 as well as Figure 5 As can be seen from this, firstly, the collector-emitter voltage (V CE Assuming it is zero, the base-emitter voltage (V) BE The input voltage can be modified, and the base current (I) is recorded simultaneously. B Secondly, the collector-emitter voltage V CE It can increase and remain constant, while the base-emitter voltage V BE Gradually increase. The above process can well describe the change in input voltage (V). BE Initially, when the current is increased, no actual current is generated, but as it is increased further, the base current (I) increases. B The output current increases sharply. In this case, the output characteristic of a bipolar transistor is the relationship between the output current and the output voltage while the input current remains constant. This type of bipolar transistor traditionally operates statically in three regions: the active region, the saturation region, and the cutoff region. In the active region, the output current does not change significantly with increasing output voltage; the input current approaches zero in the cutoff region; and once both junctions are forward biased, the transistor operates in the saturation region. From an electronic device perspective, to satisfy the above theory, the emitter is grounded, and the base-emitter region is biased to a typical constant DC voltage, such as 0.7V, denoted as I.B The current in the base region is turning on the device to transfer from the cutoff region to the active region. Therefore, as I... B The change in (inflow current) demonstrates that the output characteristics of a bipolar transistor are independent of the bias voltage.

[0068] Since the device proposed in this invention is mechanically driven, the piezoelectric potential generated at the point where stress is applied to the top of the emitter creates a potential difference in the emitter-base region. This potential serves as the input to the modulation device, and the collector current serves as the output. In this case, the dynamic response of the device is effective, proving that the base current does indeed flow through the emitter-base region.

[0069] The present invention also provides a detection circuit comprising a plurality of bipolar transistors provided in any of the above embodiments. Typically, the plurality of said bipolar transistors are arranged in an array. The remaining structure of the detection circuit can be found in the prior art and will not be described in detail here.

[0070] Since the bipolar transistors provided in the above embodiments of the invention can simultaneously harvest energy during the sensing function without the need for any external power supply and signal amplification circuit, the detection circuit in this embodiment of the invention does not require any external power supply and signal amplification circuit to connect to each bipolar transistor, thus enabling the detection of pressure signals.

[0071] Regarding the dynamic response of bipolar transistors (BPTs), to determine their sensitivity in practical applications, this invention tested both a single BPT and a detection circuit consisting of a 2×2 array of four BPTs. First, in an embodiment of this invention, a single BPT is securely attached to certain specific points on the human body, allowing for the extraction of signals from mouth breathing, nose breathing, wrist pulse, and neck pulse, respectively. Figure 6 , Figure 7 , Figure 8 , Figure 9 The vital signs and neck pulse detection signals provided in the data. Figure 10 and Figure 11 The arrayed detection circuit shown interacts with some objects and records the detection signals. Specifically, the arrayed detection circuit may include four bipolar transistors: pixel 1, pixel 2, pixel 3, and pixel 4. Figure 10 The demonstration specifically showcases the response of the detection circuit to a 26g toy frog dynamically jumping along an arrow at a frequency of approximately 5Hz within the detection circuit area. For the detection circuit, each bipolar transistor, or pixel unit, is scanned simultaneously via four channels of an oscilloscope. This signal extraction can be used for path detection or force mapping. The data extracted by the acquisition board and readout circuitry, which converts the dynamic stimulus, is crucial for detecting the real-time motion of the object. Figure 11The touch response of the detection circuit is demonstrated: specifically assuming a touch area of ​​2cm × 2cm, the touch response results are shown under three different conditions—low, medium, and high dynamic stimulation—corresponding to different pressures when the detection circuit is touched with an index finger. It displays that the detection circuit can generate signals of different intensities corresponding to different pressures, i.e., different intensities of dynamic stimulation. Specifically, the lower the intensity of the dynamic stimulation, the lower the signal generated by the detection circuit; the higher the intensity of the dynamic stimulation, the higher the signal generated by the detection circuit. Therefore, the detection circuit provided in this embodiment of the invention can serve as a passive touch panel.

[0072] The following provides a method for fabricating a bipolar transistor. The fabrication method described below can be used as a reference for the specific structure of the bipolar transistor described above.

[0073] Please refer to Figure 12 , Figure 12 This is a flowchart illustrating a method for fabricating a bipolar transistor according to an embodiment of the present invention.

[0074] See Figure 12 In this embodiment of the invention, the bipolar transistor fabrication method includes:

[0075] S101: A first n-type piezoelectric layer is formed on one side surface of the first electrode.

[0076] Before this step, a substrate 6 is typically prepared, which can be a flexible substrate 6, such as a PET flexible substrate 6. Next, a first electrode 4 needs to be deposited on the surface of this substrate 6, which can specifically include depositing an ITO transparent electrode as the first electrode 4 on the PET flexible substrate 6. This step can be completed using magnetron sputtering technology. The thickness of the aforementioned first electrode 4 is typically between 100 nm and 200 nm, including the endpoints. This transparent electrode has good conductivity, can be sputtered at room temperature, and has good application scope and potential. Since the PET substrate 6 can only withstand temperatures up to 150 degrees Celsius, all deposition processes must be completed using cryogenic processes.

[0077] In this step, a first n-type piezoelectric layer 1 needs to be formed on the surface of the first electrode 4. Specifically, this step may include depositing an n-type piezoelectric material on the surface of the first electrode 4; annealing the n-type piezoelectric material to form the first n-type piezoelectric layer 1. That is, in this step, the first n-type piezoelectric layer 1 with a large number of

[002] crystal orientations can be formed by an annealing process.

[0078] This step specifically includes: depositing a 500 nm thick layer of ZnO, i.e., an n-type piezoelectric material, at room temperature using RF thermal sputtering under a pressure of 2.7 Pa and an argon atmosphere. Typically, XRD (X-ray diffraction) analysis is performed after deposition to check whether the crystal is well oriented in the

[002] direction. Since ZnO has a hexagonal crystal structure, crystal orientation plays a crucial role in achieving the optimal piezoelectric effect. The intensity of this piezoelectric effect mainly depends on the piezoelectric coefficients d33 and d31.

[0079] Subsequently, the n-type piezoelectric material ZnO sputtered on the flexible substrate 6 is annealed at 100°C. This process is necessary for the correct orientation of the wurtzite ZnO crystals in the

[002] direction and for increasing the intensity of the crystal diffraction peaks in that direction, which further enhances the piezoelectricity of the bipolar transistor, as it corresponds to the piezoelectric properties of the first n-type piezoelectric layer 1. ZnO crystals are essentially hexagonal, and orienting them in a specific direction is challenging. Therefore, this annealing step will take approximately 30 minutes.

[0080] Of course, the above steps can also be easily completed by radio frequency sputtering under different gas pressures to set up n-type piezoelectric materials, and solution-based ZnO spin coating and annealing can be regarded as alternatives to sputtering processes.

[0081] S102: A p-type polymer layer is formed by depositing a p-type polymer material on the surface of the first n-type piezoelectric layer.

[0082] This step specifically involves coating environmentally friendly, economical, easily processed, and thermally stable p-type semiconductor organic macromolecules, i.e., p-type polymer materials, including P3HT, using spin coating, screen printing, or blade coating techniques. The thickness of this p-type polymer material typically needs to be thicker than the piezoelectric layer, specifically approximately 1 μm to 2 µm, including the endpoints. Because the PET / ITO surface is relatively hydrophobic, drop coating of P3HT is quite difficult, while the thick ZnO layer on top of the ITO enhances the hydrophilicity and achieves the connection between the n-type and p-type materials.

[0083] In addition to the spin coating process described above for setting p-type polymer materials, screen printing can reduce crosstalk between pixel units when manufacturing arrays, while drop coating and scraping coating are typically used for the fabrication of single-pixel devices.

[0084] S103: A second n-type piezoelectric layer is formed on the surface of the p-type polymer layer.

[0085] This step typically includes: depositing an n-type piezoelectric material on the surface of the p-type polymer layer 3; and annealing the n-type piezoelectric material to form the second n-type piezoelectric layer 2.

[0086] This step is similar to S101 above. Specifically, the n-type piezoelectric material is deposited as a 500 nm thick ZnO layer by radio frequency sputtering at room temperature under a pressure of 2.7 Pa and an argon atmosphere. After deposition, XRD analysis can be performed to confirm whether the crystal is well oriented in the

[002] direction. Subsequently, in order to have better

[002] piezoelectric orientation of the ZnO in the emitter and collector, an annealing treatment must be performed after depositing the n-type piezoelectric material on top of the organic P3HT layer, i.e., the p-type polymer layer 3. The annealing conditions are usually annealing at 100°C for 30 minutes in air.

[0087] S104: A second electrode is disposed on the surface of the second n-type piezoelectric layer to form a bipolar transistor.

[0088] In this step, a conductive material needs to be deposited on top of the second n-type piezoelectric layer 2 to form the second electrode 5 located on top. Specifically, this can be achieved by depositing a 100 nm thick copper layer using 75 W DC sputtering, or by using conductive copper tape as the second electrode 5. Specifically, a copper conductive tape with a thickness of approximately 100 µm can be attached to the top to form an ohmic contact as the second electrode 5. This alternative reduces manufacturing time, thus simplifying the manufacturing process, particularly from a manufacturing perspective.

[0089] Following this step, a 150 µm thick PET passivation layer, similar to substrate 6, can be used to encapsulate the entire fabricated device, protecting it from any environmental influences. This is because the absorption of water and oxygen by the ZnO bulk material can affect the performance of the generated induced potential. The passivation layer can also be made of materials such as CuSCN, and no specific limitation is made here.

[0090] The present invention provides a method for fabricating a bipolar junction transistor (BJT). In the fabricated BJT, free carriers in the n-type piezoelectric layer diffuse towards the p-type polymer layer 3 on the surface of each pn junction, while holes from the p-type polymer layer 3 move to the n-type piezoelectric layer side to form a depletion region. Therefore, the passivation of free carriers in this BJT helps to enhance the collector-emitter output signal. The impedances of the two pn junctions may not be the same, as has been demonstrated in the fabricated BJT. This phenomenon is likely due to the interface between the p-type polymer layer 3 and the n-type piezoelectric layer.

[0091] The bipolar transistor fabricated in the embodiments of the present invention, with a common-emitter structure, can amplify both the voltage and current of the output signal. The changes in the input / output signals of the npn transistor in the above embodiments demonstrate the ability of this bipolar transistor to amplify both current and voltage. This is highly desirable in many cases because most CMOS-based transistors, such as TFTs and FETs, can only amplify current.

[0092] The aforementioned bipolar junction transistor, specifically the piezoelectric npn transistor, inherently possesses rectification characteristics. Many sensing units suffer from rectification issues in their output signals, while the positive or negative sign of the output signal from the aforementioned piezoelectric npn transistor is independent of the direction of the applied stimulus. Since an npn bipolar junction transistor consists of two piezoelectric diodes placed back-to-back, each diode is biased by the charge generated by the applied mechanical stress. Once the emitter-base diode is reverse-biased, the collector-base diode is effectively forward-biased. The reverse-biased diode is responsible for rectifying the collector-emitter signal. The forward / reverse bias of the diode depends on the direction of the applied dynamic stimulus; the polarization of the charge generated in the n-type piezoelectric layer, which serves as the emitter and collector, plays a decisive role in determining the forward / reverse bias of each diode.

[0093] Under applied mechanical stress, each of the aforementioned diodes is biased by the charge generated by the mechanical stress, thus achieving pressure sensing. In this case, the bipolar diodes do not require any applied load because the formation of two piezoelectric diodes (emitter-base and collector-base) introduces sufficient impedance to act as a load. This flexible and reliable device has many applications, such as monitoring human vital signs and tactile sensing. The aforementioned npn piezoelectric transistor exhibits the highest stress / pressure sensitivity up to 139.7 kPa. -1 and 88.66 kPa -1 These correspond to the sensitivities of output current and output voltage, respectively. This is mainly due to the passivation of free carriers in the ZnO bulk and the excellent performance of hexagonal wurtzite ZnO crystals in low-frequency sensing applications.

[0094] The output of the aforementioned npn transistor in sensing mode can be collected using its own capacitance, enabling it to generate its own power and thus eliminating the need for any external power source to drive the system. The voltage range for energy harvesting is 10mV to 2.6V, and the current range is 4nA to 120nA, corresponding to a harvested energy density of 0.001 to 0.1μW.

[0095] The aforementioned bipolar transistors can still operate stably after long-term use; the number of cycles they can operate under normal functional conditions is the device's duty cycle. Specifically, stability and reliability are crucial when the device is subjected to any mechanical stimulation or vibration. In a given npn structure, due to the flexibility of the aforementioned organic and inorganic materials, nanoscale stability and reliability can be achieved. For example, a ZnO block oriented in the

[002] direction exhibits reliable and stable behavior under strain or stress, and the device can withstand nearly 30,000 harsh operating cycles with almost no performance degradation.

[0096] The aforementioned npn piezoelectric transistor is a biocompatible device because its organic and inorganic materials are user-friendly and will not harm human skin, and are environmentally friendly. P3HT, as a material sandwiched between two layers of ZnO, is biocompatible; similarly, the two layers of ZnO used as the emitter and collector are also biocompatible. Therefore, the material selection for this bipolar transistor is user-friendly and has no side effects on the human body, making it feasible to integrate a large number of pixelated devices for applications such as electronic skin.

[0097] The bipolar transistor provided by this invention is of great significance in motion monitoring for the mapping of dynamic stimuli and the transformation of images in sensing scenarios. Furthermore, the proposed device can be used to monitor human vital signs, such as heart rate, pulse, and respiration (nose and mouth). Additionally, the npn transistor structure in a pixelated array can be used for tactile sensing, such as in touch panels. In the energy harvesting mode of the device as a wearable device, energy can be harvested from almost all movements involving flexion of body parts.

[0098] The concept of combining energy harvesting and sensing is novel, demonstrating that these two device modes can operate simultaneously, making it a complete device without any external power supply. The research on this small device unit is highly significant because it overcomes the challenges of circuit flexibility, reliability, and adaptability inherent in system-level approaches. As a crucial part of a system, state-of-the-art sensing units or nanogenerators in the prior art suffer from several problems: the need for external circuitry to modulate the signal, low generator power output making it difficult to further drive other devices (sensing units), and the requirement for external power to power them. However, the transistor device proposed in this invention can effectively extract voltage or current in sensing mode based on input / output changes, harvesting this energy to drive wireless systems or power low-power electronic devices such as hearing aids, Bluetooth devices, and RFID tags. The energy of the signal extracted in sensing mode can also be harvested, making devices with this concept highly promising for applications.

[0099] The various embodiments in this specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0100] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0101] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0102] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0103] The present invention has provided a detailed description of a bipolar transistor, a method for fabricating a bipolar transistor, and a detection circuit. Specific examples have been used to illustrate the principles and implementation methods of the invention. The descriptions of these embodiments are merely for the purpose of helping to understand the method and core ideas of the present invention. It should be noted that those skilled in the art can make various improvements and modifications to the present invention without departing from its principles, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A bipolar transistor, characterized in that, include: The first n-type piezoelectric layer and the second n-type piezoelectric layer are set opposite to each other; A p-type polymer layer located between the first n-type piezoelectric layer and the second n-type piezoelectric layer; The first electrode is located on the surface of the first n-type piezoelectric layer on the side opposite to the p-type polymer layer; The second electrode is located on the surface of the second n-type piezoelectric layer on the side opposite to the p-type polymer layer.

2. The bipolar transistor according to claim 1, characterized in that, The first n-type piezoelectric layer includes a first n-type ZnO layer, and the second n-type piezoelectric layer includes a second n-type ZnO layer.

3. The bipolar transistor according to claim 2, characterized in that, The orientation of the first n-type ZnO layer is [002], and the orientation of the second n-type ZnO layer is [002].

4. The bipolar transistor according to claim 1, characterized in that, The p-type polymer layer includes any one of the following: P-type P3HT layer, P-type PTAA layer, P-type PEDOT:PSS layer.

5. The bipolar transistor according to claim 1, characterized in that, The first electrode includes an ITO electrode, and the second electrode includes a copper electrode.

6. The bipolar transistor according to claim 1, characterized in that, The substrate located on the surface of the first electrode facing away from the p-type polymer layer is a flexible substrate.

7. The bipolar transistor according to claim 6, characterized in that, It also includes a passivation layer covering the exposed surfaces of the first n-type piezoelectric layer and the second n-type piezoelectric layer.

8. A method for fabricating a bipolar transistor, characterized in that, include: A first n-type piezoelectric layer is disposed on one side surface of the first electrode; A p-type polymer layer is formed by depositing a p-type polymer material on the surface of the first n-type piezoelectric layer; A second n-type piezoelectric layer is disposed on the surface of the p-type polymer layer; A second electrode is disposed on the surface of the second n-type piezoelectric layer to form the bipolar transistor.

9. The method according to claim 8, characterized in that, The provision of a first n-type piezoelectric layer on one side surface of the first electrode includes: An n-type piezoelectric material is deposited on the surface of the first electrode; The n-type piezoelectric material is annealed to form the first n-type piezoelectric layer; The step of forming a second n-type piezoelectric layer on the surface of the p-type polymer layer includes: An n-type piezoelectric material is deposited on the surface of the p-type polymer layer; The n-type piezoelectric material is annealed to form the second n-type piezoelectric layer.

10. A detection circuit, characterized in that, It includes a plurality of bipolar transistors as described in any one of claims 1 to 7, wherein the plurality of bipolar transistors are arranged in an array.

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