Voltage compensation method, voltage compensation circuit and electronic equipment

Abstract

The invention discloses a voltage compensation method, a voltage compensation circuit and electronic equipment. The voltage compensation method comprises the following steps: acquiring bus voltage in a power switch circuit and energy storage current in an energy storage compensation circuit; obtaining a bus amplitude limiting voltage target value by using the bus voltage target value and the bias adjustment value, and subtracting the bus voltage from the bus amplitude limiting voltage target value to obtain a bus amplitude limiting voltage error value; performing proportional integral operation and amplitude limiting processing on the bus amplitude limiting voltage error value to obtain an energy storage current target value, and subtracting the energy storage current from the energy storage current target value to obtain an energy storage current error value; performing proportional integral operation on the energy storage current error value to obtain a current regulation output value; and a compensation control signal is obtained by using the current regulation output value and is used for triggering the energy storage compensation circuit to change the charging and discharging states, so that the bus voltage is compensated and regulated to a set threshold range. Through the above mode, the voltage compensation method can effectively stabilize the bus voltage within the set threshold range, and the control logic is simple.

Description

Technical Field

[0001] This application relates to the field of circuit technology, and in particular to a voltage compensation method, a voltage compensation circuit, and an electronic device. Background Technology

[0002] In recent years, with the development of industrial and information technology, impact loads have frequently appeared in industrial production and information processing applications, such as electric welding machines, laser cutting machines, and AI (Artificial Intelligence) servers. According to the law of conservation of energy, when the electrical load is an impact load, the power supply bus provides impact power, which will cause the bus voltage to drop significantly or overshoot, thus seriously affecting the stable operation of the power supply.

[0003] However, the common approach in related technologies to stabilize bus voltage under impulse power is to increase the bus capacitor capacity to improve the ability to suppress bus voltage fluctuations from a hardware perspective. However, this cannot effectively solve the problem of bus voltage overshoot; it can only suppress the amplitude of the overshoot. Furthermore, once an overshoot occurs, because the energy cannot be fed back to the power supply from the power supply bus, it is also impossible to control the bus voltage to recover from the overshoot to normal. Summary of the Invention

[0004] The main technical problem addressed by this application is to provide a voltage compensation method, voltage compensation circuit, and electronic device that can solve the problem in related technologies where the stable control of bus voltage under impulse power cannot effectively solve the overshoot problem of bus voltage, nor can it control the bus voltage to recover from overshoot to normal.

[0005] To solve the above-mentioned technical problems, this application adopts the following technical solution: A voltage compensation method is provided for voltage compensation in a power supply regulation circuit. The power supply regulation circuit includes a power switching circuit and an energy storage compensation circuit coupled together. The voltage compensation method includes: acquiring the bus voltage in the power switching circuit and the energy storage current in the energy storage compensation circuit; obtaining a target value for the bus limiting voltage using a target value for the bus voltage and a bias adjustment value; subtracting the bus voltage from the target value for the bus limiting voltage to obtain a bus limiting voltage error value; performing proportional-integral calculation and limiting processing on the bus limiting voltage error value to obtain a target value for the energy storage current; subtracting the energy storage current from the target value for the energy storage current to obtain a storage current error value; performing proportional-integral calculation on the storage current error value to obtain a current regulation output value; obtaining a compensation control signal using the current regulation output value; and sending the compensation control signal to the energy storage compensation circuit to trigger the energy storage compensation circuit to change its charging and discharging state, thereby adjusting the bus voltage compensation to a set threshold range.

[0006] The steps for obtaining the target value of the bus limiting voltage using the target value of the bus voltage and the bias adjustment value include: superimposing the target value of the bus voltage on the bias adjustment value to obtain the target value of the upper limit voltage of the bus; subtracting the bus voltage from the target value of the bus limiting voltage to obtain the bus limiting voltage error value includes: subtracting the bus voltage from the target value of the upper limit voltage to obtain the upper limit voltage error value of the bus; and performing proportional-integral calculation and limiting processing on the bus limiting voltage error value to obtain the target value of the energy storage current includes: performing proportional-integral calculation on the upper limit voltage error value of the bus to obtain the upper limit adjustment output value; and limiting the upper limit adjustment output value to a first threshold range to obtain the upper limit adjustment target value; wherein the upper limit of the first threshold range is 0, and its lower limit is the maximum charging current of the energy storage compensation circuit; and the target value of the energy storage current is obtained using the upper limit adjustment target value.

[0007] The steps for obtaining the target value of the bus limiting voltage using the target value of the bus voltage and the bias adjustment value further include: subtracting the lower bias adjustment value from the target value of the bus voltage to obtain the target value of the lower limit voltage of the bus; the steps for obtaining the bus limiting voltage error value by subtracting the bus voltage from the target value of the bus limiting voltage to obtain the error value of the lower limit voltage of the bus; and the steps for obtaining the target value of the energy storage current by performing proportional-integral calculation and limiting processing on the error value of the bus limiting voltage to obtain the lower limit adjustment output value; and limiting the lower limit adjustment output value to a range of a second threshold value to obtain the target value of the lower limit adjustment; wherein the upper limit value of the second threshold range is the maximum discharge current of the energy storage compensation circuit, and its lower limit value is 0; and the target value of the energy storage current is obtained using the upper limit adjustment target value and the lower limit adjustment target value.

[0008] The steps for obtaining the energy storage current target value using the upper limit adjustment target value and the lower limit adjustment target value include: detecting whether the bus voltage is greater than the upper limit voltage target value of the bus; if the bus voltage is greater than the upper limit voltage target value of the bus, selecting the upper limit adjustment target value as the energy storage current target value.

[0009] The voltage compensation method further includes: if the bus voltage is not greater than the upper limit voltage target value of the bus, detecting whether the bus voltage is less than the lower limit voltage target value of the bus; if the bus voltage is less than the lower limit voltage target value of the bus, selecting the lower limit adjustment target value as the energy storage current target value; if the bus voltage is not less than the lower limit voltage target value of the bus, selecting the previous energy storage current target value as the energy storage current target value.

[0010] The process includes, after the step of performing proportional-integral calculation and limiting on the bus limiting voltage error value to obtain the target value of the energy storage current, and before the step of subtracting the energy storage current from the target value of the energy storage current to obtain the energy storage current error value, the following steps are included: obtaining the energy storage voltage in the energy storage compensation circuit; obtaining the energy storage voltage error value by subtracting the energy storage voltage from the target value of the energy storage voltage; performing proportional-integral calculation on the energy storage voltage error value to obtain the energy storage regulation output value; and limiting the energy storage regulation output value to a third threshold range to obtain the energy storage regulation target value; wherein the upper limit of the third threshold range is less than the maximum discharge current of the energy storage compensation circuit, and its lower limit is greater than the maximum charging current of the energy storage compensation circuit; the step of subtracting the energy storage current from the target value of the energy storage current to obtain the energy storage current error value includes: subtracting the energy storage regulation output value from the target value of the energy storage current to obtain the compensation regulation target value; and subtracting the energy storage current from the compensation regulation target value to obtain the energy storage current error value.

[0011] The step of subtracting the energy storage regulation output value from the energy storage current target value to obtain the compensation regulation target value includes: subtracting the energy storage regulation output value from the energy storage current target value at intervals of a set time period or a set number of compensation control signals to obtain the compensation regulation target value.

[0012] Before the step of obtaining the energy storage voltage error value by subtracting the energy storage voltage from the target energy storage voltage value, the method further includes: multiplying the target bus voltage value by a set adjustment coefficient to obtain the target energy storage voltage value.

[0013] To solve the above-mentioned technical problems, another technical solution adopted in this application is: to provide a voltage compensation circuit, wherein the voltage compensation circuit is used to couple with a power supply regulation circuit; wherein the voltage compensation circuit uses the voltage compensation method described in any of the above claims to achieve voltage compensation for the power supply regulation circuit.

[0014] To solve the above-mentioned technical problems, another technical solution adopted in this application is: to provide an electronic device, wherein the electronic device includes a housing and a voltage compensation circuit connected to the housing; wherein the voltage compensation circuit is the voltage compensation circuit as described above.

[0015] The beneficial effects of this application are as follows: Unlike existing technologies, the voltage compensation method provided in this application obtains the bus voltage in the power switching circuit and the energy storage current in the energy storage compensation circuit. It then uses the target value of the bus voltage and the bias adjustment value to obtain the target value of the bus limiting voltage, subtracts the bus voltage from it to obtain the bus limiting voltage error value, performs proportional-integral calculations and limiting processing on the bus limiting voltage error value to obtain the target value of the energy storage current, and uses the target value of the energy storage current with its amplitude limited to a specific range as the target value for adjusting the energy storage current. Subtracting the energy storage current yields the energy storage current error value, and the method further refines the energy storage compensation method. The current error value is used to perform proportional-integral calculation to obtain the current regulation output value. The current regulation output value is then used to obtain the compensation control signal, which triggers the energy storage compensation circuit to change its charging and discharging state. This allows the bus voltage compensation regulation to be stabilized within the set threshold range, avoiding bus voltage overshoot or drop under impact power. Furthermore, the energy storage compensation circuit can absorb bus energy by charging or release energy to the bus to smooth bus voltage fluctuations, effectively controlling the bus voltage to recover from overshoot or drop to normal. It also achieves closed-loop control of the bus voltage, with simple control logic that is easy to implement in engineering. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort, wherein: Figure 1 This is a flowchart illustrating the first embodiment of the voltage compensation method of this application; Figure 2 This is a schematic diagram of the first embodiment of the voltage compensation circuit and power supply regulation circuit of this application; Figure 3 This is a flowchart illustrating the second embodiment of the voltage compensation method of this application; Figure 4 This is a schematic diagram of the second embodiment of the voltage compensation circuit and power supply regulation circuit of this application; Figure 5 yes Figure 3 A flowchart illustrating an embodiment of signal processing in a medium voltage compensation method; Figure 6 yes Figure 3 A flowchart illustrating an embodiment of S410; Figure 7 yes Figure 3 Logic diagram for selecting upper and lower limit adjustment target values; Figure 8 This is a flowchart illustrating the third embodiment of the voltage compensation method of this application; Figure 9 yes Figure 3 A waveform diagram of each relevant signal in an embodiment of the medium voltage compensation method; Figure 10 This is a schematic diagram of one embodiment of the electronic device of this application. Detailed Implementation

[0017] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0018] The terms "first," "second," and "third" in this application are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified. All directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of this application are only used to explain the relative positional relationships and movements between components in a specific orientation (as shown in the figures). If the specific orientation changes, the directional indications also change accordingly. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.

[0019] In this document, the term "implementation" means that a specific feature, structure, or characteristic described in connection with an implementation may be included in at least one implementation of this application. The appearance of this phrase in various places in the specification does not necessarily refer to the same implementation, nor is it a separate or alternative implementation mutually exclusive with other implementations. It will be explicitly and implicitly understood by those skilled in the art that the implementations described herein can be combined with other implementations.

[0020] The present application will now be described in detail with reference to the accompanying drawings and embodiments.

[0021] Please refer to the following: Figure 1 and Figure 2 ,in, Figure 1This is a flowchart illustrating the first embodiment of the voltage compensation method of this application. Figure 2 This is a schematic diagram of the first embodiment of the voltage compensation circuit of this application. Specifically, it may include the following steps: S11: Obtain the bus voltage in the power switching circuit and the energy storage current in the energy storage compensation circuit.

[0022] It is understood that the voltage compensation method in this embodiment is specifically applied to, for example... Figure 2 The first voltage compensation circuit 20 shown implements voltage compensation for the first power supply regulation circuit 30; wherein, the first voltage compensation circuit 20 is used to couple with the first power supply regulation circuit 30 to implement voltage compensation for the first power supply regulation circuit 30 using any of the voltage compensation methods described herein.

[0023] It is worth noting that the term "coupled" in this article refers to any direct or indirect connection. Therefore, if the article describes a first circuit coupled to a second circuit, it means that the first circuit can be directly connected to the second circuit via electrical connection or signal connection methods such as wireless transmission or optical transmission, or indirectly connected to the second circuit via other circuits or connection methods via electrical connection or signal connection.

[0024] In some embodiments, the first power regulation circuit 30 includes a first power switching circuit 31 and a first energy storage compensation circuit 32 coupled in phase. The first power switching circuit 31 may specifically include one or more of any reasonable functional circuits for voltage regulation and conversion, such as a PFC (Power Factor Correction) circuit, a DC / DC (Direct Current) converter circuit, or a bidirectional DC / DC circuit. The PFC circuit is suitable for single-phase CCM (Continuous Conduction Mode) circuits, single-phase totem pole circuits, three-phase Vienna circuits, three-phase six-switch (also known as three-phase two-level) circuits, and T-type three-level circuits. The DC / DC circuit is suitable for half-bridge LLC (inductor-inductor-capacitor-C resonant network) circuits, full-bridge LLC circuits, three-phase LLC circuits, and phase-shifted full-bridge circuits. The first energy storage compensation circuit 32 includes one or more of any reasonable circuit elements such as capacitors, inductors, switching elements, and resistors. This embodiment does not limit this.

[0025] In some embodiments, the first voltage compensation circuit 20 may specifically include any reasonable circuit unit with signal processing function, such as a control chip, a DSP (Digital Signal Processing) chip, an MCU (Micro Controller Unit) circuit, a CPU (Central Processing Unit), a microcontroller, a field-programmable gate array, a programmable logic device, a discrete gate or transistor logic device, or discrete hardware. This application does not limit this.

[0026] Specifically, the first voltage compensation circuit 20 is used to sample and obtain the bus voltage in real time from the first power switching circuit 31, and to sample and obtain the energy storage current in real time from the first energy storage compensation circuit 32.

[0027] In some embodiments, the first voltage compensation circuit 20 can specifically sample the bus voltage using one or more of any reasonable voltage sampling circuits or sampling methods such as voltage sensors, sampling resistors, Hall sensors, or circuit model estimation, and sample the energy storage current using one or more of any reasonable current sampling circuits or sampling methods such as current sensors, sampling resistors, or circuit model estimation. This application does not limit this.

[0028] S12: Obtain the target value of the bus limiting voltage using the target value of the bus voltage and the bias adjustment value.

[0029] Understandably, in order to ensure that the feedback control of the bus voltage does not deviate from the specific threshold range, a target value for the bus voltage is set, which serves as the target value for the adjustment of the bus voltage, and a corresponding bias adjustment value is set to limit its adjustment range.

[0030] Specifically, the first voltage compensation circuit 20 uses a preset operation function or rule program to process the target value of the bus voltage and the bias adjustment value to obtain the target value of the bus limiting voltage.

[0031] Specifically, the target value of the bus voltage limit can be equal to the target value of the bus voltage plus or minus the bias adjustment value. This bias adjustment value can be a fixed value or a dynamic variable, such as energy storage capacity compensation, temperature compensation, aging compensation, load prediction, etc., to adapt to different operating conditions, such as cold start and sudden heavy load changes, and to avoid steady-state deviations of pure proportional-integral control.

[0032] S13: Subtract the bus voltage from the target value of the bus limiting voltage to obtain the bus limiting voltage error value.

[0033] The bus limiting voltage error value is obtained by subtracting the currently sampled bus voltage from the target value of the bus limiting voltage.

[0034] S14: Perform proportional-integral calculation and limiting processing on the bus limiting voltage error value to obtain the target value of energy storage current.

[0035] The first proportional-integral coefficient, which is fitted and set according to the power supply demand and simulation experimental data, is used to perform proportional-integral calculation on the bus limiting voltage error value. The output value obtained by the proportional-integral calculation is limited to a specific range to prevent the feedback control from exceeding the safe range of the energy storage device to obtain the target value of the energy storage current, that is, the energy storage current adjustment is close to the target value.

[0036] It is worth noting that the first energy storage compensation circuit 32 has two states: energy storage discharge and energy storage charging. When the energy storage discharge current is defined as a positive value in the energy storage discharge state, the energy storage discharge current will be a negative value in the energy storage charging state.

[0037] S15: Subtract the energy storage current from the target value of the energy storage current to obtain the energy storage current error value.

[0038] The energy storage current error value is obtained by subtracting the target value of the energy storage current from the currently sampled energy storage current.

[0039] S16: Perform proportional-integral calculation on the energy storage current error value to obtain the current regulation output value.

[0040] The energy storage current error value is calculated by performing proportional-integral calculation on the second proportional-integral coefficient obtained by fitting the current inner loop according to the power supply demand and simulation experimental data, so as to obtain the current regulation output value.

[0041] S17: Obtain the compensation control signal by adjusting the output value using the current.

[0042] The current regulation output value is processed by setting the signal modulation rules to obtain the compensation control signal, and the characteristic parameters of the compensation control signal, such as duty cycle and / or signal frequency, are dynamically adjusted in real time to make the energy storage current gradually approach the target value of the energy storage current.

[0043] In some embodiments, the compensation control signal may be one or more of any reasonable control signal such as PWM (Pulse Width Modulation) signal or PFM (Pulse Frequency Modulation) signal, and this application does not limit it.

[0044] S18: Send the compensation control signal to the energy storage compensation circuit to trigger the energy storage compensation circuit to change its charging and discharging state, thereby adjusting the bus voltage compensation to the set threshold range.

[0045] The modulated compensation control signal is sent to the first energy storage compensation circuit 32 to trigger the switching element inside the first energy storage compensation circuit 32 to turn on or off, thereby changing its charging and discharging state, such as changing from charging state to discharging state, or from discharging state to charging state, or changing the charging and discharging capacity, so as to adjust the bus voltage compensation to the set threshold range.

[0046] It is worth noting that the set threshold range refers to the voltage threshold range between the upper and lower limits of the bus voltage under normal operating conditions of the first power supply regulation circuit 30, which does not affect the stable operation of the power supply and the allowable voltage ripple.

[0047] The above scheme, by adjusting the charging and discharging state of the first energy storage compensation circuit 32, stabilizes the bus voltage compensation within a set threshold range, effectively preventing bus voltage overshoot or drop under impact power. It also utilizes the first energy storage compensation circuit 32 to absorb energy from the bus during charging or release energy back to the bus during discharging, thus smoothing bus voltage fluctuations and effectively controlling the bus voltage to recover from overshoot or drop to normal. Furthermore, it achieves closed-loop control of the bus voltage, with simple control logic and ease of engineering implementation. Through a dual closed-loop control architecture (voltage outer loop + current inner loop) combined with the dynamic charging and discharging adjustment of the first energy storage compensation circuit 32, high-precision and rapid response compensation of the bus voltage is achieved. The energy storage current, as the inner loop feedback quantity, directly controls the actual charging and discharging current of the first energy storage compensation circuit 32, rather than just controlling the switch duty cycle, improving the system's anti-interference capability (such as sudden changes in bus load or grid fluctuations) and achieving rapid dynamic response (the current loop bandwidth is typically much higher than the voltage loop).

[0048] Please see Figures 3-5 ,in, Figure 3 This is a flowchart illustrating the second embodiment of the voltage compensation method of this application. Figure 4 This is a schematic diagram of the second embodiment of the voltage compensation circuit and power supply regulation circuit of this application. Figure 5 yes Figure 3 A schematic flowchart of an embodiment of the signal processing in the voltage compensation method. The voltage compensation method of this embodiment... Figure 1 A detailed implementation flowchart of the voltage compensation method is shown, which specifically includes the following steps: S41: Obtain the bus voltage in the power switching circuit and the energy storage current in the energy storage compensation circuit.

[0049] Among them, S41 and Figure 1 The same applies to S11. Please refer to S11 and its related textual descriptions for details, which will not be repeated here.

[0050] S42: The upper limit voltage target value of the bus is obtained by superimposing the target value of the bus voltage with the bias adjustment value.

[0051] It is understood that, in this embodiment, the voltage compensation method may specifically be a second voltage compensation circuit 50 such as... Figure 4 The voltage compensation is implemented by the second power supply regulation circuit 60 shown. The second power supply regulation circuit 60 includes a second power switching circuit 61 and a second energy storage compensation circuit 62. The second power switching circuit 61 includes a power factor correction circuit 611, a DC bus 612, and a voltage conversion circuit 613. The second energy storage compensation circuit 62 includes a switching sub-circuit 621 and an energy storage sub-circuit 622. The switching sub-circuit 621 includes a first switching transistor S1 and a second switching transistor S2. The energy storage sub-circuit 622 includes an energy storage inductor L and an energy storage capacitor Cap. The second voltage compensation circuit 50 includes a first sampling circuit 51, a second sampling circuit 52, and a signal modulation circuit 53.

[0052] The power factor correction circuit 611 has its input coupled to the AC power supply 102, and its output connected to the DC bus 612. Simultaneously, it serves as the input to the voltage conversion circuit 613. The positive output terminal DC+ and the negative output terminal DC- of the voltage conversion circuit 613 are coupled to the first and second terminals of the load operating circuit 101, also referred to as the load operating circuit Rd. The second terminal of the first switching transistor S1 is coupled to the positive terminal Bus+ of the DC bus 612, and the first terminal of the first switching transistor S1 is coupled to the second terminal... The second terminal of the switching transistor S2 and the first terminal of the energy storage inductor L are coupled to the first terminal of the energy storage capacitor Cap. The first terminal of the second switching transistor S2 is coupled to the negative terminal Bus- of the DC bus 612 and the second terminal of the energy storage capacitor Cap. The first sampling circuit 51 is coupled to the DC bus 612 and the signal modulation circuit 53. The second sampling circuit 52 is coupled to the energy storage inductor L, the energy storage capacitor Cap, and the signal modulation circuit 53. The signal modulation circuit 53 is coupled to the control terminal of the first switching transistor S1 and the control terminal of the second switching transistor S2.

[0053] In some embodiments, the AC power supply 102 may be a single-phase AC power supply Uac or a three-phase AC power supply, and may be any reasonable power supply such as AC grid, photovoltaic AC power supply, independent generator power supply, wind power AC power supply, etc. This application does not limit it in this regard.

[0054] In some embodiments, the voltage conversion circuit 613 may be one or more of any reasonable functional circuits such as a DC chopper circuit, a rectifier circuit, or an inverter circuit, and this application does not limit it.

[0055] In some embodiments, the energy storage capacitor Cap may be a supercapacitor or a battery, and this application does not limit the specific type of capacitor.

[0056] In some embodiments, the first switch S1 and the second switch S2 may be a MOSFET (Metal-Oxide-Semiconductor-Field Effect-Transistor), a transistor, a thin-film transistor, a field-effect transistor, or any other reasonable switch, and this application does not limit them.

[0057] Specifically, the first sampling circuit 51 samples and acquires the bus voltage Ubus between the positive terminal Bus+ and the negative terminal Bus- of the DC bus 612 in real time, and sends the bus voltage Ubus to the signal modulation circuit 53; the second sampling circuit 52 samples and acquires the energy storage current IL on the energy storage inductor L in real time, and sends the energy storage current IL to the signal modulation circuit 53; the signal modulation circuit 53 fits and sets the target value U*bus and the upper bias adjustment value ΔUup of the bus voltage according to the feedback control requirements of the bus voltage Ubus, so as to superimpose the target value U*bus of the bus voltage and the upper bias adjustment value ΔUup to obtain the target value Ubus-up of the upper limit voltage of the bus.

[0058] It is worth noting that the target value of the bus voltage U*bus is also the feedback control target of the drive control circuit corresponding to the power factor correction circuit 611. That is, the drive control circuit is used to dynamically adjust the switching state of the power factor correction circuit 611 according to the bus voltage Ubus obtained by real-time sampling and the target value of the bus voltage U*bus, so that the bus voltage Ubus gradually approaches the target value of the bus voltage U*bus.

[0059] In some embodiments, the up-bias adjustment value ΔUup is less than the maximum allowable up-bias amplitude of the bus voltage Ubus, specifically it can be 5V (volts) to 15V, preferably 10V, but this application does not limit it.

[0060] S43: Subtract the lower bias adjustment value from the target value of the bus voltage to obtain the target value of the lower limit voltage of the bus.

[0061] The signal modulation circuit 53 fits and sets the lower bias adjustment value ΔUdn according to the feedback control requirements, and subtracts the lower bias adjustment value ΔUdn from the target value of bus voltage U*bus to obtain the target value of bus lower limit voltage Ubus-dn.

[0062] In some embodiments, the down bias adjustment value ΔUdn is less than the maximum allowable down bias amplitude of the bus voltage Ubus, specifically it can be 5V~15V, preferably 10V, but this application does not limit it.

[0063] S44: Subtract the bus voltage from the target value of the upper limit voltage of the bus to obtain the error value of the upper limit voltage of the bus.

[0064] The signal modulation circuit 53 subtracts the currently sampled bus voltage Ubus from the target value of the upper limit voltage Ubus-up to obtain the error value of the upper limit voltage, which is used as the input for the proportional-integral control of the upper limit voltage loop.

[0065] S45: Subtract the bus voltage from the target value of the lower limit voltage of the bus to obtain the error value of the lower limit voltage of the bus.

[0066] The signal modulation circuit 53 subtracts the currently sampled bus voltage Ubus from the target value of the bus lower limit voltage Ubus-dn to obtain the bus lower limit voltage error value, which is used as the input for the proportional-integral control of the bus lower limit voltage loop.

[0067] S46: Perform proportional-integral calculation on the upper limit voltage error value of the bus to obtain the upper limit adjustment output value.

[0068] The signal modulation circuit 53 uses the first proportional-integral coefficient set by the upper limit voltage loop of the bus to perform proportional-integral calculation on the upper limit voltage error value of the bus to obtain the upper limit adjustment output value. The upper limit adjustment output value is in the dimension of current and is used as an alternative to the target value of energy storage current.

[0069] S47: Adjust the upper limit adjustment output value to the first threshold range to obtain the upper limit adjustment target value.

[0070] The signal modulation circuit 53 performs amplitude limiting processing on the currently obtained upper limit adjustment output value to limit and adjust the upper limit adjustment output value to the first threshold range to obtain the upper limit adjustment target value.

[0071] The upper limit of the first threshold range is 0, and the lower limit is the maximum charging current of the second energy storage compensation circuit 62.

[0072] In some embodiments, the maximum charging current may be -25A (Amperes) to -15A, preferably -20A, but this application does not limit it.

[0073] S48: Perform proportional-integral calculation on the bus lower limit voltage error value to obtain the lower limit adjustment output value.

[0074] The signal modulation circuit 53 uses the first proportional-integral coefficient set by the bus lower limit voltage loop to perform proportional-integral calculation on the bus lower limit voltage error value to obtain the lower limit adjustment output value. The lower limit adjustment output value is in the dimension of current and is used as an alternative to the target value of energy storage current.

[0075] S49: Adjust the lower limit adjustment output value to the range of the second threshold to obtain the lower limit adjustment target value.

[0076] The signal modulation circuit 53 performs amplitude limiting processing on the currently obtained lower limit adjustment output value to limit and adjust the lower limit adjustment output value to the second threshold range to obtain the lower limit adjustment target value.

[0077] The upper limit of the second threshold range is the maximum discharge current of the second energy storage compensation circuit 62, and the lower limit is 0.

[0078] In some embodiments, the maximum discharge current may be 15A (Amperes) to 25A, preferably 20A, but this application does not limit it.

[0079] S410: The target value of the energy storage current is obtained by using the upper limit adjustment target value and the lower limit adjustment target value.

[0080] The signal modulation circuit 53 uses a preset rule program or logic operation function to process the upper limit adjustment target value and the lower limit adjustment target value, so as to select one of the outputs as the energy storage current target value.

[0081] S411: Subtract the energy storage current from the target value of the energy storage current to obtain the energy storage current error value.

[0082] S412: Perform proportional-integral calculations on the energy storage current error value to obtain the current regulation output value.

[0083] S413: The compensation control signal is obtained by adjusting the output value of the current.

[0084] S414: Sends a compensation control signal to the energy storage compensation circuit to trigger the energy storage compensation circuit to change its charging and discharging state, thereby adjusting the bus voltage compensation to the set threshold range.

[0085] Among them, S411, S412, S413 and S414 and Figure 1 S15, S16, S17 and S18 are the same. Please refer to S15, S16, S17 and S18 and their related textual descriptions for details. They will not be repeated here.

[0086] Please continue reading. Figure 6 , Figure 6 yes Figure 3 A flowchart illustrating an embodiment of S410 is shown. In one embodiment, the voltage compensation method of this application, in addition to S41-S414 described above, further includes some more specific steps. Specifically, S410 may further include the following steps: S4101: Detect whether the bus voltage is greater than the target value of the upper limit voltage of the bus.

[0087] Specifically, the signal modulation circuit 53 detects whether the currently acquired bus voltage Ubus is greater than the target value Ubus-up of the upper limit voltage of the bus.

[0088] If the bus voltage Ubus is greater than the target value of the upper limit voltage Ubus-up, then S4102 is executed; if the bus voltage Ubus is not greater than the target value of the upper limit voltage Ubus-up, then S4103 is executed.

[0089] S4102: Select the upper limit adjustment target value as the energy storage current target value.

[0090] When the bus voltage Ubus is determined to be greater than the upper limit voltage target value Ubus-up, the upper limit adjustment target value is selected as the energy storage current target value. That is, the upper limit adjustment target value is selected to regulate and control the bus voltage Ubus so that the bus voltage Ubus does not exceed the upper limit adjustment target value.

[0091] S4103: Detect whether the bus voltage is less than the target value of the lower limit voltage of the bus.

[0092] When it is determined that the bus voltage Ubus is not greater than the upper limit voltage target value Ubus-up, the bus voltage Ubus is further checked to see if it is less than the lower limit voltage target value Ubus-dn.

[0093] If the bus voltage Ubus is less than the target value of the lower limit voltage Ubus-dn, then S4104 is executed; if the bus voltage Ubus is not less than the target value of the lower limit voltage Ubus-dn, then S4105 is executed.

[0094] S4104: Select the lower limit adjustment target value as the energy storage current target value.

[0095] When the bus voltage Ubus is determined to be less than the target value of the lower limit voltage Ubus-dn, the target value of the lower limit adjustment is selected as the target value of the energy storage current. That is, the lower limit adjustment target value is selected to adjust and control the bus voltage Ubus so that the bus voltage Ubus is not lower than the lower limit adjustment target value.

[0096] S4105: Select the target value of the energy storage current from the previous step as the target value of the energy storage current.

[0097] When it is determined that the bus voltage Ubus is not less than the target value of the lower limit voltage Ubus-dn, the target value of the energy storage current in the previous cycle is selected as the target value of the energy storage current, that is, one of the upper limit adjustment target value and the lower limit adjustment target value selected in the signal cycle of the previous compensation control signal. In other words, the target value of the energy storage current in the previous signal cycle remains unchanged.

[0098] Please continue reading. Figure 7 , Figure 7 yes Figure 3Logic diagram for selecting the upper and lower limit adjustment target values.

[0099] In other embodiments, the signal modulation circuit 53 may further employ a logic unit to perform calculations on the upper limit adjustment target value and the lower limit adjustment target value. When the outer loop selection signal input to the logic unit is 0, the logic unit selects the lower limit adjustment target value as the outer loop calculation result, i.e., the energy storage current target value; when the outer loop selection signal is 1, the logic unit selects the upper limit adjustment target value as the outer loop calculation result, i.e., the energy storage current target value.

[0100] Please see Figure 8 , Figure 8 This is a flowchart illustrating the third embodiment of the voltage compensation method of this application. The voltage compensation method of this embodiment... Figure 1 A detailed implementation flowchart of the voltage compensation method is shown, which specifically includes the following steps: S71: Obtain the bus voltage in the power switching circuit and the energy storage current in the energy storage compensation circuit.

[0101] S72: The target value of the bus limiting voltage is obtained by using the target value of the bus voltage and the bias adjustment value.

[0102] S73: Subtract the bus voltage from the target value of the bus limiting voltage to obtain the bus limiting voltage error value.

[0103] S74: Perform proportional-integral calculations and limiting processing on the bus voltage error value to obtain the target value of the energy storage current.

[0104] Among them, S71, S72, S73 and S74 and Figure 1 S11, S12, S13 and S14 are the same. Please refer to the textual descriptions of S11, S12, S13 and S14 and their related texts for details. They will not be repeated here.

[0105] S75: Obtain the energy storage voltage in the energy storage compensation circuit.

[0106] Specifically, the second sampling circuit 52 samples and acquires the energy storage voltage Ucap on the energy storage capacitor Cap in real time, and sends the energy storage voltage Ucap to the signal modulation circuit 53.

[0107] S76: Obtain the energy storage voltage error value by subtracting the energy storage voltage from the target energy storage voltage value.

[0108] The signal modulation circuit 53 is also used to fit and set the target value U*cap of the energy storage voltage according to the feedback control requirements of the energy storage voltage Ucap, so as to subtract the energy storage voltage Ucap from the target value U*cap to obtain the energy storage voltage error value.

[0109] S77: Perform proportional-integral calculations on the energy storage voltage error value to obtain the energy storage regulation output value.

[0110] The energy storage voltage loop in the signal modulation circuit 53 is fitted with a third proportional-integral coefficient according to the feedback control requirements of the energy storage voltage Ucap. The energy storage voltage error value is then calculated by proportional-integral operation using the third proportional-integral coefficient to obtain the energy storage regulation output value.

[0111] It is worth noting that the third proportional-integral coefficient can be the same as or different from the first proportional-integral coefficient; and when the third proportional-integral coefficient is different from the first proportional-integral coefficient, the response rate of the energy storage voltage loop is less than that of the voltage outer loop. That is, in each signal cycle of the compensation control signal, there is a target value of the energy storage current output by the voltage outer loop. However, the energy storage regulation output value output by the energy storage voltage loop will be obtained every 2, 3, or 5 signal cycles, etc., to match the target value of the energy storage current in the corresponding cycle and to be used for feedback control of the energy storage current IL. This application does not limit this.

[0112] S78: Limit the output value of energy storage regulation to the third threshold range to obtain the target value of energy storage regulation.

[0113] The signal modulation circuit 53 performs amplitude limiting processing on the energy storage regulation output value to limit and adjust the upper limit regulation output value to the third threshold range to obtain the energy storage regulation target value.

[0114] The upper limit of the third threshold range is less than the maximum discharge current of the second energy storage compensation circuit 62, and the lower limit is greater than the maximum charging current of the second energy storage compensation circuit 62, so as to prevent the feedback control from exceeding the safety range of the energy storage device.

[0115] In some embodiments, the upper limit of the third threshold range may be 5A to 15A, preferably 10A; the lower limit of the third threshold range may be -15A to -5A, preferably -10A, and this application does not limit it.

[0116] S79: Subtract the energy storage regulation output value from the energy storage current target value to obtain the compensation regulation target value.

[0117] The signal modulation circuit 53 subtracts the energy storage regulation output value obtained through the energy storage voltage loop from the target value of the energy storage current obtained through the outer voltage loop to obtain the compensation regulation target value I*L.

[0118] S710: Subtract the energy storage current from the compensation adjustment target value to obtain the energy storage current error value.

[0119] The signal modulation circuit 53 subtracts the energy storage current IL from the compensation adjustment target value I*L to obtain the energy storage current error value.

[0120] S711: Perform proportional-integral calculations on the energy storage current error value to obtain the current regulation output value.

[0121] S712: The compensation control signal is obtained by adjusting the output value of the current.

[0122] S713: Sends a compensation control signal to the energy storage compensation circuit to trigger the energy storage compensation circuit to change its charging and discharging state, thereby adjusting the bus voltage compensation to the set threshold range.

[0123] Among them, S711, S712 and S713 and Figure 1 S16, S17 and S18 are the same. Please refer to S16, S17 and S18 and their related textual descriptions for details. They will not be repeated here.

[0124] The above scheme achieves control of both the bus voltage Ubus and the energy storage voltage Ucap by subtracting the calculation results of the outer voltage loop (including the upper and lower bus voltage loops) from the calculation results of the energy storage voltage loop, and then using the inner current loop for regulation and control. The calculation results of the outer voltage loop can be understood as the target value of the discharge current of the energy storage capacitor Cap, and the calculation results of the energy storage voltage loop can be understood as the target value of the charging current of the energy storage capacitor Cap. When the energy storage capacitor Cap discharges, the energy storage current IL is positive, and IL is the same as the discharge current of the energy storage capacitor Cap. Therefore, it is necessary to uniformly calculate the target value of the energy storage current IL based on the target value of the discharge current of the energy storage capacitor Cap (by multiplying the calculation result of the energy storage voltage loop by -1 and superimposing it with the target value of the energy storage current), which is the compensation adjustment target value I*L. Then, subtracting the energy storage current IL from the compensation adjustment target value I*L yields the energy storage current error value, which is used as the input to the inner current loop. The calculation results of the inner current loop are then processed by pulse width modulation to obtain the compensation control signal for the voltage conversion circuit 613.

[0125] Furthermore, in some embodiments, the above-mentioned S79 may further include: subtracting the energy storage regulation output value from the energy storage current target value at intervals of a set duration or a set number of compensation control signals to obtain the compensation regulation target value I*L.

[0126] It is worth noting that, in order to avoid the charging and discharging regulation of the second energy storage compensation circuit 62 affecting the stability of the bus voltage Ubus, the response rate of the energy storage voltage loop usually needs to be smaller than the response rate of the outer voltage loop. Specifically, it can be achieved by setting the program to perform the difference calculation between the target value of the energy storage current and the energy storage regulation output value once every set time interval or a set number of signal cycles, so as to ensure that the response rate of the energy storage voltage loop is relatively smaller.

[0127] In some embodiments, the set duration can be any reasonable duration such as 3ms, 5ms, or 10ms; the number of settings can be any reasonable number such as 2, 3, or 5, and this application does not limit this.

[0128] Furthermore, in some embodiments, prior to S76 above, the method may specifically include: multiplying the target value of the bus voltage U*bus by a set adjustment coefficient to obtain the target value of the energy storage voltage U*cap.

[0129] For ease of understanding, let's define the capacitance of the energy storage capacitor Cap as C. Then, the formula for calculating the energy stored in the energy storage capacitor Cap is: (Equation 1) Define the maximum allowable energy storage voltage of the energy storage capacitor Cap as Ucap-max. From the characteristics of the voltage conversion circuit 613, we know that the maximum energy storage voltage Ucap-max ≤ the bus voltage Ubus. Because in steady state, the bus voltage Ubus = the target bus voltage Ubus* at DC bus 612, therefore the maximum energy storage voltage Ucap-max ≤ the target bus voltage Ubus*. Define the maximum energy that the energy storage capacitor Cap can store as Wcap-max. Then, from Equation 1, we know: (Equation 2) definition: (Equation 3) Where k is a set coefficient, 0≤k≤1, combining equations 1, 2, and 3, we can obtain: (Equation 4) To maximize the energy storage capacity of the energy storage capacitor Cap, the maximum energy storage voltage Ucap-max is set to be equal to the target value of the bus voltage Ubus*. In steady state, the energy storage voltage Ucap is equal to the target value Ucap*. Substituting these values ​​into Equation 4, we can obtain the formula for calculating the target value Ucap*: (Equation 5) In order for the energy storage capacitor Cap to have the ability to absorb energy from the DC bus 612 and release energy to the DC bus 612 at the same time, the value of the set coefficient k can be 0.3-0.8, and preferably 0.5 or 0.7. This application does not limit it.

[0130] Please continue reading. Figure 9 , Figure 9 yes Figure 3 A waveform diagram of each relevant signal in an embodiment of the medium voltage compensation method.

[0131] It is understandable that: 1) During the time interval 0~t1, the bus voltage Ubus is in a steady state, the bus voltage Ubus is equal to the target value of the bus voltage U*bus, the outer loop selection signal is 1 (an initial state is required, or it can be 0), and the load working circuit 101 is lightly loaded. 2) At time t1, the load circuit 101 changes abruptly from light load to heavy load; 3) During the time interval t1~t2, the bus voltage Ubus drops from the target value of bus voltage U*bus to the target value of the lower limit voltage of bus Ubus-dn; 4) At time t2, the outer loop selection signal changes from 1 to 0; 5) During the time interval t2~t3, the bus lower limit voltage loop will control the bus voltage Ubus at the target value of the bus lower limit voltage Ubus-dn; 6) During the time interval t3~t4, the power factor correction circuit 611 gradually controls the bus voltage Ubus back to the target value U*bus. 7) During the time interval t4~t5, the bus voltage Ubus is equal to the target value of the bus voltage U*bus; 8) At time t5, the load circuit 101 suddenly changes from heavy load to light load; 9) During the time interval t5~t6, the bus voltage Ubus overshoots from the target value U*bus to the upper limit target value Ubus-up. 10) At time t6, the outer loop selection signal changes from 0 to 1; 11) During the time interval t6~t7, the upper limit voltage loop of the bus will control the bus voltage Ubus at the target value of the upper limit voltage Ubus-up; 12) During the time interval t7~t8, the power factor correction circuit 611 gradually controls the bus voltage Ubus back to the target value U*bus.

[0132] Therefore, the voltage compensation method described above can effectively stabilize the bus voltage Ubus within the set threshold range, thereby effectively preventing overshoot or drop of the bus voltage Ubus under impact power. It can also use the second energy storage compensation circuit 62 to absorb energy from the bus or release energy to the bus to smooth the fluctuation of the bus voltage Ubus, so as to effectively control the bus voltage Ubus to recover from overshoot or drop to normal. Furthermore, it realizes closed-loop control of the bus voltage Ubus, with simple control logic and easy engineering implementation.

[0133] This application also provides an electronic device, please refer to... Figure 10 , Figure 10This is a schematic diagram of one embodiment of the electronic device of this application. In this embodiment, the electronic device 80 includes a housing 81 and a third voltage compensation circuit 82 connected to the housing 81.

[0134] It should be noted that the third voltage compensation circuit 82 described in this embodiment is either the first voltage compensation circuit 20 or the second voltage compensation circuit 50 described in any of the above embodiments. Please refer to [link / reference] for details. Figures 1-9 The relevant textual content will not be elaborated upon here.

[0135] The beneficial effects of this application are as follows: Unlike existing technologies, the voltage compensation method provided in this application obtains the bus voltage in the power switching circuit and the energy storage current in the energy storage compensation circuit. It then uses the target value of the bus voltage and the bias adjustment value to obtain the target value of the bus limiting voltage, subtracts the bus voltage from it to obtain the bus limiting voltage error value, performs proportional-integral calculations and limiting processing on the bus limiting voltage error value to obtain the target value of the energy storage current, and uses the target value of the energy storage current with its amplitude limited to a specific range as the target value for adjusting the energy storage current. Subtracting the energy storage current yields the energy storage current error value, and the method further refines the energy storage compensation method. The current error value is used to perform proportional-integral calculation to obtain the current regulation output value. The current regulation output value is then used to obtain the compensation control signal, which triggers the energy storage compensation circuit to change its charging and discharging state. This allows the bus voltage compensation regulation to be stabilized within the set threshold range, avoiding bus voltage overshoot or drop under impact power. Furthermore, the energy storage compensation circuit can absorb bus energy by charging or release energy to the bus to smooth bus voltage fluctuations, effectively controlling the bus voltage to recover from overshoot or drop to normal. It also achieves closed-loop control of the bus voltage, with simple control logic that is easy to implement in engineering.

[0136] The above description is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A voltage compensation method applied to voltage compensation of a power conditioning circuit, the power conditioning circuit comprising a power switching circuit and an energy storage compensation circuit coupled together, characterized in that, The voltage compensation method includes: Obtain the bus voltage in the power switching circuit and the energy storage current in the energy storage compensation circuit; The target value of the bus voltage limiter is obtained by using the target value of the bus voltage and the bias adjustment value; The bus voltage is subtracted from the target value of the bus limiting voltage to obtain the bus limiting voltage error value; The target value of the energy storage current is obtained by performing proportional-integral calculation and limiting processing on the bus limiting voltage error value. Subtracting the energy storage current from the target value of the energy storage current yields the energy storage current error value. The current regulation output value is obtained by performing proportional-integral calculation on the energy storage current error value; The compensation control signal is obtained by using the current regulation output value; The compensation control signal is sent to the energy storage compensation circuit to trigger the energy storage compensation circuit to change its charging and discharging state, thereby adjusting the bus voltage compensation to a set threshold range.

2. The voltage compensation method according to claim 1, characterized in that, The step of obtaining the target value of the bus limiting voltage using the target value of the bus voltage and the bias adjustment value includes: The upper limit voltage target value of the bus is obtained by superimposing the bias adjustment value on the target value of the bus voltage; The step of subtracting the bus voltage from the target value of the bus limiting voltage to obtain the bus limiting voltage error value includes: The bus upper limit voltage error value is obtained by subtracting the bus voltage from the target value of the bus upper limit voltage. The step of performing proportional-integral calculation and limiting processing on the bus limiting voltage error value to obtain the target value of the energy storage current includes: The upper limit voltage error value of the bus is calculated by proportional-integral operation to obtain the upper limit adjustment output value; The upper limit adjustment output value is limited and adjusted to a first threshold range to obtain the upper limit adjustment target value; wherein, the upper limit of the first threshold range is 0, and its lower limit is the maximum charging current of the energy storage compensation circuit. The target value of the energy storage current is obtained by using the upper limit adjustment target value.

3. The voltage compensation method according to claim 2, characterized in that, The step of obtaining the target value of the bus limiting voltage using the target value of the bus voltage and the bias adjustment value further includes: Subtract the lower bias adjustment value from the target value of the bus voltage to obtain the target value of the lower limit voltage of the bus; The step of subtracting the bus voltage from the target value of the bus limiting voltage to obtain the bus limiting voltage error value further includes: The bus lower limit voltage error value is obtained by subtracting the bus voltage from the target value of the bus lower limit voltage. The step of performing proportional-integral calculation and limiting processing on the bus limiting voltage error value to obtain the target value of the energy storage current further includes: The lower limit voltage error value of the bus is calculated by proportional-integral operation to obtain the lower limit adjustment output value; The lower limit adjustment output value is limited and adjusted to the range of the second threshold to obtain the lower limit adjustment target value; wherein, the upper limit of the second threshold range is the maximum discharge current of the energy storage compensation circuit, and its lower limit is 0; The target value of the energy storage current is obtained by using the upper limit adjustment target value and the lower limit adjustment target value.

4. The voltage compensation method according to claim 3, characterized in that, The step of obtaining the target value of the energy storage current using the upper limit adjustment target value and the lower limit adjustment target value includes: Detect whether the bus voltage is greater than the target value of the upper limit voltage of the bus; If the bus voltage is greater than the target value of the upper limit voltage of the bus, the target value of the upper limit adjustment is selected and output as the target value of the energy storage current.

5. The voltage compensation method according to claim 4, characterized in that, The voltage compensation method further includes: If the bus voltage is not greater than the upper limit voltage target value of the bus, detect whether the bus voltage is less than the lower limit voltage target value of the bus; If the bus voltage is less than the target value of the lower limit voltage of the bus, the target value of the lower limit adjustment will be selected and output as the target value of the energy storage current; If the bus voltage is not less than the target value of the lower limit voltage of the bus, the target value of the energy storage current in the previous step is selected and output as the target value of the energy storage current.

6. The voltage compensation method according to any one of claims 1-5, characterized in that, After the step of performing proportional-integral calculation and limiting processing on the bus limiting voltage error value to obtain the target value of the energy storage current, and before the step of subtracting the energy storage current from the target value of the energy storage current to obtain the energy storage current error value, the method further includes: Obtain the energy storage voltage in the energy storage compensation circuit; The energy storage voltage error value is obtained by subtracting the energy storage voltage from the target energy storage voltage value. The energy storage voltage error value is calculated by proportional-integral operation to obtain the energy storage regulation output value; The energy storage regulation output value is limited and adjusted to a third threshold range to obtain the energy storage regulation target value; wherein, the upper limit of the third threshold range is less than the maximum discharge current of the energy storage compensation circuit, and its lower limit is greater than the maximum charging current of the energy storage compensation circuit. The step of subtracting the energy storage current from the target value of the energy storage current to obtain the energy storage current error value includes: Subtracting the energy storage regulation output value from the energy storage current target value yields the compensation regulation target value; The energy storage current error value is obtained by subtracting the energy storage current from the compensation adjustment target value.

7. The voltage compensation method according to claim 6, characterized in that, The step of subtracting the energy storage regulation output value from the energy storage current target value to obtain the compensation regulation target value includes: The compensation adjustment target value is obtained by subtracting the energy storage adjustment output value from the energy storage current target value at each set interval or at a set number of signal cycles of the compensation control signal.

8. The voltage compensation method of claim 6, wherein, Before the step of obtaining the energy storage voltage error value by subtracting the energy storage voltage from the target energy storage voltage value, the method further includes: The target value of the energy storage voltage is obtained by multiplying the target value of the bus voltage by a set adjustment coefficient.

9. A voltage compensation circuit, characterized by, The voltage compensation circuit is used to couple with the power supply regulation circuit; The voltage compensation circuit uses the voltage compensation method as described in any one of claims 1-8 to achieve voltage compensation for the power supply regulation circuit.

10. An electronic device, comprising: The electronic device includes a housing and a voltage compensation circuit connected to the housing; The voltage compensation circuit is the voltage compensation circuit as described in claim 9.

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