A W-band two-dimensional AIP microsystem architecture

Abstract

The present invention provides a W-band two-dimensional phased array AIP microsystem architecture, comprising a multi-layer organic adapter board, an antenna array disposed on the multi-layer adapter board, a PCB substrate connected to the multi-layer adapter board via BGA bumping, a heat dissipation material disposed on the PCB substrate, an eight-channel transmit beamforming chip and an eight-channel receive beamforming chip disposed on the heat dissipation material, and a heat sink disposed on the bottom side of the PCB substrate; the eight-channel transmit beamforming chip, the eight-channel receive beamforming chip, and the multi-layer adapter board are bonded via micro-bump packaging. The W-band two-dimensional AIP microsystem product provided by the present invention utilizes a phased array AIP microsystem architecture, integrating antennas and transceiver chips through packaging materials and processes, thereby meeting the application requirements of low-cost, miniaturized, and highly integrated W-band two-dimensional phased array microsystems.

Description

Technical Field

[0001] The present invention relates to the technical field of packaged antennas, and in particular to a W-band two-dimensional AIP microsystem architecture. Background Art

[0002] AiP (Antenna in Package) technology leverages the increasing integration density of silicon-based CMOS processes, providing an effective antenna solution for system-level wireless chips. Phased array antennas utilize a large number of independently amplitude- and phase-controlled antenna elements arranged into an antenna array plane. By controlling the amplitude and phase of each element, each element forms a specific beam, ultimately synthesizing a main beam. Due to their unique beam steering capabilities, phased array antennas are widely used in electronic information systems such as radar, communications, and imaging. Compared to microwaves used in traditional electronic information systems, millimeter-wave (mmW) frequency bands offer more abundant spectrum resources, wider spectral bandwidth, and shorter wavelengths. Consequently, applications in electronic information systems such as short-range high-speed wireless communications, high-resolution radar, and high-resolution imaging are rapidly developing in the mmW band. The W band within the mmW band is an attractive frequency range. Its spectrum center (94 GHz) lies within an atmospheric attenuation window with minimal propagation attenuation. This frequency range offers advantages such as long transmission distance and strong penetration, making it a research hotspot for mmWave applications in electronic information systems. The W-band two-dimensional phased array microsystem meets the urgent needs of today's electronic systems for miniaturization, high integration, and high performance. However, it also poses challenges to traditional phased array system architectures and planar microelectronics packaging technologies. Traditional phased array system architectures are built using multiple discrete modules. Specifically, subsystem modules are first constructed using bare MMIC chips mounted in a metal shielded box. Subsystem modules with appropriate performance are then selected to build the phased array system. Obviously, the traditional phased array system architecture uses a separate design for antennas and transceiver components, which significantly increases interconnection losses between the two components, as well as system size and cost. This results in high cost, bulk, and low integration. The phased array AIP microsystem architecture integrates the antenna and transceiver chips through packaging materials and processes, meeting the low-cost, miniaturized, and highly integrated application requirements of W-band two-dimensional phased array microsystems. Summary of the Invention

[0003] The present invention aims to overcome the shortcomings of the prior art in the traditional phased array system architecture, such as the interconnection loss between the separately designed antenna and transceiver components, as well as the high system cost, large size, and low integration. The present invention provides a W-band two-dimensional AIP microsystem product that adopts a phased array AIP microsystem architecture and integrates the antenna and transceiver chip through packaging materials and processes, thereby meeting the application requirements of the W-band two-dimensional phased array microsystem for low cost, miniaturization, and high integration.

[0004] The present invention provides a W-band two-dimensional AIP microsystem architecture, comprising a multi-layer organic adapter board, an antenna array arranged on the multi-layer adapter organic board, a PCB substrate connected to the multi-layer adapter organic board via BGA ball planting, a heat dissipation material arranged on the PCB substrate, an eight-channel transmit beamforming chip and an eight-channel receive beamforming chip arranged on the heat dissipation material, and a heat sink arranged on the bottom side of the PCB substrate; the eight-channel transmit beamforming chip, the eight-channel receive beamforming chip and the multi-layer adapter organic board are bonded via micro-bump packaging.

[0005] In the W-band two-dimensional AIP microsystem architecture described in the present invention, as a preferred embodiment, the multi-layer organic adapter board is made of 5 layers of organic materials laminated together, including 6 metal signal layers.

[0006] The W-band two-dimensional AIP microsystem architecture described in the present invention is preferably configured such that the metal signal layer includes, from top to bottom, a parasitic patch layer of a multi-layer microstrip patch antenna, a radiation patch layer of a multi-layer microstrip patch antenna, a first ground layer, a power supply and control signal layer, a second ground layer, and a horizontal transmission layer for radio frequency signals.

[0007] The W-band two-dimensional AIP microsystem architecture described in the present invention, as a preferred embodiment, the antenna array includes a parasitic patch antenna unit arranged on a parasitic patch layer, a radiating patch unit arranged on a radiating patch layer, a vertical feeding structure vertically connected to one end of the radiating patch unit, and a grounding unit arranged on a first ground layer and a second ground layer.

[0008] The W-band two-dimensional AIP microsystem architecture described in the present invention is preferably an eight-channel transmit beamforming chip based on a silicon-based CMOS process, using wafer-level chip packaging technology to complete the chip's surface circuit distribution and micro-bump layout preparation, and is prepared for packaging and bonding using a flip-chip assembly process;

[0009] The eight-channel transmit beamforming chip is used to complete the power sharing, power amplification, amplitude and phase control, and power and temperature telemetry functions of the W-band RF signal;

[0010] The eight-channel transmit beamforming chip is used to receive W-band RF signal input, split the input signal into eight equal power paths, and perform variable gain amplification, phase shift control, and power amplification output on each channel RF signal.

[0011] The W-band two-dimensional AIP microsystem architecture described in the present invention is preferably an eight-channel receive beamforming chip based on a silicon-based CMOS process, using wafer-level chip packaging technology to complete the chip's surface circuit distribution and micro-bump layout preparation, and is prepared for packaging and bonding using a flip-chip assembly process.

[0012] The eight-channel receive beamforming chip is used to complete low-noise amplification, amplitude and phase control, power synthesis, and temperature telemetry functions of W-band RF signals;

[0013] The eight-channel receive beamforming chip receives eight-channel W-band RF signal inputs. Each channel performs low-noise amplification, phase shift control, and variable gain amplification on the RF input signal, and then evenly distributes and outputs the power of the eight-channel RF signals.

[0014] The W-band two-dimensional AIP microsystem architecture described in the present invention is preferably a multi-layer transfer organic board used to realize a high-efficiency, large-bandwidth packaged antenna, and complete W-band RF signal transmission, power supply transmission, control signal transmission, telemetry signal output, antenna signal feed function, mechanical support, and auxiliary heat dissipation functions.

[0015] The W-band two-dimensional AIP microsystem architecture described in the present invention, as a preferred embodiment, further includes a power interface, a control interface and a radio frequency interface;

[0016] The power interface is used to provide power bias;

[0017] The control interface is used to provide control instructions;

[0018] The RF interface is used to provide RF signal input and receive RF signal output.

[0019] In the W-band two-dimensional AIP microsystem architecture described in the present invention, as a preferred embodiment, the power supply interface includes a 3.3V voltage bias and a 1V voltage bias.

[0020] The W-band two-dimensional AIP microsystem architecture described in the present invention is preferably configured such that the control interface is a 3.3V TTL level, including a clock signal SCLK, a reset signal RST, a module selection signal MODE, a chip select signal SYNC, a data loading signal LDAC, a serial data input SDI, and a serial data output SDO.

[0021] The principle of the above scheme is: due to the high frequency band and short working wavelength of the W-band electronic system, the size and integration of the two-dimensional phased array microsystem have higher requirements. The present invention adopts the AIP architecture as a whole, the transceiver antenna array adopts a multi-layer microstrip patch structure, and the RF transceiver chip adopts wafer-level chip packaging technology. The transceiver antenna and the RF transceiver chip are integrated together through a multi-layer organic adapter board packaging process to achieve miniaturization and high integration of the phased array system. The present invention ultimately realizes the functions of signal transmission, reception and beam pointing control of the two-dimensional phased array system, and at the same time has the function of working status monitoring, output power monitoring of the transmission channel, temperature monitoring of the transmission and receiving channels, feedback monitoring through the telemetry output interface, and can realize array expansion and effective heat dissipation of the two-dimensional phased array microsystem.

[0022] The advantages of the present invention compared with the prior art are:

[0023] The present invention provides a W-band two-dimensional phased array AIP microsystem architecture, which adopts a multi-layer organic adapter plate packaging process to integrate a transceiver antenna array of a multi-layer microstrip patch structure with a radio frequency transceiver chip packaged by a wafer-level chip. Each connection channel (power supply, control, radio frequency) of the architecture is vertically interconnected using C4 micro-bumps and BGA ball planting. On the one hand, it avoids the inconsistency introduced by the gold wire length and gold wire arch height in the gold wire bonding process. On the other hand, it has a higher degree of integration, a shorter transmission path, and lower transmission loss. Compared with the traditional phased array system architecture with separate designs for antennas and transceiver components, the W-band two-dimensional phased array AIP microsystem architecture greatly reduces the interconnection loss between the antenna and transceiver components, and effectively improves the miniaturization level and integration of the phased array system. At the same time, the AIP microsystem architecture constructs the W-band two-dimensional phased array system into a standard surface mount device, which can flexibly expand the array on the PCB substrate, thereby improving the standardization and arraying of the phased array system. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 A diagram showing the architecture of a W-band two-dimensional AIP microsystem.

[0025] Figure 2 A diagram showing the composition of a multi-layer organic adapter board for a W-band two-dimensional AIP microsystem architecture.

[0026] Figure 3 A diagram showing the composition of a W-band two-dimensional AIP microsystem architecture antenna array.

[0027] Figure 4 A diagram showing the composition of a quartz substrate for a W-band two-dimensional AIP microsystem architecture.

[0028] Reference numerals:

[0029] 1. Micro-bump; 2. BGA ball planting; 3. Antenna array; 4. Multi-layer organic adapter board; 5. PCB substrate; 6. Eight-channel transmit beamforming chip; 7. Eight-channel receive beamforming chip; 8. Heat dissipation material; 9. Heat sink; 10. Antenna unit; 11. Radiating patch unit; 12. Vertical feeding structure; 13. Ground unit; M1, parasitic patch layer; M2, radiating patch layer; M3, first ground layer; M4, power supply and control signal layer; M5, second ground layer; M6, RF signal horizontal transmission layer. DETAILED DESCRIPTION

[0030] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.

[0031] Example 1

[0032] like Figure 1 As shown, a W-band two-dimensional AIP microsystem architecture includes a multi-layer organic adapter board 4, an antenna array 3 arranged on the multi-layer adapter organic board 4, a PCB substrate 5 connected to the multi-layer adapter organic board 4 via BGA planting balls 2, a heat dissipation material 8 arranged on the PCB substrate 5, an eight-channel transmit beamforming chip 6 and an eight-channel receive beamforming chip 7 arranged on the heat dissipation material 8, and a heat sink arranged on the bottom side of the PCB substrate 5; the eight-channel transmit beamforming chip 6, the eight-channel receive beamforming chip 7 and the multi-layer adapter organic board 4 are packaged and bonded via micro-bumps 1.

[0033] The eight-channel transmit beamforming chip 6 is based on a silicon-based CMOS process and uses wafer-level chip packaging technology to complete the chip's surface circuit distribution and micro-bump 1 layout preparation, ready for packaging and bonding using a flip-chip assembly process;

[0034] The eight-channel transmit beamforming chip 6 is used to complete the power sharing, power amplification, amplitude and phase control, and power and temperature telemetry functions of the W-band RF signal;

[0035] The eight-channel transmit beamforming chip 6 is used to receive W-band RF signal input, split the input signal into eight equal power paths, and perform variable gain amplification, phase shift control, and power amplification output on each channel RF signal;

[0036] The eight-channel receive beamforming chip 7 is based on a silicon-based CMOS process and uses wafer-level chip packaging technology to complete the chip's surface circuit distribution and micro-bump 1 layout preparation, ready for packaging and bonding using a flip-chip assembly process;

[0037] The eight-channel receive beamforming chip 7 is used to complete the low-noise amplification, amplitude and phase control, power synthesis, and temperature telemetry functions of the W-band RF signal;

[0038] The eight-channel receive beamforming chip 7 receives eight-channel W-band RF signal inputs. Each channel performs low-noise amplification, phase shift control, and variable gain amplification on the RF input signal, and then equally divides and outputs the power of the eight-channel RF signals.

[0039] like Figure 2As shown, the multilayer organic adapter board 4 is made of five layers of organic materials laminated together, including six metal signal layers. These layers consist of, from top to bottom, a parasitic patch layer M1 for the multilayer microstrip patch antenna, a radiating patch layer M2 for the multilayer microstrip patch antenna, a first ground layer M3, a power and control signal layer M4, a second ground layer M5, and an RF signal horizontal transmission layer M6. The multilayer organic adapter board 4 is constructed using a composite laminate of multilayer organic materials with excellent properties such as low loss, low dielectric constant, high mechanical strength, high thermal conductivity, and low thermal expansion coefficient. This enables a high-efficiency, wide-bandwidth packaged antenna and fulfills functions such as W-band RF signal transmission, power transmission, control signal transmission, telemetry signal output, antenna signal feed, as well as mechanical support and auxiliary heat dissipation. The multilayer organic adapter board 4 is soldered to the RF transceiver chip using C4 microbumps 1, and interconnected and fixed to the PCB substrate 5 using a BGA ball placement process 2.

[0040] like Figure 3 As shown, antenna array 3 includes a parasitic patch antenna unit 10 disposed on parasitic patch layer M1, a radiating patch unit 11 disposed on radiating patch layer M2, a vertical feed structure 12 vertically connected to one end of radiating patch unit 11, and a ground unit 13 disposed on first and second ground layers M3 and M5. The packaged antenna is integrated onto a multilayer organic adapter board 4, through which it is integrated with the RF transceiver chip. The receiving and transmitting antenna unit arrays utilize a multilayer microstrip patch structure, forming an array of parasitic patch antenna units 10 on the surface of the multilayer organic adapter board 4. RF signals are coupled and transmitted through an array of radiating patch units 11 within the multilayer organic board. The array of radiating patch units 11 is connected to a vertical feed network to achieve RF signal transmission.

[0041] The PCB substrate 5 implements functions such as power control and distribution for the entire microsystem, RF signal splitting and synthesis, input and output, and telemetry signal aggregation and feedback. It also requires secondary power conversion, control command parsing and issuance, and status feedback. Components such as the power module, DSP, FPGA, and various sensors are assembled on this PCB substrate 5. It also provides array expansion and load support for the microsystem.

[0042] The heat dissipation material 8 realizes the heat dissipation function of the microsystem. A heat dissipation channel is constructed on the PCB substrate 5. After the microsystem is soldered to the PCB substrate 5 through BGA, the heat dissipation material with high thermal conductivity is filled in the heat dissipation channel to achieve excellent thermal contact between the bottom of the transmitting and receiving chips and the PCB substrate 5 and the heat dissipation channel. The heat dissipation channel then conducts the heat of the microsystem to the heat sink in contact with the bottom.

[0043] like Figure 4 As shown, it also includes a power interface, a control interface and a radio frequency interface;

[0044] The power interface is used to provide power bias, including 3.3V voltage bias and 1V voltage bias;

[0045] The control interface is used to provide control instructions: the control interface is a 3.3V TTL level, including clock signal SCLK, reset signal RST, module selection signal MODE, chip select signal SYNC, data loading signal LDAC, serial data input SDI and serial data output SDO;

[0046] The RF interface is used to provide RF signal input and receive RF signal output.

[0047] The above description is only a preferred specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any technician familiar with the technical field, within the technical scope disclosed by the present invention, who makes equivalent replacements or changes based on the technical solution and inventive concept of the present invention, should be covered by the scope of protection of the present invention.

Claims

1. A W-band two-dimensional phased array AIP microsystem architecture, characterized by: The invention comprises a multi-layer organic adapter board (4), an antenna array (3) arranged on the multi-layer organic adapter board (4), a PCB substrate (5) connected to the multi-layer organic adapter board (4) via a BGA ball planting (2), a heat dissipation material (8) arranged on the PCB substrate (5), an eight-channel transmit beam forming chip (6), an eight-channel receive beam forming chip (7) arranged on the heat dissipation material (8), and a heat sink (9) arranged on the bottom side of the PCB substrate (5); the eight-channel transmit beam forming chip (6), the eight-channel receive beam forming chip (7) and the multi-layer organic adapter board (4) are packaged and bonded via micro-bumps (1); The antenna array (3) is integrated on the multi-layer organic adapter board (4), and is integrated with the eight-channel transmit beamforming chip (6) and the eight-channel receive beamforming chip (7) through the multi-layer organic adapter board (4), and power supply, control, and radio frequency are vertically interconnected using C4 micro-bumps and BGA ball planting; The W-band two-dimensional phased array AIP microsystem architecture constitutes a standard surface mount device, and can be expanded on the PCB substrate (5); The metal signal layer of the multilayer organic adapter plate (4) includes, from top to bottom, a parasitic patch layer (M1) of a multilayer microstrip patch antenna, a radiation patch layer (M2) of a multilayer microstrip patch antenna, a first ground layer (M3), a power supply and control signal layer (M4), a second ground layer (M5), and a radio frequency signal horizontal transmission layer (M6); The antenna array (3) comprises a parasitic patch antenna unit (10) arranged on the parasitic patch layer (M1), a radiating patch unit (11) arranged on the radiating patch layer (M2), a vertical feeding structure (12) vertically connected to one end of the radiating patch unit (11), and a grounding unit (13) arranged on the first grounding layer (M3) and the second grounding layer (M5); The antenna array (3) is a receiving and transmitting antenna unit array using a multi-layer microstrip patch structure. The parasitic patch antenna units (10) on the surface of the multi-layer organic adapter board (4) constitute a parasitic patch antenna unit array, and radio frequency signal coupling transmission is performed through the radiation patch unit array inside the multi-layer organic adapter board (4); the radiation patch unit (11) array is connected to a vertical feed network to realize radio frequency signal transmission; The eight-channel transmit beamforming chip (6) and the eight-channel receive beamforming chip (7) are both based on silicon-based COMS technology and adopt wafer-level chip packaging technology to complete the surface circuit distribution of the chip and the layout preparation of the micro-bumps (1), and are prepared for packaging and bonding using a flip-chip assembly process; The eight-channel transmit beamforming chip (6) receives a W-band radio frequency input signal, performs eight-way power equalization on the radio frequency input signal, and performs variable gain amplification, phase shift control, and power amplification output on each channel radio frequency signal; the eight-channel receive beamforming chip (7) receives eight-channel W-band radio frequency input signal, performs low-noise amplification, phase shift control, and variable gain amplification on each channel radio frequency input signal, and then equally divides and outputs the power of the eight-channel radio frequency signals.

2. The W-band two-dimensional phased array AIP microsystem architecture according to claim 1, characterized in that: The multi-layer organic adapter plate (4) is made by laminating five layers of organic materials, including six metal signal layers.

3. The W-band two-dimensional phased array AIP microsystem architecture according to claim 1, characterized in that: The multilayer organic adapter plate (4) is used to realize a high-efficiency, large-bandwidth packaged antenna, and complete W-band radio frequency signal transmission, power supply transmission, control signal transmission, telemetry signal output, antenna signal feed functions, mechanical support, and auxiliary heat dissipation functions.

4. The W-band two-dimensional phased array AIP microsystem architecture according to claim 1, characterized in that: It also includes a power interface, a control interface, and a radio frequency interface; The power supply interface is used to provide power supply bias; The control interface is used to provide control instructions; The radio frequency interface is used to provide radio frequency signal input and receive radio frequency signal output.

5. The W-band two-dimensional phased array AIP microsystem architecture according to claim 4, characterized in that: The power supply interface includes a 3.3V voltage bias and a 1V voltage bias.

6. The W-band two-dimensional phased array AIP microsystem architecture according to claim 4, characterized in that: The control interface is a 3.3V TTL level, including a clock signal SCLK, a reset signal RST, a module selection signal MODE, a chip selection signal SYNC, a data loading signal LDAC, a serial data input SDI and a serial data output SDO.

Images