Current detection circuit of charging chip and electronic equipment

Abstract

This invention provides a current detection circuit for a charging chip, used to detect the charging current or discharging current of a battery, comprising: a state judgment module, a first MOSFET, a second MOSFET, an operational amplifier, a third MOSFET, a current detection resistor, a first single-pole double-throw (SPD) switch, and a second SPD switch; the first pin of the first MOSFET is connected to the system voltage terminal, and the second pin of the first MOSFET is connected to the battery voltage terminal; the output terminal of the state judgment module is connected to the control terminal of the first SPD switch to control the switching of the first SPD switch; the first terminal of the first SPD switch is also connected to the drain of the second MOSFET; the second terminal of the first SPD switch is connected to the third terminal of the second SPD switch and the first pin of the first MOSFET; the third terminal of the first SPD switch is connected to the second terminal of the second SPD switch and the second pin of the first MOSFET.

Description

Technical Field

[0001] This invention relates to the field of rechargeable battery technology, and more particularly to a current detection circuit for a charging chip and an electronic device. Background Technology

[0002] In charging chips, the charging and discharging functions need to be performed simultaneously. The current for charging and discharging is very large at the same time, and many requirements are to be able to charge and discharge at the same time. This makes the charging / discharging current detection circuit of the whole system very complex.

[0003] Currently, most charging chips only detect the charging current in real time through the voltage drop across the current sensing resistor (RSNS), and do not detect the discharging current. Even if they do detect the discharging current, it requires two sets of circuits to detect the current during both charging and discharging. This approach not only wastes chip area and cost, but also makes the chip's implementation circuitry quite complex. Summary of the Invention

[0004] This invention provides a current sensing circuit for a charging chip and an electronic device to solve the problem that the same current sensing resistor can only detect the charging current.

[0005] According to a first aspect of the present invention, a current detection circuit for a charging chip is provided for detecting the charging current or discharging current of a battery, comprising: a state judgment module, a first MOSFET, a second MOSFET, an operational amplifier, a third MOSFET, a current detection resistor, a first single-pole double-throw switch, and a second single-pole double-throw switch; wherein the first MOSFET, the second MOSFET, the operational amplifier, and the third MOSFET constitute a current mirror circuit such that a first current flowing through the first MOSFET is proportional to a second current flowing through the second MOSFET; the first pin of the first MOSFET is connected to the system voltage terminal, and the second pin of the first MOSFET is connected to the battery voltage terminal;

[0006] The output terminal of the state judgment module is connected to the control terminals of the first single-pole double-throw switch and the second single-pole double-throw switch to control the switching of the first single-pole double-throw switch and the second single-pole double-throw switch. The first terminal of the first single-pole double-throw switch is also connected to the drain of the second MOSFET. The second terminal of the first single-pole double-throw switch is connected to the third terminal of the second single-pole double-throw switch and the first pin of the first MOSFET. The third terminal of the first single-pole double-throw switch is connected to the second terminal of the second single-pole double-throw switch and the second pin of the first MOSFET. The gate of the first MOSFET is connected to the gate of the second MOSFET. The source of the second MOSFET is connected to the source of the third MOSFET and the inverting input terminal of the operational amplifier. The non-inverting input terminal of the operational amplifier is connected to the first terminal of the second single-pole double-throw switch. The output terminal of the operational amplifier is connected to the gate of the third MOSFET. The drain of the third MOSFET is connected to the first terminal of the current sensing resistor. The second terminal of the current sensing resistor is grounded.

[0007] The state determination module is used to: determine the charging state or discharging state of the battery, and output a control signal according to the state of the battery to control the first terminal of the first single-pole double-throw switch to be connected to its second or third terminal, and to control the first terminal of the second single-pole double-throw switch to be connected to its second or third terminal, so as to form a charging current detection circuit and a discharging current detection circuit respectively.

[0008] The current sensing resistor is used to detect the current flowing through it under the conditions of the charging detection circuit / discharging current detection circuit, so as to obtain the charging current / discharging current of the battery.

[0009] Optionally, the status determination module is configured as follows:

[0010] Used to receive input voltage, the voltage at the battery voltage terminal, and the voltage at the system voltage terminal;

[0011] When the input voltage is greater than a first preset threshold and the voltage at the system voltage terminal is greater than the difference between the voltage at the battery voltage terminal and a second preset threshold, the battery is determined to enter a charging state.

[0012] The first preset threshold is characterized by the undervoltage protection point voltage of the charging chip, and the second preset threshold is a positive number and below 5mV.

[0013] Optionally, the first single-pole double-throw switch and the second single-pole double-throw switch are configured as follows:

[0014] When the charging chip is determined to be in a charging state, the first terminal of the first single-pole double-throw switch is closed and connected to the second terminal of the first single-pole double-throw switch, so that the first pin of the first MOSFET is connected to the drain of the second MOSFET; the first terminal of the second single-pole double-throw switch is closed and connected to the second terminal of the second single-pole double-throw switch, so that the second pin of the first MOSFET is connected to the non-inverting input of the operational amplifier, thereby turning on the charging detection circuit.

[0015] Optionally, the status determination module is further configured to:

[0016] When the voltage at the system voltage terminal is less than the difference between the voltage at the battery voltage terminal and the second preset threshold, it is determined that the charging chip has entered the discharge state.

[0017] Optionally, the first single-pole double-throw switch and the second single-pole double-throw switch are further configured to:

[0018] When it is determined that the charging chip has entered the discharge state, the first terminal of the first single-pole double-throw switch is closed and connected to the third terminal of the first single-pole double-throw switch, so that the second terminal of the first MOSFET is connected to the drain of the second MOSFET; the first terminal of the second single-pole double-throw switch is closed and connected to the third terminal of the second single-pole double-throw switch, so that the first terminal of the first MOSFET is connected to the non-inverting input terminal of the operational amplifier, thereby turning on the discharge detection circuit.

[0019] Optionally, the current detection circuit of the charging chip further includes an ADC port, the first end of which is connected to the first end of the current detection resistor to detect the charging current or the discharging current on the current detection resistor, thereby obtaining the current on the second MOS transistor.

[0020] Optionally, the current detection circuit of the charging chip further includes an external processor module, which is connected to the ADC port;

[0021] The external processor module is configured to use coulomb calculations to calculate the charging current or the discharging current to obtain the battery's power data.

[0022] Optionally, the first to the third MOS transistors are NMOS transistors or PMOS transistors.

[0023] Optionally, the first pin and the second pin of the first MOSFET are either the source or the drain.

[0024] If the first terminal is the source, then the second terminal is the drain;

[0025] If the first terminal is the drain, then the second terminal is the source.

[0026] Optionally, the channel width of the first MOSFET is XN times the channel width of the second MOSFET, where X and N are positive integers.

[0027] Optionally, the charging current I BAT =I SNS *N; the discharge current I SYS =I SNS *XN; where I SNS X and N are positive integers, where X and N are the current flowing through the current sensing resistor.

[0028] According to a second aspect of the present invention, an electronic device is provided, comprising the current detection circuit of the charging chip described in the first aspect and optionally thereof.

[0029] The charging chip current detection circuit and electronic device provided by the present invention divide the charging chip current detection circuit into a charging current detection circuit and a discharging current detection circuit by different switching states of the first single-pole double-throw switch and the second single-pole double-throw switch. Furthermore, when the charging current detection circuit or the discharging current detection circuit is turned on, the current on the current detection resistor is detected, thereby realizing the detection of the charging current or the discharging current by the same current detection resistor.

[0030] Furthermore, in a preferred embodiment, the first and second pins of the first MOS transistor of the present invention can serve as both the source and the drain, thereby avoiding the introduction of additional on-resistance into the power path from the system voltage terminal VSYS to the battery voltage terminal VBAT during switching.

[0031] Furthermore, in other preferred embodiments, the present invention can use the external processor module to calculate the charging current or the discharging current using coulomb calculations to monitor the battery's power data. Moreover, the battery power calculation is achieved using a single charging chip, avoiding the use of expensive dedicated fuel gauge chips, thus reducing costs and circuit area. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 This is a schematic diagram of the current detection circuit of a prior art charging chip in an embodiment of the present invention;

[0034] Figure 2 This is a schematic diagram of the current detection circuit of the charging chip in an embodiment of the present invention.

[0035] Explanation of reference numerals in the attached figures:

[0036] 1-Status determination module;

[0037] N1 - First MOSFET;

[0038] N2 - Second MOSFET;

[0039] P1 - Third MOSFET;

[0040] AMP - Operational Amplifier;

[0041] R SNS - Current sensing resistor;

[0042] SW1 - First single-pole double-throw switch;

[0043] SW2 - Second single-pole double-throw switch;

[0044] VSYS - System voltage terminal;

[0045] VBAT - Battery voltage terminal;

[0046] ADC-ADC port. Detailed Implementation

[0047] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0048] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0049] The technical solution of the present invention will be described in detail below with reference to specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0050] Prior to filing this application, the applicant conducted thorough research on the current detection circuit of the charging chip and proposed the following based on that research: Figure 1 The current detection circuit of the charging chip shown is for Figure 1 The current sensing circuit of the charging chip shown can only pass through the current sensing resistor R. SNS The voltage drop across the circuit is used to detect the charging current in real time, but it does not detect the discharging current.

[0051] For details, please refer to Figure 1 , Figure 1 The current detection circuit of the charging chip includes: a first NMOS transistor N1, a second NMOS transistor N2, an operational amplifier AMP, a POS transistor P1, and a current detection resistor R. SNS The system voltage terminal VSYS and the battery voltage terminal VBAT are connected; wherein, the drain of the first NMOS transistor N1 is connected to the drain of the second NMOS transistor N2 and the system voltage terminal VSYS, the source of the first NMOS transistor N1 is connected to the non-inverting input terminal of the operational amplifier AMP and the battery voltage terminal, the gate of the first NMOS transistor N1 is connected to the gate of the second NMOS transistor N2, the source of the second NMOS transistor N2 is connected to the inverting input terminal of the operational amplifier AMP and the source of the POS transistor P1, the gate of the POS transistor P1 is connected to the output terminal of the operational amplifier AMP, and the drain of the POS transistor P1 is connected to the current sensing resistor R. SNS The first terminal, the current sensing resistor R SNS The second terminal is grounded.

[0052] Wherein, the system voltage terminal VSYS is the pin in the charging chip that connects to the back-end load circuit, the battery voltage terminal VBAT is the pin in the charging chip that connects to the positive terminal of the battery, the first NMOS transistor N1 between VSYS and VBAT is the power path of the charging chip, and the first NMOS transistor N1, the second NMOS transistor N2, the operational amplifier AMP and the PMOS transistor P1 form a current mirror circuit. Specifically, the channel width of the first NMOS transistor N1 is N times that of the second NMOS transistor N2 (N is a proportional relationship designed according to actual requirements), that is, the drain-source impedance of N2 is N times that of N1.

[0053] In the above scheme, the operational amplifier AMP and PMOS transistor P1 form a negative feedback circuit, making the source voltages N1_S and N2_S of N1 and N2 equal. Since the drains N1_D and N2_D of N1 and N2 are both connected to VSYS, the drain-source voltage difference of N1 and N2 is equal. Thus, the current IBAT flowing through N1 is N times the current ISNS flowing through N2. By detecting the voltage drop across RSNS, the value of ISNS can be obtained. Finally, the IBAT current can be obtained by multiplying ISNS by N, thus realizing the detection of the battery charging current IBAT.

[0054] As can be seen, in the current mirror circuit architecture of the above scheme, the drain N1_D of the first NMOS transistor N1 is fixedly connected to the drain N2_D of the second NMOS transistor N2, and the source N1_S of the first NMOS transistor N1 is fixedly connected to the non-inverting input of the operational amplifier AMP. Therefore, only the charging current IBAT in the direction from VSYS to VBAT can be detected, but the discharging current in the direction from VBAT to VSYS cannot be detected. Because it is impossible to detect the external current sensing resistor R... SNS The voltage drop is used to perform coulomb calculations during discharge, therefore the above scheme cannot be used for the charge / discharge meter function required by the battery, that is, it cannot determine the battery's charge level.

[0055] In view of this, the present invention proposes a new current detection circuit for a charging chip, which can realize the detection of charging current and discharging current by only adding two single-pole double-throw switches.

[0056] The specific details of the solution of this invention are as follows:

[0057] Please refer to Figure 2 This invention provides a current detection circuit for a charging chip, used to detect the charging current or discharging current of a battery, comprising: a state judgment module 1, a first MOSFET N1, a second MOSFET N2, an operational amplifier AMP, a third MOSFET P1, and a current detection resistor R. SNS The system comprises a first single-pole double-throw switch SW1 and a second single-pole double-throw switch SW2; wherein, the first MOSFET N1, the second MOSFET N2, the operational amplifier AMP, and the third MOSFET P1 constitute a current mirror circuit, such that the first current flowing through the first MOSFET N1 is proportional to the second current flowing through the second MOSFET N2; the first pin N1_DS of the first MOSFET N1 is connected to the system voltage terminal VSYS, and the second pin N1_SD of the first MOSFET N1 is connected to the battery voltage terminal VBAT;

[0058] The output of the state judgment module 1 is connected to the control terminals of the first single-pole double-throw switch SW1 and the second single-pole double-throw switch SW2 to control the switching of the first and second single-pole double-throw switches. The first terminal of the first single-pole double-throw switch SW1 is also connected to the drain N2_D of the second MOSFET N2. The second terminal of the first single-pole double-throw switch SW1 is connected to the third terminal of the second single-pole double-throw switch SW2 and the first pin N1_DS of the first MOSFET N1. The third terminal of the first single-pole double-throw switch SW1 is connected to the second terminal of the second single-pole double-throw switch SW2 and the second pin N1_SD of the first MOSFET N1. The gate of the first MOSFET N1 is connected to the gate of the second MOSFET N2. The source of the second MOSFET N2 is connected to the source of the third MOSFET P1 and the inverting input terminal of the operational amplifier AMP. The non-inverting input terminal of the operational amplifier AMP is connected to the first terminal of the second single-pole double-throw switch SW2. The output terminal of the operational amplifier AMP is connected to the gate of the third MOSFET P1. The drain of the third MOSFET P1 is connected to the current sensing resistor R. SNS The first terminal, the current sensing resistor R SNS The second terminal is grounded;

[0059] The state determination module 1 is used to: determine whether the battery is in a charging state or a discharging state, and output a control signal according to the state of the battery to control the first terminal of the first single-pole double-throw switch SW1 to be connected to its second or third terminal, and to control the first terminal of the second single-pole double-throw switch SW2 to be connected to its second or third terminal, so as to form a charging current detection circuit and a discharging current detection circuit respectively.

[0060] The current sensing resistor R SNS Used for: detecting the state of the charging detection circuit / discharging current detection circuit, the current sensing resistor R SNS The current flowing through it is used to obtain the charging current / discharging current of the battery.

[0061] The operational amplifier AMP is used to make the voltages of the sources of the two NMOS transistors connected to the non-inverting and inverting inputs of the operational amplifier AMP equal.

[0062] The current mirror circuit is characterized by using two NMOS transistors with the same process performance and proportional channel width to have equal drain-source voltage differences, thereby achieving a circuit in which the current in the main current channel (i.e., the current on N1) and the current in the detection channel (i.e., the current on N2) are proportional to the channel width.

[0063] In a preferred embodiment, the first MOS transistor N1 to the third MOS transistor P1 are NMOS transistors or PMOS transistors.

[0064] In another preferred embodiment, the channel width of the first MOS transistor N1 is XN times the channel width of the second MOS transistor N2, where X and N are positive integers.

[0065] In a specific embodiment, the channel lengths of the first MOS transistor N1 and the second MOS transistor N2 are equal.

[0066] Specifically, compared to the ratio of the impedance of the second MOSFET N2 to the impedance of the first MOSFET N1 when the chip is in a charging state, the ratio of the impedance of the second MOSFET N2 to the impedance of the first MOSFET N1 is larger when the chip is in a discharging state; for example, when the chip is in a charging state, the ratio is 1:1000, where X=1 and N=1000; when the chip is in a discharging state, the ratio is 1:5000, where X=5 and N=1000.

[0067] The above ratio results are related to the discharge overcurrent point current. Generally, the maximum discharge current of the charging chip is greater than the maximum charging current. A high discharge current detection ratio parameter is used to avoid the problem of easy overcurrent in discharge current in practical applications.

[0068] Regarding the calculation of charging current and discharging current, in a specific embodiment, the charging current I... BAT =I SNS *N; the discharge current I SYS =I SNS *XN; where I SNS The current sensing resistor R SNS The current flowing through it, where X and N are positive integers.

[0069] In the above scheme, the current detection circuit of the charging chip is divided into a charging current detection circuit and a discharging current detection circuit by different switching states of the first single-pole double-throw switch SW1 and the second single-pole double-throw switch SW2. Furthermore, when the charging current detection circuit or the discharging current detection circuit is turned on, the current detection resistor R is detected. SNS The current is measured, thereby enabling a single chip to detect the charging current or the discharging current, avoiding the use of expensive dedicated fuel gauge chips, reducing costs and circuit area.

[0070] For more information on state determination module 1, please refer to [link / reference]. Figure 2 In a preferred embodiment, the state determination module 1 is configured as follows:

[0071] Used to receive the input voltage VIN, the voltage of the battery voltage terminal VBAT, and the voltage of the system voltage terminal VSYS;

[0072] When the input voltage VIN is greater than a first preset threshold, and the voltage of the system voltage terminal VSYS is greater than the difference between the voltage of the battery voltage terminal VBAT and a second preset threshold, the battery is determined to enter a charging state.

[0073] The first preset threshold is characterized by the undervoltage protection point voltage of the charging chip, and the second preset threshold is a positive number and below 5mV.

[0074] In other preferred embodiments, the state determination module 1 is further configured as follows:

[0075] When the voltage at the system voltage terminal VSYS is less than the difference between the voltage at the battery voltage terminal VBAT and the second preset threshold, the charging chip is determined to enter the discharge state.

[0076] The undervoltage protection point voltage is characterized as the lowest critical voltage of the line voltage.

[0077] In one example, the undervoltage protection point voltage is 3.4V.

[0078] Of course, the present invention is not limited thereto, and other values ​​of the undervoltage protection point voltage are all within the protection scope of the present invention.

[0079] In a specific embodiment, when the input voltage VIN is greater than the chip's undervoltage protection point voltage (e.g., 3.4V) and the system voltage terminal VSYS is greater than the battery voltage terminal VBAT - 5mV, the chip is determined to enter the charging state.

[0080] In other embodiments, when the system voltage VSYS is less than the battery voltage VBAT-5mV, the chip is determined to be in a discharge state.

[0081] In the above scheme, the value of the second preset threshold is 5mV; of course, the present invention is not limited to this, and other values ​​are within the protection scope of the present invention. For example, if the comparator inside the chip has high precision and strong anti-interference ability, the second preset threshold can be 1mV or smaller.

[0082] For information on the first single-pole double-throw switch SW1 and the second single-pole double-throw switch SW2, please refer to [link / reference]. Figure 2 In a preferred embodiment, the first single-pole double-throw switch SW1 and the second single-pole double-throw switch SW2 are configured as follows:

[0083] When the charging chip is determined to be in a charging state, the first terminal of the first single-pole double-throw switch SW1 is closed and connected to the second terminal of the first single-pole double-throw switch SW1, so that the first pin of the first MOSFET N1 is connected to the drain of the second MOSFET N2; the first terminal of the second single-pole double-throw switch SW2 is closed and connected to the second terminal of the second single-pole double-throw switch SW2, so that the second pin of the first MOSFET N1 is connected to the non-inverting input of the operational amplifier AMP, thereby turning on the charging detection circuit.

[0084] In other preferred embodiments, the first single-pole double-throw switch SW1 and the second single-pole double-throw switch SW2 are further configured as follows:

[0085] When it is determined that the charging chip has entered the discharge state, the first terminal of the first single-pole double-throw switch SW1 is closed and connected to the third terminal of the first single-pole double-throw switch SW1, so that the second terminal of the first MOSFET N1 is connected to the drain of the second MOSFET N2; the first terminal of the second single-pole double-throw switch SW2 is closed and connected to the third terminal of the second single-pole double-throw switch SW2, so that the first terminal of the first MOSFET N1 is connected to the non-inverting input terminal of the operational amplifier AMP, thereby turning on the discharge detection circuit.

[0086] In a specific embodiment, the first terminal N1_DS and the second terminal N1_SD of the first MOS transistor N1 are the source or the drain;

[0087] If the first terminal N1_DS is the source, then the second terminal N1_SD is the drain;

[0088] If the first terminal N1_DS is the drain, then the second terminal N1_SD is the source.

[0089] In the above scheme, the drain and source functions of the first MOSFET N1 are interchangeable during design and circuit control. That is, the first pin N1_DS and the second pin N1_SD can be used as either the source or the drain. The first pin N1_DS is always fixedly connected to the system voltage terminal VSYS, and the second pin N1_SD is fixedly connected to the battery voltage terminal VBAT. In this way, when the current mirror circuit switches through the first single-pole double-throw switch SW1 and the second single-pole double-throw switch SW2, no additional on-resistance is introduced into the power path from the system voltage terminal VSYS to the battery voltage terminal VBAT due to the switch switching.

[0090] Please continue to refer to this. Figure 2 In a preferred embodiment, the current detection circuit of the charging chip further includes an ADC port, the first end of which is connected to the current detection resistor R. SNSThe first end is used to detect the current sensing resistor R via the ADC built into the external processor module. SNS The charging current or the discharging current is used to obtain the current on the second MOS transistor N2.

[0091] In other embodiments not shown, the current detection circuit of the charging chip further includes an external processor module, which has a built-in ADC connected to the ADC port;

[0092] The external processor module is configured to use coulomb calculations to calculate the charging current or the discharging current to obtain the battery's power data.

[0093] In the above scheme, when the chip is charging, it detects the current sensing resistor R. SNS The voltage drop across the resistor can be used to calculate the value of the charging current IBAT; when the chip is discharging, the current sensing resistor R is detected. SNS The voltage drop across the resistor can be used to calculate the value of the discharge current ISYS, which can then be determined using the same current sensing resistor R. SNS The voltage drop is detected to measure the current in both directions of the same N1 main channel.

[0094] Furthermore, the external processor module connected to the charging chip can perform coulomb calculations based on the battery charging / discharging current detected by the built-in ADC at the ADC port to obtain the real-time battery power data.

[0095] The present invention also provides an electronic device including the current detection circuit of the charging chip described above.

[0096] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A current detection circuit for a charging chip, used to detect the charging current or discharging current of a battery, characterized in that, include: The system includes a status judgment module, a first MOSFET, a second MOSFET, an operational amplifier, a third MOSFET, a current sensing resistor, a first single-pole double-throw switch, and a second single-pole double-throw switch. The first MOSFET, second MOSFET, operational amplifier, and third MOSFET form a current mirror circuit, such that the first current flowing through the first MOSFET is proportional to the second current flowing through the second MOSFET. The first pin of the first MOSFET is connected to the system voltage terminal, and the second pin of the first MOSFET is connected to the battery voltage terminal. The output terminal of the state judgment module is connected to the control terminals of the first single-pole double-throw switch and the second single-pole double-throw switch to control the switching of the first single-pole double-throw switch and the second single-pole double-throw switch respectively. The first terminal of the first single-pole double-throw switch is also connected to the drain of the second MOSFET. The second terminal of the first single-pole double-throw switch is connected to the third terminal of the second single-pole double-throw switch and the first pin of the first MOSFET. The third terminal of the first single-pole double-throw switch is connected to the second terminal of the second single-pole double-throw switch and the second pin of the first MOSFET. The gate of the first MOSFET is connected to the gate of the second MOSFET. The source of the second MOSFET is connected to the source of the third MOSFET and the inverting input terminal of the operational amplifier. The non-inverting input terminal of the operational amplifier is connected to the first terminal of the second single-pole double-throw switch. The output terminal of the operational amplifier is connected to the gate of the third MOSFET. The drain of the third MOSFET is connected to the first terminal of the current sensing resistor. The second terminal of the current sensing resistor is grounded. The state determination module is used to: determine whether the battery is in a charging state or a discharging state, and output a control signal according to the state of the battery to control the first terminal of the first single-pole double-throw switch to be connected to its second or third terminal, and to control the first terminal of the second single-pole double-throw switch to be connected to its second or third terminal, so as to form a charging current detection circuit and a discharging current detection circuit respectively. The current sensing resistor is used to detect the current flowing through it under the conditions of the charging current detection circuit / discharging current detection circuit, so as to obtain the charging current / discharging current of the battery.

2. The current detection circuit of the charging chip according to claim 1, characterized in that, The status determination module is configured as follows: Used to receive input voltage, the voltage at the battery voltage terminal, and the voltage at the system voltage terminal; When the input voltage is greater than a first preset threshold and the voltage at the system voltage terminal is greater than the difference between the voltage at the battery voltage terminal and a second preset threshold, the battery is determined to enter a charging state. The first preset threshold is characterized by the undervoltage protection point voltage of the charging chip, and the second preset threshold is a positive number and below 5mV.

3. The current detection circuit of the charging chip according to claim 2, characterized in that, The first single-pole double-throw switch and the second single-pole double-throw switch are configured as follows: When the charging chip is determined to be in a charging state, the first terminal of the first single-pole double-throw switch is closed and connected to the second terminal of the first single-pole double-throw switch, so that the first pin of the first MOSFET is connected to the drain of the second MOSFET; the first terminal of the second single-pole double-throw switch is closed and connected to the second terminal of the second single-pole double-throw switch, so that the second pin of the first MOSFET is connected to the non-inverting input of the operational amplifier, thereby turning on the charging detection circuit.

4. The current detection circuit of the charging chip according to claim 2, characterized in that, The status determination module is further configured as follows: When the voltage at the system voltage terminal is less than the difference between the voltage at the battery voltage terminal and the second preset threshold, it is determined that the charging chip has entered the discharge state.

5. The current detection circuit of the charging chip according to claim 4, characterized in that, The first single-pole double-throw switch and the second single-pole double-throw switch are further configured to: When it is determined that the charging chip has entered the discharge state, the first terminal of the first single-pole double-throw switch is closed and connected to the third terminal of the first single-pole double-throw switch, so that the second terminal of the first MOSFET is connected to the drain of the second MOSFET; the first terminal of the second single-pole double-throw switch is closed and connected to the third terminal of the second single-pole double-throw switch, so that the first terminal of the first MOSFET is connected to the non-inverting input terminal of the operational amplifier, thereby turning on the discharge current detection circuit.

6. The current detection circuit of the charging chip according to claim 1, characterized in that, It also includes an ADC port, the first end of which is connected to the first end of the current sensing resistor to detect the charging current or the discharging current on the current sensing resistor, thereby obtaining the current on the second MOS transistor.

7. The current detection circuit of the charging chip according to claim 6, characterized in that, It also includes an external processor module, which is connected to the ADC port; The external processor module is configured to use coulomb calculations to calculate the charging current or the discharging current to obtain the battery's power data.

8. The current detection circuit of the charging chip according to claim 1, characterized in that, The first to the third MOS transistors are either NMOS transistors or PMOS transistors.

9. The current detection circuit of the charging chip according to claim 1, characterized in that, The first pin and the second pin of the first MOSFET are either the source or the drain. If the first terminal is the source, then the second terminal is the drain; If the first terminal is the drain, then the second terminal is the source.

10. The current detection circuit of the charging chip according to claim 1, characterized in that, The channel width of the first MOSFET is XN times the channel width of the second MOSFET, where X and N are positive integers.

11. The current detection circuit of the charging chip according to claim 10, characterized in that, The charging current I BAT =I SNS *N; the discharge current I SYS =I SNS *XN; where I SNS X and N are positive integers, where X and N are the current flowing through the current sensing resistor.

12. An electronic device, characterized in that, The current detection circuit includes the charging chip according to any one of claims 1 to 11.

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