Quantum phase estimation method and quantum phase estimation system
By adding random quantum doors during the quantum phase estimation process, the coherent noise is converted into random soaking noise, which solves the problem of being affected by noise in quantum phase estimates in quantum computers, and improves the accuracy of estimation.
Patent Information
- Application Number
- CN202210905718.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-07-29
- Publication Date
- 2025-01-24
- Estimated Expiration
- 2042-07-29
AI Technical Summary
Existing quantum computers are affected by noise during the quantum phase estimation process, especially coherent noise and decoherent noise, resulting in inaccurate measurement results.
By generating a second quantum logic gate sequence and adding random quantum gates, the coherent noise in the quantum phase estimation process is converted into random Pauli noise, thereby reducing the impact of noise on the quantum state phase.
This method effectively reduces the noise during the quantum phase estimation process, improves the accuracy of quantum phase estimation, and realizes the feasibility scheme of the estimation of anti -noise quantum phase estimates.
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Figure CN115374946B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of quantum computing technology, and in particular to a method and a system for quantum phase estimation. Background Art
[0002] Quantum computing is a new computing paradigm that completes corresponding computing tasks by manipulating the state of quantum bits. As the basic information unit of quantum computing, quantum bits can be in a superposition of state 0 and state 1, unlike classical bits. For a quantum computing system containing n quantum bits, when all quantum bits are in a superposition state, the system simultaneously represents 2 n basis states, while a classical computing system can only be in one of the basis states at any one time. Theoretically, based on this exponential state space representation capability, quantum computing will have significant advantages over classical computing in solving certain problems by manipulating state evolution through appropriate algorithm design. For example, the famous Shor algorithm has exponential acceleration performance in solving the problem of large number prime factorization compared to existing classical algorithms. Based on whether the manipulated state evolution is continuous or discrete, quantum computing can generally be divided into analog quantum computing and digital quantum computing. The quantum annealing machine of Canada's D-Wave company is a representative of analog quantum computing, while the representative of digital quantum computing is the "Plane Tree" superconducting computing system that Google demonstrated the so-called "quantum supremacy" in 2019. Digital quantum computing (also known as gate model quantum computing), similar to the classical computing architecture, uses a universal quantum logic gate group (including single-qubit gates and two-qubit entanglement gates) to manipulate qubit states to achieve computing tasks. Digital quantum computing is currently a key research direction. Well-known domestic and foreign companies such as Google, IBM, BAT, Huawei, and universities and research institutes such as Harvard, MIT, USTC, and Beijing Institute of Quantum Computing have all invested heavily in building their own quantum computing systems.
[0003] Quantum phase estimation is the core step of many quantum algorithms, such as Shor's algorithm and Hamiltonian energy spectrum estimation algorithm. The problem that quantum phase estimation solves is: given an eigenstate of a unitary operator, we want to find the corresponding eigenvalue. Because the eigenvalue of a unitary operator is always a complex number with modulus 1, we only need to estimate the phase of its eigenvalue. The general method of quantum phase estimation is based on quantum Fourier transform. In this process, auxiliary quantum bits need to be introduced, and their number is approximately twice that of data quantum bits. Therefore, even if the number 15 is decomposed using Shor's algorithm, 12 quantum bits are required, of which 4 are used as data bits and 8 are used as auxiliary bits to run quantum Fourier transform. With the current scale of quantum computers, it is difficult to factorize large natural numbers.
[0004] Another method of quantum phase estimation is based on periodic quantum circuits. In this method, the quantum computing system is first prepared to a specific initial state, then the unitary operator whose phase is to be estimated is repeatedly applied, and finally the quantum computing system is measured. The measurement result is subjected to a classical Fourier transform, and the position corresponding to the peak on the spectrum is the estimated value of the phase. The advantage of the quantum phase estimation method based on periodic quantum circuits is that there is no need to introduce auxiliary quantum bits, and thus it is expected to solve larger-scale mathematical problems.
[0005] However, existing quantum computers are greatly troubled by noise, especially coherent noise and decoherent noise. A large number of coherent errors in the quantum computing process make it impossible to accurately read the measurement results. Before the arrival of fault-tolerant quantum computers, how to design quantum algorithms to be able to resist the influence of noise to a certain extent is the core issue of current quantum algorithm research. Summary of the invention
[0006] In view of at least one drawback of the prior art, the present invention provides a method for quantum phase estimation, comprising:
[0007] Generate a first quantum logic gate sequence according to the problem to be solved and determine the initial quantum state;
[0008] Adding a random quantum gate to the first quantum logic gate sequence to generate a second quantum logic gate sequence;
[0009] Applying the second quantum logic gate sequence to the initial quantum state and measuring the final quantum state;
[0010] Perform discrete Fourier transform on the measurement results to obtain the phase estimation value.
[0011] According to one aspect of the present invention, generating a first quantum logic gate sequence according to the problem to be solved and determining an initial quantum state comprises:
[0012] Determine the unitary operator required for phase estimation according to the problem to be solved;
[0013] generating the first quantum logic gate sequence according to the unitary operator;
[0014] An eigenstate of the unitary operator or a superposition state of multiple eigenstates thereof is used as the initial quantum state.
[0015] According to one aspect of the present invention, the method for quantum phase estimation further comprises:
[0016] Compile and generate a sequential pulse sequence according to the second quantum logic gate sequence;
[0017] The corresponding area on the quantum chip is initialized according to the initial quantum state.
[0018] According to one aspect of the present invention, the step of applying the second quantum logic gate sequence to the initial quantum state comprises:
[0019] Light pulses are introduced into the corresponding area of the quantum chip according to the timing pulse sequence.
[0020] According to one aspect of the present invention, the first quantum logic gate sequence is logically equivalent to the second quantum logic gate sequence, and the random quantum gate converts coherent noise in the quantum phase estimation process into random noise.
[0021] According to one aspect of the present invention, wherein the first quantum logic gate sequence includes at least one preset period, adding a random quantum gate to the first quantum logic gate sequence to generate a second quantum logic gate sequence includes:
[0022] A random quantum gate is added in each of the preset periods of the first quantum logic gate sequence.
[0023] According to one aspect of the present invention, the step of adding a random quantum gate to the first quantum logic gate sequence to generate a second quantum logic gate sequence further comprises:
[0024] After the first preset period, a portion of the random quantum gates added in each preset period are configured as follows:
[0025] Reverse the random quantum gate added in the previous preset cycle.
[0026] According to one aspect of the present invention, each of the preset cycles of the first quantum logic gate sequence comprises:
[0027] at least one first simple gate acting simultaneously and / or at least one complex gate acting simultaneously, wherein adding a random quantum gate to the first quantum logic gate sequence to generate a second quantum logic gate sequence further comprises:
[0028] At least one of the first simple gates in each of the preset periods is combined with the random quantum gate to form at least one second simple gate that acts simultaneously.
[0029] According to one aspect of the present invention, the first simple gate and the second simple gate both comprise single-bit quantum gates, the complex gate comprises a two-bit Clifford gate, and the random quantum gate comprises a Pauli gate.
[0030] According to one aspect of the present invention, performing discrete Fourier transform on the measurement result to obtain the phase estimation value comprises:
[0031] One or more frequency values are obtained through discrete Fourier transform, wherein each frequency value corresponds to a phase value of an eigenstate.
[0032] The present invention also provides a quantum phase estimation system, comprising:
[0033] Compilation unit, configured as:
[0034] Generate a first quantum logic gate sequence according to the problem to be solved and determine the initial quantum state;
[0035] Adding a random quantum gate to the first quantum logic gate sequence to generate a second quantum logic gate sequence;
[0036] a quantum computing unit, coupled to the compilation unit, configured to act on the initial quantum state with the second quantum logic gate sequence and measure the final quantum state;
[0037] The classical computing unit is coupled to the quantum computing unit and is configured to perform discrete Fourier transform on the measurement result to obtain a phase estimation value.
[0038] According to one aspect of the present invention, the compilation unit is further configured to:
[0039] Determine the unitary operator required for phase estimation according to the problem to be solved;
[0040] generating the first quantum logic gate sequence according to the unitary operator;
[0041] An eigenstate of the unitary operator or a superposition state of multiple eigenstates thereof is used as the initial quantum state.
[0042] According to one aspect of the present invention, the compilation unit is further configured to:
[0043] A timing pulse sequence is compiled and generated according to the second quantum logic gate sequence.
[0044] According to one aspect of the present invention, the quantum computing unit comprises a quantum chip, and the quantum computing unit is further configured to:
[0045] Initializing a corresponding region on the quantum chip according to the initial quantum state;
[0046] Light pulses are introduced into the corresponding area of the quantum chip according to the timing pulse sequence.
[0047] According to one aspect of the present invention, the first quantum logic gate sequence is logically equivalent to the second quantum logic gate sequence, and the random quantum gate converts coherent noise in the quantum phase estimation process into random noise.
[0048] According to one aspect of the present invention, wherein the first quantum logic gate sequence includes at least one preset period, the compilation unit is further configured to:
[0049] A random quantum gate is added in each of the preset periods of the first quantum logic gate sequence.
[0050] According to one aspect of the present invention, the compilation unit is further configured to:
[0051] After the first preset period, a portion of the random quantum gates added in each preset period are configured as follows:
[0052] Reverse the random quantum gate added in the previous preset cycle.
[0053] According to one aspect of the present invention, each of the preset cycles of the first quantum logic gate sequence includes: at least one first simple gate acting simultaneously and / or at least one complex gate acting simultaneously, and the compilation unit is further configured to:
[0054] Merge at least one of the first simple gates and the random quantum gate in each of the preset periods to form at least one second simple gate;
[0055] The first simple gate and the second simple gate both include single-bit quantum gates, the complex gate includes a two-bit Clifford gate, and the random quantum gate includes a Pauli gate.
[0056] According to one aspect of the present invention, the classical computing unit is further configured to:
[0057] One or more frequency values are obtained by discrete Fourier transform, wherein each frequency value corresponds to a phase value of an eigenstate of the unitary operator.
[0058] According to one aspect of the present invention, the quantum computing unit includes one or more of a superconducting quantum chip, an ion trap quantum chip, a semiconductor quantum chip, an atomic quantum chip, and a photon quantum chip; the classical computing unit includes one or more of a CPU and a GPU.
[0059] The method and system for quantum phase estimation provided by the present invention convert the coherent noise and decoherent noise between quantum bits into random Pauli noise through secondary compilation. Since random Pauli noise does not change the phase of the quantum state transmitted through the unitary channel, it plays a role of noise filtering for quantum phase estimation. Using the method and system for quantum phase estimation provided by the present invention, the noise in the quantum phase estimation process is reduced, and the accuracy of quantum phase estimation is improved, thereby realizing a universal feasible solution for noise-resistant quantum phase estimation. BRIEF DESCRIPTION OF THE DRAWINGS
[0060] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without exceeding the scope of protection required by the present application.
[0061] Figure 1 A quantum computing system to which the present invention is applicable is shown;
[0062] Figure 2 A method for quantum phase estimation provided by an embodiment of the present invention is shown;
[0063] Figure 3A A quantum logic gate sequence provided by an embodiment of the present invention is shown;
[0064] Figure 3B An embodiment of the present invention provides Figure 3A Add random quantum gates to the sequence of quantum logic gates shown;
[0065] Figure 3C An embodiment of the present invention provides Figure 3B The simple gates in each time period of the quantum logic gate sequence shown are combined with random quantum gates;
[0066] Figure 4 A quantum phase estimation system provided by an embodiment of the present invention is shown;
[0067] Figure 5A A quantum logic gate sequence (quantum circuit) provided by an embodiment of the present invention is shown;
[0068] Figure 5B A complete quantum circuit for implementing quantum phase estimation provided by an embodiment of the present invention is shown;
[0069] Figure 5C An embodiment of the present invention provides Figure 5B The quantum circuit shown is the quantum circuit after random compilation;
[0070] Figure 6 Shows Figure 5B The Fourier spectrum of the quantum circuit shown in the noise-free simulation;
[0071] Figure 7 Shows Figure 5B The Fourier spectrum of the quantum circuit shown in the simulation with coherent noise added;
[0072] Figure 8 Shows Figure 5C The Fourier energy spectrum of the quantum circuit shown is simulated by adding coherent noise. DETAILED DESCRIPTION
[0073] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.
[0074] The embodiments of the present application are described in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and its core idea of the present application. At the same time, changes or deformations made by those skilled in the art based on the ideas of the present application, the specific implementation methods and the scope of application of the present application, all belong to the scope of protection of the present application. In summary, the content of this specification should not be construed as a limitation on the present application.
[0075] Quantum phase estimation is an important part of many quantum algorithms. The problem solved by quantum phase estimation is: given a unitary operator U and one of its eigenstates |φ a >, find the corresponding eigenvalue Since the modulus of the eigenvalue of the unitary operator is 1, it is equivalent to solving the corresponding phase value λ a .
[0076] The phase of the eigenvalue of the unitary operator can be solved by constructing a periodic quantum circuit. The structure of the periodic quantum circuit is:
[0077] |ψ>-U L -M
[0078] Where U is the quantum circuit corresponding to the unitary operator. The quantum circuit corresponding to the unitary operator is prepared on the initial quantum state |ψ>, and |ψ>=∑ a c a |φ a >,|φ a > is an eigenstate of the unitary operator U. Repeat the unitary operator U on the initial quantum state for L times, and finally measure M. The expected value of M is:
[0079]
[0080] L can be a continuous natural number, such as 1-100. The expected value m of M under different L L The sequence of numbers is subjected to discrete Fourier transform, and the frequency value corresponding to the peak in the spectrum is λa -λ b , which is the difference between the phases. To obtain the absolute value, we only need to prepare a specific initial state |ψ>.
[0081] There is noise in current quantum computers, which will affect the phase estimation results. Assume that there is a noisy channel ε following the unitary operator U. In this case, the line corresponding to U must be represented by a quantum channel, that is:
[0082]
[0083] in is the unitary channel corresponding to the unitary operator U. The result of acting on an operator ρ is The Kraus operator corresponding to the noise ε is E k It means that its effect on the operator ρ is Using perturbation theory we can obtain the following theorem:
[0084] Theorem 1. If all Kraus operators of the noise ε are Hermitian operators, that is, Then the unitary channel The corresponding noisy channel Unitary channels are not changed The phase of the eigenvalue.
[0085] Theorem 1 gives the types of noise that the periodic line phase estimation can resist. This sufficient condition includes a large class of noise, such as random Pauli noise. However, for real quantum computers, their noise types generally do not meet the conditions in Theorem 1.
[0086] The present invention provides a method for quantum phase estimation. Through secondary compilation, coherent noise and decoherent noise in the quantum computing process are converted into random Pauli noise. Since the random Pauli noise does not change the phase of the quantum state transmitted through the unitary channel, it plays a role of noise filtering for the method of quantum phase estimation.
[0087] like Figure 1 As shown, the quantum phase estimation method provided by the present invention is used in a quantum computing system 100, and the quantum computing system 100 includes a compilation unit 110, a quantum computing unit 120 and a classical computing unit 130. Among them:
[0088] The compiling unit 110 is configured to generate machine code that can be executed by the quantum computing unit 120. The compiling unit 110 includes an information processing unit 111 and a storage unit 112, wherein the information processing unit 111 includes one or more of a CPU and a GPU, and the storage unit 112 includes one or more of a random read-write memory and a read-only memory. The compiling unit 110 may also include other components, or be configured to implement the function of generating machine code that can be executed by the quantum computing unit 120 in other ways.
[0089] Specifically, the storage unit 112 is configured to store quantum logic codes, such as quantum logic gate sequences or quantum logic circuits. The information processing unit 111 is configured to convert the quantum logic codes into machine codes that can be executed by the quantum computing unit 120, such as timing pulse sequences (including microwave frequency / optical frequency and timing). The machine codes are also stored in the storage unit 112.
[0090] The storage unit 112 is further configured to store computer instructions, and when the information processing unit 111 executes the computer instructions, a compilation operation for the quantum logic code is performed. The compilation operation for the quantum logic code includes generating machine code according to the quantum logic code (quantum logic gate sequence or quantum logic circuit).
[0091] Optionally, the compiling unit 110 is further configured to obtain a problem to be solved, determine a suitable quantum algorithm, and generate a quantum logic source code (a quantum logic gate sequence or a quantum logic circuit) according to the quantum algorithm. Then, the quantum logic source code is modified by compiling to generate a modified quantum logic code (a modified quantum logic gate sequence or a quantum logic circuit). The modified quantum logic code can reduce coherent noise in the quantum computing process.
[0092] The compiling unit 110 can compile the quantum logic code in real time, generate machine code, and provide it to the quantum computing unit 120 for execution in real time. It can also be pre-compiled, and after the quantum logic code of all time periods is compiled, it is provided to the quantum computing unit 120 for execution.
[0093] The quantum computing unit 120 is coupled to the compiling unit 110 and configured to execute the machine code compiled and output by the compiling unit 110 and perform sampling measurements. For example, the quantum computing unit 120 performs a series of operations for quantum phase estimation. In some other embodiments, the quantum computing unit 120 may also perform other operations related to quantum algorithms. The quantum computing unit 120 includes one or more of a superconducting quantum chip, an ion trap quantum chip, a semiconductor quantum chip, an atomic quantum chip, and a photon quantum chip.
[0094] The classical computing unit 130 is coupled to the quantum computing unit 120, and the classical computing unit 130 is configured to: receive the measurement result of the quantum computing unit 120, and process the measurement result. For example: perform a classical Fourier transform on the sampled measurement result of the quantum phase estimation, obtain a frequency value, and determine the phase estimation value of the quantum state according to the frequency value. The classical computing unit 130 includes an information processing unit 131 and a storage unit 132. In one embodiment of the present invention, the classical computing unit 130 is integrated with the compilation unit 110. In another embodiment, the classical computing unit 130 and the compilation unit 110 share an information processing unit and a storage unit.
[0095] In one embodiment of the present invention, the compilation unit 110, the quantum computing unit 120 and the classical unit 130 are communicatively connected, and the communication channel includes one or more of a local area network, a wide area network, a virtual private network, the Internet, and a cellular mobile network.
[0096] According to one embodiment of the present invention, the present invention provides a method 10 for quantum phase estimation, which is executed by the quantum computing system 100 as described above.
[0097] like Figure 2 As shown, the method 10 for quantum phase estimation includes steps S101 to S104. Among them:
[0098] In step S101, a first quantum logic gate sequence is generated according to the problem to be solved and an initial quantum state is determined. Quantum phase estimation is one of the links of some specific quantum algorithms. A quantum algorithm (such as Shor's algorithm) is determined according to the problem to be solved, and then a unitary operator for phase estimation is determined according to the quantum algorithm used, and a first quantum logic gate sequence is generated according to the unitary operator, and an eigenstate or a superposition state of multiple eigenstates of the unitary operator is determined as the initial quantum state.
[0099] In step S102, a random quantum gate is added to the first quantum logic gate sequence to generate a second quantum logic gate sequence. Since random Pauli noise does not change the phase information of the quantum state after passing through the unitary channel, by adding random quantum gates to the first quantum logic gate sequence, the coherent noise and decoherent noise between quantum bits are converted into random Pauli noise, and an anti-noise effect for quantum phase estimation can be obtained.
[0100] In step S103, the second quantum logic gate sequence is applied to the initial quantum state, and the final quantum state is measured. Optionally, the compilation unit generates a timing pulse sequence according to the second quantum logic gate sequence and outputs it; the quantum computing unit first initializes the corresponding area on the quantum chip according to the initial quantum state, and after the initialization is completed, the corresponding area of the quantum chip is passed with an optical pulse according to the timing pulse sequence, and the final quantum state is measured multiple times.
[0101] In step S104, the measurement result is discrete Fourier transformed to obtain a phase estimate. Optionally, the classical computing unit performs discrete Fourier transform on the results of the multiple measurements to obtain one or more frequency values, wherein each frequency peak corresponds to a phase value of an eigenstate of the unitary operator to be solved.
[0102] According to one embodiment of the present invention, in the method 10 for quantum phase estimation, the first quantum logic gate sequence is logically equivalent to the second quantum logic gate sequence, and the random quantum gate converts coherent noise in the quantum phase estimation process into random noise.
[0103] The quantum phase estimation method 10 provided by the above-mentioned multiple embodiments of the present invention converts the coherent noise and decoherent noise generated between quantum bits in the quantum phase estimation process into random Pauli noise. Since random Pauli noise has statistical characteristics, it reduces the interference with the phase information of the quantum state passing through the unitary channel, thereby improving the accuracy of the quantum phase estimation algorithm.
[0104] The following describes the specific steps of adding random quantum gates to the first quantum logic gate sequence to generate the second quantum logic gate sequence in the method 10 for quantum phase estimation.
[0105] A quantum algorithm is determined according to a problem to be solved, and a first quantum logic gate sequence is generated according to a unitary operator to be solved in the quantum algorithm, and the first quantum logic gate sequence is divided into a plurality of time periods, such as Figure 3A shown. Figure 3A In the embodiment of the first quantum logic gate sequence, the first quantum logic gate sequence includes three time periods applied to four quantum bits (qubits). The first time period and the second time period respectively include a group of simple gates (single quantum bit gates) acting simultaneously and a group of complex gates (two-qubit Clifford gates) acting simultaneously, and the third time period includes a group of simple gates (single quantum bit gates) acting simultaneously. In some other embodiments, each time period of the first quantum logic gate sequence includes at least one simple gate acting simultaneously and / or at least one complex gate acting simultaneously, and such a time division method is also within the protection scope of the present invention.
[0106] like Figure 3B As shown, a random quantum gate is added in each time period of the first quantum logic gate sequence. In the initial time period of the first quantum logic gate sequence, a single-bit random quantum gate is added; in the second time period after the initial time period, a single-bit random quantum gate and a correction gate for reversing the random quantum gate of the previous time period (initial time period) are added; in the third time period, a correction gate for flipping the random quantum gate of the previous time period (second time period) is added. After adding the correction gate, the modified quantum circuit is logically equivalent to the original quantum circuit. Optionally, in this embodiment, in each time period, a random quantum gate is added corresponding to each quantum bit (qubit); in some other embodiments, the number of random quantum gates added may be less than the number of quantum bits, and these implementations are also within the protection scope of the present invention.
[0107] like Figure 3C As shown, in each time period of the first quantum logic gate sequence, the original simple gate (single-bit quantum gate) is combined with the added random quantum gate to generate a second quantum logic gate sequence. In some other embodiments, in certain time periods of the first quantum logic gate sequence, the simple gate corresponding to one or more qubits is an identity gate, that is, a transmission gate that does not change the quantum state. After these identity gates are combined with the random quantum gate, they are still the random quantum gates corresponding to the qubit. Figure 3C In the illustrated embodiment, the second quantum logic gate sequence generated includes three time periods applied to four quantum bits (qubits). Each time period includes a set of simple gates (single-qubit gates) acting simultaneously and a set of complex gates (two-qubit Clifford gates) acting simultaneously. The depth of the second quantum logic gate sequence generated is the same as the depth of the first quantum logic gate sequence.
[0108] The above steps of adding random quantum gates to the first quantum logic gate sequence corresponding to the specific quantum algorithm to generate the second quantum logic gate sequence are performed in the compilation unit 110. During the compilation process, the compilation unit 110 adds virtual random quantum gates to the first quantum logic gate sequence, and merges the virtual random quantum gates with the simple gates (single quantum bit gates) within the same time period to generate new simple gates (single quantum bit gates), and compiles the second quantum logic gate sequence to generate machine code (such as a timing pulse sequence) that can be executed by the quantum computing unit.
[0109] The random quantum gate described in one or more of the above embodiments includes a Pauli gate.
[0110] The number of quantum bits (qubits) corresponding to the first quantum logic gate sequence and the second quantum logic gate sequence described in one or more of the above embodiments is determined by the initial quantum state, that is, it is determined according to the superposition state of one eigenstate / multiple eigenstates of the unitary operator whose eigenvalue is to be solved.
[0111] The following describes a method for selecting a random quantum gate in the method 10 for quantum phase estimation provided by the present invention.
[0112] Assume that the first quantum logic gate sequence corresponding to the unitary operator to be solved in the quantum algorithm is divided into K time periods, each of which contains a set of simple gates (generally single-bit gates) and / or a set of complex gates (generally two-bit Clifford gates). In this case, the unitary channel can be expressed as:
[0113] U=G K C K …G k C k …G1C1
[0114] Among them C K is a set of simple gates in each time period, G K A set of complex gates in each time period.
[0115] Add a random quantum gate T in the Kth time period k , the simple gate C K Replace with:
[0116]
[0117] Here T k Uniformly randomly selected from the Pauli group. In the Kth time period, the random quantum gates added include the correction gate To correct the random quantum gate T in the Kth time period k-1 . Correction Gate By complex gate G k-1 The rotation effect is determined by:
[0118]
[0119] The quantum logic gate sequence (i.e. quantum circuit) obtained in this way is equivalent to the original quantum logic gate sequence (i.e. original circuit) when there is no noise, and the depth of the compiled new circuit is the same as that of the original circuit. When there is noise, after averaging the equivalent circuit results generated by random compilation, the noise in each time period is converted into random Pauli noise.
[0120] The quantum phase estimation method provided by one or more embodiments of the present invention applies random compilation to the periodic line phase estimation, and can convert the noise of each time period into random Pauli noise. Random Pauli noise meets the conditions given in Theorem 1 above, so the quantum phase estimation method provided by the present invention realizes the anti-noise design of periodic phase estimation.
[0121] According to one embodiment of the present invention, Figure 4 As shown, the present invention also provides a quantum phase estimation system 200, including a compilation unit 210, a quantum computing unit 220 and a classical computing unit 230. Wherein:
[0122] Compilation unit 210 is configured to:
[0123] Generate a first quantum logic gate sequence according to the problem to be solved and determine the initial quantum state;
[0124] Adding a random quantum gate to the first quantum logic gate sequence to generate a second quantum logic gate sequence;
[0125] The quantum computing unit 220 is coupled to the compiling unit 210 and configured to act on the initial quantum state with the second quantum logic gate sequence and measure the final quantum state;
[0126] The classical computing unit 230 is coupled to the quantum computing unit 220 and is configured to perform discrete Fourier transform on the measurement result to obtain a phase estimation value.
[0127] According to one embodiment of the present invention, in the quantum phase estimation system 200, the compiling unit 210 is further configured to:
[0128] Determine the unitary operator required for phase estimation according to the problem to be solved;
[0129] generating the first quantum logic gate sequence according to the unitary operator;
[0130] An eigenstate of the unitary operator or a superposition state of multiple eigenstates thereof is used as the initial quantum state.
[0131] According to one embodiment of the present invention, in the quantum phase estimation system 200, the compiling unit 210 is further configured to:
[0132] A timing pulse sequence is compiled and generated according to the second quantum logic gate sequence.
[0133] According to one embodiment of the present invention, in the quantum phase estimation system 200, the quantum computing unit 220 includes a quantum chip, and the quantum computing unit 220 is further configured as follows:
[0134] Initializing a corresponding region on the quantum chip according to the initial quantum state;
[0135] Light pulses are introduced into the corresponding area of the quantum chip according to the timing pulse sequence.
[0136] According to one embodiment of the present invention, in the quantum phase estimation system 200, the first quantum logic gate sequence is logically equivalent to the second quantum logic gate sequence, and the random quantum gate converts coherent noise in the quantum phase estimation process into random noise.
[0137] According to one embodiment of the present invention, in the quantum phase estimation system 200, the first quantum logic gate sequence includes at least one preset cycle, and the compiling unit 210 is further configured to:
[0138] A random quantum gate is added in each of the preset periods of the first quantum logic gate sequence.
[0139] According to one embodiment of the present invention, in the quantum phase estimation system 200, the compiling unit 210 is further configured to:
[0140] After the first preset period, a portion of the random quantum gates added in each preset period are configured as follows:
[0141] Reverse the random quantum gate added in the previous preset cycle.
[0142] According to one embodiment of the present invention, in the quantum phase estimation system 200, each of the preset cycles of the first quantum logic gate sequence includes: at least one first simple gate acting simultaneously and / or at least one complex gate acting simultaneously, and the compiling unit 210 is further configured to:
[0143] Merge at least one of the first simple gates and the random quantum gate in each of the preset periods to form at least one second simple gate;
[0144] The first simple gate and the second simple gate both include single-qubit quantum gates, the complex gate includes a two-qubit Clifford gate, and the random quantum gate includes a Pauli gate.
[0145] According to one embodiment of the present invention, in the quantum phase estimation system 200, the classical computing unit 230 is further configured as follows:
[0146] One or more frequency values are obtained by discrete Fourier transform, wherein each frequency value corresponds to a phase value of an essential state of the unitary operator.
[0147] According to one embodiment of the present invention, in the quantum phase estimation system 200, the quantum computing unit 220 includes one or more of a superconducting quantum chip, an ion trap quantum chip, a semiconductor quantum chip, an atomic quantum chip, and a photon quantum chip; the classical computing unit 230 includes one or more of a CPU and a GPU.
[0148] Other specific limitations of the quantum phase estimation system 200 are similar to the specific limitations of the quantum phase estimation method 10 described above, and can be referred to in the above introduction to the quantum phase estimation method 10, which will not be repeated here.
[0149] The following simulation experiment verifies the anti-noise performance of the quantum phase estimation method 10 and the quantum phase estimation system 200 provided by the present invention. The simulation experiment studies the order-finding problem. Solving the order-finding problem is equivalent to the factorization problem, which is also the core step of Shor's algorithm. In the order-finding problem, given two mutually prime natural numbers x and N, it is necessary to solve the smallest positive integer r such that x r = 1 (mod N). This problem can be solved by estimating the phase of a class of unitary operators U, which function as follows:
[0150] U|y>=|xy(mod N)>
[0151] where |y> is a quantum state in the computational basis.
[0152] In this experiment, let x = 7, N = 15. The corresponding quantum logic gate sequence (quantum circuit) is as follows Figure 5A As shown, it includes four time periods acting on 4 quantum bits, wherein the first time period, the second time period and the third time period each include a complex gate, and the fourth time period includes four simple gates.
[0153] First, Figure 5A The periodic quantum circuit shown is prepared to the |0001> state (superposition of multiple eigenstates of the unitary operator U), and then repeatedly acts Figure 5A The quantum circuit shown is repeated L times, assuming L = 1-100. Finally, the result is measured on the computational basis, and the probability of obtaining the |0001> state is recorded as the result. An example of a complete logic gate sequence (periodic circuit) is Figure 5B As shown, where L=1.
[0154] Next, by using the quantum phase estimation method 10 provided by the present invention as described above, random compilation generates a random quantum circuit equivalent to the original quantum circuit, and Figure 5B An equivalent embodiment of a random quantum circuit is Figure 5CAs shown, phase estimation is performed via randomly compiled quantum circuits.
[0155] First, use Figure 5B The quantum circuit shown in the figure is simulated without noise, and the result is as follows Figure 6 As shown, the probability of obtaining the |0001> state is transformed into the frequency domain through Fourier transform. The positions corresponding to the peaks are 0, 25, and 50. The phase estimates can be obtained as 0, 1 / 4, and 2 / 4. r = 4 is obtained.
[0156] exist Figure 5B The simulation results of adding coherent noise after each quantum gate in the quantum circuit shown are as follows Figure 7 As shown in Figure 2, multiple erroneous peaks appear in the frequency domain, making it impossible to correctly estimate the quantum phase.
[0157] Finally use Figure 5C The simulation results of the quantum circuit shown in Figure 1, with coherent noise added after each quantum gate, are as follows: Figure 8 shown.
[0158] It can be seen Figure 7 False spikes introduced by noise are completely eliminated. Figure 8 The peak position in Figure 6 The situation is exactly the same for the noise-free simulation.
[0159] The quantum phase estimation method and quantum phase estimation system provided by the present invention convert the coherent noise and decoherent noise between quantum bits into random Pauli noise through secondary compilation. Due to the statistical characteristics of random Pauli noise, the noise of quantum phase estimation performed using the quantum phase estimation method or quantum phase estimation system is reduced, and the accuracy of quantum phase estimation is improved, thereby realizing a universal and feasible solution for noise-resistant quantum phase estimation.
[0160] The quantum bits involved in the present invention include information carriers having a 0 state, a 1 state, and a superposition state.
[0161] The quantum chip involved in the present invention includes a wafer provided with one or more quantum bits and is capable of performing quantum gate operations.
[0162] The quantum computing involved in the present invention includes using appropriate quantum bit gate operations to implement corresponding quantum algorithms based on the coherent superposition and entanglement characteristics of quantum bits.
[0163] The quantum phase estimation involved in the present invention is applicable to a variety of quantum algorithms, including but not limited to Shor's algorithm and Hamiltonian energy spectrum estimation algorithm.
Claims
1. A method for quantum phase estimation, characterized in that: include: Generate a first quantum logic gate sequence and determine an initial quantum state according to the problem to be solved, and determine a unitary operator for which phase estimation is required according to the problem to be solved; Adding a random quantum gate to the first quantum logic gate sequence to generate a second quantum logic gate sequence; Applying the second quantum logic gate sequence to the initial quantum state and measuring the final quantum state; Performing a discrete Fourier transform on the measurement result, and obtaining one or more frequency values through the discrete Fourier transform, wherein each of the frequency values corresponds to a phase value of an eigenstate of the unitary operator, wherein The first quantum logic gate sequence is logically equivalent to the second quantum logic gate sequence, and the random quantum gate converts coherent noise in the quantum phase estimation process into random noise.
2. The method for quantum phase estimation as claimed in claim 1, wherein generating a first quantum logic gate sequence according to the problem to be solved and determining an initial quantum state comprises: generating the first quantum logic gate sequence according to the unitary operator; An eigenstate of the unitary operator or a superposition state of multiple eigenstates thereof is used as the initial quantum state.
3. The method for quantum phase estimation as claimed in claim 1 or 2, further comprising: Compile and generate a sequential pulse sequence according to the second quantum logic gate sequence; The corresponding area on the quantum chip is initialized according to the initial quantum state.
4. The method for quantum phase estimation as claimed in claim 3, wherein said applying said second sequence of quantum logic gates to said initial quantum state comprises: Light pulses are introduced into the corresponding area of the quantum chip according to the timing pulse sequence.
5. The method for quantum phase estimation according to claim 1 or 2, wherein the first quantum logic gate sequence includes at least one preset period, and the adding of random quantum gates to the first quantum logic gate sequence to generate the second quantum logic gate sequence comprises: A random quantum gate is added in each of the preset periods of the first quantum logic gate sequence.
6. The method for quantum phase estimation as claimed in claim 5, wherein adding a random quantum gate to the first quantum logic gate sequence to generate a second quantum logic gate sequence further comprises: After the first preset period, a portion of the random quantum gates added in each preset period are configured as follows: Reverse the random quantum gate added in the previous preset cycle.
7. The method for quantum phase estimation as claimed in claim 5, wherein each of the preset cycles of the first quantum logic gate sequence comprises: at least one first simple gate acting simultaneously and / or at least one complex gate acting simultaneously, wherein adding a random quantum gate to the first quantum logic gate sequence to generate a second quantum logic gate sequence further comprises: At least one of the first simple gates in each of the preset periods is combined with the random quantum gate to form at least one second simple gate that acts simultaneously.
8. The method for quantum phase estimation as claimed in claim 7, wherein the first simple gate and the second simple gate each comprise a single-bit quantum gate, the complex gate comprises a two-bit Clifford gate, and the random quantum gate comprises a Pauli gate.
9. A quantum phase estimation system, characterized in that: include: Compilation unit, configured as: Generate a first quantum logic gate sequence and determine an initial quantum state according to the problem to be solved, and determine a unitary operator for which phase estimation is required according to the problem to be solved; Adding a random quantum gate to the first quantum logic gate sequence to generate a second quantum logic gate sequence; a quantum computing unit, coupled to the compilation unit, configured to act on the initial quantum state with the second quantum logic gate sequence and measure the final quantum state; A classical computing unit is coupled to the quantum computing unit and configured to perform a discrete Fourier transform on the measurement result, and obtain one or more frequency values through the discrete Fourier transform, wherein each of the frequency values corresponds to a phase value of an eigenstate of the unitary operator, wherein The first quantum logic gate sequence is logically equivalent to the second quantum logic gate sequence, and the random quantum gate converts coherent noise in the quantum phase estimation process into random noise.
10. The quantum phase estimation system of claim 9, wherein the compilation unit is further configured to: generating the first quantum logic gate sequence according to the unitary operator; An eigenstate of the unitary operator or a superposition state of multiple eigenstates thereof is used as the initial quantum state.
11. The quantum phase estimation system of claim 9 or 10, wherein the compilation unit is further configured to: A timing pulse sequence is compiled and generated according to the second quantum logic gate sequence.
12. The quantum phase estimation system of claim 11, wherein the quantum computing unit comprises a quantum chip, the quantum computing unit being further configured to: Initializing a corresponding region on the quantum chip according to the initial quantum state; Light pulses are introduced into the corresponding area of the quantum chip according to the timing pulse sequence.
13. The quantum phase estimation system according to claim 9 or 10, wherein the first quantum logic gate sequence comprises at least one preset period, and the compilation unit is further configured to: A random quantum gate is added in each of the preset periods of the first quantum logic gate sequence.
14. The quantum phase estimation system of claim 13, wherein the compilation unit is further configured to: After the first preset period, a portion of the random quantum gates added in each preset period are configured as follows: Reverse the random quantum gate added in the previous preset cycle.
15. The quantum phase estimation system of claim 13, wherein each of the predetermined cycles of the first quantum logic gate sequence comprises: at least one first simple gate acting simultaneously and / or at least one complex gate acting simultaneously, the compilation unit is further configured to: Merge at least one of the first simple gates and the random quantum gate in each of the preset periods to form at least one second simple gate; The first simple gate and the second simple gate both include single-bit quantum gates, the complex gate includes a two-bit Clifford gate, and the random quantum gate includes a Pauli gate.
16. A quantum phase estimation system as described in claim 9 or 10, wherein the quantum computing unit includes one or more of a superconducting quantum chip, an ion trap quantum chip, a semiconductor quantum chip, an atomic quantum chip, and a photon quantum chip; and the classical computing unit includes one or more of a CPU and a GPU.
Citation Information
Patent Citations
Randomized Compiling for Quantum Computation
US20170308803A1