171 results about "System verification" patented technology

A system establishes a secure connection between a first entity and a second entity upon validating a digital signature of a digital certificate. The digital signature is validated utilizing a trust anchor public key corresponding to a security token issued by a trust anchor that is trusted by the first entity and the second entity. In response to a request to establish the secure connection, the system validates the security token issued by the trust anchor to establish trust between the first entity and the second entity. Upon validating the security token, the system validates the digital signature of the digital certificate utilizing an entity public key embedded in the security token. Based on the trust established by the security token, the digital certificate is trusted upon validating the digital signature. Upon validating the digital signature, the system establishes the secure connection between the first entity and the second entity.

The invention belongs to the technical field of integrated circuit simulation verification, particularly relates to an RISC-V simulation resource dynamic generation method and system, and solves the problems of instruction consistency and variable-length instruction truncation through a metadata double-table structure and a cross-boundary instruction splicing mechanism. Virtualized two-stage translation support and abnormal injection are realized through a recursive multiple hit detection and dynamic attribute bit modification mechanism. According to the method, complete storage is replaced with lightweight metadata, memory occupation is remarkably reduced, the problem that memory occupation is linearly increased along with time is solved, simulation efficiency and consistency are improved, and the method is suitable for full-system verification of a high-performance RISC-V processor.

The invention relates to the technical field of voice processing, can be applied to business scenes of financial science and technology, medical health and the like, and discloses a voice-driven information recording and checking method, device, equipment and medium. Key fields are extracted by applying a semantic analysis strategy to form preliminary structured data, an independent data system is connected to verify authenticity and generate data conflict information, and automatic error correction is executed based on the conflict information to generate updated structured data; and according to the user role matching output template, filling the template with the updated structured data to generate display content, and pushing the display content to target terminal equipment. Structured data generation is realized through voice input and semantic analysis, the data accuracy is improved by combining cross-system verification and automatic error correction, personalized display and real-time pushing are realized by utilizing a role matching template, and a closed loop of acquisition, verification and display is formed, so that the efficiency of information recording and management is improved.

Disclosed are example methods, systems, and devices for allowing caller computing devices to authenticate calls via a service provider computing system. Users may opt to have entities register to contact the user with a positive ID, icon, or other notification on the user's computing device transmitted by the service provider computing system. A caller computing device may use a unique security token of the user to activate the notification on the user's device. The user device may be used to exert control over the security token via a service provider client application running on the user device. The caller computing device may initiate authentication via an API call to the service provider computing system. The caller computing device is able to have items (text, images, documents, etc.) delivered to the user computing device if authenticated.

The invention relates to the technical field of data processing, in particular to a test method and device based on a large model. In the embodiment of the invention, the electronic equipment calls the large model to generate a large batch of target questions and corresponding reference answers according to the knowledge data stored in the knowledge base, so that a high-quality question and answer data set is efficiently generated; and calling the to-be-tested system to reply each target question to obtain a target answer corresponding to each target question, scoring the target answers according to the reference answers corresponding to each target question so as to obtain an effect evaluation report of the to-be-tested system, and automatically verifying the accuracy of the to-be-tested system based on the question and answer data set. And the verification quality and efficiency of the to-be-tested system are improved.

The invention relates to a Schema-driven green building assessment method and system, and the core of the method is an autonomous assessment agent which takes off-line constructed Schema as an action instruction. In the evaluation process, the intelligent agent calls a knowledge base retrieval tool internally executing a coarse screening and fine selection two-stage mixed retrieval strategy according to the requirement of Schema so as to accurately position evidences, and finally a language model is guided to complete constraint information extraction and report generation. The prototype system verification shows that the method effectively improves the automation degree, the accuracy and the traceability of report generation, and provides a set of low-cost and high-controllability solution for constructing the man-machine collaborative intelligent assessment workflow.

The invention discloses a digital chip verification method and device, electronic equipment and a computer readable storage medium, the method and device are applied to a verification system, the verification system comprises a software simulation platform and a hardware verification platform, and the method comprises the following steps: determining a to-be-tested code of a target digital chip; utilizing the software simulation platform to generate an excitation signal according to the to-be-tested code, and sending the excitation signal to a hardware verification platform; executing verification operation on the target digital chip by using the hardware verification platform according to the excitation signal to obtain a hardware verification result; when the hardware verification result has abnormal information, determining an abnormal node in the to-be-tested code, and debugging at the abnormal node by using a software simulation platform to obtain a software simulation result; and determining a final verification result of the target digital chip according to the hardware verification result and the software simulation result. By applying the technical scheme provided by the invention, more flexible and efficient digital chip verification can be realized.

The invention relates to an embedded chip simulation and debugging method and system. The method comprises the following steps: expanding an instruction decoding module, a register description module and a breakpoint management module which support a C28x instruction set in a GDB debugger, and generating a special debugging front-end program; the method comprises the following steps: expanding a C28x JTAG protocol adaptation module in an OpenOCD debugging agent, and generating a debugging agent program; a C28x instruction set execution simulation unit is realized in the NEMU simulator, and a GDB Server communication module is embedded in the NEMU simulator; seamless switching between a simulation debugging mode and a hardware debugging mode is realized based on a unified configuration file through a software and hardware debugging environment rapid switching control module. The problems that a traditional debugging mode depends on a special hardware simulator, the cost is high and the simulation environment is inaccurate are solved, and through an integrated software and hardware collaborative debugging scheme, the debugging cost is greatly reduced, and the development efficiency and the comprehensiveness of system verification are improved.

The invention provides an SMT solver rewriting system defect detection method based on rewriting space exploration, and aims to solve the problems that in the prior art, an SMT solver rewriting system is insufficient in verification, test input is difficult to trigger a rewriting rule, errors are difficult to verify and the like. The method comprises the following steps: 1) collecting and automatically verifying rewriting rules in an SMT solver, and constructing a high-quality rule base; 2) performing structure transformation on the existing test formula by adopting mimicry variation to enable the existing test formula to be matched with a rewriting rule mode, thereby activating more rewriting opportunities; 3) constructing an equivalence graph based on a generative equivalence saturation technology, and systematically generating semantic equivalence but structural diversity formula variants; and 4) inputting the original formula and the variant formula into an SMT solver, comparing the solving result with the performance behavior, and detecting potential defects. The invention also provides corresponding system implementation, and supports an automatic test process, rule management, formula generation and defect recording.

A verification system includes: a first verification device that verifies integrity of a first verification target; and a second verification device that has a higher security privilege than the first verification device and verifies integrity of the first verification device. The first verification device includes: a first verifier that refers to first verification related information including first verification target information and a first expected value, generates a first verification value by performing the predetermined operation on data on a first storage area storing the first program, and verifies integrity by comparing the first verification value with the first expected value; and a first updater that accepts a first update request for updating the first verification related information when receiving the first update request from the second verification device or when receiving the first update request while the first verification related information is updated, and updates the first verification related information.

This application provides a verification system, verification method, apparatus, and related devices. The verification system includes two cache consistency slave device verification units, each configured with a main address region and a mirror address region. The mirror data in the mirror address region of one cache consistency slave device verification unit is the data in the main address region of the other cache consistency slave device verification unit. When a mirroring operation is triggered between the two cache consistency slave device verification units, the correctness of the mirror data in the mirror address region is verified. The verification is determined by comparing the data in the main address region of one cache consistency slave device verification unit with the mirror data in the mirror address region of the other cache consistency slave device verification unit. This application avoids the complex processes of traditional verification, comprehensively reduces verification overhead, and thus improves the verification efficiency of memory address mirroring functionality.

The invention relates to a method for verifying the origin of an electronic unit (1) for a control device (2) using a verification system (3), comprising the steps of: receiving a certificate signing request (7) for digitally certifying the control device (2) with the electronic unit (1) from a requesting instance using a receiving device (4) of the verification system (3), wherein the certificate signing request (7) is signed with a wrapper signature (8) of the electronic unit (1); generating a verification request (9) with a manufacturer of the electronic unit (1) based on the received wrapper signature (8) using an electronic computing device (6) of the verification system (3); transmitting the verification request (9) to the manufacturer using a sending device (5) of the verification system (3);Receiving a verification message (11) for verifying the electronic unit (1) from the manufacturer using the receiving device (4); and verifying the origin of the electronic unit (1) depending on the verification message (11) using the electronic computing device (6). The invention further relates to a computer program product and a verification system (3).

Disclosed are a method and apparatus for mirror image verification based on a dual-chain-of-trust mechanism, a device, and a medium. The method for mirror image verification based on a dual-chain-of-trust mechanism comprises: determining a read-only file system on the basis of an original mirror image file system and target operating system verification information; constructing a signed mirror image by means of the read-only file system, a root hash value file generated on the basis of the read-only file system, a customized public key, and a signature result of a customized private key on the root hash value file, the root hash value file being obtained on the basis of a device mapper verification method of a hardware manufacturer chain-of-trust mechanism, and the customized public key being stored in a one-time programmable region; performing a target operation on the customized public key to obtain a first encrypted value, writing the first encrypted value into a verified mirror image, and burning the signed mirror image into a device flash memory; after the device is powered on, mounting the signed mirror image on the basis of a startup script of the started verified mirror image, and performing a target operation on the customized public key in the signed mirror image to obtain a second encrypted value; and if the first encrypted value is the same as the second encrypted value, verifying the root hash value file on the basis of the customized public key and the signature result, and if the verification passes, implementing verified boot of the target operating system by means of the root hash value file, so as to ensure the reliability of the chain-of-trust mechanism of the target operating system.

The invention provides an access control terminal response method based on data line signal reading, which realizes a closed loop process of temporary charging, identity signal reading and system verification through a data line of an access control, and is in communication connection with an access control management system through a data line with data communication and charging functions configured by an access control terminal. Output management, signal reading and response control are realized; and when the user fails to try to scan the access control terminal or the electric quantity of the user terminal is lower than a preset threshold value, the access control terminal prompts the user to connect the user terminal to the access control terminal through the data line, reads data, verifies the data and performs access control. Through the processes of data line connection, temporary charging, signal reading and system verification, the problem that a user cannot open a door due to terminal power failure / code scanning failure is solved, and meanwhile, the safety of identity verification is ensured through multiple safety mechanisms.

Embodiments of this application disclose an in-path verification method and system, a verification point, a translation point, a terminal, and a storage medium, and relate to the field of communication technologies. In the method, the verification point receives a first packet from a terminal, where the first packet includes an unencrypted first in-path verification header, and the first in-path verification header carries a first profile index; the verification point determines a second profile index based on the first profile index, where the second profile index is a real index of a profile used in the first in-path verification header; and the verification point verifies the first packet based on a profile indicated by the second profile index. In other words, a profile index transmitted in a network is an obfuscated profile index. In this way, even if an attacker obtains the obfuscated profile index, a relative position of each field in an in-path verification header cannot be obtained based on the obfuscated profile index. Therefore, network security of a packet can be improved. In addition, in this manner, there is no need to separately encrypt the in-path verification header. Therefore, packet transmission pressure of the network can also be reduced.

The present disclosure involves systems, software, and computer implemented methods for age-restricted access to a locker bank. An example method includes receiving an indication from an agent computing device at a physical location that an age and identity of a user requesting pickup of an age-restricted item have been verified. The physical location includes a locker that includes the item. An unlock code is generated for the user for the item in response to receiving the indication. The unlock code is provided to a user computing device and to a locker system. A user-provided unlock code is received at the locker system. The locker system verifies that the user-provided unlock code has not expired and matches the generated unlock code. An unlocking of the locker for the user is triggered in response to determining that the user-provided code matches the generated code.

The invention relates to the field of instruments and meters, and particularly discloses a measurement method for verification and calibration work of a digital piston type pressure gauge system, the system comprises a piston system, a force value sensing assembly, a positioning system, a pressure medium circulating system, a pressure output system and a control unit, and the core adopts a high-precision force value sensor to replace a traditional weight. Point contact force value transmission is achieved through a conduction steel ball, a piston motor is matched to drive a rotating disc to be linked with a rotating contact, stable rotation of a piston rod is ensured, and a medium oil film is formed. The control unit receives signals of the sensor and the piston position indicator and automatically completes pressure adjustment, data acquisition and error calculation. The force value transmission precision reaches 0.0005%, multi-range and multi-instrument measurement requirements can be met through a multi-stage piston structure and a multi-pressure-measuring-port design, full-process automation is achieved, and in addition, accurate output of all pressure points in the measurement range can be achieved by means of the wide-range sensing capacity of the high-precision force value sensor and the fine adjusting function of the pressure adjusting unit.

The invention provides a resonant converter parameter optimization method and system of an electric vertical take-off and landing aircraft, and relates to the technical field of aviation power electronics. The method comprises the following steps: constructing an improved equivalent circuit model containing transformer secondary side leakage inductance; deriving a voltage gain function expression of the improved equivalent circuit model and an optimization calculation formula of the excitation inductance required for realizing the soft switching; parameter optimization is carried out based on the voltage gain function expression and the excitation inductance optimization calculation formula; and building an LLC resonant converter experimental prototype according to the optimized parameters, and carrying out system verification and performance evaluation. According to the invention, the problem of performance reduction caused by neglecting secondary side leakage inductance under a high-frequency working condition in a traditional design is solved, the efficiency, the voltage stabilization precision and the power density of the converter are remarkably improved, and the high requirement of eVTOL on an airborne power supply is met.

This invention provides an information processing device, system, verification method, and program that improve digital certificate verification technology. [Solution] In a system in which an information processing device and a terminal device are connected to a network including a mobile communication network and the Internet, the information processing device 10 includes a control unit 11 that acquires attribute information associated with a digital certificate and identification information related to the digital certificate, verifies the digital certificate based on the attribute information and identification information, and outputs the verification result of the digital certificate.

The application provides a medicine distribution verification method and system based on image recognition. The delivery process including a continuous action sequence is forcibly guided and verified, which fundamentally eliminates cheating behaviors such as pre-stored photos and staged photos. The system verification must rely on specific actions completed in real time, which improves the cost of fraud. At the same time, the verification process is visualized, standardized, automated, evidence-based and traceable. Through the collection and fusion analysis of action information such as action video, environmental continuous parameters and medicine packaging information, the compliance, effectiveness, authenticity and continuity of the medical and pharmaceutical delivery process are ensured, and an unalterable verification record is generated, solving the credibility and traceability problem of the end verification of medicine distribution.

The invention provides a pointer type simulation meter verification system and verification method based on machine vision, and relates to the technical field of metrological verification. The system comprises an industrial CCD camera, a controller, an image acquisition module, a communication input and output module, a computer, a multifunctional source and a printer, the verification method is automatically realized through the whole process of image acquisition, preprocessing, pointer and scale identification, error calculation and conclusion generation. The core innovation lies in that multi-algorithm fusion of a subtraction method, image refinement and scale correction is adopted, and in combination with the design of an in-situ adaptive fixing bracket, the pain points of limited field observation, large workload and emergency tasks are solved. The verification point identification precision of the system is greater than or equal to 99.8%, the verification time of a single meter is shortened by more than 60%, the system is suitable for multi-meter and multi-verification-point verification requirements of military power supply vehicles, charging cabinets and other scenes, and the field metering guarantee efficiency and accuracy are significantly improved.

The invention discloses an automatic driving test method and system. Belongs to the technical field of automatic driving testing. According to the method, a high-fidelity virtual environment is constructed by collecting real scene data, and a virtual sensor is configured; mapping the real track to a virtual space, and generating a dynamic traffic flow in combination with a car following and lane changing model; after the real vehicle and the virtual intelligent agent are synchronously initialized, the real vehicle runs in the physical field and periodically updates the state; the virtual traffic flow is dynamically evolved according to the state of the main vehicle, and the virtual sensor senses the target in the field of view and generates a virtual sensing result; real sensor data is used as a reference, and virtual and real perception information is fused to form unified input; and circularly executing until the task is completed, wherein each virtual agent only participates in one test. According to the scheme, high-reality and high-efficiency closed-loop testing is achieved, the defects of a traditional method in the aspects of scene richness and testing safety are overcome, and the reliability and repeatability of verification of the automatic driving system are improved.

The invention discloses an aircraft power supply system comprehensive verification test system electrical interface accurate mapping method and device, a medium and equipment, and the method achieves bidirectional electrical interface mapping between a digital simulation system and a physical test system. A first simulation signal, a second simulation signal and a third simulation signal output by the digital simulation system are respectively processed by algorithms such as series cable voltage drop compensation, voltage and current protection and closed-loop delay compensation to generate corresponding electrical simulation signals, and then the electrical simulation signals pass through AOamp; the DO board card, the power driving device, the test exciter / measurement and control device and the like process the signals into electrical signals, and the electrical signals are input into the physical test system to drive the physical test system to verify the test; in the reverse mapping, a real object driving signal of the real object test system is subjected to filtering, compensation, reduction and rate conversion and then is input into the digital simulation system to drive the simulation of the power supply system model. According to the invention, accurate mapping of the electrical interface signal is realized through multi-algorithm cooperation, and the accuracy and reliability of the comprehensive verification test system of the aircraft power supply system are improved.

Techniques for creating a custom metric type to be added to a set of metrics generated by a data monitoring platform at run-time are disclosed. A system receives values defining properties of a custom metric type based on a custom metric template and a custom schema template. The system generates an instruction set, based on the values associated with the custom metric template, for generating the custom metric type on an executing data monitoring system. The system validates the instruction set and the custom schema to verify that the definitions for the custom metric type and the custom schema may be executed by the data monitoring system. The system adds the custom metric type, at run-time, to a set of metrics generated by the data monitoring system.

The application discloses a rendering precalculation system for power grid data, and relates to the technical field of power grid data.The rendering precalculation system comprises a data acquisition module, a data integration processing module, a rendering processing module, a display module, a data selection module, a data preprocessing module, a system verification module and a display selection module.The data acquisition module is responsible for collecting a large amount of real-time and historical data from various sensors, monitoring devices and databases of a power grid.The data integration processing module is used for integrating and processing the data collected by the data acquisition module, so that the data of the data acquisition module is more convenient for the rendering processing module to use after being arranged.The application filters and pre-processes data in priority through the data selection module, calls historical rendering data through a data comparison module, and starts system verification at regular time intervals through a timing module in the system verification module, so that the system operation efficiency is improved, the waste of computing resource is reduced, and the system operation stability is enhanced.

This invention discloses a multi-GPU simulation method based on the Gem5 framework for wafer-level systems. The method includes: building a Gem5 system simulation environment, downloading source files, compiling, and running them; creating multiple GPU components and connecting the L2 caches of each GPU to a Directory, which then points to the memory segments belonging to each GPU; modifying the ROCk driver to create multiple software queues for one or more programs and assigning them to multiple GPUs, creating a doorbell region for each GPU; and using the built Gem5 system to simulate and test the multi-GPU wafer-level system and verify its performance. This invention achieves communication, interaction, and scheduling between multiple GPUs, thereby reducing the design time of the wafer-level system and lowering the system verification cost. This invention also discloses a GPU simulation device and storage medium based on Gem5.

The invention relates to the technical field of power distribution automation system verification, in particular to a power distribution network automation master station multi-terminal coordination verification method, system and device and a storage medium. Acquiring system parameters of a master station of the power distribution network and constructing a verification topology, wherein the verification topology comprises a connection relationship and a communication path between the master station and a plurality of terminal devices; a multi-terminal cooperative operation scene is simulated by verifying topology, state response data of each terminal is collected, a cooperative response mode is identified, and a communication adaptation layer is established to realize protocol conversion and data format unification between terminal devices of different manufacturers; a verification scene library including normal operation, fault switching and load change is generated according to the actual operation condition of the power distribution network, a coordination instruction is issued to the multiple terminal devices through the communication adaptation layer, a terminal response time sequence and an execution result are collected, and multi-terminal coordination verification is completed; and comprehensively evaluating the terminal response consistency, the communication path stability and the coordination control in the verification process, and generating a verification report.

The embodiment of the application provides a kind of bus controller's verification device, method and system.The verification device includes: virtual processor and verification module;Virtual processor includes the virtual bus controller to be measured;Wherein, virtual processor and the virtual bus controller to be measured are hardware description file;Virtual processor is used to send bus control instruction to verification module by communication module according to the verification demand issued by host computer;Verification module is used to carry out bus data frame transmission with the virtual bus controller to be measured by bus transceiver according to bus control instruction;Host computer is used to verify the virtual bus controller to be measured according to the bus data frame received by the virtual bus controller to be measured.The scheme can verify the prototype of bus controller, can detect the error in design stage, and developer can modify the design of bus controller according to the verification result, reduce the cost and time loss caused by failure in later period.

The present application relates to the technical field of integrated circuit layout detection, and particularly relates to a curve layout test pattern generation method and system based on machine learning, comprising: obtaining historical curve layout data and preprocessing to obtain an effective data set; extracting geometric and defect correlation features, and obtaining a feature matrix through correlation analysis and dimension reduction; generating a defect mode label by K-means clustering combined with contour coefficient correction clustering number; inputting the feature matrix and the label into a classification model to output parameters to generate an initial test pattern, and obtaining an optimized test pattern through redundancy and coverage optimization; importing a test system for verification, and if the verification does not meet the standard, the model is retrained, and if the verification meets the standard, the final pattern is output. The present application realizes accurate identification of defect modes with the aid of machine learning, balances detection accuracy and efficiency, improves the applicability of test patterns, and is suitable for integrated circuit curve layout detection.

The invention belongs to the technical field of energy storage, and discloses a lithium battery energy storage fire extinguishing system performance verification method based on simulation object coupling, and the verification method comprises the following steps: 1, constructing an energy storage fire extinguishing system verification platform; step 2, test design; step 3, setting a virtual sensing point; 4, a fire extinguishing system judges and feeds back; 5, performing batch simulation; and step 6, effectiveness evaluation. According to the method, the energy storage cabin space environment consistent with reality is constructed through three-dimensional simulation, the thermal runaway temperature of the battery and the harmful gas diffusion effect can be calculated, and construction of a complex entity test environment is omitted. Real object sensing is replaced by virtual sensing to transmit data, a large number of random and repeated tests are carried out, whether fire fighting system alarm and equipment response and action time reach the standard or not is verified, and the cost is greatly reduced. Manpower and material resource consumption and danger of entity experiments are avoided, and a large number of experiments can be rapidly carried out to verify the accuracy of the fire-fighting system and evaluate the effectiveness and failure probability of the fire-fighting system.